fix set but unused variable warnings
[deliverable/binutils-gdb.git] / opcodes / ChangeLog
1 2010-06-27 Alan Modra <amodra@gmail.com>
2
3 * arc-dis.c (arc_sprintf): Delete set but unused variables.
4 (decodeInstr): Likewise.
5 * dlx-dis.c (print_insn_dlx): Likewise.
6 * h8300-dis.c (bfd_h8_disassemble_init): Likewise.
7 * maxq-dis.c (check_move, print_insn): Likewise.
8 * mep-dis.c (mep_examine_ivc2_insns): Likewise.
9 * msp430-dis.c (msp430_branchinstr): Likewise.
10 * bfin-dis.c (_print_insn_bfin): Avoid set but unused warning.
11 * cgen-asm.in (parse_insn_normal, _cgen_assemble_insn): Likewise.
12 * sparc-dis.c (print_insn_sparc): Likewise.
13 * fr30-asm.c: Regenerate.
14 * frv-asm.c: Regenerate.
15 * ip2k-asm.c: Regenerate.
16 * iq2000-asm.c: Regenerate.
17 * lm32-asm.c: Regenerate.
18 * m32c-asm.c: Regenerate.
19 * m32r-asm.c: Regenerate.
20 * mep-asm.c: Regenerate.
21 * mt-asm.c: Regenerate.
22 * openrisc-asm.c: Regenerate.
23 * xc16x-asm.c: Regenerate.
24 * xstormy16-asm.c: Regenerate.
25
26 2010-06-16 Vincent Rivière <vincent.riviere@freesbee.fr>
27
28 PR gas/11673
29 * m68k-opc.c (m68k_opcodes): Remove move.l for isab and later.
30
31 2010-06-16 Vincent Rivière <vincent.riviere@freesbee.fr>
32
33 PR binutils/11676
34 * m68k-dis.c (print_insn_arg): Prefix float constants with #0e.
35
36 2010-06-14 Sebastian Andrzej Siewior <bigeasy@linutronix.de>
37
38 * ppc-dis.c (ppc_opts): Remove PPC_OPCODE_E500MC from e500 and
39 e500x2. Add PPC_OPCODE_E500 to e500 and e500x2
40 * ppc-opc.c (powerpc_opcodes): Deprecate all opcodes on EFS which
41 touch floating point regs and are enabled by COM, PPC or PPCCOM.
42 Treat sync as msync on e500. Treat eieio as mbar 1 on e500.
43 Treat lwsync as msync on e500.
44
45 2010-06-07 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
46
47 * arm-dis.c (thumb-opcodes): Add disassembly for movs.
48
49 2010-05-28 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
50
51 * arm-dis.c (print_insn_neon): Ensure disassembly of Neon
52 constants is the same on 32-bit and 64-bit hosts.
53
54 2010-05-27 Jason Duerstock <jason.duerstock+binutils@gmail.com>
55
56 * m68k-dis.c (print_insn_m68k): Emit undefined instructions as
57 .short directives so that they can be reassembled.
58
59 2010-05-26 Catherine Moore <clm@codesourcery.com>
60 David Ung <davidu@mips.com>
61
62 * mips-opc.c: Change membership to I1 for instructions ssnop and
63 ehb.
64
65 2010-05-26 H.J. Lu <hongjiu.lu@intel.com>
66
67 * i386-dis.c (sib): New.
68 (get_sib): Likewise.
69 (print_insn): Call get_sib.
70 OP_E_memory): Use sib.
71
72 2010-05-26 Catherine Moore <clm@codesoourcery.com>
73
74 * mips-dis.c (mips_arch): Remove INSN_MIPS16.
75 * mips-opc.c (I16): Remove.
76 (mips_builtin_op): Reclassify jalx.
77
78 2010-05-19 Alan Modra <amodra@gmail.com>
79
80 * ppc-opc.c (powerpc_opcodes): Enable divdeu, devweu, divde,
81 divwe, divdeuo, divweuo, divdeo, divweo for A2. Add icswepx.
82
83 2010-05-13 Alan Modra <amodra@gmail.com>
84
85 * ppc-opc.c (powerpc_opcodes): Correct wclr encoding.
86
87 2010-05-11 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
88
89 * arm-dis.c (thumb_opcodes): Update ldmia entry to use new %W
90 format.
91 (print_insn_thumb16): Add support for new %W format.
92
93 2010-05-07 Tristan Gingold <gingold@adacore.com>
94
95 * Makefile.in: Regenerate with automake 1.11.1.
96 * aclocal.m4: Ditto.
97
98 2010-05-05 Nick Clifton <nickc@redhat.com>
99
100 * po/es.po: Updated Spanish translation.
101
102 2010-04-22 Nick Clifton <nickc@redhat.com>
103
104 * po/opcodes.pot: Updated by the Translation project.
105 * po/vi.po: Updated Vietnamese translation.
106
107 2010-04-16 H.J. Lu <hongjiu.lu@intel.com>
108
109 * i386-dis.c (get_valid_dis386): Return bad_opcode on unknown
110 bits in opcode.
111
112 2010-04-09 Nick Clifton <nickc@redhat.com>
113
114 * i386-dis.c (print_insn): Remove unused variable op.
115 (OP_sI): Remove unused variable mask.
116
117 2010-04-07 Alan Modra <amodra@gmail.com>
118
119 * configure: Regenerate.
120
121 2010-04-06 Peter Bergner <bergner@vnet.ibm.com>
122
123 * ppc-opc.c (RBOPT): New define.
124 ("dccci"): Enable for PPCA2. Make operands optional.
125 ("iccci"): Likewise. Do not deprecate for PPC476.
126
127 2010-04-02 Masaki Muranaka <monaka@monami-software.com>
128
129 * cr16-opc.c (cr16_instruction): Fix typo in comment.
130
131 2010-03-25 Joseph Myers <joseph@codesourcery.com>
132
133 * Makefile.am (TARGET_LIBOPCODES_CFILES): Add tic6x-dis.c.
134 * Makefile.in: Regenerate.
135 * configure.in (bfd_tic6x_arch): New.
136 * configure: Regenerate.
137 * disassemble.c (ARCH_tic6x): Define if ARCH_all.
138 (disassembler): Handle TI C6X.
139 * tic6x-dis.c: New.
140
141 2010-03-24 Mike Frysinger <vapier@gentoo.org>
142
143 * bfin-dis.c (decode_regs_hi): Change REG_LH2 typo to REG_MH2.
144
145 2010-03-23 Joseph Myers <joseph@codesourcery.com>
146
147 * dis-buf.c (buffer_read_memory): Give error for reading just
148 before the start of memory.
149
150 2010-03-22 Sebastian Pop <sebastian.pop@amd.com>
151 Quentin Neill <quentin.neill@amd.com>
152
153 * i386-dis.c (OP_LWP_I): Removed.
154 (reg_table): Do not use OP_LWP_I, use Iq.
155 (OP_LWPCB_E): Remove use of names16.
156 (OP_LWP_E): Same.
157 * i386-opc.tbl: Removed 16bit LWP insns. 32bit LWP insns
158 should not set the Vex.length bit.
159 * i386-tbl.h: Regenerated.
160
161 2010-02-25 Edmar Wienskoski <edmar@freescale.com>
162
163 * ppc-dis.c (ppc_opts): Add PPC_OPCODE_E500MC for "e500mc64".
164
165 2010-02-24 Nick Clifton <nickc@redhat.com>
166
167 PR binutils/6773
168 * arm-dis.c (arm_opcodes): Replace <prefix>addsubx with
169 <prefix>asx. Replace <prefix>subaddx with <prefix>sax.
170 (thumb32_opcodes): Likewise.
171
172 2010-02-15 Nick Clifton <nickc@redhat.com>
173
174 * po/vi.po: Updated Vietnamese translation.
175
176 2010-02-12 Doug Evans <dje@sebabeach.org>
177
178 * lm32-opinst.c: Regenerate.
179
180 2010-02-11 Doug Evans <dje@sebabeach.org>
181
182 * cgen-dis.in (print_normal): Delete CGEN_PRINT_NORMAL.
183 (print_address): Delete CGEN_PRINT_ADDRESS.
184 * fr30-dis.c, * frv-dis.c, * ip2k-dis.c, * iq2000-dis.c,
185 * lm32-dis.c, * m32c-dis.c, * m32r-desc.c, * m32r-desc.h,
186 * m32r-dis.c, * mep-dis.c, * mt-dis.c, * openrisc-dis.c,
187 * xc16x-dis.c, * xstormy16-dis.c: Regenerate.
188
189 * fr30-desc.c, * fr30-desc.h, * fr30-opc.c,
190 * frv-desc.c, * frv-desc.h, * frv-opc.c,
191 * ip2k-desc.c, * ip2k-desc.h, * ip2k-opc.c,
192 * iq2000-desc.c, * iq2000-desc.h, * iq2000-opc.c,
193 * lm32-desc.c, * lm32-desc.h, * lm32-opc.c, * lm32-opinst.c,
194 * m32c-desc.c, * m32c-desc.h, * m32c-opc.c,
195 * m32r-desc.c, * m32r-desc.h, * m32r-opc.c, * m32r-opinst.c,
196 * mep-desc.c, * mep-desc.h, * mep-opc.c,
197 * mt-desc.c, * mt-desc.h, * mt-opc.c,
198 * openrisc-desc.c, * openrisc-desc.h, * openrisc-opc.c,
199 * xc16x-desc.c, * xc16x-desc.h, * xc16x-opc.c,
200 * xstormy16-desc.c, * xstormy16-desc.h, * xstormy16-opc.c: Regenerate.
201
202 2010-02-11 H.J. Lu <hongjiu.lu@intel.com>
203
204 * i386-dis.c: Update copyright.
205 * i386-gen.c: Likewise.
206 * i386-opc.h: Likewise.
207 * i386-opc.tbl: Likewise.
208
209 2010-02-10 Quentin Neill <quentin.neill@amd.com>
210 Sebastian Pop <sebastian.pop@amd.com>
211
212 * i386-dis.c (OP_EX_VexImmW): Reintroduced
213 function to handle 5th imm8 operand.
214 (PREFIX_VEX_3A48): Added.
215 (PREFIX_VEX_3A49): Added.
216 (VEX_W_3A48_P_2): Added.
217 (VEX_W_3A49_P_2): Added.
218 (prefix table): Added entries for PREFIX_VEX_3A48
219 and PREFIX_VEX_3A49.
220 (vex table): Added entries for VEX_W_3A48_P_2 and
221 and VEX_W_3A49_P_2.
222 * i386-gen.c (operand_type_init): Added OPERAND_TYPE_VEC_IMM4
223 for Vec_Imm4 operands.
224 * i386-opc.h (enum): Added Vec_Imm4.
225 (i386_operand_type): Added vec_imm4.
226 * i386-opc.tbl: Add entries for vpermilp[ds].
227 * i386-init.h: Regenerated.
228 * i386-tbl.h: Regenerated.
229
230 2010-02-10 Richard Sandiford <r.sandiford@uk.ibm.com>
231
232 * ppc-dis.c (ppc_opts): Add "pwr4", "pwr5", "pwr5x", "pwr6"
233 and "pwr7". Move "a2" into alphabetical order.
234
235 2010-02-08 Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
236
237 * ppc-dis.c (ppc_opts): Add titan entry.
238 * ppc-opc.c (TITAN, MULHW): Define.
239 (powerpc_opcodes): Support AppliedMicro Titan core (APM83xxx).
240
241 2010-02-03 Quentin Neill <quentin.neill@amd.com>
242
243 * i386-gen.c (cpu_flag_init): Rename CPU_AMDFAM15_FLAGS
244 to CPU_BDVER1_FLAGS
245 * i386-init.h: Regenerated.
246
247 2010-02-03 Anthony Green <green@moxielogic.com>
248
249 * moxie-opc.c (moxie_form1_opc_info): Move "nop" from 0x00 to
250 0x0f, and make 0x00 an illegal instruction.
251
252 2010-01-29 Daniel Jacobowitz <dan@codesourcery.com>
253
254 * opcodes/arm-dis.c (struct arm_private_data): New.
255 (print_insn_coprocessor, print_insn_arm): Update to use struct
256 arm_private_data.
257 (is_mapping_symbol, get_map_sym_type): New functions.
258 (get_sym_code_type): Check the symbol's section. Do not check
259 mapping symbols.
260 (print_insn): Default to disassembling ARM mode code. Check
261 for mapping symbols separately from other symbols. Use
262 struct arm_private_data.
263
264 2010-01-28 H.J. Lu <hongjiu.lu@intel.com>
265
266 * i386-dis.c (EXVexWdqScalar): New.
267 (vex_scalar_w_dq_mode): Likewise.
268 (prefix_table): Update entries for PREFIX_VEX_3899,
269 PREFIX_VEX_389B, PREFIX_VEX_389D, PREFIX_VEX_389F,
270 PREFIX_VEX_38A9, PREFIX_VEX_38AB, PREFIX_VEX_38AD,
271 PREFIX_VEX_38AF, PREFIX_VEX_38B9, PREFIX_VEX_38BB,
272 PREFIX_VEX_38BD and PREFIX_VEX_38BF.
273 (intel_operand_size): Handle vex_scalar_w_dq_mode.
274 (OP_EX): Likewise.
275
276 2010-01-27 H.J. Lu <hongjiu.lu@intel.com>
277
278 * i386-dis.c (XMScalar): New.
279 (EXdScalar): Likewise.
280 (EXqScalar): Likewise.
281 (EXqScalarS): Likewise.
282 (VexScalar): Likewise.
283 (EXdVexScalarS): Likewise.
284 (EXqVexScalarS): Likewise.
285 (XMVexScalar): Likewise.
286 (scalar_mode): Likewise.
287 (d_scalar_mode): Likewise.
288 (d_scalar_swap_mode): Likewise.
289 (q_scalar_mode): Likewise.
290 (q_scalar_swap_mode): Likewise.
291 (vex_scalar_mode): Likewise.
292 (vex_len_table): Duplcate entries for VEX_LEN_10_P_1,
293 VEX_LEN_10_P_3, VEX_LEN_11_P_1, VEX_LEN_11_P_3, VEX_LEN_2A_P_1,
294 VEX_LEN_2A_P_3, VEX_LEN_2C_P_3, VEX_LEN_2D_P_1, VEX_LEN_2E_P_0,
295 VEX_LEN_2E_P_2, VEX_LEN_2F_P_2, VEX_LEN_51_P_1, VEX_LEN_51_P_3,
296 VEX_LEN_52_P_1, VEX_LEN_53_P_1, VEX_LEN_58_P_1, VEX_LEN_58_P_3,
297 VEX_LEN_59_P_1, VEX_LEN_5A_P_1, VEX_LEN_5A_P_3, VEX_LEN_5C_P_1,
298 VEX_LEN_5C_P_3, VEX_LEN_5D_P_1, VEX_LEN_5D_P_3, VEX_LEN_5E_P_1,
299 VEX_LEN_5E_P_3, VEX_LEN_5F_P_1, VEX_LEN_5F_P_3, VEX_LEN_6E_P_2,
300 VEX_LEN_7E_P_1, VEX_LEN_7E_P_2, VEX_LEN_D6_P_2, VEX_LEN_C2_P_1,
301 VEX_LEN_C2_P_3, VEX_LEN_3A0A_P_2 and VEX_LEN_3A0B_P_2.
302 (vex_w_table): Update entries for VEX_W_10_P_1, VEX_W_10_P_3,
303 VEX_W_11_P_1, VEX_W_11_P_3, VEX_W_2E_P_0, VEX_W_2E_P_2,
304 VEX_W_2F_P_0, VEX_W_2F_P_2, VEX_W_51_P_1, VEX_W_51_P_3,
305 VEX_W_52_P_1, VEX_W_53_P_1, VEX_W_58_P_1, VEX_W_58_P_3,
306 VEX_W_59_P_1, VEX_W_59_P_3, VEX_W_5A_P_1, VEX_W_5A_P_3,
307 VEX_W_5C_P_1, VEX_W_5C_P_3, VEX_W_5D_P_1, VEX_W_5D_P_3,
308 VEX_W_5E_P_1, VEX_W_5E_P_3, VEX_W_5F_P_1, VEX_W_5F_P_3,
309 VEX_W_7E_P_1, VEX_W_D6_P_2 VEX_W_C2_P_1, VEX_W_C2_P_3,
310 VEX_W_3A0A_P_2 and VEX_W_3A0B_P_2.
311 (intel_operand_size): Handle d_scalar_mode, d_scalar_swap_mode,
312 q_scalar_mode, q_scalar_swap_mode.
313 (OP_XMM): Handle scalar_mode.
314 (OP_EX): Handle d_scalar_mode, d_scalar_swap_mode, q_scalar_mode
315 and q_scalar_swap_mode.
316 (OP_VEX): Handle vex_scalar_mode.
317
318 2010-01-24 H.J. Lu <hongjiu.lu@intel.com>
319
320 * i386-dis.c (prefix_table): Remove trailing { Bad_Opcode }.
321
322 2010-01-24 H.J. Lu <hongjiu.lu@intel.com>
323
324 * i386-dis.c (vex_len_table): Remove trailing { Bad_Opcode }.
325
326 2010-01-24 H.J. Lu <hongjiu.lu@intel.com>
327
328 * i386-dis.c (prefix_table): Remove trailing { Bad_Opcode }.
329
330 2010-01-24 H.J. Lu <hongjiu.lu@intel.com>
331
332 * i386-dis.c (Bad_Opcode): New.
333 (bad_opcode): Likewise.
334 (dis386): Replace { "(bad)", { XX } } with { Bad_Opcode }.
335 (dis386_twobyte): Likewise.
336 (reg_table): Likewise.
337 (prefix_table): Likewise.
338 (x86_64_table): Likewise.
339 (vex_len_table): Likewise.
340 (vex_w_table): Likewise.
341 (mod_table): Likewise.
342 (rm_table): Likewise.
343 (float_reg): Likewise.
344 (reg_table): Remove trailing "(bad)" entries.
345 (prefix_table): Likewise.
346 (x86_64_table): Likewise.
347 (vex_len_table): Likewise.
348 (vex_w_table): Likewise.
349 (mod_table): Likewise.
350 (rm_table): Likewise.
351 (get_valid_dis386): Handle bytemode 0.
352
353 2010-01-23 H.J. Lu <hongjiu.lu@intel.com>
354
355 * i386-opc.h (VEXScalar): New.
356
357 * i386-opc.tbl: Replace "Vex" with "Vex=3" on AVX scalar
358 instructions.
359 * i386-tbl.h: Regenerated.
360
361 2010-01-21 H.J. Lu <hongjiu.lu@intel.com>
362
363 * i386-dis.c (mod_table): Use FXSAVE on xsave and xrstor.
364
365 * i386-opc.tbl: Add xsave64 and xrstor64.
366 * i386-tbl.h: Regenerated.
367
368 2010-01-20 Nick Clifton <nickc@redhat.com>
369
370 PR 11170
371 * arm-dis.c (print_arm_address): Do not ignore negative bit in PC
372 based post-indexed addressing.
373
374 2010-01-15 Sebastian Pop <sebastian.pop@amd.com>
375
376 * i386-opc.tbl: Support all the possible aliases for VPCOM* insns.
377 * i386-tbl.h: Regenerated.
378
379 2010-01-14 H.J. Lu <hongjiu.lu@intel.com>
380
381 * i386-opc.h (VexVVVV): Replace VEX.DNS with VEX.NDS in
382 comments.
383
384 2010-01-14 H.J. Lu <hongjiu.lu@intel.com>
385
386 * i386-dis.c (names_mm): New.
387 (intel_names_mm): Likewise.
388 (att_names_mm): Likewise.
389 (names_xmm): Likewise.
390 (intel_names_xmm): Likewise.
391 (att_names_xmm): Likewise.
392 (names_ymm): Likewise.
393 (intel_names_ymm): Likewise.
394 (att_names_ymm): Likewise.
395 (print_insn): Set names_mm, names_xmm and names_ymm.
396 (OP_MMX): Use names_mm, names_xmm and names_ymm.
397 (OP_XMM): Likewise.
398 (OP_EM): Likewise.
399 (OP_EMC): Likewise.
400 (OP_MXC): Likewise.
401 (OP_EX): Likewise.
402 (XMM_Fixup): Likewise.
403 (OP_VEX): Likewise.
404 (OP_EX_VexReg): Likewise.
405 (OP_Vex_2src): Likewise.
406 (OP_Vex_2src_1): Likewise.
407 (OP_Vex_2src_2): Likewise.
408 (OP_REG_VexI4): Likewise.
409
410 2010-01-13 H.J. Lu <hongjiu.lu@intel.com>
411
412 * i386-dis.c (print_insn): Update comments.
413
414 2010-01-12 H.J. Lu <hongjiu.lu@intel.com>
415
416 * i386-dis.c (rex_original): Removed.
417 (ckprefix): Remove rex_original.
418 (print_insn): Update comments.
419
420 2010-01-09 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
421
422 * Makefile.in: Regenerate.
423 * configure: Regenerate.
424
425 2010-01-07 Doug Evans <dje@sebabeach.org>
426
427 * cgen-ibld.in (insert_normal, extract_normal): Minor cleanup.
428 * fr30-ibld.c, * frv-ibld.c, * ip2k-ibld.c, * iq2000-ibld.c,
429 * lm32-ibld.c, * m32c-ibld.c, * m32r-ibld.c, * mep-ibld.c,
430 * mt-ibld.c, * openrisc-ibld.c, * xc16x-ibld.c,
431 * xstormy16-ibld.c: Regenerate.
432
433 2010-01-06 Quentin Neill <quentin.neill@amd.com>
434
435 * i386-gen.c (cpu_flag_init): Add new CPU_AMDFAM15_FLAGS.
436 * i386-init.h: Regenerated.
437
438 2010-01-06 Daniel Gutson <dgutson@codesourcery.com>
439
440 * arm-dis.c (print_insn): Fixed search for next symbol and data
441 dumping condition, and the initial mapping symbol state.
442
443 2010-01-05 Doug Evans <dje@sebabeach.org>
444
445 * cgen-ibld.in: #include "cgen/basic-modes.h".
446 * fr30-ibld.c, * frv-ibld.c, * ip2k-ibld.c, * iq2000-ibld.c,
447 * lm32-ibld.c, * m32c-ibld.c, * m32r-ibld.c, * mep-ibld.c,
448 * mt-ibld.c, * openrisc-ibld.c, * xc16x-ibld.c,
449 * xstormy16-ibld.c: Regenerate.
450
451 2010-01-04 Nick Clifton <nickc@redhat.com>
452
453 PR 11123
454 * arm-dis.c (print_insn_coprocessor): Initialise value.
455
456 2010-01-04 Edmar Wienskoski <edmar@freescale.com>
457
458 * ppc-dis.c (ppc_opts): Add entry for "e500mc64".
459
460 2010-01-02 Doug Evans <dje@sebabeach.org>
461
462 * cgen-asm.in: Update copyright year.
463 * cgen-dis.in: Update copyright year.
464 * cgen-ibld.in: Update copyright year.
465 * fr30-asm.c, * fr30-desc.c, * fr30-desc.h, * fr30-dis.c,
466 * fr30-ibld.c, * fr30-opc.c, * fr30-opc.h, * frv-asm.c, * frv-desc.c,
467 * frv-desc.h, * frv-dis.c, * frv-ibld.c, * frv-opc.c, * frv-opc.h,
468 * ip2k-asm.c, * ip2k-desc.c, * ip2k-desc.h, * ip2k-dis.c,
469 * ip2k-ibld.c, * ip2k-opc.c, * ip2k-opc.h, * iq2000-asm.c,
470 * iq2000-desc.c, * iq2000-desc.h, * iq2000-dis.c, * iq2000-ibld.c,
471 * iq2000-opc.c, * iq2000-opc.h, * lm32-asm.c, * lm32-desc.c,
472 * lm32-desc.h, * lm32-dis.c, * lm32-ibld.c, * lm32-opc.c, * lm32-opc.h,
473 * lm32-opinst.c, * m32c-asm.c, * m32c-desc.c, * m32c-desc.h,
474 * m32c-dis.c, * m32c-ibld.c, * m32c-opc.c, * m32c-opc.h, * m32r-asm.c,
475 * m32r-desc.c, * m32r-desc.h, * m32r-dis.c, * m32r-ibld.c,
476 * m32r-opc.c, * m32r-opc.h, * m32r-opinst.c, * mep-asm.c, * mep-desc.c,
477 * mep-desc.h, * mep-dis.c, * mep-ibld.c, * mep-opc.c, * mep-opc.h,
478 * mt-asm.c, * mt-desc.c, * mt-desc.h, * mt-dis.c, * mt-ibld.c,
479 * mt-opc.c, * mt-opc.h, * openrisc-asm.c, * openrisc-desc.c,
480 * openrisc-desc.h, * openrisc-dis.c, * openrisc-ibld.c,
481 * openrisc-opc.c, * openrisc-opc.h, * xc16x-asm.c, * xc16x-desc.c,
482 * xc16x-desc.h, * xc16x-dis.c, * xc16x-ibld.c, * xc16x-opc.c,
483 * xc16x-opc.h, * xstormy16-asm.c, * xstormy16-desc.c,
484 * xstormy16-desc.h, * xstormy16-dis.c, * xstormy16-ibld.c,
485 * xstormy16-opc.c, * xstormy16-opc.h: Regenerate.
486
487 For older changes see ChangeLog-2009
488 \f
489 Local Variables:
490 mode: change-log
491 left-margin: 8
492 fill-column: 74
493 version-control: never
494 End:
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