1 2010-09-22 Robin Getz <robin.getz@analog.com>
3 * bfin-dis.c (decode_dsp32shiftimm_0): Add missing "S" flag.
5 2010-09-22 Mike Frysinger <vapier@gentoo.org>
7 * bfin-dis.c (decode_CC2stat_0): Decode all ASTAT bits.
9 2010-09-22 Robin Getz <robin.getz@analog.com>
11 * bfin-dis.c (IS_DREG, IS_PREG, IS_GENREG, IS_DAGREG): Reject
12 register values greater than 8.
13 (IS_RESERVEDREG, allreg, mostreg): New helpers.
14 (decode_ProgCtrl_0): Call IS_DREG/IS_PREG as appropriate.
15 (decode_PushPopReg_0): Call mostreg/allreg as appropriate.
16 (decode_CC2dreg_0): Check valid CC register number.
18 2010-09-22 Robin Getz <robin.getz@analog.com>
20 * bfin-dis.c (decode_pseudoDEBUG_0): Add space after DBG.
22 2010-09-22 Robin Getz <robin.getz@analog.com>
24 * bfin-dis.c (machine_registers): Add AC0_COPY, V_COPY, and RND_MOD.
25 (reg_names): Likewise.
26 (decode_statbits): Likewise; while reformatting to make manageable.
28 2010-09-22 Mike Frysinger <vapier@gentoo.org>
30 * bfin-dis.c (decode_pseudoDEBUG_0): Add space after OUTC.
31 (decode_pseudoOChar_0): New function.
32 (_print_insn_bfin): Remove #if 0 and call new decode_pseudoOChar_0.
34 2010-09-22 Robin Getz <robin.getz@analog.com>
36 * bfin-dis.c (decode_dsp32shift_0): Decode sub opcodes 2/2 as
37 LSHIFT instead of SHIFT.
39 2010-09-22 Mike Frysinger <vapier@gentoo.org>
41 * bfin-dis.c (constant_formats): Constify the whole structure.
42 (fmtconst): Add const to return value.
43 (reg_names): Mark const.
44 (decode_multfunc): Mark s0/s1 as const.
45 (decode_macfunc): Mark a/sop as const.
47 2010-09-17 Tejas Belagod <tejas.belagod@arm.com>
49 * arm_dis.c (coprocessor_opcodes): Add MRC entry for APSR_nzcv.
51 2010-09-14 Maciej W. Rozycki <macro@codesourcery.com>
53 * mips-opc.c (mips_builtin_opcodes): Add "sync_acquire",
54 "sync_mb", "sync_release", "sync_rmb" and "sync_wmb".
56 2010-09-10 Pierre Muller <muller@ics.u-strasbg.fr>
58 * src/opcodes/dlx-dis.c (print_insn_dlx): Use dlx_insn type for
61 2010-08-31 H.J. Lu <hongjiu.lu@intel.com>
64 * i386-dis.c (sIv): New.
65 (dis386): Replace Iq with sIv on "pushT".
66 (reg_table): Replace T with {T|} on callT, JcallT, jmpT and JjmpT.
67 (x86_64_table): Replace {T|}/{P|} with P.
68 (putop): Add 'w' to 'T'/'P' if needed for Intel syntax.
69 (OP_sI): Update v_mode. Remove w_mode.
71 2010-08-27 Nathan Froyd <froydnj@codesourcery.com>
73 * ppc-opc.c (powerpc_opcodes) [lswx,lswi,stswx,stswi]: Deprecate
76 2010-08-17 H.J. Lu <hongjiu.lu@intel.com>
78 * i386-dis.c (reg_table): Replace Eb with Mb on prefetch and
81 2010-08-06 Quentin Neill <quentin.neill@amd.com>
83 * i386-gen.c (cpu_flag_init): Define CpuNop extension flag, add
84 to processor flags for PENTIUMPRO processors and later.
85 * i386-opc.h (enum): Add CpuNop.
86 (i386_cpu_flags): Add cpunop bit.
87 * i386-opc.tbl: Change nop cpu_flags.
88 * i386-init.h: Regenerated.
89 * i386-tbl.h: Likewise.
91 2010-08-06 Quentin Neill <quentin.neill@amd.com>
93 * i386-opc.h (enum): Fix typos in comments.
95 2010-08-06 Alan Modra <amodra@gmail.com>
97 * disassemble.c: Formatting.
98 (disassemble_init_for_target <ARCH_m32c>): Comment on endian.
100 2010-08-05 H.J. Lu <hongjiu.lu@intel.com>
102 * i386-opc.tbl: Add Cpu186 to ud1/ud2/ud2a/ud2b.
103 * i386-tbl.h: Regenerated.
105 2010-08-05 H.J. Lu <hongjiu.lu@intel.com>
107 * i386-dis.c (dis386_twobyte): Replace ud2a/ud2b with ud2/ud1.
109 * i386-opc.tbl: Add ud1. Remove Cpu686 from ud2/ud2a/ud2b.
110 * i386-tbl.h: Regenerated.
112 2010-07-29 DJ Delorie <dj@redhat.com>
114 * rx-decode.opc (SRR): New.
115 (rx_decode_opcode): Use it for movbi and movbir. Decode NOP2 (mov
116 r0,r0) and NOP3 (max r0,r0) special cases.
117 * rx-decode.c: Regenerate.
119 2010-07-28 H.J. Lu <hongjiu.lu@intel.com>
121 * i386-dis.c: Add 0F to VEX opcode enums.
123 2010-07-27 DJ Delorie <dj@redhat.com>
125 * rx-decode.opc (store_flags): Remove, replace with F_* macros.
126 (rx_decode_opcode): Likewise.
127 * rx-decode.c: Regenerate.
129 2010-07-23 Naveen.H.S <naveen.S@kpitcummins.com>
130 Ina Pandit <ina.pandit@kpitcummins.com>
132 * v850-dis.c (v850_sreg_names): Updated structure for system
134 (float_cc_names): new structure for condition codes.
135 (print_value): Update the function that prints value.
136 (get_operand_value): New function to get the operand value.
137 (disassemble): Updated to handle the disassembly of instructions.
138 (print_insn_v850): Updated function to print instruction for different
140 * opcodes/v850-opc.c (v850_msg_is_out_of_range, insert_i5div1,
141 extract_i5div1, insert_i5div2, extract_i5div2, insert_i5div3,
142 extract_i5div3, insert_d5_4, extract_d5_4, extract_d8_6,
143 insert_d8_7, extract_d8_7, insert_v8, extract_v8, insert_u16_loop,
144 extract_u16_loop, insert_d16_15, extract_d16_15, insert_d16_16,
145 extract_d16_16, nsert_d17_16, extract_d17_16, insert_d22,
146 extract_d22, insert_d23, extract_d23, insert_i9, extract_i9,
147 insert_u9, extract_u9, extract_spe, insert_r4, extract_r4): New.
148 (insert_d8_7, insert_d5_4, insert_i5div): Remove.
149 (v850_operands): Update with the relocation name. Also update
150 the instructions with specific set of processors.
152 2010-07-08 Tejas Belagod <tejas.belagod@arm.com>
154 * arm-dis.c (print_insn_arm): Add cases for printing more
156 (print_insn_thumb32): Likewise.
158 2010-07-06 Maciej W. Rozycki <macro@codesourcery.com>
160 * mips-dis.c (print_insn_mips): Correct branch instruction type
163 2010-07-06 Maciej W. Rozycki <macro@codesourcery.com>
165 * mips-dis.c (print_mips16_insn_arg): Remove branch instruction
166 type and delay slot determination.
167 (print_insn_mips16): Extend branch instruction type and delay
168 slot determination to cover all instructions.
169 * mips16-opc.c (BR): Remove macro.
170 (UBR, CBR): New macros.
171 (mips16_opcodes): Update branch annotation for "b", "beqz",
172 "bnez", "bteqz" and "btnez". Add branch annotation for "jalrc"
175 2010-07-05 H.J. Lu <hongjiu.lu@intel.com>
177 AVX Programming Reference (June, 2010)
178 * i386-dis.c (mod_table): Replace rdrnd with rdrand.
179 * i386-opc.tbl: Likewise.
180 * i386-tbl.h: Regenerated.
182 2010-07-05 H.J. Lu <hongjiu.lu@intel.com>
184 * i386-opc.h (CpuFSGSBase): Fix a typo in comments.
186 2010-07-03 Andreas Schwab <schwab@linux-m68k.org>
188 * ppc-dis.c (powerpc_init_dialect): Cast PPC_OPCODE_xxx to
189 ppc_cpu_t before inverting.
190 (ppc_parse_cpu): Likewise.
191 (print_insn_powerpc): Likewise.
193 2010-07-03 Alan Modra <amodra@gmail.com>
195 * ppc-dis.c (ppc_opts, powerpc_init_dialect): Remove old opcode flags.
196 * ppc-opc.c (PPC32, POWER32, COM32, CLASSIC): Delete.
197 (PPC64, MFDEC2): Update.
198 (NON32, NO371): Define.
199 (powerpc_opcode): Update to not use old opcode flags, and avoid
202 2010-07-03 DJ Delorie <dj@delorie.com>
204 * m32c-ibld.c: Regenerate.
206 2010-07-03 Alan Modra <amodra@gmail.com>
208 * ppc-opc.c (PWR2COM): Define.
209 (PPCPWR2): Add PPC_OPCODE_COMMON.
210 (powerpc_opcodes): Add "subc", "subco", "subco.", "fcir", "fcir.",
211 "fcirz", "fcirz." to -mcom opcodes. Remove "mfsri", "dclst",
214 2010-07-01 H.J. Lu <hongjiu.lu@intel.com>
216 AVX Programming Reference (June, 2010)
217 * i386-dis.c (PREFIX_0FAE_REG_0): New.
218 (PREFIX_0FAE_REG_1): Likewise.
219 (PREFIX_0FAE_REG_2): Likewise.
220 (PREFIX_0FAE_REG_3): Likewise.
221 (PREFIX_VEX_3813): Likewise.
222 (PREFIX_VEX_3A1D): Likewise.
223 (prefix_table): Add PREFIX_0FAE_REG_0, PREFIX_0FAE_REG_1,
224 PREFIX_0FAE_REG_2, PREFIX_0FAE_REG_3, PREFIX_VEX_3813 and
226 (vex_table): Add PREFIX_VEX_3813 and PREFIX_VEX_3A1D.
227 (mod_table): Add PREFIX_0FAE_REG_0, PREFIX_0FAE_REG_1,
228 PREFIX_0FAE_REG_2, PREFIX_0FAE_REG_3 xsaveopt and rdrnd.
230 * i386-gen.c (cpu_flag_init): Add CPU_XSAVEOPT_FLAGS,
231 CPU_FSGSBASE_FLAGS, CPU_RDRND_FLAGS and CPU_F16C_FLAGS.
232 (cpu_flags): Add CpuXsaveopt, CpuFSGSBase, CpuRdRnd and CpuF16C.
234 * i386-opc.h (CpuXsaveopt): New.
235 (CpuFSGSBase): Likewise.
236 (CpuRdRnd): Likewise.
238 (i386_cpu_flags): Add cpuxsaveopt, cpufsgsbase, cpurdrnd and
241 * i386-opc.tbl: Add xsaveopt, rdfsbase, rdgsbase, rdrnd,
242 wrfsbase, wrgsbase, vcvtph2ps and vcvtps2ph.
243 * i386-init.h: Regenerated.
244 * i386-tbl.h: Likewise.
246 2010-07-01 Sebastian Andrzej Siewior <bigeasy@linutronix.de>
248 * ppc-opc.c (powerpc_opcodes): Revert deprecation of mfocrf, mtcrf
251 2010-06-29 Alan Modra <amodra@gmail.com>
253 * maxq-dis.c: Delete file.
254 * Makefile.am: Remove references to maxq.
255 * configure.in: Likewise.
256 * disassemble.c: Likewise.
257 * Makefile.in: Regenerate.
258 * configure: Regenerate.
259 * po/POTFILES.in: Regenerate.
261 2010-06-29 Alan Modra <amodra@gmail.com>
263 * mep-dis.c: Regenerate.
265 2010-06-28 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
267 * arm-disc.c (parse_insn_neon): Fix Neon alignment syntax.
269 2010-06-27 Alan Modra <amodra@gmail.com>
271 * arc-dis.c (arc_sprintf): Delete set but unused variables.
272 (decodeInstr): Likewise.
273 * dlx-dis.c (print_insn_dlx): Likewise.
274 * h8300-dis.c (bfd_h8_disassemble_init): Likewise.
275 * maxq-dis.c (check_move, print_insn): Likewise.
276 * mep-dis.c (mep_examine_ivc2_insns): Likewise.
277 * msp430-dis.c (msp430_branchinstr): Likewise.
278 * bfin-dis.c (_print_insn_bfin): Avoid set but unused warning.
279 * cgen-asm.in (parse_insn_normal, _cgen_assemble_insn): Likewise.
280 * sparc-dis.c (print_insn_sparc): Likewise.
281 * fr30-asm.c: Regenerate.
282 * frv-asm.c: Regenerate.
283 * ip2k-asm.c: Regenerate.
284 * iq2000-asm.c: Regenerate.
285 * lm32-asm.c: Regenerate.
286 * m32c-asm.c: Regenerate.
287 * m32r-asm.c: Regenerate.
288 * mep-asm.c: Regenerate.
289 * mt-asm.c: Regenerate.
290 * openrisc-asm.c: Regenerate.
291 * xc16x-asm.c: Regenerate.
292 * xstormy16-asm.c: Regenerate.
294 2010-06-16 Vincent Rivière <vincent.riviere@freesbee.fr>
297 * m68k-opc.c (m68k_opcodes): Remove move.l for isab and later.
299 2010-06-16 Vincent Rivière <vincent.riviere@freesbee.fr>
302 * m68k-dis.c (print_insn_arg): Prefix float constants with #0e.
304 2010-06-14 Sebastian Andrzej Siewior <bigeasy@linutronix.de>
306 * ppc-dis.c (ppc_opts): Remove PPC_OPCODE_E500MC from e500 and
307 e500x2. Add PPC_OPCODE_E500 to e500 and e500x2
308 * ppc-opc.c (powerpc_opcodes): Deprecate all opcodes on EFS which
309 touch floating point regs and are enabled by COM, PPC or PPCCOM.
310 Treat sync as msync on e500. Treat eieio as mbar 1 on e500.
311 Treat lwsync as msync on e500.
313 2010-06-07 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
315 * arm-dis.c (thumb-opcodes): Add disassembly for movs.
317 2010-05-28 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
319 * arm-dis.c (print_insn_neon): Ensure disassembly of Neon
320 constants is the same on 32-bit and 64-bit hosts.
322 2010-05-27 Jason Duerstock <jason.duerstock+binutils@gmail.com>
324 * m68k-dis.c (print_insn_m68k): Emit undefined instructions as
325 .short directives so that they can be reassembled.
327 2010-05-26 Catherine Moore <clm@codesourcery.com>
328 David Ung <davidu@mips.com>
330 * mips-opc.c: Change membership to I1 for instructions ssnop and
333 2010-05-26 H.J. Lu <hongjiu.lu@intel.com>
335 * i386-dis.c (sib): New.
337 (print_insn): Call get_sib.
338 OP_E_memory): Use sib.
340 2010-05-26 Catherine Moore <clm@codesoourcery.com>
342 * mips-dis.c (mips_arch): Remove INSN_MIPS16.
343 * mips-opc.c (I16): Remove.
344 (mips_builtin_op): Reclassify jalx.
346 2010-05-19 Alan Modra <amodra@gmail.com>
348 * ppc-opc.c (powerpc_opcodes): Enable divdeu, devweu, divde,
349 divwe, divdeuo, divweuo, divdeo, divweo for A2. Add icswepx.
351 2010-05-13 Alan Modra <amodra@gmail.com>
353 * ppc-opc.c (powerpc_opcodes): Correct wclr encoding.
355 2010-05-11 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
357 * arm-dis.c (thumb_opcodes): Update ldmia entry to use new %W
359 (print_insn_thumb16): Add support for new %W format.
361 2010-05-07 Tristan Gingold <gingold@adacore.com>
363 * Makefile.in: Regenerate with automake 1.11.1.
366 2010-05-05 Nick Clifton <nickc@redhat.com>
368 * po/es.po: Updated Spanish translation.
370 2010-04-22 Nick Clifton <nickc@redhat.com>
372 * po/opcodes.pot: Updated by the Translation project.
373 * po/vi.po: Updated Vietnamese translation.
375 2010-04-16 H.J. Lu <hongjiu.lu@intel.com>
377 * i386-dis.c (get_valid_dis386): Return bad_opcode on unknown
380 2010-04-09 Nick Clifton <nickc@redhat.com>
382 * i386-dis.c (print_insn): Remove unused variable op.
383 (OP_sI): Remove unused variable mask.
385 2010-04-07 Alan Modra <amodra@gmail.com>
387 * configure: Regenerate.
389 2010-04-06 Peter Bergner <bergner@vnet.ibm.com>
391 * ppc-opc.c (RBOPT): New define.
392 ("dccci"): Enable for PPCA2. Make operands optional.
393 ("iccci"): Likewise. Do not deprecate for PPC476.
395 2010-04-02 Masaki Muranaka <monaka@monami-software.com>
397 * cr16-opc.c (cr16_instruction): Fix typo in comment.
399 2010-03-25 Joseph Myers <joseph@codesourcery.com>
401 * Makefile.am (TARGET_LIBOPCODES_CFILES): Add tic6x-dis.c.
402 * Makefile.in: Regenerate.
403 * configure.in (bfd_tic6x_arch): New.
404 * configure: Regenerate.
405 * disassemble.c (ARCH_tic6x): Define if ARCH_all.
406 (disassembler): Handle TI C6X.
409 2010-03-24 Mike Frysinger <vapier@gentoo.org>
411 * bfin-dis.c (decode_regs_hi): Change REG_LH2 typo to REG_MH2.
413 2010-03-23 Joseph Myers <joseph@codesourcery.com>
415 * dis-buf.c (buffer_read_memory): Give error for reading just
416 before the start of memory.
418 2010-03-22 Sebastian Pop <sebastian.pop@amd.com>
419 Quentin Neill <quentin.neill@amd.com>
421 * i386-dis.c (OP_LWP_I): Removed.
422 (reg_table): Do not use OP_LWP_I, use Iq.
423 (OP_LWPCB_E): Remove use of names16.
425 * i386-opc.tbl: Removed 16bit LWP insns. 32bit LWP insns
426 should not set the Vex.length bit.
427 * i386-tbl.h: Regenerated.
429 2010-02-25 Edmar Wienskoski <edmar@freescale.com>
431 * ppc-dis.c (ppc_opts): Add PPC_OPCODE_E500MC for "e500mc64".
433 2010-02-24 Nick Clifton <nickc@redhat.com>
436 * arm-dis.c (arm_opcodes): Replace <prefix>addsubx with
437 <prefix>asx. Replace <prefix>subaddx with <prefix>sax.
438 (thumb32_opcodes): Likewise.
440 2010-02-15 Nick Clifton <nickc@redhat.com>
442 * po/vi.po: Updated Vietnamese translation.
444 2010-02-12 Doug Evans <dje@sebabeach.org>
446 * lm32-opinst.c: Regenerate.
448 2010-02-11 Doug Evans <dje@sebabeach.org>
450 * cgen-dis.in (print_normal): Delete CGEN_PRINT_NORMAL.
451 (print_address): Delete CGEN_PRINT_ADDRESS.
452 * fr30-dis.c, * frv-dis.c, * ip2k-dis.c, * iq2000-dis.c,
453 * lm32-dis.c, * m32c-dis.c, * m32r-desc.c, * m32r-desc.h,
454 * m32r-dis.c, * mep-dis.c, * mt-dis.c, * openrisc-dis.c,
455 * xc16x-dis.c, * xstormy16-dis.c: Regenerate.
457 * fr30-desc.c, * fr30-desc.h, * fr30-opc.c,
458 * frv-desc.c, * frv-desc.h, * frv-opc.c,
459 * ip2k-desc.c, * ip2k-desc.h, * ip2k-opc.c,
460 * iq2000-desc.c, * iq2000-desc.h, * iq2000-opc.c,
461 * lm32-desc.c, * lm32-desc.h, * lm32-opc.c, * lm32-opinst.c,
462 * m32c-desc.c, * m32c-desc.h, * m32c-opc.c,
463 * m32r-desc.c, * m32r-desc.h, * m32r-opc.c, * m32r-opinst.c,
464 * mep-desc.c, * mep-desc.h, * mep-opc.c,
465 * mt-desc.c, * mt-desc.h, * mt-opc.c,
466 * openrisc-desc.c, * openrisc-desc.h, * openrisc-opc.c,
467 * xc16x-desc.c, * xc16x-desc.h, * xc16x-opc.c,
468 * xstormy16-desc.c, * xstormy16-desc.h, * xstormy16-opc.c: Regenerate.
470 2010-02-11 H.J. Lu <hongjiu.lu@intel.com>
472 * i386-dis.c: Update copyright.
473 * i386-gen.c: Likewise.
474 * i386-opc.h: Likewise.
475 * i386-opc.tbl: Likewise.
477 2010-02-10 Quentin Neill <quentin.neill@amd.com>
478 Sebastian Pop <sebastian.pop@amd.com>
480 * i386-dis.c (OP_EX_VexImmW): Reintroduced
481 function to handle 5th imm8 operand.
482 (PREFIX_VEX_3A48): Added.
483 (PREFIX_VEX_3A49): Added.
484 (VEX_W_3A48_P_2): Added.
485 (VEX_W_3A49_P_2): Added.
486 (prefix table): Added entries for PREFIX_VEX_3A48
488 (vex table): Added entries for VEX_W_3A48_P_2 and
490 * i386-gen.c (operand_type_init): Added OPERAND_TYPE_VEC_IMM4
491 for Vec_Imm4 operands.
492 * i386-opc.h (enum): Added Vec_Imm4.
493 (i386_operand_type): Added vec_imm4.
494 * i386-opc.tbl: Add entries for vpermilp[ds].
495 * i386-init.h: Regenerated.
496 * i386-tbl.h: Regenerated.
498 2010-02-10 Richard Sandiford <r.sandiford@uk.ibm.com>
500 * ppc-dis.c (ppc_opts): Add "pwr4", "pwr5", "pwr5x", "pwr6"
501 and "pwr7". Move "a2" into alphabetical order.
503 2010-02-08 Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
505 * ppc-dis.c (ppc_opts): Add titan entry.
506 * ppc-opc.c (TITAN, MULHW): Define.
507 (powerpc_opcodes): Support AppliedMicro Titan core (APM83xxx).
509 2010-02-03 Quentin Neill <quentin.neill@amd.com>
511 * i386-gen.c (cpu_flag_init): Rename CPU_AMDFAM15_FLAGS
513 * i386-init.h: Regenerated.
515 2010-02-03 Anthony Green <green@moxielogic.com>
517 * moxie-opc.c (moxie_form1_opc_info): Move "nop" from 0x00 to
518 0x0f, and make 0x00 an illegal instruction.
520 2010-01-29 Daniel Jacobowitz <dan@codesourcery.com>
522 * opcodes/arm-dis.c (struct arm_private_data): New.
523 (print_insn_coprocessor, print_insn_arm): Update to use struct
525 (is_mapping_symbol, get_map_sym_type): New functions.
526 (get_sym_code_type): Check the symbol's section. Do not check
528 (print_insn): Default to disassembling ARM mode code. Check
529 for mapping symbols separately from other symbols. Use
530 struct arm_private_data.
532 2010-01-28 H.J. Lu <hongjiu.lu@intel.com>
534 * i386-dis.c (EXVexWdqScalar): New.
535 (vex_scalar_w_dq_mode): Likewise.
536 (prefix_table): Update entries for PREFIX_VEX_3899,
537 PREFIX_VEX_389B, PREFIX_VEX_389D, PREFIX_VEX_389F,
538 PREFIX_VEX_38A9, PREFIX_VEX_38AB, PREFIX_VEX_38AD,
539 PREFIX_VEX_38AF, PREFIX_VEX_38B9, PREFIX_VEX_38BB,
540 PREFIX_VEX_38BD and PREFIX_VEX_38BF.
541 (intel_operand_size): Handle vex_scalar_w_dq_mode.
544 2010-01-27 H.J. Lu <hongjiu.lu@intel.com>
546 * i386-dis.c (XMScalar): New.
547 (EXdScalar): Likewise.
548 (EXqScalar): Likewise.
549 (EXqScalarS): Likewise.
550 (VexScalar): Likewise.
551 (EXdVexScalarS): Likewise.
552 (EXqVexScalarS): Likewise.
553 (XMVexScalar): Likewise.
554 (scalar_mode): Likewise.
555 (d_scalar_mode): Likewise.
556 (d_scalar_swap_mode): Likewise.
557 (q_scalar_mode): Likewise.
558 (q_scalar_swap_mode): Likewise.
559 (vex_scalar_mode): Likewise.
560 (vex_len_table): Duplcate entries for VEX_LEN_10_P_1,
561 VEX_LEN_10_P_3, VEX_LEN_11_P_1, VEX_LEN_11_P_3, VEX_LEN_2A_P_1,
562 VEX_LEN_2A_P_3, VEX_LEN_2C_P_3, VEX_LEN_2D_P_1, VEX_LEN_2E_P_0,
563 VEX_LEN_2E_P_2, VEX_LEN_2F_P_2, VEX_LEN_51_P_1, VEX_LEN_51_P_3,
564 VEX_LEN_52_P_1, VEX_LEN_53_P_1, VEX_LEN_58_P_1, VEX_LEN_58_P_3,
565 VEX_LEN_59_P_1, VEX_LEN_5A_P_1, VEX_LEN_5A_P_3, VEX_LEN_5C_P_1,
566 VEX_LEN_5C_P_3, VEX_LEN_5D_P_1, VEX_LEN_5D_P_3, VEX_LEN_5E_P_1,
567 VEX_LEN_5E_P_3, VEX_LEN_5F_P_1, VEX_LEN_5F_P_3, VEX_LEN_6E_P_2,
568 VEX_LEN_7E_P_1, VEX_LEN_7E_P_2, VEX_LEN_D6_P_2, VEX_LEN_C2_P_1,
569 VEX_LEN_C2_P_3, VEX_LEN_3A0A_P_2 and VEX_LEN_3A0B_P_2.
570 (vex_w_table): Update entries for VEX_W_10_P_1, VEX_W_10_P_3,
571 VEX_W_11_P_1, VEX_W_11_P_3, VEX_W_2E_P_0, VEX_W_2E_P_2,
572 VEX_W_2F_P_0, VEX_W_2F_P_2, VEX_W_51_P_1, VEX_W_51_P_3,
573 VEX_W_52_P_1, VEX_W_53_P_1, VEX_W_58_P_1, VEX_W_58_P_3,
574 VEX_W_59_P_1, VEX_W_59_P_3, VEX_W_5A_P_1, VEX_W_5A_P_3,
575 VEX_W_5C_P_1, VEX_W_5C_P_3, VEX_W_5D_P_1, VEX_W_5D_P_3,
576 VEX_W_5E_P_1, VEX_W_5E_P_3, VEX_W_5F_P_1, VEX_W_5F_P_3,
577 VEX_W_7E_P_1, VEX_W_D6_P_2 VEX_W_C2_P_1, VEX_W_C2_P_3,
578 VEX_W_3A0A_P_2 and VEX_W_3A0B_P_2.
579 (intel_operand_size): Handle d_scalar_mode, d_scalar_swap_mode,
580 q_scalar_mode, q_scalar_swap_mode.
581 (OP_XMM): Handle scalar_mode.
582 (OP_EX): Handle d_scalar_mode, d_scalar_swap_mode, q_scalar_mode
583 and q_scalar_swap_mode.
584 (OP_VEX): Handle vex_scalar_mode.
586 2010-01-24 H.J. Lu <hongjiu.lu@intel.com>
588 * i386-dis.c (prefix_table): Remove trailing { Bad_Opcode }.
590 2010-01-24 H.J. Lu <hongjiu.lu@intel.com>
592 * i386-dis.c (vex_len_table): Remove trailing { Bad_Opcode }.
594 2010-01-24 H.J. Lu <hongjiu.lu@intel.com>
596 * i386-dis.c (prefix_table): Remove trailing { Bad_Opcode }.
598 2010-01-24 H.J. Lu <hongjiu.lu@intel.com>
600 * i386-dis.c (Bad_Opcode): New.
601 (bad_opcode): Likewise.
602 (dis386): Replace { "(bad)", { XX } } with { Bad_Opcode }.
603 (dis386_twobyte): Likewise.
604 (reg_table): Likewise.
605 (prefix_table): Likewise.
606 (x86_64_table): Likewise.
607 (vex_len_table): Likewise.
608 (vex_w_table): Likewise.
609 (mod_table): Likewise.
610 (rm_table): Likewise.
611 (float_reg): Likewise.
612 (reg_table): Remove trailing "(bad)" entries.
613 (prefix_table): Likewise.
614 (x86_64_table): Likewise.
615 (vex_len_table): Likewise.
616 (vex_w_table): Likewise.
617 (mod_table): Likewise.
618 (rm_table): Likewise.
619 (get_valid_dis386): Handle bytemode 0.
621 2010-01-23 H.J. Lu <hongjiu.lu@intel.com>
623 * i386-opc.h (VEXScalar): New.
625 * i386-opc.tbl: Replace "Vex" with "Vex=3" on AVX scalar
627 * i386-tbl.h: Regenerated.
629 2010-01-21 H.J. Lu <hongjiu.lu@intel.com>
631 * i386-dis.c (mod_table): Use FXSAVE on xsave and xrstor.
633 * i386-opc.tbl: Add xsave64 and xrstor64.
634 * i386-tbl.h: Regenerated.
636 2010-01-20 Nick Clifton <nickc@redhat.com>
639 * arm-dis.c (print_arm_address): Do not ignore negative bit in PC
640 based post-indexed addressing.
642 2010-01-15 Sebastian Pop <sebastian.pop@amd.com>
644 * i386-opc.tbl: Support all the possible aliases for VPCOM* insns.
645 * i386-tbl.h: Regenerated.
647 2010-01-14 H.J. Lu <hongjiu.lu@intel.com>
649 * i386-opc.h (VexVVVV): Replace VEX.DNS with VEX.NDS in
652 2010-01-14 H.J. Lu <hongjiu.lu@intel.com>
654 * i386-dis.c (names_mm): New.
655 (intel_names_mm): Likewise.
656 (att_names_mm): Likewise.
657 (names_xmm): Likewise.
658 (intel_names_xmm): Likewise.
659 (att_names_xmm): Likewise.
660 (names_ymm): Likewise.
661 (intel_names_ymm): Likewise.
662 (att_names_ymm): Likewise.
663 (print_insn): Set names_mm, names_xmm and names_ymm.
664 (OP_MMX): Use names_mm, names_xmm and names_ymm.
670 (XMM_Fixup): Likewise.
672 (OP_EX_VexReg): Likewise.
673 (OP_Vex_2src): Likewise.
674 (OP_Vex_2src_1): Likewise.
675 (OP_Vex_2src_2): Likewise.
676 (OP_REG_VexI4): Likewise.
678 2010-01-13 H.J. Lu <hongjiu.lu@intel.com>
680 * i386-dis.c (print_insn): Update comments.
682 2010-01-12 H.J. Lu <hongjiu.lu@intel.com>
684 * i386-dis.c (rex_original): Removed.
685 (ckprefix): Remove rex_original.
686 (print_insn): Update comments.
688 2010-01-09 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
690 * Makefile.in: Regenerate.
691 * configure: Regenerate.
693 2010-01-07 Doug Evans <dje@sebabeach.org>
695 * cgen-ibld.in (insert_normal, extract_normal): Minor cleanup.
696 * fr30-ibld.c, * frv-ibld.c, * ip2k-ibld.c, * iq2000-ibld.c,
697 * lm32-ibld.c, * m32c-ibld.c, * m32r-ibld.c, * mep-ibld.c,
698 * mt-ibld.c, * openrisc-ibld.c, * xc16x-ibld.c,
699 * xstormy16-ibld.c: Regenerate.
701 2010-01-06 Quentin Neill <quentin.neill@amd.com>
703 * i386-gen.c (cpu_flag_init): Add new CPU_AMDFAM15_FLAGS.
704 * i386-init.h: Regenerated.
706 2010-01-06 Daniel Gutson <dgutson@codesourcery.com>
708 * arm-dis.c (print_insn): Fixed search for next symbol and data
709 dumping condition, and the initial mapping symbol state.
711 2010-01-05 Doug Evans <dje@sebabeach.org>
713 * cgen-ibld.in: #include "cgen/basic-modes.h".
714 * fr30-ibld.c, * frv-ibld.c, * ip2k-ibld.c, * iq2000-ibld.c,
715 * lm32-ibld.c, * m32c-ibld.c, * m32r-ibld.c, * mep-ibld.c,
716 * mt-ibld.c, * openrisc-ibld.c, * xc16x-ibld.c,
717 * xstormy16-ibld.c: Regenerate.
719 2010-01-04 Nick Clifton <nickc@redhat.com>
722 * arm-dis.c (print_insn_coprocessor): Initialise value.
724 2010-01-04 Edmar Wienskoski <edmar@freescale.com>
726 * ppc-dis.c (ppc_opts): Add entry for "e500mc64".
728 2010-01-02 Doug Evans <dje@sebabeach.org>
730 * cgen-asm.in: Update copyright year.
731 * cgen-dis.in: Update copyright year.
732 * cgen-ibld.in: Update copyright year.
733 * fr30-asm.c, * fr30-desc.c, * fr30-desc.h, * fr30-dis.c,
734 * fr30-ibld.c, * fr30-opc.c, * fr30-opc.h, * frv-asm.c, * frv-desc.c,
735 * frv-desc.h, * frv-dis.c, * frv-ibld.c, * frv-opc.c, * frv-opc.h,
736 * ip2k-asm.c, * ip2k-desc.c, * ip2k-desc.h, * ip2k-dis.c,
737 * ip2k-ibld.c, * ip2k-opc.c, * ip2k-opc.h, * iq2000-asm.c,
738 * iq2000-desc.c, * iq2000-desc.h, * iq2000-dis.c, * iq2000-ibld.c,
739 * iq2000-opc.c, * iq2000-opc.h, * lm32-asm.c, * lm32-desc.c,
740 * lm32-desc.h, * lm32-dis.c, * lm32-ibld.c, * lm32-opc.c, * lm32-opc.h,
741 * lm32-opinst.c, * m32c-asm.c, * m32c-desc.c, * m32c-desc.h,
742 * m32c-dis.c, * m32c-ibld.c, * m32c-opc.c, * m32c-opc.h, * m32r-asm.c,
743 * m32r-desc.c, * m32r-desc.h, * m32r-dis.c, * m32r-ibld.c,
744 * m32r-opc.c, * m32r-opc.h, * m32r-opinst.c, * mep-asm.c, * mep-desc.c,
745 * mep-desc.h, * mep-dis.c, * mep-ibld.c, * mep-opc.c, * mep-opc.h,
746 * mt-asm.c, * mt-desc.c, * mt-desc.h, * mt-dis.c, * mt-ibld.c,
747 * mt-opc.c, * mt-opc.h, * openrisc-asm.c, * openrisc-desc.c,
748 * openrisc-desc.h, * openrisc-dis.c, * openrisc-ibld.c,
749 * openrisc-opc.c, * openrisc-opc.h, * xc16x-asm.c, * xc16x-desc.c,
750 * xc16x-desc.h, * xc16x-dis.c, * xc16x-ibld.c, * xc16x-opc.c,
751 * xc16x-opc.h, * xstormy16-asm.c, * xstormy16-desc.c,
752 * xstormy16-desc.h, * xstormy16-dis.c, * xstormy16-ibld.c,
753 * xstormy16-opc.c, * xstormy16-opc.h: Regenerate.
755 For older changes see ChangeLog-2009
761 version-control: never