1 2014-06-05 Joel Brobecker <brobecker@adacore.com>
3 * Makefile.am (CONFIG_STATUS_DEPENDENCIES): Add dependency on
5 * Makefile.in, configure: Regenerate.
7 2014-06-03 Nick Clifton <nickc@redhat.com>
9 * msp430-dis.c (msp430_doubleoperand): Use extension_word to
10 decide when extended addressing is being used.
12 2014-06-02 Eric Botcazou <ebotcazou@adacore.com>
14 * sparc-opc.c (cas): Disable for LEON.
17 2014-05-20 Alan Modra <amodra@gmail.com>
19 * m68k-dis.c: Don't include setjmp.h.
21 2014-05-09 H.J. Lu <hongjiu.lu@intel.com>
23 * i386-dis.c (ADDR16_PREFIX): Removed.
24 (ADDR32_PREFIX): Likewise.
25 (DATA16_PREFIX): Likewise.
26 (DATA32_PREFIX): Likewise.
27 (prefix_name): Updated.
28 (print_insn): Simplify data and address size prefixes processing.
30 2014-05-08 Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
32 * or1k-desc.c: Regenerated.
33 * or1k-desc.h: Likewise.
34 * or1k-opc.c: Likewise.
35 * or1k-opc.h: Likewise.
36 * or1k-opinst.c: Likewise.
38 2014-05-07 Andrew Bennett <andrew.bennett@imgtec.com>
40 * mips-opc.c (mips_builtin_opcodes): Add MIPS32r5 eretnc instruction.
45 * mips-dis.c (mips_arch_choices): Add mips32r3, mips32r5, mips64r3 and
47 (parse_mips_dis_option): Update MSA and virtualization support to
48 allow mips64r3 and mips64r5.
50 2014-05-07 Andrew Bennett <andrew.bennett@imgtec.com>
52 * mips-opc.c (G3): Remove I4.
54 2014-05-05 H.J. Lu <hongjiu.lu@intel.com>
57 * i386-dis.c (twobyte_has_mandatory_prefix): New variable.
58 (end_codep): Likewise.
59 (mandatory_prefix): Likewise.
60 (active_seg_prefix): Likewise.
61 (ckprefix): Set active_seg_prefix to the active segment register
63 (seg_prefix): Removed.
64 (get_valid_dis386): Use the last of PREFIX_REPNZ and PREFIX_REPZ
65 for prefix index. Ignore the index if it is invalid and the
66 mandatory prefix isn't required.
67 (print_insn): Set mandatory_prefix if the PREFIX_XXX prefix is
68 mandatory. Don't set PREFIX_REPZ/PREFIX_REPNZ/PREFIX_LOCK bits
69 in used_prefixes here. Don't print unused prefixes. Check
70 active_seg_prefix for the active segment register prefix.
71 Restore the DFLAG bit in sizeflag if the data size prefix is
72 unused. Check the unused mandatory PREFIX_XXX prefixes
73 (append_seg): Only print the segment register which gets used.
74 (OP_E_memory): Check active_seg_prefix for the segment register
78 (OP_DSreg): Set active_seg_prefix to PREFIX_DS if it is unset.
80 2014-05-02 H.J. Lu <hongjiu.lu@intel.com>
83 * config.in: Regenerated.
84 * configure: Likewise.
85 * configure.in: Check if sigsetjmp is available.
86 * h8500-dis.c (private): Replace jmp_buf with OPCODES_SIGJMP_BUF.
87 (fetch_data): Replace longjmp with OPCODES_SIGLONGJMP.
88 (print_insn_h8500): Replace setjmp with OPCODES_SIGSETJMP.
89 * i386-dis.c (dis_private): Replace jmp_buf with OPCODES_SIGJMP_BUF.
90 (fetch_data): Replace longjmp with OPCODES_SIGLONGJMP.
91 (print_insn): Replace setjmp with OPCODES_SIGSETJMP.
92 * ns32k-dis.c (private): Replace jmp_buf with OPCODES_SIGJMP_BUF.
93 (fetch_data): Replace longjmp with OPCODES_SIGLONGJMP.
94 (print_insn_ns32k): Replace setjmp with OPCODES_SIGSETJMP.
95 * sysdep.h (OPCODES_SIGJMP_BUF): New macro.
96 (OPCODES_SIGSETJMP): Likewise.
97 (OPCODES_SIGLONGJMP): Likewise.
98 * vax-dis.c (private): Replace jmp_buf with OPCODES_SIGJMP_BUF.
99 (fetch_data): Replace longjmp with OPCODES_SIGLONGJMP.
100 (print_insn_vax): Replace setjmp with OPCODES_SIGSETJMP.
101 * xtensa-dis.c (dis_private): Replace jmp_buf with
103 (fetch_data): Replace longjmp with OPCODES_SIGLONGJMP.
104 (print_insn_xtensa): Replace setjmp with OPCODES_SIGSETJMP.
105 * z8k-dis.c(instr_data_s): Replace jmp_buf with OPCODES_SIGJMP_BUF.
106 (fetch_data): Replace longjmp with OPCODES_SIGLONGJMP.
107 (print_insn_z8k): Replace setjmp with OPCODES_SIGSETJMP.
109 2014-05-01 H.J. Lu <hongjiu.lu@intel.com>
112 * i386-dis.c (print_insn): Handle prefixes before fwait.
114 2014-04-26 Alan Modra <amodra@gmail.com>
116 * po/POTFILES.in: Regenerate.
118 2014-04-23 Andrew Bennett <andrew.bennett@imgtec.com>
120 * mips-dis.c (mips_arch_choices): Update mips32r2 and mips64r2
121 to allow the MIPS XPA ASE.
122 (parse_mips_dis_option): Process the -Mxpa option.
123 * mips-opc.c (XPA): New define.
124 (mips_builtin_opcodes): Add MIPS XPA instructions and move the
125 locations of the ctc0 and cfc0 instructions.
127 2014-04-22 Christian Svensson <blue@cmd.nu>
129 * Makefile.am: Remove openrisc and or32 support. Add support for or1k.
130 * configure.in: Likewise.
131 * disassemble.c: Likewise.
132 * or1k-asm.c: New file.
133 * or1k-desc.c: New file.
134 * or1k-desc.h: New file.
135 * or1k-dis.c: New file.
136 * or1k-ibld.c: New file.
137 * or1k-opc.c: New file.
138 * or1k-opc.h: New file.
139 * or1k-opinst.c: New file.
140 * Makefile.in: Regenerate.
141 * configure: Regenerate.
142 * openrisc-asm.c: Delete.
143 * openrisc-desc.c: Delete.
144 * openrisc-desc.h: Delete.
145 * openrisc-dis.c: Delete.
146 * openrisc-ibld.c: Delete.
147 * openrisc-opc.c: Delete.
148 * openrisc-opc.h: Delete.
149 * or32-dis.c: Delete.
150 * or32-opc.c: Delete.
152 2014-04-04 Ilya Tocar <ilya.tocar@intel.com>
154 * i386-dis.c (rm_table): Add encls, enclu.
155 * i386-gen.c (cpu_flag_init): Add CPU_SE1_FLAGS,
156 (cpu_flags): Add CpuSE1.
157 * i386-opc.h (enum): Add CpuSE1.
158 (i386_cpu_flags): Add cpuse1.
159 * i386-opc.tbl: Add encls, enclu.
160 * i386-init.h: Regenerated.
161 * i386-tbl.h: Likewise.
163 2014-04-02 Anthony Green <green@moxielogic.com>
165 * moxie-opc.c (moxie_form1_opc_info): Add sign-extension
166 instructions, sex.b and sex.s.
168 2014-03-26 Jiong Wang <jiong.wang@arm.com>
170 * aarch64-dis.c (aarch64_ext_ldst_elemlist): Check H/S undefined
173 2014-03-20 Ilya Tocar <ilya.tocar@intel.com>
175 * i386-opc.tbl: Change memory size for vgatherpf0qps, vgatherpf1qps,
176 vscatterpf0qps, vscatterpf1qps, vgatherqps, vpgatherqd, vpscatterqd,
178 * i386-tbl.h: Regenerate.
180 2014-03-19 Jose E. Marchesi <jose.marchesi@oracle.com>
182 * sparc-dis.c (v9_hpriv_reg_names): Names for %hstick_offset and
183 %hstick_enable added.
185 2014-03-19 Nick Clifton <nickc@redhat.com>
187 * rx-decode.opc (bwl): Allow for bogus instructions with a size
189 (sbwl, ubwl, SCALE): Likewise.
190 * rx-decode.c: Regenerate.
192 2014-03-12 Alan Modra <amodra@gmail.com>
194 * Makefile.in: Regenerate.
196 2014-03-05 Alan Modra <amodra@gmail.com>
198 Update copyright years.
200 2014-03-04 Heiher <r@hev.cc>
202 * mips-dis.c (mips_arch_choices): Usee ISA_MIPS64R2 for Loongson-3A.
204 2014-03-04 Richard Sandiford <rdsandiford@googlemail.com>
206 * mips-opc.c (mips_builtin_opcodes): Move the udi* instructions
207 so that they come after the Loongson extensions.
209 2014-03-03 Alan Modra <amodra@gmail.com>
211 * i386-gen.c (process_copyright): Emit copyright notice on one line.
213 2014-02-28 Alan Modra <amodra@gmail.com>
215 * msp430-decode.c: Regenerate.
217 2014-02-27 Jiong Wang <jiong.wang@arm.com>
219 * aarch64-tbl.h (aarch64_opcode_table): Replace IMM0 with
220 FPIMM0 for fcmeq, fcmgt, fcmge, fcmlt and fcmle.
222 2014-02-27 Yufeng Zhang <yufeng.zhang@arm.com>
224 * aarch64-opc.c (print_register_offset_address): Call
225 get_int_reg_name to prepare the register name.
227 2014-02-25 Ilya Tocar <ilya.tocar@intel.com>
229 * i386-opc.tbl: Remove wrong variant of vcvtps2ph
230 * i386-tbl.h: Regenerate.
232 2014-02-20 Ilya Tocar <ilya.tocar@intel.com>
234 * i386-gen.c (cpu_flag_init): Add CPU_PREFETCHWT1_FLAGS/
235 (cpu_flags): Add CpuPREFETCHWT1.
236 * i386-init.h: Regenerate.
237 * i386-opc.h (CpuPREFETCHWT1): New.
238 (i386_cpu_flags): Add cpuprefetchwt1.
239 * i386-opc.tbl: Cahnge CPU of prefetchwt1 from CpuAVX512PF to CpuPREFETCHWT1.
240 * i386-tbl.h: Regenerate.
242 2014-02-20 Ilya Tocar <ilya.tocar@intel.com>
244 * i386-opc.tbl: Change CPU of vptestnmq, vptestnmd from CpuAVX512CD,
246 * i386-tbl.h: Regenerate.
248 2014-02-19 H.J. Lu <hongjiu.lu@intel.com>
250 * i386-gen.c (output_cpu_flags): Don't output trailing space.
251 (output_opcode_modifier): Likewise.
252 (output_operand_type): Likewise.
253 * i386-init.h: Regenerated.
254 * i386-tbl.h: Likewise.
256 2014-02-12 Ilya Tocar <ilya.tocar@intel.com>
258 * i386-dis.c (MOD enum): Add MOD_0FC7_REG_3, MOD_0FC7_REG_4,
260 (PREFIX enum): Add PREFIX_0FAE_REG_7.
261 (reg_table): Add MOD_0FC7_REG_3, MOD_0FC7_REG_4 MOD_0FC7_REG_5.
262 (prefix_table): Add clflusopt.
263 (mod_table): Add xrstors, xsavec, xsaves.
264 * i386-gen.c (cpu_flag_init): Add CPU_CLFLUSHOPT_FLAGS,
265 CPU_XSAVES_FLAGS, CPU_XSAVEC_FLAGS.
266 (cpu_flags): Add CpuClflushOpt, CpuXSAVES, CpuXSAVEC.
267 * i386-init.h: Regenerate.
268 * i386-opc.tbl: Add clflushopt, xrstors, xrstors64, xsaves,
269 xsaves64, xsavec, xsavec64.
270 * i386-tbl.h: Regenerate.
272 2014-02-10 Alan Modra <amodra@gmail.com>
274 * po/POTFILES.in: Regenerate.
275 * po/opcodes.pot: Regenerate.
277 2014-01-30 Michael Zolotukhin <michael.v.zolotukhin@gmail.com>
278 Jan Beulich <jbeulich@suse.com>
281 * i386-dis.c (OP_E_memory): Fix shift computation for
282 vex_vsib_q_w_dq_mode.
284 2014-01-09 Bradley Nelson <bradnelson@google.com>
285 Roland McGrath <mcgrathr@google.com>
287 * i386-dis.c (print_insn): Do not touch all_prefixes[-1] when
288 last_rex_prefix is -1.
290 2014-01-08 H.J. Lu <hongjiu.lu@intel.com>
292 * i386-gen.c (process_copyright): Update copyright year to 2014.
294 2014-01-03 Maciej W. Rozycki <macro@codesourcery.com>
296 * nds32-asm.c (parse_operand): Fix out-of-range integer constant.
298 For older changes see ChangeLog-2013
300 Copyright (C) 2014 Free Software Foundation, Inc.
302 Copying and distribution of this file, with or without modification,
303 are permitted in any medium without royalty provided the copyright
304 notice and this notice are preserved.
310 version-control: never