2010-02-03 Quentin Neill <quentin.neill@amd.com>
[deliverable/binutils-gdb.git] / opcodes / ChangeLog
1 2010-02-03 Quentin Neill <quentin.neill@amd.com>
2
3 * i386-gen.c (cpu_flag_init): Rename CPU_AMDFAM15_FLAGS
4 to CPU_BDVER1_FLAGS
5 * i386-init.h: Regenerated.
6
7 2010-02-03 Anthony Green <green@moxielogic.com>
8
9 * moxie-opc.c (moxie_form1_opc_info): Move "nop" from 0x00 to
10 0x0f, and make 0x00 an illegal instruction.
11
12 2010-01-29 Daniel Jacobowitz <dan@codesourcery.com>
13
14 * opcodes/arm-dis.c (struct arm_private_data): New.
15 (print_insn_coprocessor, print_insn_arm): Update to use struct
16 arm_private_data.
17 (is_mapping_symbol, get_map_sym_type): New functions.
18 (get_sym_code_type): Check the symbol's section. Do not check
19 mapping symbols.
20 (print_insn): Default to disassembling ARM mode code. Check
21 for mapping symbols separately from other symbols. Use
22 struct arm_private_data.
23
24 2010-01-28 H.J. Lu <hongjiu.lu@intel.com>
25
26 * i386-dis.c (EXVexWdqScalar): New.
27 (vex_scalar_w_dq_mode): Likewise.
28 (prefix_table): Update entries for PREFIX_VEX_3899,
29 PREFIX_VEX_389B, PREFIX_VEX_389D, PREFIX_VEX_389F,
30 PREFIX_VEX_38A9, PREFIX_VEX_38AB, PREFIX_VEX_38AD,
31 PREFIX_VEX_38AF, PREFIX_VEX_38B9, PREFIX_VEX_38BB,
32 PREFIX_VEX_38BD and PREFIX_VEX_38BF.
33 (intel_operand_size): Handle vex_scalar_w_dq_mode.
34 (OP_EX): Likewise.
35
36 2010-01-27 H.J. Lu <hongjiu.lu@intel.com>
37
38 * i386-dis.c (XMScalar): New.
39 (EXdScalar): Likewise.
40 (EXqScalar): Likewise.
41 (EXqScalarS): Likewise.
42 (VexScalar): Likewise.
43 (EXdVexScalarS): Likewise.
44 (EXqVexScalarS): Likewise.
45 (XMVexScalar): Likewise.
46 (scalar_mode): Likewise.
47 (d_scalar_mode): Likewise.
48 (d_scalar_swap_mode): Likewise.
49 (q_scalar_mode): Likewise.
50 (q_scalar_swap_mode): Likewise.
51 (vex_scalar_mode): Likewise.
52 (vex_len_table): Duplcate entries for VEX_LEN_10_P_1,
53 VEX_LEN_10_P_3, VEX_LEN_11_P_1, VEX_LEN_11_P_3, VEX_LEN_2A_P_1,
54 VEX_LEN_2A_P_3, VEX_LEN_2C_P_3, VEX_LEN_2D_P_1, VEX_LEN_2E_P_0,
55 VEX_LEN_2E_P_2, VEX_LEN_2F_P_2, VEX_LEN_51_P_1, VEX_LEN_51_P_3,
56 VEX_LEN_52_P_1, VEX_LEN_53_P_1, VEX_LEN_58_P_1, VEX_LEN_58_P_3,
57 VEX_LEN_59_P_1, VEX_LEN_5A_P_1, VEX_LEN_5A_P_3, VEX_LEN_5C_P_1,
58 VEX_LEN_5C_P_3, VEX_LEN_5D_P_1, VEX_LEN_5D_P_3, VEX_LEN_5E_P_1,
59 VEX_LEN_5E_P_3, VEX_LEN_5F_P_1, VEX_LEN_5F_P_3, VEX_LEN_6E_P_2,
60 VEX_LEN_7E_P_1, VEX_LEN_7E_P_2, VEX_LEN_D6_P_2, VEX_LEN_C2_P_1,
61 VEX_LEN_C2_P_3, VEX_LEN_3A0A_P_2 and VEX_LEN_3A0B_P_2.
62 (vex_w_table): Update entries for VEX_W_10_P_1, VEX_W_10_P_3,
63 VEX_W_11_P_1, VEX_W_11_P_3, VEX_W_2E_P_0, VEX_W_2E_P_2,
64 VEX_W_2F_P_0, VEX_W_2F_P_2, VEX_W_51_P_1, VEX_W_51_P_3,
65 VEX_W_52_P_1, VEX_W_53_P_1, VEX_W_58_P_1, VEX_W_58_P_3,
66 VEX_W_59_P_1, VEX_W_59_P_3, VEX_W_5A_P_1, VEX_W_5A_P_3,
67 VEX_W_5C_P_1, VEX_W_5C_P_3, VEX_W_5D_P_1, VEX_W_5D_P_3,
68 VEX_W_5E_P_1, VEX_W_5E_P_3, VEX_W_5F_P_1, VEX_W_5F_P_3,
69 VEX_W_7E_P_1, VEX_W_D6_P_2 VEX_W_C2_P_1, VEX_W_C2_P_3,
70 VEX_W_3A0A_P_2 and VEX_W_3A0B_P_2.
71 (intel_operand_size): Handle d_scalar_mode, d_scalar_swap_mode,
72 q_scalar_mode, q_scalar_swap_mode.
73 (OP_XMM): Handle scalar_mode.
74 (OP_EX): Handle d_scalar_mode, d_scalar_swap_mode, q_scalar_mode
75 and q_scalar_swap_mode.
76 (OP_VEX): Handle vex_scalar_mode.
77
78 2010-01-24 H.J. Lu <hongjiu.lu@intel.com>
79
80 * i386-dis.c (prefix_table): Remove trailing { Bad_Opcode }.
81
82 2010-01-24 H.J. Lu <hongjiu.lu@intel.com>
83
84 * i386-dis.c (vex_len_table): Remove trailing { Bad_Opcode }.
85
86 2010-01-24 H.J. Lu <hongjiu.lu@intel.com>
87
88 * i386-dis.c (prefix_table): Remove trailing { Bad_Opcode }.
89
90 2010-01-24 H.J. Lu <hongjiu.lu@intel.com>
91
92 * i386-dis.c (Bad_Opcode): New.
93 (bad_opcode): Likewise.
94 (dis386): Replace { "(bad)", { XX } } with { Bad_Opcode }.
95 (dis386_twobyte): Likewise.
96 (reg_table): Likewise.
97 (prefix_table): Likewise.
98 (x86_64_table): Likewise.
99 (vex_len_table): Likewise.
100 (vex_w_table): Likewise.
101 (mod_table): Likewise.
102 (rm_table): Likewise.
103 (float_reg): Likewise.
104 (reg_table): Remove trailing "(bad)" entries.
105 (prefix_table): Likewise.
106 (x86_64_table): Likewise.
107 (vex_len_table): Likewise.
108 (vex_w_table): Likewise.
109 (mod_table): Likewise.
110 (rm_table): Likewise.
111 (get_valid_dis386): Handle bytemode 0.
112
113 2010-01-23 H.J. Lu <hongjiu.lu@intel.com>
114
115 * i386-opc.h (VEXScalar): New.
116
117 * i386-opc.tbl: Replace "Vex" with "Vex=3" on AVX scalar
118 instructions.
119 * i386-tbl.h: Regenerated.
120
121 2010-01-21 H.J. Lu <hongjiu.lu@intel.com>
122
123 * i386-dis.c (mod_table): Use FXSAVE on xsave and xrstor.
124
125 * i386-opc.tbl: Add xsave64 and xrstor64.
126 * i386-tbl.h: Regenerated.
127
128 2010-01-20 Nick Clifton <nickc@redhat.com>
129
130 PR 11170
131 * arm-dis.c (print_arm_address): Do not ignore negative bit in PC
132 based post-indexed addressing.
133
134 2010-01-15 Sebastian Pop <sebastian.pop@amd.com>
135
136 * i386-opc.tbl: Support all the possible aliases for VPCOM* insns.
137 * i386-tbl.h: Regenerated.
138
139 2010-01-14 H.J. Lu <hongjiu.lu@intel.com>
140
141 * i386-opc.h (VexVVVV): Replace VEX.DNS with VEX.NDS in
142 comments.
143
144 2010-01-14 H.J. Lu <hongjiu.lu@intel.com>
145
146 * i386-dis.c (names_mm): New.
147 (intel_names_mm): Likewise.
148 (att_names_mm): Likewise.
149 (names_xmm): Likewise.
150 (intel_names_xmm): Likewise.
151 (att_names_xmm): Likewise.
152 (names_ymm): Likewise.
153 (intel_names_ymm): Likewise.
154 (att_names_ymm): Likewise.
155 (print_insn): Set names_mm, names_xmm and names_ymm.
156 (OP_MMX): Use names_mm, names_xmm and names_ymm.
157 (OP_XMM): Likewise.
158 (OP_EM): Likewise.
159 (OP_EMC): Likewise.
160 (OP_MXC): Likewise.
161 (OP_EX): Likewise.
162 (XMM_Fixup): Likewise.
163 (OP_VEX): Likewise.
164 (OP_EX_VexReg): Likewise.
165 (OP_Vex_2src): Likewise.
166 (OP_Vex_2src_1): Likewise.
167 (OP_Vex_2src_2): Likewise.
168 (OP_REG_VexI4): Likewise.
169
170 2010-01-13 H.J. Lu <hongjiu.lu@intel.com>
171
172 * i386-dis.c (print_insn): Update comments.
173
174 2010-01-12 H.J. Lu <hongjiu.lu@intel.com>
175
176 * i386-dis.c (rex_original): Removed.
177 (ckprefix): Remove rex_original.
178 (print_insn): Update comments.
179
180 2010-01-09 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
181
182 * Makefile.in: Regenerate.
183 * configure: Regenerate.
184
185 2010-01-07 Doug Evans <dje@sebabeach.org>
186
187 * cgen-ibld.in (insert_normal, extract_normal): Minor cleanup.
188 * fr30-ibld.c, * frv-ibld.c, * ip2k-ibld.c, * iq2000-ibld.c,
189 * lm32-ibld.c, * m32c-ibld.c, * m32r-ibld.c, * mep-ibld.c,
190 * mt-ibld.c, * openrisc-ibld.c, * xc16x-ibld.c,
191 * xstormy16-ibld.c: Regenerate.
192
193 2010-01-06 Quentin Neill <quentin.neill@amd.com>
194
195 * i386-gen.c (cpu_flag_init): Add new CPU_AMDFAM15_FLAGS.
196 * i386-init.h: Regenerated.
197
198 2010-01-06 Daniel Gutson <dgutson@codesourcery.com>
199
200 * arm-dis.c (print_insn): Fixed search for next symbol and data
201 dumping condition, and the initial mapping symbol state.
202
203 2010-01-05 Doug Evans <dje@sebabeach.org>
204
205 * cgen-ibld.in: #include "cgen/basic-modes.h".
206 * fr30-ibld.c, * frv-ibld.c, * ip2k-ibld.c, * iq2000-ibld.c,
207 * lm32-ibld.c, * m32c-ibld.c, * m32r-ibld.c, * mep-ibld.c,
208 * mt-ibld.c, * openrisc-ibld.c, * xc16x-ibld.c,
209 * xstormy16-ibld.c: Regenerate.
210
211 2010-01-04 Nick Clifton <nickc@redhat.com>
212
213 PR 11123
214 * arm-dis.c (print_insn_coprocessor): Initialise value.
215
216 2010-01-04 Edmar Wienskoski <edmar@freescale.com>
217
218 * ppc-dis.c (ppc_opts): Add entry for "e500mc64".
219
220 2010-01-02 Doug Evans <dje@sebabeach.org>
221
222 * cgen-asm.in: Update copyright year.
223 * cgen-dis.in: Update copyright year.
224 * cgen-ibld.in: Update copyright year.
225 * fr30-asm.c, * fr30-desc.c, * fr30-desc.h, * fr30-dis.c,
226 * fr30-ibld.c, * fr30-opc.c, * fr30-opc.h, * frv-asm.c, * frv-desc.c,
227 * frv-desc.h, * frv-dis.c, * frv-ibld.c, * frv-opc.c, * frv-opc.h,
228 * ip2k-asm.c, * ip2k-desc.c, * ip2k-desc.h, * ip2k-dis.c,
229 * ip2k-ibld.c, * ip2k-opc.c, * ip2k-opc.h, * iq2000-asm.c,
230 * iq2000-desc.c, * iq2000-desc.h, * iq2000-dis.c, * iq2000-ibld.c,
231 * iq2000-opc.c, * iq2000-opc.h, * lm32-asm.c, * lm32-desc.c,
232 * lm32-desc.h, * lm32-dis.c, * lm32-ibld.c, * lm32-opc.c, * lm32-opc.h,
233 * lm32-opinst.c, * m32c-asm.c, * m32c-desc.c, * m32c-desc.h,
234 * m32c-dis.c, * m32c-ibld.c, * m32c-opc.c, * m32c-opc.h, * m32r-asm.c,
235 * m32r-desc.c, * m32r-desc.h, * m32r-dis.c, * m32r-ibld.c,
236 * m32r-opc.c, * m32r-opc.h, * m32r-opinst.c, * mep-asm.c, * mep-desc.c,
237 * mep-desc.h, * mep-dis.c, * mep-ibld.c, * mep-opc.c, * mep-opc.h,
238 * mt-asm.c, * mt-desc.c, * mt-desc.h, * mt-dis.c, * mt-ibld.c,
239 * mt-opc.c, * mt-opc.h, * openrisc-asm.c, * openrisc-desc.c,
240 * openrisc-desc.h, * openrisc-dis.c, * openrisc-ibld.c,
241 * openrisc-opc.c, * openrisc-opc.h, * xc16x-asm.c, * xc16x-desc.c,
242 * xc16x-desc.h, * xc16x-dis.c, * xc16x-ibld.c, * xc16x-opc.c,
243 * xc16x-opc.h, * xstormy16-asm.c, * xstormy16-desc.c,
244 * xstormy16-desc.h, * xstormy16-dis.c, * xstormy16-ibld.c,
245 * xstormy16-opc.c, * xstormy16-opc.h: Regenerate.
246
247 For older changes see ChangeLog-2009
248 \f
249 Local Variables:
250 mode: change-log
251 left-margin: 8
252 fill-column: 74
253 version-control: never
254 End:
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