opcodes/ChangeLog

   1 2005-03-19  H.J. Lu  <hongjiu.lu@intel.com>
   2
   3         * mmix-opc.c (O): Use 24UL instead of 24 for unsigned long.
   4         (Z): Likewise.
   5
   6 2005-03-19  Hans-Peter Nilsson  <hp@bitrange.com>
   7
   8         * mmix-opc.c (O, Z): Force expression as unsigned long.
   9
  10 2005-03-18  Nick Clifton  <nickc@redhat.com>
  11
  12         * ip2k-asm.c: Regenerate.
  13         * op/opcodes.pot: Regenerate.
  14
  15 2005-03-16  Nick Clifton  <nickc@redhat.com>
  16             Ben Elliston  <bje@au.ibm.com>
  17
  18         * configure.in (werror): New switch: Add -Werror to the
  19         compiler command line.  Enabled by default.  Disable via
  20         --disable-werror.
  21         * configure: Regenerate.
  22
  23 2005-03-16  Alan Modra  <amodra@bigpond.net.au>
  24
  25         * ppc-dis.c (powerpc_dialect): Don't set PPC_OPCODE_ALTIVEC when
  26         BOOKE.
  27
  28 2005-03-15  Alan Modra  <amodra@bigpond.net.au>
  29
  30         * po/es.po: Commit new Spanish translation.
  31
  32         * po/fr.po: Commit new French translation.
  33
  34 2005-03-14  Jan-Benedict Glaw  <jbglaw@lug-owl.de>
  35
  36         * vax-dis.c: Fix spelling error
  37         (print_insn_vax): Use ".word 0x0012 # Entry mask: r1 r2 >" instead
  38         of just "Entry mask: < r1 ... >"
  39
  40 2005-03-12  Zack Weinberg  <zack@codesourcery.com>
  41
  42         * arm-dis.c (arm_opcodes): Document %E and %V.
  43         Add entries for v6T2 ARM instructions:
  44         bfc bfi mls strht ldrht ldrsht ldrsbt movw movt rbit ubfx sbfx.
  45         (print_insn_arm): Add support for %E and %V.
  46         (thumb_opcodes): Add ARMv6K instructions nop, sev, wfe, wfi, yield.
  47
  48 2005-03-10  Jeff Baker  <jbaker@qnx.com>
  49             Alan Modra  <amodra@bigpond.net.au>
  50
  51         * ppc-opc.c (insert_sprg, extract_sprg): New Functions.
  52         (powerpc_operands <SPRG>): Call the above.  Bit field is 5 bits.
  53         (SPRG_MASK): Delete.
  54         (XSPRG_MASK): Mask off extra bits now part of sprg field.
  55         (powerpc_opcodes): Asjust mfsprg and mtsprg to suit new mask.  Move
  56         mfsprg4..7 after msprg and consolidate.
  57
  58 2005-03-09  Jan-Benedict Glaw  <jbglaw@lug-owl.de>
  59
  60         * vax-dis.c (entry_mask_bit): New array.
  61         (print_insn_vax): Decode function entry mask.
  62
  63 2005-03-07  Aldy Hernandez  <aldyh@redhat.com>
  64
  65         * ppc-opc.c (powerpc_opcodes): Fix encoding of efscfd.
  66
  67 2005-03-05  Alan Modra  <amodra@bigpond.net.au>
  68
  69         * po/opcodes.pot: Regenerate.
  70
  71 2005-03-03  Ramana Radhakrishnan  <ramana.radhakrishnan@codito.com>
  72
  73         * arc-dis.c (a4_decoding_class): New enum.
  74         (dsmOneArcInst): Use the enum values for the decoding class.
  75         Remove redundant case in the switch for decodingClass value 11.
  76
  77 2005-03-02  Jan Beulich  <jbeulich@novell.com>
  78
  79         * i386-dis.c (print_insn): Suppress lock prefix printing for cr8...15
  80         accesses.
  81         (OP_C): Consider lock prefix in non-64-bit modes.
  82
  83 2005-02-24  Alan Modra  <amodra@bigpond.net.au>
  84
  85         * cris-dis.c (format_hex): Remove ineffective warning fix.
  86         * crx-dis.c (make_instruction): Warning fix.
  87         * frv-asm.c: Regenerate.
  88
  89 2005-02-23  Nick Clifton  <nickc@redhat.com>
  90
  91         * cgen-dis.in: Use bfd_byte for buffers that are passed to
  92         read_memory.
  93
  94         * ia64-opc.c (locate_opcode_ent): Initialise opval array.
  95
  96         * crx-dis.c (make_instruction): Move argument structure into inner
  97         scope and ensure that all of its fields are initialised before
  98         they are used.
  99
 100         * fr30-asm.c: Regenerate.
 101         * fr30-dis.c: Regenerate.
 102         * frv-asm.c: Regenerate.
 103         * frv-dis.c: Regenerate.
 104         * ip2k-asm.c: Regenerate.
 105         * ip2k-dis.c: Regenerate.
 106         * iq2000-asm.c: Regenerate.
 107         * iq2000-dis.c: Regenerate.
 108         * m32r-asm.c: Regenerate.
 109         * m32r-dis.c: Regenerate.
 110         * openrisc-asm.c: Regenerate.
 111         * openrisc-dis.c: Regenerate.
 112         * xstormy16-asm.c: Regenerate.
 113         * xstormy16-dis.c: Regenerate.
 114
 115 2005-02-22  Alan Modra  <amodra@bigpond.net.au>
 116
 117         * arc-ext.c: Warning fixes.
 118         * arc-ext.h: Likewise.
 119         * cgen-opc.c: Likewise.
 120         * ia64-gen.c: Likewise.
 121         * maxq-dis.c: Likewise.
 122         * ns32k-dis.c: Likewise.
 123         * w65-dis.c: Likewise.
 124         * ia64-asmtab.c: Regenerate.
 125
 126 2005-02-22  Alan Modra  <amodra@bigpond.net.au>
 127
 128         * fr30-desc.c: Regenerate.
 129         * fr30-desc.h: Regenerate.
 130         * fr30-opc.c: Regenerate.
 131         * fr30-opc.h: Regenerate.
 132         * frv-desc.c: Regenerate.
 133         * frv-desc.h: Regenerate.
 134         * frv-opc.c: Regenerate.
 135         * frv-opc.h: Regenerate.
 136         * ip2k-desc.c: Regenerate.
 137         * ip2k-desc.h: Regenerate.
 138         * ip2k-opc.c: Regenerate.
 139         * ip2k-opc.h: Regenerate.
 140         * iq2000-desc.c: Regenerate.
 141         * iq2000-desc.h: Regenerate.
 142         * iq2000-opc.c: Regenerate.
 143         * iq2000-opc.h: Regenerate.
 144         * m32r-desc.c: Regenerate.
 145         * m32r-desc.h: Regenerate.
 146         * m32r-opc.c: Regenerate.
 147         * m32r-opc.h: Regenerate.
 148         * m32r-opinst.c: Regenerate.
 149         * openrisc-desc.c: Regenerate.
 150         * openrisc-desc.h: Regenerate.
 151         * openrisc-opc.c: Regenerate.
 152         * openrisc-opc.h: Regenerate.
 153         * xstormy16-desc.c: Regenerate.
 154         * xstormy16-desc.h: Regenerate.
 155         * xstormy16-opc.c: Regenerate.
 156         * xstormy16-opc.h: Regenerate.
 157
 158 2005-02-21  Alan Modra  <amodra@bigpond.net.au>
 159
 160         * Makefile.am: Run "make dep-am"
 161         * Makefile.in: Regenerate.
 162
 163 2005-02-15  Nick Clifton  <nickc@redhat.com>
 164
 165         * cgen-dis.in (print_address): Add an ATTRIBUTE_UNUSED to prevent
 166         compile time warnings.
 167         (print_keyword): Likewise.
 168         (default_print_insn): Likewise.
 169
 170         * fr30-desc.c: Regenerated.
 171         * fr30-desc.h: Regenerated.
 172         * fr30-dis.c: Regenerated.
 173         * fr30-opc.c: Regenerated.
 174         * fr30-opc.h: Regenerated.
 175         * frv-desc.c: Regenerated.
 176         * frv-dis.c: Regenerated.
 177         * frv-opc.c: Regenerated.
 178         * ip2k-asm.c: Regenerated.
 179         * ip2k-desc.c: Regenerated.
 180         * ip2k-desc.h: Regenerated.
 181         * ip2k-dis.c: Regenerated.
 182         * ip2k-opc.c: Regenerated.
 183         * ip2k-opc.h: Regenerated.
 184         * iq2000-desc.c: Regenerated.
 185         * iq2000-dis.c: Regenerated.
 186         * iq2000-opc.c: Regenerated.
 187         * m32r-asm.c: Regenerated.
 188         * m32r-desc.c: Regenerated.
 189         * m32r-desc.h: Regenerated.
 190         * m32r-dis.c: Regenerated.
 191         * m32r-opc.c: Regenerated.
 192         * m32r-opc.h: Regenerated.
 193         * m32r-opinst.c: Regenerated.
 194         * openrisc-desc.c: Regenerated.
 195         * openrisc-desc.h: Regenerated.
 196         * openrisc-dis.c: Regenerated.
 197         * openrisc-opc.c: Regenerated.
 198         * openrisc-opc.h: Regenerated.
 199         * xstormy16-desc.c: Regenerated.
 200         * xstormy16-desc.h: Regenerated.
 201         * xstormy16-dis.c: Regenerated.
 202         * xstormy16-opc.c: Regenerated.
 203         * xstormy16-opc.h: Regenerated.
 204
 205 2005-02-14  H.J. Lu  <hongjiu.lu@intel.com>
 206
 207         * dis-buf.c (perror_memory): Use sprintf_vma to print out
 208         address.
 209
 210 2005-02-11  Nick Clifton  <nickc@redhat.com>
 211
 212         * iq2000-asm.c: Regenerate.
 213
 214         * frv-dis.c: Regenerate.
 215
 216 2005-02-07  Jim Blandy  <jimb@redhat.com>
 217
 218         * Makefile.am (CGEN): Load guile.scm before calling the main
 219         application script.
 220         * Makefile.in: Regenerated.
 221         * cgen.sh: Be prepared for the 'cgen' argument to contain spaces.
 222         Simply pass the cgen-opc.scm path to ${cgen} as its first
 223         argument; ${cgen} itself now contains the '-s', or whatever is
 224         appropriate for the Scheme being used.
 225
 226 2005-01-31  Andrew Cagney  <cagney@gnu.org>
 227
 228         * configure: Regenerate to track ../gettext.m4.
 229
 230 2005-01-31  Jan Beulich  <jbeulich@novell.com>
 231
 232         * ia64-gen.c (NELEMS): Define.
 233         (shrink): Generate alias with missing second predicate register when
 234         opcode has two outputs and these are both predicates.
 235         * ia64-opc-i.c (FULL17): Define.
 236         (ia64_opcodes_i): Add mov-to-pr alias without second input. Use FULL17
 237         here to generate output template.
 238         (TBITCM, TNATCM): Undefine after use.
 239         * ia64-opc-m.c (ia64_opcodes_i): Add alloc alias without ar.pfs as
 240         first input. Add ld16 aliases without ar.csd as second output. Add
 241         st16 aliases without ar.csd as second input. Add cmpxchg aliases
 242         without ar.ccv as third input. Add cmp8xchg16 aliases without ar.csd/
 243         ar.ccv as third/fourth inputs. Consolidate through...
 244         (CMPXCHG_acq, CMPXCHG_rel, CMPXCHG_1, CMPXCHG_2, CMPXCHG_4, CMPXCHG_8,
 245         CMPXCHGn, CMP8XCHG16, CMPXCHG_ALL): Define.
 246         * ia64-asmtab.c: Regenerate.
 247
 248 2005-01-27  Andrew Cagney  <cagney@gnu.org>
 249
 250         * configure: Regenerate to track ../gettext.m4 change.
 251
 252 2005-01-25  Alexandre Oliva  <aoliva@redhat.com>
 253
 254         2004-11-10  Alexandre Oliva  <aoliva@redhat.com>
 255         * frv-asm.c: Rebuilt.
 256         * frv-desc.c: Rebuilt.
 257         * frv-desc.h: Rebuilt.
 258         * frv-dis.c: Rebuilt.
 259         * frv-ibld.c: Rebuilt.
 260         * frv-opc.c: Rebuilt.
 261         * frv-opc.h: Rebuilt.
 262
 263 2005-01-24  Andrew Cagney  <cagney@gnu.org>
 264
 265         * configure: Regenerate, ../gettext.m4 was updated.
 266
 267 2005-01-21  Fred Fish  <fnf@specifixinc.com>
 268
 269         * mips-opc.c:  Change INSN_ALIAS to INSN2_ALIAS.
 270         Change INSN_WRITE_MDMX_ACC to INSN2_WRITE_MDMX_ACC.
 271         Change INSN_READ_MDMX_ACC to INSN2_READ_MDMX_ACC.
 272         * mips-dis.c: Ditto.
 273
 274 2005-01-20  Alan Modra  <amodra@bigpond.net.au>
 275
 276         * ppc-opc.c (powerpc_opcodes): Add optional 'l' arg to tlbiel.
 277
 278 2005-01-19  Fred Fish  <fnf@specifixinc.com>
 279
 280         * mips-dis.c (no_aliases): New disassembly option flag.
 281         (set_default_mips_dis_options): Init no_aliases to zero.
 282         (parse_mips_dis_option): Handle no-aliases option.
 283         (print_insn_mips): Ignore table entries that are aliases
 284         if no_aliases is set.
 285         (print_insn_mips16): Ditto.
 286         * mips-opc.c (mips_builtin_opcodes): Add initializer column for
 287         new pinfo2 member and add INSN_ALIAS initializers as needed.  Also
 288         move WR_MACC and RD_MACC initializers from pinfo to pinfo2.
 289         * mips16-opc.c (mips16_opcodes): Ditto.
 290
 291 2005-01-17  Andrew Stubbs  <andrew.stubbs@st.com>
 292
 293         * sh-opc.h (arch_sh2a_or_sh3e,arch_sh2a_or_sh4): Correct definition.
 294         (inheritance diagram): Add missing edge.
 295         (arch_sh1_up): Rename arch_sh_up to match external name to make life
 296         easier for the testsuite.
 297         (arch_sh4_nofp_up): Likewise, rename arch_sh4_nofpu_up.
 298         (arch_sh4a_nofp_up): Likewise, rename arch_sh4a_nofpu_up.
 299         (arch_sh2a_nofpu_or_sh4_nommu_nofpu_up): Add missing
 300         arch_sh2a_or_sh4_up child.
 301         (sh_table): Do renaming as above.
 302         Correct comment for ldc.l for gas testsuite to read.
 303         Remove rogue mul.l from sh1 (duplicate of the one for sh2).
 304         Correct comments for movy.w and movy.l for gas testsuite to read.
 305         Correct comments for fmov.d and fmov.s for gas testsuite to read.
 306
 307 2005-01-12  H.J. Lu  <hongjiu.lu@intel.com>
 308
 309         * i386-dis.c (OP_E): Don't ignore scale in SIB for 64 bit mode.
 310
 311 2005-01-12  H.J. Lu  <hongjiu.lu@intel.com>
 312
 313         * i386-dis.c (OP_E): Ignore scale when index == 0x4 in SIB.
 314
 315 2005-01-10  Andreas Schwab  <schwab@suse.de>
 316
 317         * disassemble.c (disassemble_init_for_target) <case
 318         bfd_arch_ia64>: Set skip_zeroes to 16.
 319         <case bfd_arch_tic4x>: Set skip_zeroes to 32.
 320
 321 2004-12-23  Tomer Levi  <Tomer.Levi@nsc.com>
 322
 323         * crx-opc.c: Mark 'bcop' instruction as RELAXABLE.
 324
 325 2004-12-14  Svein E. Seldal  <Svein.Seldal@solidas.com>
 326
 327         * avr-dis.c: Prettyprint. Added printing of symbol names in all
 328         memory references. Convert avr_operand() to C90 formatting.
 329
 330 2004-12-05  Tomer Levi  <Tomer.Levi@nsc.com>
 331
 332         * crx-dis.c (print_arg): Use 'info->print_address_func' for address printing.
 333
 334 2004-11-29  Tomer Levi  <Tomer.Levi@nsc.com>
 335
 336         * crx-opc.c (crx_optab): Mark all rbase_disps* operands as signed.
 337         (no_op_insn): Initialize array with instructions that have no
 338         operands.
 339         * crx-dis.c (make_instruction): Get rid of COP_BRANCH_INS operand swapping.
 340
 341 2004-11-29  Richard Earnshaw  <rearnsha@arm.com>
 342
 343         * arm-dis.c: Correct top-level comment.
 344
 345 2004-11-27  Richard Earnshaw  <rearnsha@arm.com>
 346
 347         * arm-opc.h (arm_opcode, thumb_opcode): Add extra field for the
 348         architecuture defining the insn.
 349         (arm_opcodes, thumb_opcodes): Delete.  Move to ...
 350         * arm-dis.c (arm_opcodes, thumb_opcodes): Here.  Add architecutre
 351         field.
 352         Also include opcode/arm.h.
 353         * Makefile.am (arm-dis.lo): Update dependency list.
 354         * Makefile.in: Regenerate.
 355
 356 2004-11-22  Ravi Ramaseshan  <ravi.ramaseshan@codito.com>
 357
 358         * opcode/arc-opc.c (insert_base): Modify ls_operand[LS_OFFSET] to
 359         reflect the change to the short immediate syntax.
 360
 361 2004-11-19  Alan Modra  <amodra@bigpond.net.au>
 362
 363         * or32-opc.c (debug): Warning fix.
 364         * po/POTFILES.in: Regenerate.
 365
 366         * maxq-dis.c: Formatting.
 367         (print_insn): Warning fix.
 368
 369 2004-11-17  Daniel Jacobowitz  <dan@codesourcery.com>
 370
 371         * arm-dis.c (WORD_ADDRESS): Define.
 372         (print_insn): Use it.  Correct big-endian end-of-section handling.
 373
 374 2004-11-08  Inderpreet Singh   <inderpreetb@nioda.hcltech.com>
 375             Vineet Sharma      <vineets@noida.hcltech.com>
 376
 377         * maxq-dis.c: New file.
 378         * disassemble.c (ARCH_maxq): Define.
 379         (disassembler): Add 'print_insn_maxq_little' for handling maxq
 380         instructions..
 381         * configure.in: Add case for bfd_maxq_arch.
 382         * configure: Regenerate.
 383         * Makefile.am: Add support for maxq-dis.c
 384         * Makefile.in: Regenerate.
 385         * aclocal.m4: Regenerate.
 386
 387 2004-11-05  Tomer Levi  <Tomer.Levi@nsc.com>
 388
 389         * crx-opc.c (crx_optab): Rename 'arg_icr' to 'arg_idxr' for Index register
 390         mode.
 391         * crx-dis.c: Likewise.
 392
 393 2004-11-04  Hans-Peter Nilsson  <hp@axis.com>
 394
 395         Generally, handle CRISv32.
 396         * cris-dis.c (TRACE_CASE): Define as (disdata->trace_case).
 397         (struct cris_disasm_data): New type.
 398         (format_reg, format_hex, cris_constraint, print_flags)
 399         (get_opcode_entry): Add struct cris_disasm_data * parameter.  All
 400         callers changed.
 401         (format_sup_reg, print_insn_crisv32_with_register_prefix)
 402         (print_insn_crisv32_without_register_prefix)
 403         (print_insn_crisv10_v32_with_register_prefix)
 404         (print_insn_crisv10_v32_without_register_prefix)
 405         (cris_parse_disassembler_options): New functions.
 406         (bytes_to_skip, cris_spec_reg): Add enum cris_disass_family
 407         parameter.  All callers changed.
 408         (get_opcode_entry): Call malloc, not xmalloc.  Return NULL on
 409         failure.
 410         (cris_constraint) <case 'Y', 'U'>: New cases.
 411         (bytes_to_skip): Handle 'Y' and 'N' as 's'.  Skip size is 4 bytes
 412         for constraint 'n'.
 413         (print_with_operands) <case 'Y'>: New case.
 414         (print_with_operands) <case 'T', 'A', '[', ']', 'd', 'n', 'u'>
 415         <case 'N', 'Y', 'Q'>: New cases.
 416         (print_insn_cris_generic): Emit "bcc ." for zero and CRISv32.
 417         (print_insn_cris_with_register_prefix)
 418         (print_insn_cris_without_register_prefix): Call
 419         cris_parse_disassembler_options.
 420         * cris-opc.c (cris_spec_regs): Mention that this table isn't used
 421         for CRISv32 and the size of immediate operands.  New v32-only
 422         entries for bz, pid, srs, wz, exs, eda, dz, ebp, erp, nrp, ccs and
 423         spc.  Add v32-only 4-byte entries for p2, p3, p5 and p6.  Change
 424         ccr, ibr, irp to be v0..v10.  Change bar, dccr to be v8..v10.
 425         Change brp to be v3..v10.
 426         (cris_support_regs): New vector.
 427         (cris_opcodes): Update head comment.  New format characters '[',
 428         ']', space, 'A', 'd', 'N', 'n', 'Q', 'T', 'u', 'U', 'Y'.
 429         Add new opcodes for v32 and adjust existing opcodes to accommodate
 430         differences to earlier variants.
 431         (cris_cond15s): New vector.
 432
 433 2004-11-04 Jan Beulich <jbeulich@novell.com>
 434
 435         * i386-dis.c (Eq, Edqw, indirEp, Gdq, I1): Define.
 436         (indirEb): Remove.
 437         (Mp): Use f_mode rather than none at all.
 438         (t_mode, dq_mode, dqw_mode, f_mode, const_1_mode): Define. t_mode
 439         replaces what previously was x_mode; x_mode now means 128-bit SSE
 440         operands.
 441         (dis386): Make far jumps and calls have an 'l' prefix only in AT&T
 442         mode. movmskpX's, pextrw's, and pmovmskb's first operands are Gdq.
 443         pinsrw's second operand is Edqw.
 444         (grps): 1-bit shifts' and rotates' second operands are I1. cmpxchg8b's
 445         operand is Eq. movntq's and movntdq's first operands are EM. s[gi]dt,
 446         fldenv, frstor, fsave, fstenv all should also have suffixes in Intel
 447         mode when an operand size override is present or always suffixing.
 448         More instructions will need to be added to this group.
 449         (putop): Handle new macro chars 'C' (short/long suffix selector),
 450         'I' (Intel mode override for following macro char), and 'J' (for
 451         adding the 'l' prefix to far branches in AT&T mode). When an
 452         alternative was specified in the template, honor macro character when
 453         specified for Intel mode.
 454         (OP_E): Handle new *_mode values. Correct pointer specifications for
 455         memory operands. Consolidate output of index register.
 456         (OP_G): Handle new *_mode values.
 457         (OP_I): Handle const_1_mode.
 458         (OP_ESreg, OP_DSreg): Generate pointer specifications. Indicate
 459         respective opcode prefix bits have been consumed.
 460         (OP_EM, OP_EX): Provide some default handling for generating pointer
 461         specifications.
 462
 463 2004-10-28  Tomer Levi  <Tomer.Levi@nsc.com>
 464
 465         * crx-opc.c (REV_COP_INST): New macro, reverse operand order of
 466         COP_INST macro.
 467
 468 2004-10-27  Tomer Levi  <Tomer.Levi@nsc.com>
 469
 470         * crx-dis.c (enum REG_ARG_TYPE): New, replacing COP_ARG_TYPE.
 471         (getregliststring): Support HI/LO and user registers.
 472         * crx-opc.c (crx_instruction): Update data structure according to the
 473         rearrangement done in CRX opcode header file.
 474         (crx_regtab):  Likewise.
 475         (crx_optab):  Likewise.
 476         (crx_instruction): Reorder load/stor instructions, remove unsupported
 477         formats.
 478         support new Co-Processor instruction 'cpi'.
 479
 480 2004-10-27  Nick Clifton  <nickc@redhat.com>
 481
 482         * opcodes/iq2000-asm.c: Regenerate.
 483         * opcodes/iq2000-desc.c: Regenerate.
 484         * opcodes/iq2000-desc.h: Regenerate.
 485         * opcodes/iq2000-dis.c: Regenerate.
 486         * opcodes/iq2000-ibld.c: Regenerate.
 487         * opcodes/iq2000-opc.c: Regenerate.
 488         * opcodes/iq2000-opc.h: Regenerate.
 489
 490 2004-10-21  Tomer Levi  <Tomer.Levi@nsc.com>
 491
 492         * crx-opc.c (crx_instruction): Replace i3, i4, i5 with us3,
 493         us4, us5 (respectively).
 494         Remove unsupported 'popa' instruction.
 495         Reverse operands order in store co-processor instructions.
 496
 497 2004-10-15  Alan Modra  <amodra@bigpond.net.au>
 498
 499         * Makefile.am: Run "make dep-am"
 500         * Makefile.in: Regenerate.
 501
 502 2004-10-12  Bob Wilson  <bob.wilson@acm.org>
 503
 504         * xtensa-dis.c: Use ISO C90 formatting.
 505
 506 2004-10-09  Alan Modra  <amodra@bigpond.net.au>
 507
 508         * ppc-opc.c: Revert 2004-09-09 change.
 509
 510 2004-10-07  Bob Wilson  <bob.wilson@acm.org>
 511
 512         * xtensa-dis.c (state_names): Delete.
 513         (fetch_data): Use xtensa_isa_maxlength.
 514         (print_xtensa_operand): Replace operand parameter with opcode/operand
 515         pair.  Remove print_sr_name parameter.  Use new xtensa-isa.h functions.
 516         (print_insn_xtensa): Use new xtensa-isa.h functions.  Handle multislot
 517         instruction bundles.  Use xmalloc instead of malloc.
 518
 519 2004-10-07  David Gibson  <david@gibson.dropbear.id.au>
 520
 521         * ppc-opc.c: Replace literal "0"s with NULLs in pointer
 522         initializers.
 523
 524 2004-10-07  Tomer Levi  <Tomer.Levi@nsc.com>
 525
 526         * crx-opc.c (crx_instruction): Support Co-processor insns.
 527         * crx-dis.c (COP_ARG_TYPE): New enum for CO-Processor arguments.
 528         (getregliststring): Change function to use the above enum.
 529         (print_arg): Handle CO-Processor insns.
 530         (crx_cinvs): Add 'b' option to invalidate the branch-target
 531         cache.
 532
 533 2004-10-06  Aldy Hernandez  <aldyh@redhat.com>
 534
 535         * ppc-opc.c (powerpc_opcodes): Add efscfd, efdabs, efdnabs,
 536         efdneg, efdadd, efdsub, efdmul, efddiv, efdcmpgt, efdcmplt,
 537         efdcmpeq, efdtstgt, efdtstlt, efdtsteq, efdcfsi, efdcfsid,
 538         efdcfui, efdcfuid, efdcfsf, efdcfuf, efdctsi, efdctsidz, efdctsiz,
 539         efdctui, efdctuidz, efdctuiz, efdctsf, efdctuf, efdctuf, efdcfs.
 540
 541 2004-10-01  Bill Farmer  <Bill@the-farmers.freeserve.co.uk>
 542
 543         * pdp11-dis.c (print_insn_pdp11): Subtract the SOB's displacement
 544         rather than add it.
 545
 546 2004-09-30  Paul Brook  <paul@codesourcery.com>
 547
 548         * arm-dis.c (print_insn_arm): Handle 'e' for SMI instruction.
 549         * arm-opc.h: Document %e.  Add ARMv6ZK instructions.
 550
 551 2004-09-17  H.J. Lu  <hongjiu.lu@intel.com>
 552
 553         * Makefile.am (AUTOMAKE_OPTIONS): Require 1.9.
 554         (CONFIG_STATUS_DEPENDENCIES): New.
 555         (Makefile): Removed.
 556         (config.status): Likewise.
 557         * Makefile.in: Regenerated.
 558
 559 2004-09-17  Alan Modra  <amodra@bigpond.net.au>
 560
 561         * Makefile.am: Run "make dep-am".
 562         * Makefile.in: Regenerate.
 563         * aclocal.m4: Regenerate.
 564         * configure: Regenerate.
 565         * po/POTFILES.in: Regenerate.
 566         * po/opcodes.pot: Regenerate.
 567
 568 2004-09-11  Andreas Schwab  <schwab@suse.de>
 569
 570         * configure: Rebuild.
 571
 572 2004-09-09  Segher Boessenkool  <segher@kernel.crashing.org>
 573
 574         * ppc-opc.c (L): Make this field not optional.
 575
 576 2004-09-03  Tomer Levi  <Tomer.Levi@nsc.com>
 577
 578         * opc-crx.c: Rename 'popma' to 'popa', remove 'pushma'.
 579         Fix parameter to 'm[t|f]csr' insns.
 580
 581 2004-08-30  Nathanael Nerode  <neroden@gcc.gnu.org>
 582
 583         * configure.in: Autoupdate to autoconf 2.59.
 584         * aclocal.m4: Rebuild with aclocal 1.4p6.
 585         * configure: Rebuild with autoconf 2.59.
 586         * Makefile.in: Rebuild with automake 1.4p6 (picking up
 587         bfd changes for autoconf 2.59 on the way).
 588         * config.in: Rebuild with autoheader 2.59.
 589
 590 2004-08-27  Richard Sandiford  <rsandifo@redhat.com>
 591
 592         * frv-desc.[ch], frv-opc.[ch]: Regenerated.
 593
 594 2004-07-30  Michal Ludvig  <mludvig@suse.cz>
 595
 596         * i386-dis.c (GRPPADLCK): Renamed to GRPPADLCK1
 597         (GRPPADLCK2): New define.
 598         (twobyte_has_modrm): True for 0xA6.
 599         (grps): GRPPADLCK2 for opcode 0xA6.
 600
 601 2004-07-29  Alexandre Oliva  <aoliva@redhat.com>
 602
 603         Introduce SH2a support.
 604         * sh-opc.h (arch_sh2a_base): Renumber.
 605         (arch_sh2a_nofpu_base): Remove.
 606         (arch_sh_base_mask): Adjust.
 607         (arch_opann_mask): New.
 608         (arch_sh2a, arch_sh2a_nofpu): Adjust.
 609         (arch_sh2a_up, arch_sh2a_nofpu_up): Likewise.
 610         (sh_table): Adjust whitespace.
 611         2004-02-24  Corinna Vinschen  <vinschen@redhat.com>
 612         * sh-opc.h (arch_sh2a_nofpu_up): New.  Use instead of arch_sh2a_up in
 613         instruction list throughout.
 614         (arch_sh2a_up): Redefine to include fpu instruction set.  Use instead
 615         of arch_sh2a in instruction list throughout.
 616         (arch_sh2e_up): Accomodate above changes.
 617         (arch_sh2_up): Ditto.
 618         2004-02-20  Corinna Vinschen  <vinschen@redhat.com>
 619         * sh-opc.h: Add arch_sh2a_nofpu to arch_sh2_up.
 620         2004-02-18  Corinna Vinschen  <vinschen@redhat.com>
 621         * sh-dis.c (print_insn_sh): Add bfd_mach_sh2a_nofpu handling.
 622         * sh-opc.h (arch_sh2a_nofpu): New.
 623         (arch_sh2a_up): New, defines sh2a and sh2a_nofpu.
 624         (sh_table): Change all arch_sh2a to arch_sh2a_up unless FPU
 625         instruction.
 626         2004-01-20  DJ Delorie  <dj@redhat.com>
 627         * sh-dis.c (print_insn_sh): SH2A does not have 'X' fp regs.
 628         2003-12-29  DJ Delorie  <dj@redhat.com>
 629         * sh-opc.c (sh_nibble_type, sh_arg_type, arch_2a, arch_2e_up,
 630         sh_opcode_info, sh_table): Add sh2a support.
 631         (arch_op32): New, to tag 32-bit opcodes.
 632         * sh-dis.c (print_insn_sh): Support sh2a opcodes.
 633         2003-12-02  Michael Snyder  <msnyder@redhat.com>
 634         * sh-opc.h (arch_sh2a): Add.
 635         * sh-dis.c (arch_sh2a): Handle.
 636         * sh-opc.h (arch_sh2_up): Fix up to include arch_sh2a.
 637
 638 2004-07-27  Tomer Levi  <Tomer.Levi@nsc.com>
 639
 640         * crx-opc.c: Add popx,pushx insns. Indent code, fix comments.
 641
 642 2004-07-22  Nick Clifton  <nickc@redhat.com>
 643
 644         PR/280
 645         * h8300-dis.c (bfd_h8_disassemble): Do not dump raw bytes for the
 646         insns - this is done by objdump itself.
 647         * h8500-dis.c (print_insn_h8500): Likewise.
 648
 649 2004-07-21  Jan Beulich <jbeulich@novell.com>
 650
 651         * i386-dis.c (OP_E): Show rip-relative addressing in 64-bit mode
 652         regardless of address size prefix in effect.
 653         (ptr_reg): Size or address registers does not depend on rex64, but
 654         on the presence of an address size override.
 655         (OP_MMX): Use rex.x only for xmm registers.
 656         (OP_EM): Use rex.z only for xmm registers.
 657
 658 2004-07-20  Maciej W. Rozycki  <macro@linux-mips.org>
 659
 660         * mips-opc.c (mips_builtin_opcodes): Move coprocessor 2
 661         move/branch operations to the bottom so that VR5400 multimedia
 662         instructions take precedence in disassembly.
 663
 664 2004-07-20  Maciej W. Rozycki  <macro@linux-mips.org>
 665
 666         * mips-opc.c (mips_builtin_opcodes): Remove the MIPS32
 667         ISA-specific "break" encoding.
 668
 669 2004-07-13  Elvis Chiang  <elvisfb@gmail.com>
 670
 671         * arm-opc.h: Fix typo in comment.
 672
 673 2004-07-11  Andreas Schwab  <schwab@suse.de>
 674
 675         * m68k-dis.c (m68k_valid_ea): Fix typos in last change.
 676
 677 2004-07-09  Andreas Schwab  <schwab@suse.de>
 678
 679         * m68k-dis.c (m68k_valid_ea): Check validity of all codes.
 680
 681 2004-07-07  Tomer Levi  <Tomer.Levi@nsc.com>
 682
 683         * Makefile.am (CFILES): Add crx-dis.c, crx-opc.c.
 684         (ALL_MACHINES): Add crx-dis.lo, crx-opc.lo.
 685         (crx-dis.lo): New target.
 686         (crx-opc.lo): Likewise.
 687         * Makefile.in: Regenerate.
 688         * configure.in: Handle bfd_crx_arch.
 689         * configure: Regenerate.
 690         * crx-dis.c: New file.
 691         * crx-opc.c: New file.
 692         * disassemble.c (ARCH_crx): Define.
 693         (disassembler): Handle ARCH_crx.
 694
 695 2004-06-29  James E Wilson  <wilson@specifixinc.com>
 696
 697         * ia64-opc-a.c (ia64_opcodes_a): Delete mov immediate pseudo for adds.
 698         * ia64-asmtab.c: Regnerate.
 699
 700 2004-06-28  Alan Modra  <amodra@bigpond.net.au>
 701
 702         * ppc-opc.c (insert_fxm): Handle mfocrf and mtocrf.
 703         (extract_fxm): Don't test dialect.
 704         (XFXFXM_MASK): Include the power4 bit.
 705         (XFXM): Add p4 param.
 706         (powerpc_opcodes): Add mfocrf and mtocrf.  Adjust mtcr.
 707
 708 2004-06-27  Alexandre Oliva  <aoliva@redhat.com>
 709
 710         2003-07-21  Richard Sandiford  <rsandifo@redhat.com>
 711         * disassemble.c (disassembler): Handle bfd_mach_h8300sxn.
 712
 713 2004-06-26  Alan Modra  <amodra@bigpond.net.au>
 714
 715         * ppc-opc.c (BH, XLBH_MASK): Define.
 716         (powerpc_opcodes): Allow BH field on bclr, bclrl, bcctr, bcctrl.
 717
 718 2004-06-24  Alan Modra  <amodra@bigpond.net.au>
 719
 720         * i386-dis.c (x_mode): Comment.
 721         (two_source_ops): File scope.
 722         (float_mem): Correct fisttpll and fistpll.
 723         (float_mem_mode): New table.
 724         (dofloat): Use it.
 725         (OP_E): Correct intel mode PTR output.
 726         (ptr_reg): Use open_char and close_char.
 727         (PNI_Fixup): Handle possible suffix on sidt.  Use op1out etc. for
 728         operands.  Set two_source_ops.
 729
 730 2004-06-15  Alan Modra  <amodra@bigpond.net.au>
 731
 732         * arc-ext.c (build_ARC_extmap): Use bfd_get_section_size
 733         instead of _raw_size.
 734
 735 2004-06-08  Jakub Jelinek  <jakub@redhat.com>
 736
 737         * ia64-gen.c (in_iclass): Handle more postinc st
 738         and ld variants.
 739         * ia64-asmtab.c: Rebuilt.
 740
 741 2004-06-01  Martin Schwidefsky  <schwidefsky@de.ibm.com>
 742
 743         * s390-opc.txt: Correct architecture mask for some opcodes.
 744         lrv, lrvh, strv, ml, dl, alc, slb rll and mvclu are available
 745         in the esa mode as well.
 746
 747 2004-05-28  Andrew Stubbs <andrew.stubbs@superh.com>
 748
 749         * sh-dis.c (target_arch): Make unsigned.
 750         (print_insn_sh): Replace (most of) switch with a call to
 751         sh_get_arch_from_bfd_mach(). Also use new architecture flags system.
 752         * sh-opc.h: Redefine architecture flags values.
 753         Add sh3-nommu architecture.
 754         Reorganise <arch>_up macros so they make more visual sense.
 755         (SH_MERGE_ARCH_SET): Define new macro.
 756         (SH_VALID_BASE_ARCH_SET): Likewise.
 757         (SH_VALID_MMU_ARCH_SET): Likewise.
 758         (SH_VALID_CO_ARCH_SET): Likewise.
 759         (SH_VALID_ARCH_SET): Likewise.
 760         (SH_MERGE_ARCH_SET_VALID): Likewise.
 761         (SH_ARCH_SET_HAS_FPU): Likewise.
 762         (SH_ARCH_SET_HAS_DSP): Likewise.
 763         (SH_ARCH_UNKNOWN_ARCH): Likewise.
 764         (sh_get_arch_from_bfd_mach): Add prototype.
 765         (sh_get_arch_up_from_bfd_mach): Likewise.
 766         (sh_get_bfd_mach_from_arch_set): Likewise.
 767         (sh_merge_bfd_arc): Likewise.
 768
 769 2004-05-24  Peter Barada  <peter@the-baradas.com>
 770
 771         * m68k-dis.c(print_insn_m68k): Strip body of diassembly out
 772         into new match_insn_m68k function.  Loop over canidate
 773         matches and select first that completely matches.
 774         * m68k-dis.c(print_insn_arg): Fix 'g' case to only extract 1 bit.
 775         * m68k-dis.c(print_insn_arg): Call new function m68k_valid_ea
 776         to verify addressing for MAC/EMAC.
 777         * m68k-dis.c(print_insn_arg): Use reg_half_names for MAC/EMAC
 778         reigster halves since 'fpu' and 'spl' look misleading.
 779         * m68k-dis.c(fetch_arg): Fix 'G', 'H', 'I', 'f', 'M', 'N' cases.
 780         * m68k-opc.c: Rearragne mac/emac cases to use longest for
 781         first, tighten up match masks.
 782         * m68k-opc.c: Add 'size' field to struct m68k_opcode.  Produce
 783         'size' from special case code in print_insn_m68k to
 784         determine decode size of insns.
 785
 786 2004-05-19  Alan Modra  <amodra@bigpond.net.au>
 787
 788         * ppc-opc.c (insert_fxm): Enable two operand mfcr when -many as
 789         well as when -mpower4.
 790
 791 2004-05-13  Nick Clifton  <nickc@redhat.com>
 792
 793         * po/fr.po: Updated French translation.
 794
 795 2004-05-05  Peter Barada  <peter@the-baradas.com>
 796
 797         * m68k-dis.c(print_insn_m68k): Add new chips, use core
 798         variants in arch_mask.  Only set m68881/68851 for 68k chips.
 799         * m68k-op.c: Switch from ColdFire chips to core variants.
 800
 801 2004-05-05  Alan Modra  <amodra@bigpond.net.au>
 802
 803         PR 147.
 804         * ppc-opc.c (PPCVEC): Remove PPC_OPCODE_PPC.
 805
 806 2004-04-29  Ben Elliston  <bje@au.ibm.com>
 807
 808         * ppc-opc.c (XCMPL): Renmame to XOPL. Update users.
 809         (powerpc_opcodes): Add "dbczl" instruction for PPC970.
 810
 811 2004-04-22  Kaz Kojima  <kkojima@rr.iij4u.or.jp>
 812
 813         * sh-dis.c (print_insn_sh): Print the value in constant pool
 814         as a symbol if it looks like a symbol.
 815
 816 2004-04-22  Peter Barada <peter@the-baradas.com>
 817
 818         * m68k-dis.c(print_insn_m68k): Set mfcmac/mcfemac on
 819         appropriate ColdFire architectures.
 820         (print_insn_m68k): Handle EMAC, MAC/EMAC scalefactor, and MAC/EMAC
 821         mask addressing.
 822         Add EMAC instructions, fix MAC instructions. Remove
 823         macmw/macml/msacmw/msacml instructions since mask addressing now
 824         supported.
 825
 826 2004-04-20  Jakub Jelinek  <jakub@redhat.com>
 827
 828         * sparc-opc.c (fmoviccx, fmovfccx, fmovccx): Define.
 829         (fmovicc, fmovfcc, fmovcc): Remove fpsize argument, change opcode to
 830         suffix.  Use fmov*x macros, create all 3 fpsize variants in one
 831         macro.  Adjust all users.
 832
 833 2004-04-15  Anil Paranjpe  <anilp1@kpitcummins.com>
 834
 835         * h8300-dis.c (bfd_h8_disassemble) : Treat "adds" & "subs"
 836         separately.
 837
 838 2004-03-30  Kazuhiro Inaoka  <inaoka.kazuhiro@renesas.com>
 839
 840         * m32r-asm.c: Regenerate.
 841
 842 2004-03-29  Stan Shebs  <shebs@apple.com>
 843
 844         * mpw-config.in, mpw-make.sed: Remove MPW support files, no longer
 845         used.
 846
 847 2004-03-19  Alan Modra  <amodra@bigpond.net.au>
 848
 849         * aclocal.m4: Regenerate.
 850         * config.in: Regenerate.
 851         * configure: Regenerate.
 852         * po/POTFILES.in: Regenerate.
 853         * po/opcodes.pot: Regenerate.
 854
 855 2004-03-16  Alan Modra  <amodra@bigpond.net.au>
 856
 857         * ppc-dis.c (print_insn_powerpc): Don't print tabs.  Handle
 858         PPC_OPERANDS_GPR_0.
 859         * ppc-opc.c (RA0): Define.
 860         (RAQ, RAL, RAM, RAS, RSQ, RTQ, RSO): Use PPC_OPERAND_GPR_0.
 861         (RAOPT): Rename from RAO.  Update all uses.
 862         (powerpc_opcodes): Use RA0 as appropriate.
 863
 864 2004-03-15  Aldy Hernandez  <aldyh@redhat.com>
 865
 866         * ppc-opc.c (powerpc_opcodes): Add BOOKE versions of mfsprg.
 867
 868 2004-03-15  Alan Modra  <amodra@bigpond.net.au>
 869
 870         * sparc-dis.c (print_insn_sparc): Update getword prototype.
 871
 872 2004-03-12  Michal Ludvig  <mludvig@suse.cz>
 873
 874         * i386-dis.c (GRPPLOCK): Delete.
 875         (grps): Delete GRPPLOCK entry.
 876
 877 2004-03-12  Alan Modra  <amodra@bigpond.net.au>
 878
 879         * i386-dis.c (OP_M, OP_0f0e, OP_0fae, NOP_Fixup): New functions.
 880         (M, Mp): Use OP_M.
 881         (None, PADLOCK_SPECIAL, PADLOCK_0): Delete.
 882         (GRPPADLCK): Define.
 883         (dis386): Use NOP_Fixup on "nop".
 884         (dis386_twobyte): Use GRPPADLCK on opcode 0xa7.
 885         (twobyte_has_modrm): Set for 0xa7.
 886         (padlock_table): Delete.  Move to..
 887         (grps): ..here, using OP_0f07.  Use OP_Ofae on lfence, mfence
 888         and clflush.
 889         (print_insn): Revert PADLOCK_SPECIAL code.
 890         (OP_E): Delete sfence, lfence, mfence checks.
 891
 892 2004-03-12  Jakub Jelinek  <jakub@redhat.com>
 893
 894         * i386-dis.c (grps): Use INVLPG_Fixup instead of OP_E for invlpg.
 895         (INVLPG_Fixup): New function.
 896         (PNI_Fixup): Remove ATTRIBUTE_UNUSED from sizeflag.
 897
 898 2004-03-12  Michal Ludvig  <mludvig@suse.cz>
 899
 900         * i386-dis.c (PADLOCK_SPECIAL, PADLOCK_0): New defines.
 901         (dis386_twobyte): Opcode 0xa7 is PADLOCK_0.
 902         (padlock_table): New struct with PadLock instructions.
 903         (print_insn): Handle PADLOCK_SPECIAL.
 904
 905 2004-03-12  Alan Modra  <amodra@bigpond.net.au>
 906
 907         * i386-dis.c (grps): Use clflush by default for 0x0fae/7.
 908         (OP_E): Twiddle clflush to sfence here.
 909
 910 2004-03-08  Nick Clifton  <nickc@redhat.com>
 911
 912         * po/de.po: Updated German translation.
 913
 914 2003-03-03  Andrew Stubbs  <andrew.stubbs@superh.com>
 915
 916         * sh-dis.c (print_insn_sh): Don't disassemble fp instructions in
 917         nofpu mode.  Add BFD type bfd_mach_sh4_nommu_nofpu.
 918         * sh-opc.h: Add sh4_nommu_nofpu architecture and adjust instructions
 919         accordingly.
 920
 921 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
 922
 923         * frv-asm.c: Regenerate.
 924         * frv-desc.c: Regenerate.
 925         * frv-desc.h: Regenerate.
 926         * frv-dis.c: Regenerate.
 927         * frv-ibld.c: Regenerate.
 928         * frv-opc.c: Regenerate.
 929         * frv-opc.h: Regenerate.
 930
 931 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
 932
 933         * frv-desc.c, frv-opc.c: Regenerate.
 934
 935 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
 936
 937         * frv-desc.c, frv-opc.c, frv-opc.h: Regenerate.
 938
 939 2004-02-26  Andrew Stubbs  <andrew.stubbs@superh.com>
 940
 941         * sh-opc.h: Move fsca and fsrra instructions from sh4a to sh4.
 942         Also correct mistake in the comment.
 943
 944 2004-02-26  Andrew Stubbs <andrew.stubbs@superh.com>
 945
 946         * sh-dis.c (print_insn_sh): Add REG_N_D nibble type to
 947         ensure that double registers have even numbers.
 948         Add REG_N_B01 for nn01 (binary 01) nibble to ensure
 949         that reserved instruction 0xfffd does not decode the same
 950         as 0xfdfd (ftrv).
 951         * sh-opc.h: Add REG_N_D nibble type and use it whereever
 952         REG_N refers to a double register.
 953         Add REG_N_B01 nibble type and use it instead of REG_NM
 954         in ftrv.
 955         Adjust the bit patterns in a few comments.
 956
 957 2004-02-25  Aldy Hernandez  <aldyh@redhat.com>
 958
 959         * ppc-opc.c (powerpc_opcodes): Change mask for dcbt and dcbtst.
 960
 961 2004-02-20  Aldy Hernandez  <aldyh@redhat.com>
 962
 963         * ppc-opc.c (powerpc_opcodes): Move mfmcsrr0 before mfdc_dat.
 964
 965 2004-02-20  Aldy Hernandez  <aldyh@redhat.com>
 966
 967         * ppc-opc.c (powerpc_opcodes): Add m*ivor35.
 968
 969 2004-02-20  Aldy Hernandez  <aldyh@redhat.com>
 970
 971         * ppc-opc.c (powerpc_opcodes): Add mfivor32, mfivor33, mfivor34,
 972         mtivor32, mtivor33, mtivor34.
 973
 974 2004-02-19  Aldy Hernandez  <aldyh@redhat.com>
 975
 976         * ppc-opc.c (powerpc_opcodes): Add mfmcar.
 977
 978 2004-02-10  Petko Manolov  <petkan@nucleusys.com>
 979
 980         * arm-opc.h Maverick accumulator register opcode fixes.
 981
 982 2004-02-13  Ben Elliston  <bje@wasabisystems.com>
 983
 984         * m32r-dis.c: Regenerate.
 985
 986 2004-01-27  Michael Snyder  <msnyder@redhat.com>
 987
 988         * sh-opc.h (sh_table): "fsrra", not "fssra".
 989
 990 2004-01-23  Andrew Over <andrew.over@cs.anu.edu.au>
 991
 992         * sparc-opc.c (fdtox, fstox, fqtox, fxtod, fxtos, fxtoq): Tighten
 993         contraints.
 994
 995 2004-01-19  Andrew Over  <andrew.over@cs.anu.edu.au>
 996
 997         * sparc-opc.c (sparc_opcodes) <f[dsq]tox, fxto[dsq]>: Fix args.
 998
 999 2004-01-19  Alan Modra  <amodra@bigpond.net.au>
1000
1001         * i386-dis.c (OP_E): Print scale factor on intel mode sib when not
1002         1.  Don't print scale factor on AT&T mode when index missing.
1003
1004 2004-01-16  Alexandre Oliva  <aoliva@redhat.com>
1005
1006         * m10300-opc.c (mov): 8- and 24-bit immediates are zero-extended
1007         when loaded into XR registers.
1008
1009 2004-01-14  Richard Sandiford  <rsandifo@redhat.com>
1010
1011         * frv-desc.h: Regenerate.
1012         * frv-desc.c: Regenerate.
1013         * frv-opc.c: Regenerate.
1014
1015 2004-01-13  Michael Snyder  <msnyder@redhat.com>
1016
1017         * sh-dis.c (print_insn_sh): Allocate 4 bytes for insn.
1018
1019 2004-01-09  Paul Brook  <paul@codesourcery.com>
1020
1021         * arm-opc.h (arm_opcodes): Move generic mcrr after known
1022         specific opcodes.
1023
1024 2004-01-07  Daniel Jacobowitz  <drow@mvista.com>
1025
1026         * Makefile.am (libopcodes_la_DEPENDENCIES)
1027         (libopcodes_la_LIBADD): Revert 2003-05-17 change.  Add explanatory
1028         comment about the problem.
1029         * Makefile.in: Regenerate.
1030
1031 2004-01-06  Alexandre Oliva  <aoliva@redhat.com>
1032
1033         2003-12-19  Alexandre Oliva  <aoliva@redhat.com>
1034         * frv-asm.c (parse_ulo16, parse_uhi16, parse_d12): Fix some
1035         cut&paste errors in shifting/truncating numerical operands.
1036         2003-08-04  Alexandre Oliva  <aoliva@redhat.com>
1037         * frv-asm.c (parse_ulo16): Parse gotofflo and gotofffuncdesclo.
1038         (parse_uslo16): Likewise.
1039         (parse_uhi16): Parse gotoffhi and gotofffuncdeschi.
1040         (parse_d12): Parse gotoff12 and gotofffuncdesc12.
1041         (parse_s12): Likewise.
1042         2003-08-04  Alexandre Oliva  <aoliva@redhat.com>
1043         * frv-asm.c (parse_ulo16): Parse gotlo and gotfuncdesclo.
1044         (parse_uslo16): Likewise.
1045         (parse_uhi16): Parse gothi and gotfuncdeschi.
1046         (parse_d12): Parse got12 and gotfuncdesc12.
1047         (parse_s12): Likewise.
1048
1049 2004-01-02  Albert Bartoszko  <albar@nt.kegel.com.pl>
1050
1051         * msp430-dis.c (msp430_doubleoperand): Check for an 'add'
1052         instruction which looks similar to an 'rla' instruction.
1053
1054 For older changes see ChangeLog-0203
1055 \f
1056 Local Variables:
1057 mode: change-log
1058 left-margin: 8
1059 fill-column: 74
1060 version-control: never
1061 End: