1 2005-06-07 Zack Weinberg <zack@codesourcery.com>
3 * arm-dis.c: Split up the comments describing the format codes, so
4 that the ARM and 16-bit Thumb opcode tables each have comments
5 preceding them that describe all the codes, and only the codes,
6 valid in those tables. (32-bit Thumb table is already like this.)
7 Reorder the lists in all three comments to match the order in
8 which the codes are implemented.
9 Remove all forward declarations of static functions. Convert all
10 function definitions to ISO C format.
11 (print_insn_arm, print_insn_thumb16, print_insn_thumb32):
13 (print_insn_thumb16): Remove unused case 'I'.
14 (print_insn): Update for changed calling convention of subroutines.
16 2005-05-25 Jan Beulich <jbeulich@novell.com>
18 * i386-dis.c (OP_E): In Intel mode, display 32-bit displacements in
19 hex (but retain it being displayed as signed). Remove redundant
20 checks. Add handling of displacements for 16-bit addressing in Intel
23 2005-05-25 Jan Beulich <jbeulich@novell.com>
25 * i386-dis.c (prefix_name): Remove pointless mode_64bit check.
26 (OP_E): Remove redundant REX_EXTZ handling. Remove pointless
27 masking of 'rm' in 16-bit memory address handling.
29 2005-05-19 Anton Blanchard <anton@samba.org>
31 * ppc-dis.c (powerpc_dialect): Handle "-Mpower5".
32 (print_ppc_disassembler_options): Document it.
33 * ppc-opc.c (SVC_LEV): Define.
34 (LEV): Allow optional operand.
36 (powerpc_opcodes): Extend "sc". Adjust "svc" and "svcl". Add
37 "hrfid", "popcntb", "fsqrtes", "fsqrtes.", "fre" and "fre.".
39 2005-05-19 Kelley Cook <kcook@gcc.gnu.org>
41 * Makefile.in: Regenerate.
43 2005-05-17 Zack Weinberg <zack@codesourcery.com>
45 * arm-dis.c (thumb_opcodes): Add disassembly for V6T2 16-bit
46 instructions. Adjust disassembly of some opcodes to match
48 (thumb32_opcodes): New table.
49 (print_insn_thumb): Rename print_insn_thumb16; don't handle
50 two-halfword branches here.
51 (print_insn_thumb32): New function.
52 (print_insn): Choose among print_insn_arm, print_insn_thumb16,
53 and print_insn_thumb32. Be consistent about order of
54 halfwords when printing 32-bit instructions.
56 2005-05-07 H.J. Lu <hongjiu.lu@intel.com>
59 * i386-dis.c (branch_v_mode): New.
60 (indirEv): Use branch_v_mode instead of v_mode.
61 (OP_E): Handle branch_v_mode.
63 2005-05-07 H.J. Lu <hongjiu.lu@intel.com>
65 * d10v-dis.c (dis_2_short): Support 64bit host.
67 2005-05-07 Nick Clifton <nickc@redhat.com>
69 * po/nl.po: Updated translation.
71 2005-05-07 Nick Clifton <nickc@redhat.com>
73 * Update the address and phone number of the FSF organization in
74 the GPL notices in the following files:
75 a29k-dis.c, aclocal.m4, alpha-dis.c, alpha-opc.c, arc-dis.c,
76 arc-dis.h, arc-ext.c, arc-ext.h, arc-opc.c, arm-dis.c, arm-opc.h,
77 avr-dis.c, cgen-asm.c, cgen-asm.in, cgen-dis.c, cgen-dis.in,
78 cgen-ibld.in, cgen-opc.c, cgen.sh, cris-dis.c, cris-opc.c,
79 crx-dis.c, crx-opc.c, d10v-dis.c, d10v-opc.c, d30v-dis.c,
80 d30v-opc.c, dis-buf.c, dis-init.c, disassemble.c, dlx-dis.c,
81 fr30-asm.c, fr30-desc.c, fr30-desc.h, fr30-dis.c, fr30-ibld.c,
82 fr30-opc.c, fr30-opc.h, frv-asm.c, frv-desc.c, frv-desc.h,
83 frv-dis.c, frv-ibld.c, frv-opc.c, frv-opc.h, h8300-dis.c,
84 h8500-dis.c, h8500-opc.h, hppa-dis.c, i370-dis.c, i370-opc.c,
85 i386-dis.c, i860-dis.c, i960-dis.c, ia64-asmtab.h, ia64-dis.c,
86 ia64-gen.c, ia64-opc-a.c, ia64-opc-b.c, ia64-opc-d.c,
87 ia64-opc-f.c, ia64-opc-i.c, ia64-opc-m.c, ia64-opc-x.c,
88 ia64-opc.c, ia64-opc.h, ip2k-asm.c, ip2k-desc.c, ip2k-desc.h,
89 ip2k-dis.c, ip2k-ibld.c, ip2k-opc.c, ip2k-opc.h, iq2000-asm.c,
90 iq2000-desc.c, iq2000-desc.h, iq2000-dis.c, iq2000-ibld.c,
91 iq2000-opc.c, iq2000-opc.h, m10200-dis.c, m10200-opc.c,
92 m10300-dis.c, m10300-opc.c, m32r-asm.c, m32r-desc.c, m32r-desc.h,
93 m32r-dis.c, m32r-ibld.c, m32r-opc.c, m32r-opc.h, m32r-opinst.c,
94 m68hc11-dis.c, m68hc11-opc.c, m68k-dis.c, m68k-opc.c, m88k-dis.c,
95 maxq-dis.c, mcore-dis.c, mcore-opc.h, mips-dis.c, mips-opc.c,
96 mips16-opc.c, mmix-dis.c, mmix-opc.c, msp430-dis.c, ns32k-dis.c,
97 openrisc-asm.c, openrisc-desc.c, openrisc-desc.h, openrisc-dis.c,
98 openrisc-ibld.c, openrisc-opc.c, openrisc-opc.h, opintl.h,
99 or32-dis.c, or32-opc.c, pdp11-dis.c, pdp11-opc.c, pj-dis.c,
100 pj-opc.c, ppc-dis.c, ppc-opc.c, s390-dis.c, s390-mkopc.c,
101 s390-opc.c, sh-dis.c, sh-opc.h, sh64-dis.c, sh64-opc.c,
102 sh64-opc.h, sparc-dis.c, sparc-opc.c, sysdep.h, tic30-dis.c,
103 tic4x-dis.c, tic54x-dis.c, tic54x-opc.c, tic80-dis.c, tic80-opc.c,
104 v850-dis.c, v850-opc.c, vax-dis.c, w65-dis.c, w65-opc.h,
105 xstormy16-asm.c, xstormy16-desc.c, xstormy16-desc.h,
106 xstormy16-dis.c, xstormy16-ibld.c, xstormy16-opc.c,
107 xstormy16-opc.h, xtensa-dis.c, z8k-dis.c, z8kgen.c
109 2005-05-05 James E Wilson <wilson@specifixinc.com>
111 * ia64-opc.c: Include sysdep.h before libiberty.h.
113 2005-05-05 Nick Clifton <nickc@redhat.com>
115 * configure.in (ALL_LINGUAS): Add vi.
116 * configure: Regenerate.
119 2005-04-26 Jerome Guitton <guitton@gnat.com>
121 * configure.in: Fix the check for basename declaration.
122 * configure: Regenerate.
124 2005-04-19 Alan Modra <amodra@bigpond.net.au>
126 * ppc-opc.c (RTO): Define.
127 (powerpc_opcodes <tlbsx, tlbsx., tlbre>): Combine PPC403 and BOOKE
128 entries to suit PPC440.
130 2005-04-18 Mark Kettenis <kettenis@gnu.org>
132 * i386-dis.c: Insert hyphens into selected VIA PadLock extensions.
135 2005-04-14 Nick Clifton <nickc@redhat.com>
137 * po/fi.po: New translation: Finnish.
138 * configure.in (ALL_LINGUAS): Add fi.
139 * configure: Regenerate.
141 2005-04-14 Alan Modra <amodra@bigpond.net.au>
143 * Makefile.am (NO_WERROR): Define.
144 * configure.in: Invoke AM_BINUTILS_WARNINGS.
145 * Makefile.in: Regenerate.
146 * aclocal.m4: Regenerate.
147 * configure: Regenerate.
149 2005-04-04 Nick Clifton <nickc@redhat.com>
151 * fr30-asm.c: Regenerate.
152 * frv-asm.c: Regenerate.
153 * iq2000-asm.c: Regenerate.
154 * m32r-asm.c: Regenerate.
155 * openrisc-asm.c: Regenerate.
157 2005-04-01 Jan Beulich <jbeulich@novell.com>
159 * i386-dis.c (PNI_Fixup): Neither mwait nor monitor have any
160 visible operands in Intel mode. The first operand of monitor is
163 2005-04-01 Jan Beulich <jbeulich@novell.com>
165 * i386-dis.c (INVLPG_Fixup): Decode rdtscp; change code to allow for
166 easier future additions.
168 2005-03-31 Jerome Guitton <guitton@gnat.com>
170 * configure.in: Check for basename.
171 * configure: Regenerate.
174 2005-03-29 H.J. Lu <hongjiu.lu@intel.com>
176 * i386-dis.c (SEG_Fixup): New.
178 (dis386): Use "Sv" for 0x8c and 0x8e.
180 2005-03-21 Jan-Benedict Glaw <jbglaw@lug-owl.de>
181 Nick Clifton <nickc@redhat.com>
183 * vax-dis.c: (entry_addr): New varible: An array of user supplied
184 function entry mask addresses.
185 (entry_addr_occupied_slots): New variable: The number of occupied
186 elements in entry_addr.
187 (entry_addr_total_slots): New variable: The total number of
188 elements in entry_addr.
189 (parse_disassembler_options): New function. Fills in the entry_addr
191 (free_entry_array): New function. Release the memory used by the
192 entry addr array. Suppressed because there is no way to call it.
193 (is_function_entry): Check if a given address is a function's
194 start address by looking at supplied entry mask addresses and
195 symbol information, if available.
196 (print_insn_vax): Use parse_disassembler_options and is_function_entry.
198 2005-03-23 H.J. Lu <hongjiu.lu@intel.com>
200 * cris-dis.c (print_with_operands): Use ~31L for long instead
203 2005-03-20 H.J. Lu <hongjiu.lu@intel.com>
205 * mmix-opc.c (O): Revert the last change.
208 2005-03-19 H.J. Lu <hongjiu.lu@intel.com>
210 * mmix-opc.c (O): Use 24UL instead of 24 for unsigned long.
213 2005-03-19 Hans-Peter Nilsson <hp@bitrange.com>
215 * mmix-opc.c (O, Z): Force expression as unsigned long.
217 2005-03-18 Nick Clifton <nickc@redhat.com>
219 * ip2k-asm.c: Regenerate.
220 * op/opcodes.pot: Regenerate.
222 2005-03-16 Nick Clifton <nickc@redhat.com>
223 Ben Elliston <bje@au.ibm.com>
225 * configure.in (werror): New switch: Add -Werror to the
226 compiler command line. Enabled by default. Disable via
228 * configure: Regenerate.
230 2005-03-16 Alan Modra <amodra@bigpond.net.au>
232 * ppc-dis.c (powerpc_dialect): Don't set PPC_OPCODE_ALTIVEC when
235 2005-03-15 Alan Modra <amodra@bigpond.net.au>
237 * po/es.po: Commit new Spanish translation.
239 * po/fr.po: Commit new French translation.
241 2005-03-14 Jan-Benedict Glaw <jbglaw@lug-owl.de>
243 * vax-dis.c: Fix spelling error
244 (print_insn_vax): Use ".word 0x0012 # Entry mask: r1 r2 >" instead
245 of just "Entry mask: < r1 ... >"
247 2005-03-12 Zack Weinberg <zack@codesourcery.com>
249 * arm-dis.c (arm_opcodes): Document %E and %V.
250 Add entries for v6T2 ARM instructions:
251 bfc bfi mls strht ldrht ldrsht ldrsbt movw movt rbit ubfx sbfx.
252 (print_insn_arm): Add support for %E and %V.
253 (thumb_opcodes): Add ARMv6K instructions nop, sev, wfe, wfi, yield.
255 2005-03-10 Jeff Baker <jbaker@qnx.com>
256 Alan Modra <amodra@bigpond.net.au>
258 * ppc-opc.c (insert_sprg, extract_sprg): New Functions.
259 (powerpc_operands <SPRG>): Call the above. Bit field is 5 bits.
261 (XSPRG_MASK): Mask off extra bits now part of sprg field.
262 (powerpc_opcodes): Asjust mfsprg and mtsprg to suit new mask. Move
263 mfsprg4..7 after msprg and consolidate.
265 2005-03-09 Jan-Benedict Glaw <jbglaw@lug-owl.de>
267 * vax-dis.c (entry_mask_bit): New array.
268 (print_insn_vax): Decode function entry mask.
270 2005-03-07 Aldy Hernandez <aldyh@redhat.com>
272 * ppc-opc.c (powerpc_opcodes): Fix encoding of efscfd.
274 2005-03-05 Alan Modra <amodra@bigpond.net.au>
276 * po/opcodes.pot: Regenerate.
278 2005-03-03 Ramana Radhakrishnan <ramana.radhakrishnan@codito.com>
280 * arc-dis.c (a4_decoding_class): New enum.
281 (dsmOneArcInst): Use the enum values for the decoding class.
282 Remove redundant case in the switch for decodingClass value 11.
284 2005-03-02 Jan Beulich <jbeulich@novell.com>
286 * i386-dis.c (print_insn): Suppress lock prefix printing for cr8...15
288 (OP_C): Consider lock prefix in non-64-bit modes.
290 2005-02-24 Alan Modra <amodra@bigpond.net.au>
292 * cris-dis.c (format_hex): Remove ineffective warning fix.
293 * crx-dis.c (make_instruction): Warning fix.
294 * frv-asm.c: Regenerate.
296 2005-02-23 Nick Clifton <nickc@redhat.com>
298 * cgen-dis.in: Use bfd_byte for buffers that are passed to
301 * ia64-opc.c (locate_opcode_ent): Initialise opval array.
303 * crx-dis.c (make_instruction): Move argument structure into inner
304 scope and ensure that all of its fields are initialised before
307 * fr30-asm.c: Regenerate.
308 * fr30-dis.c: Regenerate.
309 * frv-asm.c: Regenerate.
310 * frv-dis.c: Regenerate.
311 * ip2k-asm.c: Regenerate.
312 * ip2k-dis.c: Regenerate.
313 * iq2000-asm.c: Regenerate.
314 * iq2000-dis.c: Regenerate.
315 * m32r-asm.c: Regenerate.
316 * m32r-dis.c: Regenerate.
317 * openrisc-asm.c: Regenerate.
318 * openrisc-dis.c: Regenerate.
319 * xstormy16-asm.c: Regenerate.
320 * xstormy16-dis.c: Regenerate.
322 2005-02-22 Alan Modra <amodra@bigpond.net.au>
324 * arc-ext.c: Warning fixes.
325 * arc-ext.h: Likewise.
326 * cgen-opc.c: Likewise.
327 * ia64-gen.c: Likewise.
328 * maxq-dis.c: Likewise.
329 * ns32k-dis.c: Likewise.
330 * w65-dis.c: Likewise.
331 * ia64-asmtab.c: Regenerate.
333 2005-02-22 Alan Modra <amodra@bigpond.net.au>
335 * fr30-desc.c: Regenerate.
336 * fr30-desc.h: Regenerate.
337 * fr30-opc.c: Regenerate.
338 * fr30-opc.h: Regenerate.
339 * frv-desc.c: Regenerate.
340 * frv-desc.h: Regenerate.
341 * frv-opc.c: Regenerate.
342 * frv-opc.h: Regenerate.
343 * ip2k-desc.c: Regenerate.
344 * ip2k-desc.h: Regenerate.
345 * ip2k-opc.c: Regenerate.
346 * ip2k-opc.h: Regenerate.
347 * iq2000-desc.c: Regenerate.
348 * iq2000-desc.h: Regenerate.
349 * iq2000-opc.c: Regenerate.
350 * iq2000-opc.h: Regenerate.
351 * m32r-desc.c: Regenerate.
352 * m32r-desc.h: Regenerate.
353 * m32r-opc.c: Regenerate.
354 * m32r-opc.h: Regenerate.
355 * m32r-opinst.c: Regenerate.
356 * openrisc-desc.c: Regenerate.
357 * openrisc-desc.h: Regenerate.
358 * openrisc-opc.c: Regenerate.
359 * openrisc-opc.h: Regenerate.
360 * xstormy16-desc.c: Regenerate.
361 * xstormy16-desc.h: Regenerate.
362 * xstormy16-opc.c: Regenerate.
363 * xstormy16-opc.h: Regenerate.
365 2005-02-21 Alan Modra <amodra@bigpond.net.au>
367 * Makefile.am: Run "make dep-am"
368 * Makefile.in: Regenerate.
370 2005-02-15 Nick Clifton <nickc@redhat.com>
372 * cgen-dis.in (print_address): Add an ATTRIBUTE_UNUSED to prevent
373 compile time warnings.
374 (print_keyword): Likewise.
375 (default_print_insn): Likewise.
377 * fr30-desc.c: Regenerated.
378 * fr30-desc.h: Regenerated.
379 * fr30-dis.c: Regenerated.
380 * fr30-opc.c: Regenerated.
381 * fr30-opc.h: Regenerated.
382 * frv-desc.c: Regenerated.
383 * frv-dis.c: Regenerated.
384 * frv-opc.c: Regenerated.
385 * ip2k-asm.c: Regenerated.
386 * ip2k-desc.c: Regenerated.
387 * ip2k-desc.h: Regenerated.
388 * ip2k-dis.c: Regenerated.
389 * ip2k-opc.c: Regenerated.
390 * ip2k-opc.h: Regenerated.
391 * iq2000-desc.c: Regenerated.
392 * iq2000-dis.c: Regenerated.
393 * iq2000-opc.c: Regenerated.
394 * m32r-asm.c: Regenerated.
395 * m32r-desc.c: Regenerated.
396 * m32r-desc.h: Regenerated.
397 * m32r-dis.c: Regenerated.
398 * m32r-opc.c: Regenerated.
399 * m32r-opc.h: Regenerated.
400 * m32r-opinst.c: Regenerated.
401 * openrisc-desc.c: Regenerated.
402 * openrisc-desc.h: Regenerated.
403 * openrisc-dis.c: Regenerated.
404 * openrisc-opc.c: Regenerated.
405 * openrisc-opc.h: Regenerated.
406 * xstormy16-desc.c: Regenerated.
407 * xstormy16-desc.h: Regenerated.
408 * xstormy16-dis.c: Regenerated.
409 * xstormy16-opc.c: Regenerated.
410 * xstormy16-opc.h: Regenerated.
412 2005-02-14 H.J. Lu <hongjiu.lu@intel.com>
414 * dis-buf.c (perror_memory): Use sprintf_vma to print out
417 2005-02-11 Nick Clifton <nickc@redhat.com>
419 * iq2000-asm.c: Regenerate.
421 * frv-dis.c: Regenerate.
423 2005-02-07 Jim Blandy <jimb@redhat.com>
425 * Makefile.am (CGEN): Load guile.scm before calling the main
427 * Makefile.in: Regenerated.
428 * cgen.sh: Be prepared for the 'cgen' argument to contain spaces.
429 Simply pass the cgen-opc.scm path to ${cgen} as its first
430 argument; ${cgen} itself now contains the '-s', or whatever is
431 appropriate for the Scheme being used.
433 2005-01-31 Andrew Cagney <cagney@gnu.org>
435 * configure: Regenerate to track ../gettext.m4.
437 2005-01-31 Jan Beulich <jbeulich@novell.com>
439 * ia64-gen.c (NELEMS): Define.
440 (shrink): Generate alias with missing second predicate register when
441 opcode has two outputs and these are both predicates.
442 * ia64-opc-i.c (FULL17): Define.
443 (ia64_opcodes_i): Add mov-to-pr alias without second input. Use FULL17
444 here to generate output template.
445 (TBITCM, TNATCM): Undefine after use.
446 * ia64-opc-m.c (ia64_opcodes_i): Add alloc alias without ar.pfs as
447 first input. Add ld16 aliases without ar.csd as second output. Add
448 st16 aliases without ar.csd as second input. Add cmpxchg aliases
449 without ar.ccv as third input. Add cmp8xchg16 aliases without ar.csd/
450 ar.ccv as third/fourth inputs. Consolidate through...
451 (CMPXCHG_acq, CMPXCHG_rel, CMPXCHG_1, CMPXCHG_2, CMPXCHG_4, CMPXCHG_8,
452 CMPXCHGn, CMP8XCHG16, CMPXCHG_ALL): Define.
453 * ia64-asmtab.c: Regenerate.
455 2005-01-27 Andrew Cagney <cagney@gnu.org>
457 * configure: Regenerate to track ../gettext.m4 change.
459 2005-01-25 Alexandre Oliva <aoliva@redhat.com>
461 2004-11-10 Alexandre Oliva <aoliva@redhat.com>
462 * frv-asm.c: Rebuilt.
463 * frv-desc.c: Rebuilt.
464 * frv-desc.h: Rebuilt.
465 * frv-dis.c: Rebuilt.
466 * frv-ibld.c: Rebuilt.
467 * frv-opc.c: Rebuilt.
468 * frv-opc.h: Rebuilt.
470 2005-01-24 Andrew Cagney <cagney@gnu.org>
472 * configure: Regenerate, ../gettext.m4 was updated.
474 2005-01-21 Fred Fish <fnf@specifixinc.com>
476 * mips-opc.c: Change INSN_ALIAS to INSN2_ALIAS.
477 Change INSN_WRITE_MDMX_ACC to INSN2_WRITE_MDMX_ACC.
478 Change INSN_READ_MDMX_ACC to INSN2_READ_MDMX_ACC.
481 2005-01-20 Alan Modra <amodra@bigpond.net.au>
483 * ppc-opc.c (powerpc_opcodes): Add optional 'l' arg to tlbiel.
485 2005-01-19 Fred Fish <fnf@specifixinc.com>
487 * mips-dis.c (no_aliases): New disassembly option flag.
488 (set_default_mips_dis_options): Init no_aliases to zero.
489 (parse_mips_dis_option): Handle no-aliases option.
490 (print_insn_mips): Ignore table entries that are aliases
491 if no_aliases is set.
492 (print_insn_mips16): Ditto.
493 * mips-opc.c (mips_builtin_opcodes): Add initializer column for
494 new pinfo2 member and add INSN_ALIAS initializers as needed. Also
495 move WR_MACC and RD_MACC initializers from pinfo to pinfo2.
496 * mips16-opc.c (mips16_opcodes): Ditto.
498 2005-01-17 Andrew Stubbs <andrew.stubbs@st.com>
500 * sh-opc.h (arch_sh2a_or_sh3e,arch_sh2a_or_sh4): Correct definition.
501 (inheritance diagram): Add missing edge.
502 (arch_sh1_up): Rename arch_sh_up to match external name to make life
503 easier for the testsuite.
504 (arch_sh4_nofp_up): Likewise, rename arch_sh4_nofpu_up.
505 (arch_sh4a_nofp_up): Likewise, rename arch_sh4a_nofpu_up.
506 (arch_sh2a_nofpu_or_sh4_nommu_nofpu_up): Add missing
507 arch_sh2a_or_sh4_up child.
508 (sh_table): Do renaming as above.
509 Correct comment for ldc.l for gas testsuite to read.
510 Remove rogue mul.l from sh1 (duplicate of the one for sh2).
511 Correct comments for movy.w and movy.l for gas testsuite to read.
512 Correct comments for fmov.d and fmov.s for gas testsuite to read.
514 2005-01-12 H.J. Lu <hongjiu.lu@intel.com>
516 * i386-dis.c (OP_E): Don't ignore scale in SIB for 64 bit mode.
518 2005-01-12 H.J. Lu <hongjiu.lu@intel.com>
520 * i386-dis.c (OP_E): Ignore scale when index == 0x4 in SIB.
522 2005-01-10 Andreas Schwab <schwab@suse.de>
524 * disassemble.c (disassemble_init_for_target) <case
525 bfd_arch_ia64>: Set skip_zeroes to 16.
526 <case bfd_arch_tic4x>: Set skip_zeroes to 32.
528 2004-12-23 Tomer Levi <Tomer.Levi@nsc.com>
530 * crx-opc.c: Mark 'bcop' instruction as RELAXABLE.
532 2004-12-14 Svein E. Seldal <Svein.Seldal@solidas.com>
534 * avr-dis.c: Prettyprint. Added printing of symbol names in all
535 memory references. Convert avr_operand() to C90 formatting.
537 2004-12-05 Tomer Levi <Tomer.Levi@nsc.com>
539 * crx-dis.c (print_arg): Use 'info->print_address_func' for address printing.
541 2004-11-29 Tomer Levi <Tomer.Levi@nsc.com>
543 * crx-opc.c (crx_optab): Mark all rbase_disps* operands as signed.
544 (no_op_insn): Initialize array with instructions that have no
546 * crx-dis.c (make_instruction): Get rid of COP_BRANCH_INS operand swapping.
548 2004-11-29 Richard Earnshaw <rearnsha@arm.com>
550 * arm-dis.c: Correct top-level comment.
552 2004-11-27 Richard Earnshaw <rearnsha@arm.com>
554 * arm-opc.h (arm_opcode, thumb_opcode): Add extra field for the
555 architecuture defining the insn.
556 (arm_opcodes, thumb_opcodes): Delete. Move to ...
557 * arm-dis.c (arm_opcodes, thumb_opcodes): Here. Add architecutre
559 Also include opcode/arm.h.
560 * Makefile.am (arm-dis.lo): Update dependency list.
561 * Makefile.in: Regenerate.
563 2004-11-22 Ravi Ramaseshan <ravi.ramaseshan@codito.com>
565 * opcode/arc-opc.c (insert_base): Modify ls_operand[LS_OFFSET] to
566 reflect the change to the short immediate syntax.
568 2004-11-19 Alan Modra <amodra@bigpond.net.au>
570 * or32-opc.c (debug): Warning fix.
571 * po/POTFILES.in: Regenerate.
573 * maxq-dis.c: Formatting.
574 (print_insn): Warning fix.
576 2004-11-17 Daniel Jacobowitz <dan@codesourcery.com>
578 * arm-dis.c (WORD_ADDRESS): Define.
579 (print_insn): Use it. Correct big-endian end-of-section handling.
581 2004-11-08 Inderpreet Singh <inderpreetb@nioda.hcltech.com>
582 Vineet Sharma <vineets@noida.hcltech.com>
584 * maxq-dis.c: New file.
585 * disassemble.c (ARCH_maxq): Define.
586 (disassembler): Add 'print_insn_maxq_little' for handling maxq
588 * configure.in: Add case for bfd_maxq_arch.
589 * configure: Regenerate.
590 * Makefile.am: Add support for maxq-dis.c
591 * Makefile.in: Regenerate.
592 * aclocal.m4: Regenerate.
594 2004-11-05 Tomer Levi <Tomer.Levi@nsc.com>
596 * crx-opc.c (crx_optab): Rename 'arg_icr' to 'arg_idxr' for Index register
598 * crx-dis.c: Likewise.
600 2004-11-04 Hans-Peter Nilsson <hp@axis.com>
602 Generally, handle CRISv32.
603 * cris-dis.c (TRACE_CASE): Define as (disdata->trace_case).
604 (struct cris_disasm_data): New type.
605 (format_reg, format_hex, cris_constraint, print_flags)
606 (get_opcode_entry): Add struct cris_disasm_data * parameter. All
608 (format_sup_reg, print_insn_crisv32_with_register_prefix)
609 (print_insn_crisv32_without_register_prefix)
610 (print_insn_crisv10_v32_with_register_prefix)
611 (print_insn_crisv10_v32_without_register_prefix)
612 (cris_parse_disassembler_options): New functions.
613 (bytes_to_skip, cris_spec_reg): Add enum cris_disass_family
614 parameter. All callers changed.
615 (get_opcode_entry): Call malloc, not xmalloc. Return NULL on
617 (cris_constraint) <case 'Y', 'U'>: New cases.
618 (bytes_to_skip): Handle 'Y' and 'N' as 's'. Skip size is 4 bytes
620 (print_with_operands) <case 'Y'>: New case.
621 (print_with_operands) <case 'T', 'A', '[', ']', 'd', 'n', 'u'>
622 <case 'N', 'Y', 'Q'>: New cases.
623 (print_insn_cris_generic): Emit "bcc ." for zero and CRISv32.
624 (print_insn_cris_with_register_prefix)
625 (print_insn_cris_without_register_prefix): Call
626 cris_parse_disassembler_options.
627 * cris-opc.c (cris_spec_regs): Mention that this table isn't used
628 for CRISv32 and the size of immediate operands. New v32-only
629 entries for bz, pid, srs, wz, exs, eda, dz, ebp, erp, nrp, ccs and
630 spc. Add v32-only 4-byte entries for p2, p3, p5 and p6. Change
631 ccr, ibr, irp to be v0..v10. Change bar, dccr to be v8..v10.
632 Change brp to be v3..v10.
633 (cris_support_regs): New vector.
634 (cris_opcodes): Update head comment. New format characters '[',
635 ']', space, 'A', 'd', 'N', 'n', 'Q', 'T', 'u', 'U', 'Y'.
636 Add new opcodes for v32 and adjust existing opcodes to accommodate
637 differences to earlier variants.
638 (cris_cond15s): New vector.
640 2004-11-04 Jan Beulich <jbeulich@novell.com>
642 * i386-dis.c (Eq, Edqw, indirEp, Gdq, I1): Define.
644 (Mp): Use f_mode rather than none at all.
645 (t_mode, dq_mode, dqw_mode, f_mode, const_1_mode): Define. t_mode
646 replaces what previously was x_mode; x_mode now means 128-bit SSE
648 (dis386): Make far jumps and calls have an 'l' prefix only in AT&T
649 mode. movmskpX's, pextrw's, and pmovmskb's first operands are Gdq.
650 pinsrw's second operand is Edqw.
651 (grps): 1-bit shifts' and rotates' second operands are I1. cmpxchg8b's
652 operand is Eq. movntq's and movntdq's first operands are EM. s[gi]dt,
653 fldenv, frstor, fsave, fstenv all should also have suffixes in Intel
654 mode when an operand size override is present or always suffixing.
655 More instructions will need to be added to this group.
656 (putop): Handle new macro chars 'C' (short/long suffix selector),
657 'I' (Intel mode override for following macro char), and 'J' (for
658 adding the 'l' prefix to far branches in AT&T mode). When an
659 alternative was specified in the template, honor macro character when
660 specified for Intel mode.
661 (OP_E): Handle new *_mode values. Correct pointer specifications for
662 memory operands. Consolidate output of index register.
663 (OP_G): Handle new *_mode values.
664 (OP_I): Handle const_1_mode.
665 (OP_ESreg, OP_DSreg): Generate pointer specifications. Indicate
666 respective opcode prefix bits have been consumed.
667 (OP_EM, OP_EX): Provide some default handling for generating pointer
670 2004-10-28 Tomer Levi <Tomer.Levi@nsc.com>
672 * crx-opc.c (REV_COP_INST): New macro, reverse operand order of
675 2004-10-27 Tomer Levi <Tomer.Levi@nsc.com>
677 * crx-dis.c (enum REG_ARG_TYPE): New, replacing COP_ARG_TYPE.
678 (getregliststring): Support HI/LO and user registers.
679 * crx-opc.c (crx_instruction): Update data structure according to the
680 rearrangement done in CRX opcode header file.
681 (crx_regtab): Likewise.
682 (crx_optab): Likewise.
683 (crx_instruction): Reorder load/stor instructions, remove unsupported
685 support new Co-Processor instruction 'cpi'.
687 2004-10-27 Nick Clifton <nickc@redhat.com>
689 * opcodes/iq2000-asm.c: Regenerate.
690 * opcodes/iq2000-desc.c: Regenerate.
691 * opcodes/iq2000-desc.h: Regenerate.
692 * opcodes/iq2000-dis.c: Regenerate.
693 * opcodes/iq2000-ibld.c: Regenerate.
694 * opcodes/iq2000-opc.c: Regenerate.
695 * opcodes/iq2000-opc.h: Regenerate.
697 2004-10-21 Tomer Levi <Tomer.Levi@nsc.com>
699 * crx-opc.c (crx_instruction): Replace i3, i4, i5 with us3,
700 us4, us5 (respectively).
701 Remove unsupported 'popa' instruction.
702 Reverse operands order in store co-processor instructions.
704 2004-10-15 Alan Modra <amodra@bigpond.net.au>
706 * Makefile.am: Run "make dep-am"
707 * Makefile.in: Regenerate.
709 2004-10-12 Bob Wilson <bob.wilson@acm.org>
711 * xtensa-dis.c: Use ISO C90 formatting.
713 2004-10-09 Alan Modra <amodra@bigpond.net.au>
715 * ppc-opc.c: Revert 2004-09-09 change.
717 2004-10-07 Bob Wilson <bob.wilson@acm.org>
719 * xtensa-dis.c (state_names): Delete.
720 (fetch_data): Use xtensa_isa_maxlength.
721 (print_xtensa_operand): Replace operand parameter with opcode/operand
722 pair. Remove print_sr_name parameter. Use new xtensa-isa.h functions.
723 (print_insn_xtensa): Use new xtensa-isa.h functions. Handle multislot
724 instruction bundles. Use xmalloc instead of malloc.
726 2004-10-07 David Gibson <david@gibson.dropbear.id.au>
728 * ppc-opc.c: Replace literal "0"s with NULLs in pointer
731 2004-10-07 Tomer Levi <Tomer.Levi@nsc.com>
733 * crx-opc.c (crx_instruction): Support Co-processor insns.
734 * crx-dis.c (COP_ARG_TYPE): New enum for CO-Processor arguments.
735 (getregliststring): Change function to use the above enum.
736 (print_arg): Handle CO-Processor insns.
737 (crx_cinvs): Add 'b' option to invalidate the branch-target
740 2004-10-06 Aldy Hernandez <aldyh@redhat.com>
742 * ppc-opc.c (powerpc_opcodes): Add efscfd, efdabs, efdnabs,
743 efdneg, efdadd, efdsub, efdmul, efddiv, efdcmpgt, efdcmplt,
744 efdcmpeq, efdtstgt, efdtstlt, efdtsteq, efdcfsi, efdcfsid,
745 efdcfui, efdcfuid, efdcfsf, efdcfuf, efdctsi, efdctsidz, efdctsiz,
746 efdctui, efdctuidz, efdctuiz, efdctsf, efdctuf, efdctuf, efdcfs.
748 2004-10-01 Bill Farmer <Bill@the-farmers.freeserve.co.uk>
750 * pdp11-dis.c (print_insn_pdp11): Subtract the SOB's displacement
753 2004-09-30 Paul Brook <paul@codesourcery.com>
755 * arm-dis.c (print_insn_arm): Handle 'e' for SMI instruction.
756 * arm-opc.h: Document %e. Add ARMv6ZK instructions.
758 2004-09-17 H.J. Lu <hongjiu.lu@intel.com>
760 * Makefile.am (AUTOMAKE_OPTIONS): Require 1.9.
761 (CONFIG_STATUS_DEPENDENCIES): New.
763 (config.status): Likewise.
764 * Makefile.in: Regenerated.
766 2004-09-17 Alan Modra <amodra@bigpond.net.au>
768 * Makefile.am: Run "make dep-am".
769 * Makefile.in: Regenerate.
770 * aclocal.m4: Regenerate.
771 * configure: Regenerate.
772 * po/POTFILES.in: Regenerate.
773 * po/opcodes.pot: Regenerate.
775 2004-09-11 Andreas Schwab <schwab@suse.de>
777 * configure: Rebuild.
779 2004-09-09 Segher Boessenkool <segher@kernel.crashing.org>
781 * ppc-opc.c (L): Make this field not optional.
783 2004-09-03 Tomer Levi <Tomer.Levi@nsc.com>
785 * opc-crx.c: Rename 'popma' to 'popa', remove 'pushma'.
786 Fix parameter to 'm[t|f]csr' insns.
788 2004-08-30 Nathanael Nerode <neroden@gcc.gnu.org>
790 * configure.in: Autoupdate to autoconf 2.59.
791 * aclocal.m4: Rebuild with aclocal 1.4p6.
792 * configure: Rebuild with autoconf 2.59.
793 * Makefile.in: Rebuild with automake 1.4p6 (picking up
794 bfd changes for autoconf 2.59 on the way).
795 * config.in: Rebuild with autoheader 2.59.
797 2004-08-27 Richard Sandiford <rsandifo@redhat.com>
799 * frv-desc.[ch], frv-opc.[ch]: Regenerated.
801 2004-07-30 Michal Ludvig <mludvig@suse.cz>
803 * i386-dis.c (GRPPADLCK): Renamed to GRPPADLCK1
804 (GRPPADLCK2): New define.
805 (twobyte_has_modrm): True for 0xA6.
806 (grps): GRPPADLCK2 for opcode 0xA6.
808 2004-07-29 Alexandre Oliva <aoliva@redhat.com>
810 Introduce SH2a support.
811 * sh-opc.h (arch_sh2a_base): Renumber.
812 (arch_sh2a_nofpu_base): Remove.
813 (arch_sh_base_mask): Adjust.
814 (arch_opann_mask): New.
815 (arch_sh2a, arch_sh2a_nofpu): Adjust.
816 (arch_sh2a_up, arch_sh2a_nofpu_up): Likewise.
817 (sh_table): Adjust whitespace.
818 2004-02-24 Corinna Vinschen <vinschen@redhat.com>
819 * sh-opc.h (arch_sh2a_nofpu_up): New. Use instead of arch_sh2a_up in
820 instruction list throughout.
821 (arch_sh2a_up): Redefine to include fpu instruction set. Use instead
822 of arch_sh2a in instruction list throughout.
823 (arch_sh2e_up): Accomodate above changes.
824 (arch_sh2_up): Ditto.
825 2004-02-20 Corinna Vinschen <vinschen@redhat.com>
826 * sh-opc.h: Add arch_sh2a_nofpu to arch_sh2_up.
827 2004-02-18 Corinna Vinschen <vinschen@redhat.com>
828 * sh-dis.c (print_insn_sh): Add bfd_mach_sh2a_nofpu handling.
829 * sh-opc.h (arch_sh2a_nofpu): New.
830 (arch_sh2a_up): New, defines sh2a and sh2a_nofpu.
831 (sh_table): Change all arch_sh2a to arch_sh2a_up unless FPU
833 2004-01-20 DJ Delorie <dj@redhat.com>
834 * sh-dis.c (print_insn_sh): SH2A does not have 'X' fp regs.
835 2003-12-29 DJ Delorie <dj@redhat.com>
836 * sh-opc.c (sh_nibble_type, sh_arg_type, arch_2a, arch_2e_up,
837 sh_opcode_info, sh_table): Add sh2a support.
838 (arch_op32): New, to tag 32-bit opcodes.
839 * sh-dis.c (print_insn_sh): Support sh2a opcodes.
840 2003-12-02 Michael Snyder <msnyder@redhat.com>
841 * sh-opc.h (arch_sh2a): Add.
842 * sh-dis.c (arch_sh2a): Handle.
843 * sh-opc.h (arch_sh2_up): Fix up to include arch_sh2a.
845 2004-07-27 Tomer Levi <Tomer.Levi@nsc.com>
847 * crx-opc.c: Add popx,pushx insns. Indent code, fix comments.
849 2004-07-22 Nick Clifton <nickc@redhat.com>
852 * h8300-dis.c (bfd_h8_disassemble): Do not dump raw bytes for the
853 insns - this is done by objdump itself.
854 * h8500-dis.c (print_insn_h8500): Likewise.
856 2004-07-21 Jan Beulich <jbeulich@novell.com>
858 * i386-dis.c (OP_E): Show rip-relative addressing in 64-bit mode
859 regardless of address size prefix in effect.
860 (ptr_reg): Size or address registers does not depend on rex64, but
861 on the presence of an address size override.
862 (OP_MMX): Use rex.x only for xmm registers.
863 (OP_EM): Use rex.z only for xmm registers.
865 2004-07-20 Maciej W. Rozycki <macro@linux-mips.org>
867 * mips-opc.c (mips_builtin_opcodes): Move coprocessor 2
868 move/branch operations to the bottom so that VR5400 multimedia
869 instructions take precedence in disassembly.
871 2004-07-20 Maciej W. Rozycki <macro@linux-mips.org>
873 * mips-opc.c (mips_builtin_opcodes): Remove the MIPS32
874 ISA-specific "break" encoding.
876 2004-07-13 Elvis Chiang <elvisfb@gmail.com>
878 * arm-opc.h: Fix typo in comment.
880 2004-07-11 Andreas Schwab <schwab@suse.de>
882 * m68k-dis.c (m68k_valid_ea): Fix typos in last change.
884 2004-07-09 Andreas Schwab <schwab@suse.de>
886 * m68k-dis.c (m68k_valid_ea): Check validity of all codes.
888 2004-07-07 Tomer Levi <Tomer.Levi@nsc.com>
890 * Makefile.am (CFILES): Add crx-dis.c, crx-opc.c.
891 (ALL_MACHINES): Add crx-dis.lo, crx-opc.lo.
892 (crx-dis.lo): New target.
893 (crx-opc.lo): Likewise.
894 * Makefile.in: Regenerate.
895 * configure.in: Handle bfd_crx_arch.
896 * configure: Regenerate.
897 * crx-dis.c: New file.
898 * crx-opc.c: New file.
899 * disassemble.c (ARCH_crx): Define.
900 (disassembler): Handle ARCH_crx.
902 2004-06-29 James E Wilson <wilson@specifixinc.com>
904 * ia64-opc-a.c (ia64_opcodes_a): Delete mov immediate pseudo for adds.
905 * ia64-asmtab.c: Regnerate.
907 2004-06-28 Alan Modra <amodra@bigpond.net.au>
909 * ppc-opc.c (insert_fxm): Handle mfocrf and mtocrf.
910 (extract_fxm): Don't test dialect.
911 (XFXFXM_MASK): Include the power4 bit.
912 (XFXM): Add p4 param.
913 (powerpc_opcodes): Add mfocrf and mtocrf. Adjust mtcr.
915 2004-06-27 Alexandre Oliva <aoliva@redhat.com>
917 2003-07-21 Richard Sandiford <rsandifo@redhat.com>
918 * disassemble.c (disassembler): Handle bfd_mach_h8300sxn.
920 2004-06-26 Alan Modra <amodra@bigpond.net.au>
922 * ppc-opc.c (BH, XLBH_MASK): Define.
923 (powerpc_opcodes): Allow BH field on bclr, bclrl, bcctr, bcctrl.
925 2004-06-24 Alan Modra <amodra@bigpond.net.au>
927 * i386-dis.c (x_mode): Comment.
928 (two_source_ops): File scope.
929 (float_mem): Correct fisttpll and fistpll.
930 (float_mem_mode): New table.
932 (OP_E): Correct intel mode PTR output.
933 (ptr_reg): Use open_char and close_char.
934 (PNI_Fixup): Handle possible suffix on sidt. Use op1out etc. for
935 operands. Set two_source_ops.
937 2004-06-15 Alan Modra <amodra@bigpond.net.au>
939 * arc-ext.c (build_ARC_extmap): Use bfd_get_section_size
940 instead of _raw_size.
942 2004-06-08 Jakub Jelinek <jakub@redhat.com>
944 * ia64-gen.c (in_iclass): Handle more postinc st
946 * ia64-asmtab.c: Rebuilt.
948 2004-06-01 Martin Schwidefsky <schwidefsky@de.ibm.com>
950 * s390-opc.txt: Correct architecture mask for some opcodes.
951 lrv, lrvh, strv, ml, dl, alc, slb rll and mvclu are available
952 in the esa mode as well.
954 2004-05-28 Andrew Stubbs <andrew.stubbs@superh.com>
956 * sh-dis.c (target_arch): Make unsigned.
957 (print_insn_sh): Replace (most of) switch with a call to
958 sh_get_arch_from_bfd_mach(). Also use new architecture flags system.
959 * sh-opc.h: Redefine architecture flags values.
960 Add sh3-nommu architecture.
961 Reorganise <arch>_up macros so they make more visual sense.
962 (SH_MERGE_ARCH_SET): Define new macro.
963 (SH_VALID_BASE_ARCH_SET): Likewise.
964 (SH_VALID_MMU_ARCH_SET): Likewise.
965 (SH_VALID_CO_ARCH_SET): Likewise.
966 (SH_VALID_ARCH_SET): Likewise.
967 (SH_MERGE_ARCH_SET_VALID): Likewise.
968 (SH_ARCH_SET_HAS_FPU): Likewise.
969 (SH_ARCH_SET_HAS_DSP): Likewise.
970 (SH_ARCH_UNKNOWN_ARCH): Likewise.
971 (sh_get_arch_from_bfd_mach): Add prototype.
972 (sh_get_arch_up_from_bfd_mach): Likewise.
973 (sh_get_bfd_mach_from_arch_set): Likewise.
974 (sh_merge_bfd_arc): Likewise.
976 2004-05-24 Peter Barada <peter@the-baradas.com>
978 * m68k-dis.c(print_insn_m68k): Strip body of diassembly out
979 into new match_insn_m68k function. Loop over canidate
980 matches and select first that completely matches.
981 * m68k-dis.c(print_insn_arg): Fix 'g' case to only extract 1 bit.
982 * m68k-dis.c(print_insn_arg): Call new function m68k_valid_ea
983 to verify addressing for MAC/EMAC.
984 * m68k-dis.c(print_insn_arg): Use reg_half_names for MAC/EMAC
985 reigster halves since 'fpu' and 'spl' look misleading.
986 * m68k-dis.c(fetch_arg): Fix 'G', 'H', 'I', 'f', 'M', 'N' cases.
987 * m68k-opc.c: Rearragne mac/emac cases to use longest for
988 first, tighten up match masks.
989 * m68k-opc.c: Add 'size' field to struct m68k_opcode. Produce
990 'size' from special case code in print_insn_m68k to
991 determine decode size of insns.
993 2004-05-19 Alan Modra <amodra@bigpond.net.au>
995 * ppc-opc.c (insert_fxm): Enable two operand mfcr when -many as
996 well as when -mpower4.
998 2004-05-13 Nick Clifton <nickc@redhat.com>
1000 * po/fr.po: Updated French translation.
1002 2004-05-05 Peter Barada <peter@the-baradas.com>
1004 * m68k-dis.c(print_insn_m68k): Add new chips, use core
1005 variants in arch_mask. Only set m68881/68851 for 68k chips.
1006 * m68k-op.c: Switch from ColdFire chips to core variants.
1008 2004-05-05 Alan Modra <amodra@bigpond.net.au>
1011 * ppc-opc.c (PPCVEC): Remove PPC_OPCODE_PPC.
1013 2004-04-29 Ben Elliston <bje@au.ibm.com>
1015 * ppc-opc.c (XCMPL): Renmame to XOPL. Update users.
1016 (powerpc_opcodes): Add "dbczl" instruction for PPC970.
1018 2004-04-22 Kaz Kojima <kkojima@rr.iij4u.or.jp>
1020 * sh-dis.c (print_insn_sh): Print the value in constant pool
1021 as a symbol if it looks like a symbol.
1023 2004-04-22 Peter Barada <peter@the-baradas.com>
1025 * m68k-dis.c(print_insn_m68k): Set mfcmac/mcfemac on
1026 appropriate ColdFire architectures.
1027 (print_insn_m68k): Handle EMAC, MAC/EMAC scalefactor, and MAC/EMAC
1029 Add EMAC instructions, fix MAC instructions. Remove
1030 macmw/macml/msacmw/msacml instructions since mask addressing now
1033 2004-04-20 Jakub Jelinek <jakub@redhat.com>
1035 * sparc-opc.c (fmoviccx, fmovfccx, fmovccx): Define.
1036 (fmovicc, fmovfcc, fmovcc): Remove fpsize argument, change opcode to
1037 suffix. Use fmov*x macros, create all 3 fpsize variants in one
1038 macro. Adjust all users.
1040 2004-04-15 Anil Paranjpe <anilp1@kpitcummins.com>
1042 * h8300-dis.c (bfd_h8_disassemble) : Treat "adds" & "subs"
1045 2004-03-30 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
1047 * m32r-asm.c: Regenerate.
1049 2004-03-29 Stan Shebs <shebs@apple.com>
1051 * mpw-config.in, mpw-make.sed: Remove MPW support files, no longer
1054 2004-03-19 Alan Modra <amodra@bigpond.net.au>
1056 * aclocal.m4: Regenerate.
1057 * config.in: Regenerate.
1058 * configure: Regenerate.
1059 * po/POTFILES.in: Regenerate.
1060 * po/opcodes.pot: Regenerate.
1062 2004-03-16 Alan Modra <amodra@bigpond.net.au>
1064 * ppc-dis.c (print_insn_powerpc): Don't print tabs. Handle
1066 * ppc-opc.c (RA0): Define.
1067 (RAQ, RAL, RAM, RAS, RSQ, RTQ, RSO): Use PPC_OPERAND_GPR_0.
1068 (RAOPT): Rename from RAO. Update all uses.
1069 (powerpc_opcodes): Use RA0 as appropriate.
1071 2004-03-15 Aldy Hernandez <aldyh@redhat.com>
1073 * ppc-opc.c (powerpc_opcodes): Add BOOKE versions of mfsprg.
1075 2004-03-15 Alan Modra <amodra@bigpond.net.au>
1077 * sparc-dis.c (print_insn_sparc): Update getword prototype.
1079 2004-03-12 Michal Ludvig <mludvig@suse.cz>
1081 * i386-dis.c (GRPPLOCK): Delete.
1082 (grps): Delete GRPPLOCK entry.
1084 2004-03-12 Alan Modra <amodra@bigpond.net.au>
1086 * i386-dis.c (OP_M, OP_0f0e, OP_0fae, NOP_Fixup): New functions.
1088 (None, PADLOCK_SPECIAL, PADLOCK_0): Delete.
1089 (GRPPADLCK): Define.
1090 (dis386): Use NOP_Fixup on "nop".
1091 (dis386_twobyte): Use GRPPADLCK on opcode 0xa7.
1092 (twobyte_has_modrm): Set for 0xa7.
1093 (padlock_table): Delete. Move to..
1094 (grps): ..here, using OP_0f07. Use OP_Ofae on lfence, mfence
1096 (print_insn): Revert PADLOCK_SPECIAL code.
1097 (OP_E): Delete sfence, lfence, mfence checks.
1099 2004-03-12 Jakub Jelinek <jakub@redhat.com>
1101 * i386-dis.c (grps): Use INVLPG_Fixup instead of OP_E for invlpg.
1102 (INVLPG_Fixup): New function.
1103 (PNI_Fixup): Remove ATTRIBUTE_UNUSED from sizeflag.
1105 2004-03-12 Michal Ludvig <mludvig@suse.cz>
1107 * i386-dis.c (PADLOCK_SPECIAL, PADLOCK_0): New defines.
1108 (dis386_twobyte): Opcode 0xa7 is PADLOCK_0.
1109 (padlock_table): New struct with PadLock instructions.
1110 (print_insn): Handle PADLOCK_SPECIAL.
1112 2004-03-12 Alan Modra <amodra@bigpond.net.au>
1114 * i386-dis.c (grps): Use clflush by default for 0x0fae/7.
1115 (OP_E): Twiddle clflush to sfence here.
1117 2004-03-08 Nick Clifton <nickc@redhat.com>
1119 * po/de.po: Updated German translation.
1121 2003-03-03 Andrew Stubbs <andrew.stubbs@superh.com>
1123 * sh-dis.c (print_insn_sh): Don't disassemble fp instructions in
1124 nofpu mode. Add BFD type bfd_mach_sh4_nommu_nofpu.
1125 * sh-opc.h: Add sh4_nommu_nofpu architecture and adjust instructions
1128 2004-03-01 Richard Sandiford <rsandifo@redhat.com>
1130 * frv-asm.c: Regenerate.
1131 * frv-desc.c: Regenerate.
1132 * frv-desc.h: Regenerate.
1133 * frv-dis.c: Regenerate.
1134 * frv-ibld.c: Regenerate.
1135 * frv-opc.c: Regenerate.
1136 * frv-opc.h: Regenerate.
1138 2004-03-01 Richard Sandiford <rsandifo@redhat.com>
1140 * frv-desc.c, frv-opc.c: Regenerate.
1142 2004-03-01 Richard Sandiford <rsandifo@redhat.com>
1144 * frv-desc.c, frv-opc.c, frv-opc.h: Regenerate.
1146 2004-02-26 Andrew Stubbs <andrew.stubbs@superh.com>
1148 * sh-opc.h: Move fsca and fsrra instructions from sh4a to sh4.
1149 Also correct mistake in the comment.
1151 2004-02-26 Andrew Stubbs <andrew.stubbs@superh.com>
1153 * sh-dis.c (print_insn_sh): Add REG_N_D nibble type to
1154 ensure that double registers have even numbers.
1155 Add REG_N_B01 for nn01 (binary 01) nibble to ensure
1156 that reserved instruction 0xfffd does not decode the same
1158 * sh-opc.h: Add REG_N_D nibble type and use it whereever
1159 REG_N refers to a double register.
1160 Add REG_N_B01 nibble type and use it instead of REG_NM
1162 Adjust the bit patterns in a few comments.
1164 2004-02-25 Aldy Hernandez <aldyh@redhat.com>
1166 * ppc-opc.c (powerpc_opcodes): Change mask for dcbt and dcbtst.
1168 2004-02-20 Aldy Hernandez <aldyh@redhat.com>
1170 * ppc-opc.c (powerpc_opcodes): Move mfmcsrr0 before mfdc_dat.
1172 2004-02-20 Aldy Hernandez <aldyh@redhat.com>
1174 * ppc-opc.c (powerpc_opcodes): Add m*ivor35.
1176 2004-02-20 Aldy Hernandez <aldyh@redhat.com>
1178 * ppc-opc.c (powerpc_opcodes): Add mfivor32, mfivor33, mfivor34,
1179 mtivor32, mtivor33, mtivor34.
1181 2004-02-19 Aldy Hernandez <aldyh@redhat.com>
1183 * ppc-opc.c (powerpc_opcodes): Add mfmcar.
1185 2004-02-10 Petko Manolov <petkan@nucleusys.com>
1187 * arm-opc.h Maverick accumulator register opcode fixes.
1189 2004-02-13 Ben Elliston <bje@wasabisystems.com>
1191 * m32r-dis.c: Regenerate.
1193 2004-01-27 Michael Snyder <msnyder@redhat.com>
1195 * sh-opc.h (sh_table): "fsrra", not "fssra".
1197 2004-01-23 Andrew Over <andrew.over@cs.anu.edu.au>
1199 * sparc-opc.c (fdtox, fstox, fqtox, fxtod, fxtos, fxtoq): Tighten
1202 2004-01-19 Andrew Over <andrew.over@cs.anu.edu.au>
1204 * sparc-opc.c (sparc_opcodes) <f[dsq]tox, fxto[dsq]>: Fix args.
1206 2004-01-19 Alan Modra <amodra@bigpond.net.au>
1208 * i386-dis.c (OP_E): Print scale factor on intel mode sib when not
1209 1. Don't print scale factor on AT&T mode when index missing.
1211 2004-01-16 Alexandre Oliva <aoliva@redhat.com>
1213 * m10300-opc.c (mov): 8- and 24-bit immediates are zero-extended
1214 when loaded into XR registers.
1216 2004-01-14 Richard Sandiford <rsandifo@redhat.com>
1218 * frv-desc.h: Regenerate.
1219 * frv-desc.c: Regenerate.
1220 * frv-opc.c: Regenerate.
1222 2004-01-13 Michael Snyder <msnyder@redhat.com>
1224 * sh-dis.c (print_insn_sh): Allocate 4 bytes for insn.
1226 2004-01-09 Paul Brook <paul@codesourcery.com>
1228 * arm-opc.h (arm_opcodes): Move generic mcrr after known
1231 2004-01-07 Daniel Jacobowitz <drow@mvista.com>
1233 * Makefile.am (libopcodes_la_DEPENDENCIES)
1234 (libopcodes_la_LIBADD): Revert 2003-05-17 change. Add explanatory
1235 comment about the problem.
1236 * Makefile.in: Regenerate.
1238 2004-01-06 Alexandre Oliva <aoliva@redhat.com>
1240 2003-12-19 Alexandre Oliva <aoliva@redhat.com>
1241 * frv-asm.c (parse_ulo16, parse_uhi16, parse_d12): Fix some
1242 cut&paste errors in shifting/truncating numerical operands.
1243 2003-08-04 Alexandre Oliva <aoliva@redhat.com>
1244 * frv-asm.c (parse_ulo16): Parse gotofflo and gotofffuncdesclo.
1245 (parse_uslo16): Likewise.
1246 (parse_uhi16): Parse gotoffhi and gotofffuncdeschi.
1247 (parse_d12): Parse gotoff12 and gotofffuncdesc12.
1248 (parse_s12): Likewise.
1249 2003-08-04 Alexandre Oliva <aoliva@redhat.com>
1250 * frv-asm.c (parse_ulo16): Parse gotlo and gotfuncdesclo.
1251 (parse_uslo16): Likewise.
1252 (parse_uhi16): Parse gothi and gotfuncdeschi.
1253 (parse_d12): Parse got12 and gotfuncdesc12.
1254 (parse_s12): Likewise.
1256 2004-01-02 Albert Bartoszko <albar@nt.kegel.com.pl>
1258 * msp430-dis.c (msp430_doubleoperand): Check for an 'add'
1259 instruction which looks similar to an 'rla' instruction.
1261 For older changes see ChangeLog-0203
1267 version-control: never