opcodes/ChangeLog

   1 2018-03-28  Nick Clifton  <nickc@redhat.com>
   2
   3         PR 22988
   4         * aarch64-tbl.h (aarch64_opcode_table): Add entries for LDFF1xx
   5         instructions with only a base address register.
   6         * aarch64-opc.c (operand_general_constraint_met_p): Add code to
   7         handle AARHC64_OPND_SVE_ADDR_R.
   8         (aarch64_print_operand): Likewise.
   9         * aarch64-asm-2.c: Regenerate.
  10         * aarch64_dis-2.c: Regenerate.
  11         * aarch64-opc-2.c: Regenerate.
  12
  13 2018-03-22  Jan Beulich  <jbeulich@suse.com>
  14
  15         * i386-opc.tbl: Drop VecESize from register only insn forms and
  16         memory forms not allowing broadcast.
  17         * i386-tlb.h: Re-generate.
  18
  19 2018-03-22  Jan Beulich  <jbeulich@suse.com>
  20
  21         * i386-opc.tbl (vfrczs*, vphadd*, vphsub*, vpmacs*, vpmadcs*,
  22         vprot*, vpsha*, vpshl*, bextr, blc*, bls*, t1mskc, tzmsk, sha1*,
  23         sha256*): Drop Disp<N>.
  24
  25 2018-03-22  Jan Beulich  <jbeulich@suse.com>
  26
  27         * i386-dis.c (EbndS, bnd_swap_mode): New.
  28         (prefix_table): Use EbndS.
  29         (OP_E_register, OP_E_memory): Also handle bnd_swap_mode.
  30         * i386-opc.tbl (bndmov): Move misplaced Load.
  31         * i386-tlb.h: Re-generate.
  32
  33 2018-03-22  Jan Beulich  <jbeulich@suse.com>
  34
  35         * i386-opc.tbl (vcvtdq2pd, vcvtps2pd, vcvtudq2pd): Use separate
  36         templates allowing memory operands and folded ones for register
  37         only flavors.
  38         * i386-tlb.h: Re-generate.
  39
  40 2018-03-22  Jan Beulich  <jbeulich@suse.com>
  41
  42         * i386-opc.tbl (vfrczp*, vpcmov, vpermil2p*): Fold 128- and
  43         256-bit templates. Drop redundant leftover Disp<N>.
  44         * i386-tlb.h: Re-generate.
  45
  46 2018-03-14  Kito Cheng  <kito.cheng@gmail.com>
  47
  48         * riscv-opc.c (riscv_insn_types): New.
  49
  50 2018-03-13  Nick Clifton  <nickc@redhat.com>
  51
  52         * po/pt_BR.po: Updated Brazilian Portuguese translation.
  53
  54 2018-03-08  H.J. Lu  <hongjiu.lu@intel.com>
  55
  56         * i386-opc.tbl: Add Optimize to clr.
  57         * i386-tbl.h: Regenerated.
  58
  59 2018-03-08  H.J. Lu  <hongjiu.lu@intel.com>
  60
  61         * i386-gen.c (opcode_modifiers): Remove OldGcc.
  62         * i386-opc.h (OldGcc): Removed.
  63         (i386_opcode_modifier): Remove oldgcc.
  64         * i386-opc.tbl: Remove fsubp, fsubrp, fdivp and fdivrp
  65         instructions for old (<= 2.8.1) versions of gcc.
  66         * i386-tbl.h: Regenerated.
  67
  68 2018-03-08  Jan Beulich  <jbeulich@suse.com>
  69
  70         * i386-opc.h (EVEXDYN): New.
  71         * i386-opc.tbl: Fold various AVX512VL templates.
  72         * i386-tlb.h: Re-generate.
  73
  74 2018-03-08  Jan Beulich  <jbeulich@suse.com>
  75
  76         * i386-opc.tbl (vexpandpd, vexpandps, vmovapd, vmovaps,
  77         vmovdqa32, vmovdqa64, vmovdqu32, vmovdqu64, vmovupd, vmovups,
  78         vpexpandd, vpexpandq): Fold AFX512VF templates.
  79         * i386-tlb.h: Re-generate.
  80
  81 2018-03-08  Jan Beulich  <jbeulich@suse.com>
  82
  83         * i386-opc.tbl (vgf2p8affineinvqb, vgf2p8affineqb, vgf2p8mulb):
  84         Fold 128- and 256-bit VEX-encoded templates.
  85         * i386-tlb.h: Re-generate.
  86
  87 2018-03-08  Jan Beulich  <jbeulich@suse.com>
  88
  89         * i386-opc.tbl (vexpandpd, vexpandps, vmovapd, vmovaps,
  90         vmovdqa32, vmovdqa64, vmovdqu32, vmovdqu64, vmovupd, vmovups,
  91         vpexpandd, vpexpandq): Fold AVX512F templates.
  92         * i386-tlb.h: Re-generate.
  93
  94 2018-03-08  Jan Beulich  <jbeulich@suse.com>
  95
  96         * i386-opc.tbl (llwpcb, slwpcb, lwpval, lwpins): Fold 32- and
  97         64-bit templates. Drop Disp<N>.
  98         * i386-tlb.h: Re-generate.
  99
 100 2018-03-08  Jan Beulich  <jbeulich@suse.com>
 101
 102         * i386-opc.tbl (vfmadd*, vfmsub*, vfnmadd*, vfnmsub*): Fold 128-
 103         and 256-bit templates.
 104         * i386-tlb.h: Re-generate.
 105
 106 2018-03-08  Jan Beulich  <jbeulich@suse.com>
 107
 108         * i386-opc.tbl (cmpxchg8b): Add NoRex64.
 109         * i386-tlb.h: Re-generate.
 110
 111 2018-03-08  Jan Beulich  <jbeulich@suse.com>
 112
 113         * i386-opc.tbl (cmpxchg16b, fisttp, fisttpll, bndmov, mwaitx):
 114         Drop NoAVX.
 115         * i386-tlb.h: Re-generate.
 116
 117 2018-03-08  Jan Beulich  <jbeulich@suse.com>
 118
 119         * i386-opc.tbl (ldmxcsr, stmxcsr): Add NoAVX.
 120         * i386-tlb.h: Re-generate.
 121
 122 2018-03-08  Jan Beulich  <jbeulich@suse.com>
 123
 124         * i386-gen.c (opcode_modifiers): Delete FloatD.
 125         * i386-opc.h (FloatD): Delete.
 126         (struct i386_opcode_modifier): Delete floatd.
 127         * i386-opc.tbl (fadd, fsub, fsubr, fmul, fdiv, fdivr): Replace
 128         FloatD by D.
 129         * i386-tlb.h: Re-generate.
 130
 131 2018-03-08  Jan Beulich  <jbeulich@suse.com>
 132
 133         * i386-dis.c (float_reg): Adjust DC and DE fsub*/fdiv* patterns.
 134
 135 2018-03-08  Jan Beulich  <jbeulich@suse.com>
 136
 137         * i386-opc.tbl (vmovd): Disallow Qword memory operands.
 138         * i386-tlb.h: Re-generate.
 139
 140 2018-03-08  Jan Beulich  <jbeulich@suse.com>
 141
 142         * i386-opc.tbl (vcvtpd2ps): Fold AVX 128- and 256-bit memory
 143         forms.
 144         * i386-tlb.h: Re-generate.
 145
 146 2018-03-07  Alan Modra  <amodra@gmail.com>
 147
 148         * disassemble.c (disassembler): Use bfd_arch_powerpc entry for
 149         bfd_arch_rs6000.
 150         * disassemble.h (print_insn_rs6000): Delete.
 151         * ppc-dis.c (powerpc_init_dialect): Handle rs6000.
 152         (disassemble_init_powerpc): Call powerpc_init_dialect for rs6000.
 153         (print_insn_rs6000): Delete.
 154
 155 2018-03-03  Alan Modra  <amodra@gmail.com>
 156
 157         * sysdep.h (opcodes_error_handler): Define.
 158         (_bfd_error_handler): Declare.
 159         * Makefile.am: Remove stray #.
 160         * opc2c.c (main): Remove bogus -l arg handling.  Print "DO NOT
 161         EDIT" comment.
 162         * aarch64-dis.c, * arc-dis.c, * arm-dis.c, * avr-dis.c,
 163         * d30v-dis.c, * h8300-dis.c, * mmix-dis.c, * ppc-dis.c,
 164         * riscv-dis.c, * s390-dis.c, * sparc-dis.c, * v850-dis.c: Use
 165         opcodes_error_handler to print errors.  Standardize error messages.
 166         * msp430-decode.opc, * nios2-dis.c, * rl78-decode.opc: Likewise,
 167         and include opintl.h.
 168         * nds32-asm.c: Likewise, and include sysdep.h and opintl.h.
 169         * i386-gen.c: Standardize error messages.
 170         * msp430-decode.c, * rl78-decode.c, rx-decode.c: Regenerate.
 171         * Makefile.in: Regenerate.
 172         * epiphany-asm.c, * epiphany-desc.c, * epiphany-dis.c,
 173         * epiphany-ibld.c, * fr30-asm.c, * fr30-desc.c, * fr30-dis.c,
 174         * fr30-ibld.c, * frv-asm.c, * frv-desc.c, * frv-dis.c, * frv-ibld.c,
 175         * frv-opc.c, * ip2k-asm.c, * ip2k-desc.c, * ip2k-dis.c, * ip2k-ibld.c,
 176         * iq2000-asm.c, * iq2000-desc.c, * iq2000-dis.c, * iq2000-ibld.c,
 177         * lm32-asm.c, * lm32-desc.c, * lm32-dis.c, * lm32-ibld.c,
 178         * m32c-asm.c, * m32c-desc.c, * m32c-dis.c, * m32c-ibld.c,
 179         * m32r-asm.c, * m32r-desc.c, * m32r-dis.c, * m32r-ibld.c,
 180         * mep-asm.c, * mep-desc.c, * mep-dis.c, * mep-ibld.c, * mt-asm.c,
 181         * mt-desc.c, * mt-dis.c, * mt-ibld.c, * or1k-asm.c, * or1k-desc.c,
 182         * or1k-dis.c, * or1k-ibld.c, * xc16x-asm.c, * xc16x-desc.c,
 183         * xc16x-dis.c, * xc16x-ibld.c, * xstormy16-asm.c, * xstormy16-desc.c,
 184         * xstormy16-dis.c, * xstormy16-ibld.c: Regenerate.
 185
 186 2018-03-01  H.J. Lu  <hongjiu.lu@intel.com>
 187
 188         * * i386-opc.tbl: Add "Optimize" to AVX256 and AVX512
 189         vpsub[bwdq] instructions.
 190         * i386-tbl.h: Regenerated.
 191
 192 2018-03-01  Alan Modra  <amodra@gmail.com>
 193
 194         * configure.ac (ALL_LINGUAS): Sort.
 195         * configure: Regenerate.
 196
 197 2018-02-27  Thomas Preud'homme  <thomas.preudhomme@arm.com>
 198
 199         * arm-dis.c (print_insn_coprocessor): Replace uses of ARM_FEATURE_COPY
 200         macro by assignements.
 201
 202 2018-02-27  H.J. Lu  <hongjiu.lu@intel.com>
 203
 204         PR gas/22871
 205         * i386-gen.c (opcode_modifiers): Add Optimize.
 206         * i386-opc.h (Optimize): New enum.
 207         (i386_opcode_modifier): Add optimize.
 208         * i386-opc.tbl: Add "Optimize" to "mov $imm, reg",
 209         "sub reg, reg/mem", "test $imm, acc", "test $imm, reg/mem",
 210         "and $imm, acc", "and $imm, reg/mem", "xor reg, reg/mem",
 211         "movq $imm, reg" and AVX256 and AVX512 versions of vandnps,
 212         vandnpd, vpandn, vpandnd, vpandnq, vxorps, vxorpd, vpxor,
 213         vpxord and vpxorq.
 214         * i386-tbl.h: Regenerated.
 215
 216 2018-02-26  Alan Modra  <amodra@gmail.com>
 217
 218         * crx-dis.c (getregliststring): Allocate a large enough buffer
 219         to silence false positive gcc8 warning.
 220
 221 2018-02-22  Shea Levy <shea@shealevy.com>
 222
 223         * disassemble.c (ARCH_riscv): Define if ARCH_all.
 224
 225 2018-02-22  H.J. Lu  <hongjiu.lu@intel.com>
 226
 227         * i386-opc.tbl: Add {rex},
 228         * i386-tbl.h: Regenerated.
 229
 230 2018-02-20  Maciej W. Rozycki  <macro@mips.com>
 231
 232         * mips16-opc.c (decode_mips16_operand) <'M'>: Remove case.
 233         (mips16_opcodes): Replace `M' with `m' for "restore".
 234
 235 2018-02-19  Thomas Preud'homme  <thomas.preudhomme@arm.com>
 236
 237         * arm-dis.c (thumb_opcodes): Fix BXNS mask.
 238
 239 2018-02-13  Maciej W. Rozycki  <macro@mips.com>
 240
 241         * wasm32-dis.c (print_insn_wasm32): Rename `index' local
 242         variable to `function_index'.
 243
 244 2018-02-13  Nick Clifton  <nickc@redhat.com>
 245
 246         PR 22823
 247         * metag-dis.c (print_fmmov): Double buffer size to avoid warning
 248         about truncation of printing.
 249
 250 2018-02-12  Henry Wong <henry@stuffedcow.net>
 251
 252         * mips-opc.c (mips_builtin_opcodes): Correct "sigrie" encoding.
 253
 254 2018-02-05  Nick Clifton  <nickc@redhat.com>
 255
 256         * po/pt_BR.po: Updated Brazilian Portuguese translation.
 257
 258 2018-01-23  Igor Tsimbalist  <igor.v.tsimbalist@intel.com>
 259
 260         * i386-dis.c (enum): Add pconfig.
 261         * i386-gen.c (cpu_flag_init): Add CPU_PCONFIG_FLAGS.
 262         (cpu_flags): Add CpuPCONFIG.
 263         * i386-opc.h (enum): Add CpuPCONFIG.
 264         (i386_cpu_flags): Add cpupconfig.
 265         * i386-opc.tbl: Add PCONFIG instruction.
 266         * i386-init.h: Regenerate.
 267         * i386-tbl.h: Likewise.
 268
 269 2018-01-23  Igor Tsimbalist  <igor.v.tsimbalist@intel.com>
 270
 271         * i386-dis.c (enum): Add PREFIX_0F09.
 272         * i386-gen.c (cpu_flag_init): Add CPU_WBNOINVD_FLAGS.
 273         (cpu_flags): Add CpuWBNOINVD.
 274         * i386-opc.h (enum): Add CpuWBNOINVD.
 275         (i386_cpu_flags): Add cpuwbnoinvd.
 276         * i386-opc.tbl: Add WBNOINVD instruction.
 277         * i386-init.h: Regenerate.
 278         * i386-tbl.h: Likewise.
 279
 280 2018-01-17  Jim Wilson  <jimw@sifive.com>
 281
 282         * riscv-opc.c (riscv_opcodes) <addi>: Use z instead of 0.
 283
 284 2018-01-17  Igor Tsimbalist  <igor.v.tsimbalist@intel.com>
 285
 286         * i386-gen.c (cpu_flag_init): Delete CPU_CET_FLAGS, CpuCET.
 287         Add CPU_IBT_FLAGS, CPU_SHSTK_FLAGS, CPY_ANY_IBT_FLAGS,
 288         CPU_ANY_SHSTK_FLAGS, CpuIBT, CpuSHSTK.
 289         (cpu_flags): Add CpuIBT, CpuSHSTK.
 290         * i386-opc.h (enum): Add CpuIBT, CpuSHSTK.
 291         (i386_cpu_flags): Add cpuibt, cpushstk.
 292         * i386-opc.tbl: Change CpuCET to CpuSHSTK and CpuIBT.
 293         * i386-init.h: Regenerate.
 294         * i386-tbl.h: Likewise.
 295
 296 2018-01-16  Nick Clifton  <nickc@redhat.com>
 297
 298         * po/pt_BR.po: Updated Brazilian Portugese translation.
 299         * po/de.po: Updated German translation.
 300
 301 2018-01-15  Jim Wilson  <jimw@sifive.com>
 302
 303         * riscv-opc.c (match_c_nop): New.
 304         (riscv_opcodes) <addi>: Handle an addi that compresses to c.nop.
 305
 306 2018-01-15  Nick Clifton  <nickc@redhat.com>
 307
 308         * po/uk.po: Updated Ukranian translation.
 309
 310 2018-01-13  Nick Clifton  <nickc@redhat.com>
 311
 312         * po/opcodes.pot: Regenerated.
 313
 314 2018-01-13  Nick Clifton  <nickc@redhat.com>
 315
 316         * configure: Regenerate.
 317
 318 2018-01-13  Nick Clifton  <nickc@redhat.com>
 319
 320         2.30 branch created.
 321
 322 2018-01-11  Igor Tsimbalist  <igor.v.tsimbalist@intel.com>
 323
 324         * i386-opc.tbl: Remove VL variants for 4FMAPS and 4VNNIW insns.
 325         * i386-tbl.h: Regenerate.
 326
 327 2018-01-10  Jan Beulich  <jbeulich@suse.com>
 328
 329         * i386-opc.tbl (v4fmaddss, v4fnmaddss): Adjust Disp8MemShift.
 330         * i386-tbl.h: Re-generate.
 331
 332 2018-01-10  Jan Beulich  <jbeulich@suse.com>
 333
 334         * i386-opc.tbl (vpcmpeqb, vpcmpleb, vpcmpltb, vpcmpneqb,
 335         vpcmpnleb, vpcmpnltb, vpcmpequb, vpcmpleub, vpcmpltub,
 336         vpcmpnequb, vpcmpnleub, vpcmpnltub, vpcmpeqw, vpcmplew,
 337         vpcmpltw, vpcmpneqw, vpcmpnlew, vpcmpnltw, vpcmpequw, vpcmpleuw,
 338         vpcmpltuw, vpcmpnequw, vpcmpnleuw, vpcmpnltuw): Adjust
 339         Disp8MemShift of AVX512VL forms.
 340         * i386-tbl.h: Re-generate.
 341
 342 2018-01-09  Jim Wilson  <jimw@sifive.com>
 343
 344         * riscv-dis.c (maybe_print_address): If base_reg is zero,
 345         then the hi_addr value is zero.
 346
 347 2018-01-09  James Greenhalgh  <james.greenhalgh@arm.com>
 348
 349         * arm-dis.c (arm_opcodes): Add csdb.
 350         (thumb32_opcodes): Add csdb.
 351
 352 2018-01-09  James Greenhalgh  <james.greenhalgh@arm.com>
 353
 354         * aarch64-tbl.h (aarch64_opcode_table): Add "csdb".
 355         * aarch64-asm-2.c: Regenerate.
 356         * aarch64-dis-2.c: Regenerate.
 357         * aarch64-opc-2.c: Regenerate.
 358
 359 2018-01-08  H.J. Lu  <hongjiu.lu@intel.com>
 360
 361         PR gas/22681
 362         * i386-opc.tbl: Properly encode vmovd with Qword memeory operand.
 363         Remove AVX512 vmovd with 64-bit operands.
 364         * i386-tbl.h: Regenerated.
 365
 366 2018-01-05  Jim Wilson  <jimw@sifive.com>
 367
 368         * riscv-dis.c (print_insn_args) <'s'>: Call maybe_print_address for a
 369         jalr.
 370
 371 2018-01-03  Alan Modra  <amodra@gmail.com>
 372
 373         Update year range in copyright notice of all files.
 374
 375 2018-01-02  Jan Beulich  <jbeulich@suse.com>
 376
 377         * i386-gen.c (operand_type_init): Restore OPERAND_TYPE_REGYMM
 378         and OPERAND_TYPE_REGZMM entries.
 379
 380 For older changes see ChangeLog-2017
 381 \f
 382 Copyright (C) 2018 Free Software Foundation, Inc.
 383
 384 Copying and distribution of this file, with or without modification,
 385 are permitted in any medium without royalty provided the copyright
 386 notice and this notice are preserved.
 387
 388 Local Variables:
 389 mode: change-log
 390 left-margin: 8
 391 fill-column: 74
 392 version-control: never
 393 End: