opcodes/ChangeLog

   1 2019-04-15  Sudakshina Das  <sudi.das@arm.com>
   2
   3         * arm-dis.c (thumb32_opcodes): New instruction bfcsel.
   4         (print_insn_thumb32): Edit the switch case for %Z.
   5
   6 2019-04-15  Sudakshina Das  <sudi.das@arm.com>
   7
   8         * arm-dis.c (print_insn_thumb32): Updated to accept new %Z pattern.
   9
  10 2019-04-15  Sudakshina Das  <sudi.das@arm.com>
  11
  12         * arm-dis.c (thumb32_opcodes): New instruction bfl.
  13
  14 2019-04-15  Sudakshina Das  <sudi.das@arm.com>
  15
  16         * arm-dis.c (print_insn_thumb32): Updated to accept new %Y pattern.
  17
  18 2019-04-15  Sudakshina Das  <sudi.das@arm.com>
  19
  20         * arm-dis.c (print_insn_thumb32): Add '%<bitfield>S' to print an
  21         Arm register with r13 and r15 unpredictable.
  22         (thumb32_opcodes): New instructions for bfx and bflx.
  23
  24 2019-04-15  Sudakshina Das  <sudi.das@arm.com>
  25
  26         * arm-dis.c (thumb32_opcodes): New instructions for bf.
  27
  28 2019-04-15  Sudakshina Das  <sudi.das@arm.com>
  29
  30         * arm-dis.c (print_insn_thumb32): Updated to accept new %W pattern.
  31
  32 2019-04-15  Sudakshina Das  <sudi.das@arm.com>
  33
  34         * arm-dis.c (print_insn_thumb32): Updated to accept new %G pattern.
  35
  36 2019-04-15  Thomas Preud'homme  <thomas.preudhomme@arm.com>
  37
  38         * arm-dis.c (select_arm_features): Add logic for Armv8.1-M Mainline.
  39
  40 2019-04-12  John Darrington <john@darrington.wattle.id.au>
  41
  42         s12z-dis.c, s12z-opc.c, s12z-opc.h: Replace "operator" with
  43         "optr". ("operator" is a reserved word in c++).
  44
  45 2019-04-11  Sudakshina Das  <sudi.das@arm.com>
  46
  47         * aarch64-opc.c (aarch64_print_operand): Add case for
  48         AARCH64_OPND_Rt_SP.
  49         (verify_constraints): Likewise.
  50         * aarch64-tbl.h (QL_LDST_AT): Update to add SP qualifier.
  51         (struct aarch64_opcode): Update stg, stzg, st2g, stz2g instructions
  52         to accept Rt|SP as first operand.
  53         (AARCH64_OPERANDS): Add new Rt_SP.
  54         * aarch64-asm-2.c: Regenerated.
  55         * aarch64-dis-2.c: Regenerated.
  56         * aarch64-opc-2.c: Regenerated.
  57
  58 2019-04-11  Sudakshina Das  <sudi.das@arm.com>
  59
  60         * aarch64-asm-2.c: Regenerated.
  61         * aarch64-dis-2.c: Likewise.
  62         * aarch64-opc-2.c: Likewise.
  63         * aarch64-tbl.h (aarch64_opcode): Add new ldgm and stgm.
  64
  65 2019-04-09  Robert Suchanek  <robert.suchanek@mips.com>
  66
  67         * mips-opc.c (mips_builtin_opcodes): Add RDHWR rt rd sel.
  68
  69 2019-04-08  H.J. Lu  <hongjiu.lu@intel.com>
  70
  71         * i386-opc.tbl: Consolidate AVX512 BF16 entries.
  72         * i386-init.h: Regenerated.
  73
  74 2019-04-07  Alan Modra  <amodra@gmail.com>
  75
  76         * ppc-dis.c (print_insn_powerpc): Use a tiny state machine
  77         op_separator to control printing of spaces, comma and parens
  78         rather than need_comma, need_paren and spaces vars.
  79
  80 2019-04-07  Alan Modra  <amodra@gmail.com>
  81
  82         PR 24421
  83         * arm-dis.c (print_insn_coprocessor): Correct bracket placement.
  84         (print_insn_neon, print_insn_arm): Likewise.
  85
  86 2019-04-05  Xuepeng Guo  <xuepeng.guo@intel.com>
  87
  88         * i386-dis-evex.h (evex_table): Updated to support BF16
  89         instructions.
  90         * i386-dis.c (enum): Add EVEX_W_0F3852_P_1, EVEX_W_0F3872_P_1
  91         and EVEX_W_0F3872_P_3.
  92         * i386-gen.c (cpu_flag_init): Add CPU_AVX512_BF16_FLAGS.
  93         (cpu_flags): Add bitfield for CpuAVX512_BF16.
  94         * i386-opc.h (enum): Add CpuAVX512_BF16.
  95         (i386_cpu_flags): Add bitfield for cpuavx512_bf16.
  96         * i386-opc.tbl: Add AVX512 BF16 instructions.
  97         * i386-init.h: Regenerated.
  98         * i386-tbl.h: Likewise.
  99
 100 2019-04-05  Alan Modra  <amodra@gmail.com>
 101
 102         * ppc-opc.c (XLBH_MASK): Subtract off BH field from BB_MASK.
 103         (powerpc_opcodes): Reorder bcctr and bclr extended mnemonics
 104         to favour printing of "-" branch hint when using the "y" bit.
 105         Allow BH field on bc{ctr,lr,tar}{,l}{-,+}.
 106
 107 2019-04-05  Alan Modra  <amodra@gmail.com>
 108
 109         * ppc-dis.c (print_insn_powerpc): Delay printing spaces after
 110         opcode until first operand is output.
 111
 112 2019-04-04  Peter Bergner  <bergner@linux.ibm.com>
 113
 114         PR gas/24349
 115         * ppc-opc.c (valid_bo_pre_v2): Add comments.
 116         (valid_bo_post_v2): Add support for 'at' branch hints.
 117         (insert_bo): Only error on branch on ctr.
 118         (get_bo_hint_mask): New function.
 119         (insert_boe): Add new 'branch_taken' formal argument.  Add support
 120         for inserting 'at' branch hints.
 121         (extract_boe): Add new 'branch_taken' formal argument.  Add support
 122         for extracting 'at' branch hints.
 123         (insert_bom, extract_bom, insert_bop, extract_bop): New functions.
 124         (BOE): Delete operand.
 125         (BOM, BOP): New operands.
 126         (RM): Update value.
 127         (XLYLK, XLYLK_MASK, XLYBB_MASK): Delete.
 128         (powerpc_opcodes) <bc-, bcl-, bca-, bcla-, bclr-, bclrl-, bcctr-,
 129         bcctrl-, bctar-, bctarl->: Replace BOE with BOM.
 130         (powerpc_opcodes) <bc+, bcl+, bca+, bcla+, bclr+, bclrl+, bcctr+,
 131         bcctrl+, bctar+, bctarl+>: Replace BOE with BOP.
 132         <bdnztar, bdnztarl, bdztar, bdztarl, btar, btarl, bdnztar-, bdnztarl-,
 133         bdnztar+, bdnztarl+, bdztar-, bdztarl-, bdztar+, bdztarl+, bgetar,
 134         bnltar, bgetarl, bnltarl, bletar, bngtar, bletarl, bngtarl, bnetar,
 135         bnetarl, bnstar, bnutar, bnstarl, bnutarl, bgetar-, bnltar-, bgetarl-,
 136         bnltarl-, bletar-, bngtar-, bletarl-, bngtarl-, bnetar-, bnetarl-,
 137         bnstar-, bnutar-, bnstarl-, bnutarl-, bgetar+, bnltar+, bgetarl+,
 138         bnltarl+, bletar+, bngtar+, bletarl+, bngtarl+, bnetar+, bnetarl+,
 139         bnstar+, bnutar+, bnstarl+, bnutarl+, blttar, blttarl, bgttar, bgttarl,
 140         beqtar, beqtarl, bsotar, buntar, bsotarl, buntarl, blttar-, blttarl-,
 141         bgttar-, bgttarl-, beqtar-, beqtarl-, bsotar-, buntar-, bsotarl-,
 142         buntarl-, blttar+, blttarl+, bgttar+, bgttarl+, beqtar+, beqtarl+,
 143         bsotar+, buntar+, bsotarl+, buntarl+, bdnzftar, bdnzftarl, bdzftar,
 144         bdzftarl, bftar, bftarl, bftar-, bftarl-, bftar+, bftarl+, bdnzttar,
 145         bdnzttarl, bdzttar, bdzttarl, bttar, bttarl, bttar-, bttarl-, bttar+,
 146         bttarl+>: New extended mnemonics.
 147
 148 2019-03-28  Alan Modra  <amodra@gmail.com>
 149
 150         PR 24390
 151         * ppc-opc.c (BTF): Define.
 152         (powerpc_opcodes): Use for mtfsb*.
 153         * ppc-dis.c (print_insn_powerpc): Print fields with both
 154         PPC_OPERAND_CR_REG and PPC_OPERAND_CR_BIT as a plain number.
 155
 156 2019-03-25  Tamar Christina  <tamar.christina@arm.com>
 157
 158         * arm-dis.c (struct arm_private_data): Remove has_mapping_symbols.
 159         (mapping_symbol_for_insn): Implement new algorithm.
 160         (print_insn): Remove duplicate code.
 161
 162 2019-03-25  Tamar Christina  <tamar.christina@arm.com>
 163
 164         * aarch64-dis.c (print_insn_aarch64):
 165         Implement override.
 166
 167 2019-03-25  Tamar Christina  <tamar.christina@arm.com>
 168
 169         * aarch64-dis.c (print_insn_aarch64): Update the mapping symbol search
 170         order.
 171
 172 2019-03-25  Tamar Christina  <tamar.christina@arm.com>
 173
 174         * aarch64-dis.c (last_stop_offset): New.
 175         (print_insn_aarch64): Use stop_offset.
 176
 177 2019-03-19  H.J. Lu  <hongjiu.lu@intel.com>
 178
 179         PR gas/24359
 180         * i386-gen.c (cpu_flag_init): Add CPU_ANY_AVX512F_FLAGS to
 181         CPU_ANY_AVX2_FLAGS.
 182         * i386-init.h: Regenerated.
 183
 184 2019-03-18  H.J. Lu  <hongjiu.lu@intel.com>
 185
 186         PR gas/24348
 187         * i386-opc.tbl: Add Optimize to vmovdqa32, vmovdqa64, vmovdqu8,
 188         vmovdqu16, vmovdqu32 and vmovdqu64.
 189         * i386-tbl.h: Regenerated.
 190
 191 2019-03-12  Andreas Krebbel  <krebbel@linux.ibm.com>
 192
 193         * s390-opc.txt: Rename selhhhr to selfhr.  Remove optional operand
 194         from vstrszb, vstrszh, and vstrszf.
 195
 196 2019-03-12  Andreas Krebbel  <krebbel@linux.ibm.com>
 197
 198         * s390-opc.txt: Add instruction descriptions.
 199
 200 2019-02-08  Jim Wilson  <jimw@sifive.com>
 201
 202         * riscv-opc.c (riscv_opcodes) <beq>: Use Cz to compress 3 operand form.
 203         <bne>: Likewise.
 204
 205 2019-02-07  Tamar Christina  <tamar.christina@arm.com>
 206
 207         * arm-dis.c (arm_opcodes): Redefine hlt to armv1.
 208
 209 2019-02-07  Tamar Christina  <tamar.christina@arm.com>
 210
 211         PR binutils/23212
 212         * aarch64-opc.h (enum aarch64_field_kind): Add FLD_sz.
 213         * aarch64-opc.c (verify_elem_sd): New.
 214         (fields): Add FLD_sz entr.
 215         * aarch64-tbl.h (_SIMD_INSN): New.
 216         (aarch64_opcode_table): Add elem_sd verifier to fmla, fmls, fmul and
 217         fmulx scalar and vector by element isns.
 218
 219 2019-02-07  Nick Clifton  <nickc@redhat.com>
 220
 221         * po/sv.po: Updated Swedish translation.
 222
 223 2019-01-31  Andreas Krebbel  <krebbel@linux.ibm.com>
 224
 225         * s390-mkopc.c (main): Accept arch13 as cpu string.
 226         * s390-opc.c: Add new instruction formats and instruction opcode
 227         masks.
 228         * s390-opc.txt: Add new arch13 instructions.
 229
 230 2019-01-25  Sudakshina Das  <sudi.das@arm.com>
 231
 232         * aarch64-tbl.h (QL_LDST_AT): Update macro.
 233         (aarch64_opcode): Change encoding for stg, stzg
 234         st2g and st2zg.
 235         * aarch64-asm-2.c: Regenerated.
 236         * aarch64-dis-2.c: Regenerated.
 237         * aarch64-opc-2.c: Regenerated.
 238
 239 2019-01-25  Sudakshina Das  <sudi.das@arm.com>
 240
 241         * aarch64-asm-2.c: Regenerated.
 242         * aarch64-dis-2.c: Likewise.
 243         * aarch64-opc-2.c: Likewise.
 244         * aarch64-tbl.h (aarch64_opcode): Add new stzgm.
 245
 246 2019-01-25  Sudakshina Das  <sudi.das@arm.com>
 247             Ramana Radhakrishnan  <ramana.radhakrishnan@arm.com>
 248
 249         * aarch64-asm.c (aarch64_ins_addr_simple_2): Remove.
 250         * aarch64-asm.h (ins_addr_simple_2): Likeiwse.
 251         * aarch64-dis.c (aarch64_ext_addr_simple_2): Likewise.
 252         * aarch64-dis.h (ext_addr_simple_2): Likewise.
 253         * aarch64-opc.c (operand_general_constraint_met_p): Remove
 254         case for ldstgv_indexed.
 255         (aarch64_print_operand): Remove case for AARCH64_OPND_ADDR_SIMPLE_2.
 256         * aarch64-tbl.h (struct aarch64_opcode): Remove ldgv and stgv.
 257         (AARCH64_OPERANDS): Remove ADDR_SIMPLE_2.
 258         * aarch64-asm-2.c: Regenerated.
 259         * aarch64-dis-2.c: Regenerated.
 260         * aarch64-opc-2.c: Regenerated.
 261
 262 2019-01-23  Nick Clifton  <nickc@redhat.com>
 263
 264         * po/pt_BR.po: Updated Brazilian Portuguese translation.
 265
 266 2019-01-21  Nick Clifton  <nickc@redhat.com>
 267
 268         * po/de.po: Updated German translation.
 269         * po/uk.po: Updated Ukranian translation.
 270
 271 2019-01-20  Chenghua Xu  <paul.hua.gm@gmail.com>
 272         * mips-dis.c (mips_arch_choices): Fix typo in
 273         gs464, gs464e and gs264e descriptors.
 274
 275 2019-01-19  Nick Clifton  <nickc@redhat.com>
 276
 277         * configure: Regenerate.
 278         * po/opcodes.pot: Regenerate.
 279
 280 2018-06-24  Nick Clifton  <nickc@redhat.com>
 281
 282         2.32 branch created.
 283
 284 2019-01-09  John Darrington <john@darrington.wattle.id.au>
 285
 286         * s12z-dis.c (print_insn_s12z):  Do not dereference an operand
 287         if it is null.
 288         -dis.c (opr_emit_disassembly): Do not omit an index if it is
 289         zero.
 290
 291 2019-01-09  Andrew Paprocki  <andrew@ishiboo.com>
 292
 293         * configure: Regenerate.
 294
 295 2019-01-07  Alan Modra  <amodra@gmail.com>
 296
 297         * configure: Regenerate.
 298         * po/POTFILES.in: Regenerate.
 299
 300 2019-01-03  John Darrington <john@darrington.wattle.id.au>
 301
 302         * s12z-opc.c: New file.
 303         * s12z-opc.h: New file.
 304         * s12z-dis.c: Removed all code not directly related to display
 305         of instructions.  Used the interface provided by the new files
 306         instead.
 307         * Makefile.am (TARGET_LIBOPCODES_CFILES) Add s12z-opc.c.
 308         * Makefile.in: Regenerate.
 309         * configure.ac (bfd_s12z_arch): Correct the dependencies.
 310         * configure: Regenerate.
 311
 312 2019-01-01  Alan Modra  <amodra@gmail.com>
 313
 314         Update year range in copyright notice of all files.
 315
 316 For older changes see ChangeLog-2018
 317 \f
 318 Copyright (C) 2019 Free Software Foundation, Inc.
 319
 320 Copying and distribution of this file, with or without modification,
 321 are permitted in any medium without royalty provided the copyright
 322 notice and this notice are preserved.
 323
 324 Local Variables:
 325 mode: change-log
 326 left-margin: 8
 327 fill-column: 74
 328 version-control: never
 329 End: