5dd4bb1960430b03e20c0cdb974db4b7afc36d3f
[deliverable/binutils-gdb.git] / opcodes / ChangeLog
1 2011-02-13 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
2
3 * configure: Regenerate.
4
5 2011-02-13 Mike Frysinger <vapier@gentoo.org>
6
7 * bfin-dis.c (decode_dsp32alu_0): Fix typo with A1 reg.
8
9 2011-02-13 Mike Frysinger <vapier@gentoo.org>
10
11 * bfin-dis.c (decode_dsp32mult_0): Add 1 to dst for mac1. Output
12 dregs only when P is set, and dregs_lo otherwise.
13
14 2011-02-13 Mike Frysinger <vapier@gentoo.org>
15
16 * bfin-dis.c (decode_dsp32alu_0): Delete BYTEOP2M code.
17
18 2011-02-12 Mike Frysinger <vapier@gentoo.org>
19
20 * bfin-dis.c (decode_pseudoDEBUG_0): Add space after PRNT.
21
22 2011-02-12 Mike Frysinger <vapier@gentoo.org>
23
24 * bfin-dis.c (machine_registers): Delete REG_GP.
25 (reg_names): Delete "GP".
26 (decode_allregs): Change REG_GP to REG_LASTREG.
27
28 2011-02-12 Mike Frysinger <vapier@gentoo.org>
29
30 * bfin.h (M_S2RND, M_T, M_W32, M_FU, M_TFU, M_IS, M_ISS2, M_IH,
31 M_IU): Define.
32 (is_macmod_pmove, is_macmod_hmove): New functions.
33
34 2011-02-11 Mike Frysinger <vapier@gentoo.org>
35
36 * bfin-dis.c (reg_names): Add const.
37 (decode_dregs_lo, decode_dregs_hi, decode_dregs, decode_dregs_byte,
38 decode_pregs, decode_iregs, decode_mregs, decode_dpregs, decode_gregs,
39 decode_regs, decode_regs_lo, decode_regs_hi, decode_statbits,
40 decode_counters, decode_allregs): Likewise.
41
42 2011-02-09 Michael Snyder <msnyder@vmware.com>
43
44 * i386-dis.c (OP_J): Parenthesize expression to prevent
45 truncated addresses.
46 (print_insn): Fix indentation off-by-one.
47
48 2011-02-01 Nick Clifton <nickc@redhat.com>
49
50 * po/da.po: Updated Danish translation.
51
52 2011-01-21 Dave Murphy <davem@devkitpro.org>
53
54 * ppc-opc.c (NON32, NO371): Remove PPC_OPCODE_PPCPS.
55
56 2011-01-18 H.J. Lu <hongjiu.lu@intel.com>
57
58 * i386-dis.c (sIbT): New.
59 (b_T_mode): Likewise.
60 (dis386): Replace sIb with sIbT on "pushT".
61 (x86_64_table): Replace sIb with Ib on "aam" and "aad".
62 (OP_sI): Handle b_T_mode. Properly sign-extend byte.
63
64 2011-01-18 Jan Kratochvil <jan.kratochvil@redhat.com>
65
66 * i386-init.h: Regenerated.
67 * i386-tbl.h: Regenerated
68
69 2011-01-17 Quentin Neill <quentin.neill@amd.com>
70
71 * i386-dis.c (REG_XOP_TBM_01): New.
72 (REG_XOP_TBM_02): New.
73 (reg_table): Add REG_XOP_TBM_01 and REG_XOP_TBM_02 tables.
74 (xop_table): Redirect to REG_XOP_TBM_01 and REG_XOP_TBM_02
75 entries, and add bextr instruction.
76
77 * i386-gen.c (cpu_flag_init): Add CPU_TBM_FLAGS, CpuTBM.
78 (cpu_flags): Add CpuTBM.
79
80 * i386-opc.h (CpuTBM) New.
81 (i386_cpu_flags): Add bit cputbm.
82
83 * i386-opc.tbl: Add bextr, blcfill, blci, blcic, blcmsk,
84 blcs, blsfill, blsic, t1mskc, and tzmsk.
85
86 2011-01-12 DJ Delorie <dj@redhat.com>
87
88 * rx-dis.c (print_insn_rx): Support RX_Operand_TwoReg.
89
90 2011-01-11 Mingjie Xing <mingjie.xing@gmail.com>
91
92 * mips-dis.c (print_insn_args): Adjust the value to print the real
93 offset for "+c" argument.
94
95 2011-01-10 Nick Clifton <nickc@redhat.com>
96
97 * po/da.po: Updated Danish translation.
98
99 2011-01-05 Nathan Sidwell <nathan@codesourcery.com>
100
101 * arm-dis.c (thumb32_opcodes): BLX must have bit zero clear.
102
103 2011-01-04 H.J. Lu <hongjiu.lu@intel.com>
104
105 * i386-dis.c (REG_VEX_38F3): New.
106 (PREFIX_0FBC): Likewise.
107 (PREFIX_VEX_38F2): Likewise.
108 (PREFIX_VEX_38F3_REG_1): Likewise.
109 (PREFIX_VEX_38F3_REG_2): Likewise.
110 (PREFIX_VEX_38F3_REG_3): Likewise.
111 (PREFIX_VEX_38F7): Likewise.
112 (VEX_LEN_38F2_P_0): Likewise.
113 (VEX_LEN_38F3_R_1_P_0): Likewise.
114 (VEX_LEN_38F3_R_2_P_0): Likewise.
115 (VEX_LEN_38F3_R_3_P_0): Likewise.
116 (VEX_LEN_38F7_P_0): Likewise.
117 (dis386_twobyte): Use PREFIX_0FBC.
118 (reg_table): Add REG_VEX_38F3.
119 (prefix_table): Add PREFIX_0FBC, PREFIX_VEX_38F2,
120 PREFIX_VEX_38F3_REG_1, PREFIX_VEX_38F3_REG_2,
121 PREFIX_VEX_38F3_REG_3 and PREFIX_VEX_38F7.
122 (vex_table): Use PREFIX_VEX_38F2, REG_VEX_38F3 and
123 PREFIX_VEX_38F7.
124 (vex_len_table): Add VEX_LEN_38F2_P_0, VEX_LEN_38F3_R_1_P_0,
125 VEX_LEN_38F3_R_2_P_0, VEX_LEN_38F3_R_3_P_0 and
126 VEX_LEN_38F7_P_0.
127
128 * i386-gen.c (cpu_flag_init): Add CPU_BMI_FLAGS.
129 (cpu_flags): Add CpuBMI.
130
131 * i386-opc.h (CpuBMI): New.
132 (i386_cpu_flags): Add cpubmi.
133
134 * i386-opc.tbl: Add andn, bextr, blsi, blsmsk, blsr and tzcnt.
135 * i386-init.h: Regenerated.
136 * i386-tbl.h: Likewise.
137
138 2011-01-04 H.J. Lu <hongjiu.lu@intel.com>
139
140 * i386-dis.c (VexGdq): New.
141 (OP_VEX): Handle dq_mode.
142
143 2011-01-01 H.J. Lu <hongjiu.lu@intel.com>
144
145 * i386-gen.c (process_copyright): Update copyright to 2011.
146
147 For older changes see ChangeLog-2010
148 \f
149 Local Variables:
150 mode: change-log
151 left-margin: 8
152 fill-column: 74
153 version-control: never
154 End:
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