opcodes/ChangeLog

   1 2005-12-06  H.J. Lu  <hongjiu.lu@intel.com>
   2
   3         PR gas/1874
   4         * i386-dis.c (address_mode): New enum type.
   5         (address_mode): New variable.
   6         (mode_64bit): Removed.
   7         (ckprefix): Updated to check address_mode instead of mode_64bit.
   8         (prefix_name): Likewise.
   9         (print_insn): Likewise.
  10         (putop): Likewise.
  11         (print_operand_value): Likewise.
  12         (intel_operand_size): Likewise.
  13         (OP_E): Likewise.
  14         (OP_G): Likewise.
  15         (set_op): Likewise.
  16         (OP_REG): Likewise.
  17         (OP_I): Likewise.
  18         (OP_I64): Likewise.
  19         (OP_OFF): Likewise.
  20         (OP_OFF64): Likewise.
  21         (ptr_reg): Likewise.
  22         (OP_C): Likewise.
  23         (SVME_Fixup): Likewise.
  24         (print_insn): Set address_mode.
  25         (PNI_Fixup): Add 64bit and address size override support for
  26         monitor and mwait.
  27
  28 2005-12-06  Hans-Peter Nilsson  <hp@axis.com>
  29
  30         * cris-dis.c (bytes_to_skip): Handle new parameter prefix_matchedp.
  31         (print_with_operands): Check for prefix when [PC+] is seen.
  32
  33 2005-12-02  Dave Brolley  <brolley@redhat.com>
  34
  35         * configure.in (cgen_files): Add cgen-bitset.lo.
  36         (ta): Add cgen-bitset.lo when arch==bfd_cris_arch.
  37         * Makefile.am (CFILES): Add cgen-bitset.c.
  38         (ALL_MACHINES): Add cgen-bitset.lo.
  39         (cgen-bitset.lo): New target.
  40         * cgen-opc.c (cgen_bitset_create, cgen_bitset_init, cgen_bitset_clear)
  41         (cgen_bitset_add, cgen_bitset_set, cgen_bitset_contains)
  42         (cgen_bitset_compare, cgen_bitset_intersect_p, cgen_bitset_copy)
  43         (cgen_bitset_union): Moved from here ...
  44         * cgen-bitset.c: ... to here. New file.
  45         * Makefile.in: Regenerated.
  46         * configure: Regenerated.
  47
  48 2005-11-22  James E Wilson  <wilson@specifix.com>
  49
  50         * ia64-gen.c (_opcode_int64_low, _opcode_int64_high,
  51         opcode_fprintf_vma): New.
  52         (print_main_table): New opcode_fprintf_vma instead of fprintf_vma.
  53
  54 2005-11-16  Alan Modra  <amodra@bigpond.net.au>
  55
  56         * ppc-opc.c (powerpc_opcodes): Add frin,friz,frip,frim.  Correct
  57         frsqrtes.
  58
  59 2005-11-14  David Ung  <davidu@mips.com>
  60
  61         * mips16-opc.c: Add MIPS16e save/restore opcodes.
  62         * mips-dis.c (print_mips16_insn_arg): Handle printing of 'm'/'M'
  63         codes for save/restore.
  64
  65 2005-11-10  Andreas Schwab  <schwab@suse.de>
  66
  67         * m68k-dis.c (print_insn_m68k): Only match FPU insns with
  68         coprocessor ID 1.
  69
  70 2005-11-08  H.J. Lu  <hongjiu.lu@intel.com>
  71
  72         * m32c-desc.c: Regenerated.
  73
  74 2005-11-08  Nathan Sidwell  <nathan@codesourcery.com>
  75
  76         Add ms2.
  77         * ms1-asm.c, ms1-desc.c, ms1-desc.h, ms1-dis.c, ms1-ibld.c,
  78         ms1-opc.c, ms1-opc.h: Regenerated.
  79
  80 2005-11-07  Steve Ellcey  <sje@cup.hp.com>
  81
  82         * configure: Regenerate after modifying bfd/warning.m4.
  83
  84 2005-11-07  Alan Modra  <amodra@bigpond.net.au>
  85
  86         * i386-dis.c (ckprefix): Handle rex on fwait.  Don't print
  87         ignored rex prefixes here.
  88         (print_insn): Instead, handle them similarly to fwait followed
  89         by non-fp insns.
  90
  91 2005-11-02  H.J. Lu  <hongjiu.lu@intel.com>
  92
  93         * iq2000-desc.c: Regenerated.
  94         * iq2000-desc.h: Likewise.
  95         * iq2000-dis.c: Likewise.
  96         * iq2000-opc.c: Likewise.
  97
  98 2005-11-02  Paul Brook  <paul@codesourcery.com>
  99
 100         * arm-dis.c (print_insn_thumb32): Word align blx target address.
 101
 102 2005-10-31  Alan Modra  <amodra@bigpond.net.au>
 103
 104         * arm-dis.c (print_insn): Warning fix.
 105
 106 2005-10-30  H.J. Lu  <hongjiu.lu@intel.com>
 107
 108         * Makefile.am: Run "make dep-am".
 109         * Makefile.in: Regenerated.
 110
 111         * dep-in.sed: Replace " ./" with " ".
 112
 113 2005-10-28  Dave Brolley  <brolley@redhat.com>
 114
 115         * All CGEN-generated sources: Regenerate.
 116
 117         Contribute the following changes:
 118         2005-09-19  Dave Brolley  <brolley@redhat.com>
 119
 120         * disassemble.c (disassemble_init_for_target): Add 'break' to case for
 121         bfd_arch_tic4x. Use cgen_bitset_create and cgen_bitset_set for
 122         bfd_arch_m32c case.
 123
 124         2005-02-16  Dave Brolley  <brolley@redhat.com>
 125
 126         * cgen-dis.in: Rename CGEN_ISA_MASK to CGEN_BITSET. Rename
 127         cgen_isa_mask_* to cgen_bitset_*.
 128         * cgen-opc.c: Likewise.
 129
 130         2003-11-28  Richard Sandiford  <rsandifo@redhat.com>
 131
 132         * cgen-dis.in (print_insn_@arch@): Fix comparison with cached isas.
 133         * *-dis.c: Regenerate.
 134
 135         2003-06-05  DJ Delorie  <dj@redhat.com>
 136
 137         * cgen-dis.in (print_insn_@arch@): Copy prev_isas, don't assign
 138         it, as it may point to a reused buffer. Set prev_isas when we
 139         change cpus.
 140
 141         2002-12-13  Dave Brolley  <brolley@redhat.com>
 142
 143         * cgen-opc.c (cgen_isa_mask_create): New support function for
 144         CGEN_ISA_MASK.
 145         (cgen_isa_mask_init): Ditto.
 146         (cgen_isa_mask_clear): Ditto.
 147         (cgen_isa_mask_add): Ditto.
 148         (cgen_isa_mask_set): Ditto.
 149         (cgen_isa_supported): Ditto.
 150         (cgen_isa_mask_compare): Ditto.
 151         (cgen_isa_mask_intersection): Ditto.
 152         (cgen_isa_mask_copy): Ditto.
 153         (cgen_isa_mask_combine): Ditto.
 154         * cgen-dis.in (libiberty.h): #include it.
 155         (isas): Renamed from 'isa' and now (CGEN_ISA_MASK *).
 156         (print_insn_@arch@): Use CGEN_ISA_MASK and support functions.
 157         * Makefile.am (CGENDEPS): Add utils-cgen.scm and attrs.scm.
 158         * Makefile.in: Regenerated.
 159
 160 2005-10-27  DJ Delorie  <dj@redhat.com>
 161
 162         * m32c-asm.c: Regenerate.
 163         * m32c-desc.c: Regenerate.
 164         * m32c-desc.h: Regenerate.
 165         * m32c-dis.c: Regenerate.
 166         * m32c-ibld.c: Regenerate.
 167         * m32c-opc.c: Regenerate.
 168         * m32c-opc.h: Regenerate.
 169
 170 2005-10-26  DJ Delorie  <dj@redhat.com>
 171
 172         * m32c-asm.c: Regenerate.
 173         * m32c-desc.c: Regenerate.
 174         * m32c-desc.h: Regenerate.
 175         * m32c-dis.c: Regenerate.
 176         * m32c-ibld.c: Regenerate.
 177         * m32c-opc.c: Regenerate.
 178         * m32c-opc.h: Regenerate.
 179
 180 2005-10-26  Paul Brook  <paul@codesourcery.com>
 181
 182         * arm-dis.c (arm_opcodes): Correct "sel" entry.
 183
 184 2005-10-26  Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
 185
 186         * m32r-asm.c: Regenerate.
 187
 188 2005-10-25  DJ Delorie  <dj@redhat.com>
 189
 190         * m32c-asm.c: Regenerate.
 191         * m32c-desc.c: Regenerate.
 192         * m32c-desc.h: Regenerate.
 193         * m32c-dis.c: Regenerate.
 194         * m32c-ibld.c: Regenerate.
 195         * m32c-opc.c: Regenerate.
 196         * m32c-opc.h: Regenerate.
 197
 198 2005-10-25  Arnold Metselaar  <arnold.metselaar@planet.nl>
 199
 200         * configure.in: Add target architecture bfd_arch_z80.
 201         * configure: Regenerated.
 202         * disassemble.c (disassembler)<ARCH_z80>: Add case
 203         bfd_arch_z80.
 204         * z80-dis.c: New file.
 205
 206 2005-10-25  Alan Modra  <amodra@bigpond.net.au>
 207
 208         * po/POTFILES.in: Regenerate.
 209         * po/opcodes.pot: Regenerate.
 210
 211 2005-10-24  Jan Beulich  <jbeulich@novell.com>
 212
 213         * ia64-asmtab.c: Regenerate.
 214
 215 2005-10-21  DJ Delorie  <dj@redhat.com>
 216
 217         * m32c-asm.c: Regenerate.
 218         * m32c-desc.c: Regenerate.
 219         * m32c-desc.h: Regenerate.
 220         * m32c-dis.c: Regenerate.
 221         * m32c-ibld.c: Regenerate.
 222         * m32c-opc.c: Regenerate.
 223         * m32c-opc.h: Regenerate.
 224
 225 2005-10-21  Nick Clifton  <nickc@redhat.com>
 226
 227         * bfin-dis.c: Tidy up code, removing redundant constructs.
 228
 229 2005-10-19  Martin Schwidefsky  <schwidefsky@de.ibm.com>
 230
 231         * s390-opc.txt: Add unnormalized hfp multiply and multiply-and-add
 232         instructions.
 233
 234 2005-10-18  Nick Clifton  <nickc@redhat.com>
 235
 236         * m32r-asm.c: Regenerate after updating m32r.opc.
 237
 238 2005-10-18  Jie Zhang  <jie.zhang@analog.com>
 239
 240         * bfin-dis.c (print_insn_bfin): Do proper endian transform when
 241         reading instruction from memory.
 242
 243 2005-10-18  Nick Clifton  <nickc@redhat.com>
 244
 245         * m32r-asm.c: Regenerate after updating m32r.opc.
 246
 247 2005-10-14  Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
 248
 249         * m32r-asm.c: Regenerate after updating m32r.opc.
 250
 251 2005-10-08  James Lemke  <jim@wasabisystems.com>
 252
 253         * arm-dis.c (coprocessor_opcodes): Fix mask for various Maverick CDP
 254         operations.
 255
 256 2005-10-06  Daniel Jacobowitz  <dan@codesourcery.com>
 257
 258         * ppc-dis.c (struct dis_private): Remove.
 259         (powerpc_dialect): Avoid aliasing warnings.
 260         (print_insn_big_powerpc, print_insn_little_powerpc): Likewise.
 261
 262 2005-09-30  Nick Clifton  <nickc@redhat.com>
 263
 264         * po/ga.po: New Irish translation.
 265         * configure.in (ALL_LINGUAS): Add "ga".
 266         * configure: Regenerate.
 267
 268 2005-09-30  H.J. Lu  <hongjiu.lu@intel.com>
 269
 270         * Makefile.am: Run "make dep-am".
 271         * Makefile.in: Regenerated.
 272         * aclocal.m4: Likewise.
 273         * configure: Likewise.
 274
 275 2005-09-30  Catherine Moore  <clm@cm00re.com>
 276
 277         * Makefile.am: Bfin support.
 278         * Makefile.in: Regenerated.
 279         * aclocal.m4: Regenerated.
 280         * bfin-dis.c: New file.
 281         * configure.in: Bfin support.
 282         * configure: Regenerated.
 283         * disassemble.c (ARCH_bfin): Define.
 284         (disassembler): Add case for bfd_arch_bfin.
 285
 286 2005-09-28  Jan Beulich  <jbeulich@novell.com>
 287
 288         * i386-dis.c (stack_v_mode): Renamed from branch_v_mode.
 289         (indirEv): Use it.
 290         (stackEv): New.
 291         (Ob64, Ov64): Rename to Ob, Ov. Delete unused original definitions.
 292         (dis386): Document and use new 'V' meta character. Use it for
 293         single-byte push/pop opcode forms. Use stackEv for mod-r/m push/pop
 294         opcode forms. Correct typo in 'pop ss'. Replace Ob64/Ov64 by Ob/Ov.
 295         (putop): 'q' suffix for 'T' and 'U' meta depends on DFLAG. Mark
 296         data prefix as used whenever DFLAG was examined. Handle 'V'.
 297         (intel_operand_size): Use stack_v_mode.
 298         (OP_E): Use stack_v_mode, but handle only the special case of
 299         64-bit mode without operand size override here; fall through to
 300         v_mode case otherwise.
 301         (OP_REG): Special case rAX_reg ... rDI_reg only when 64-bit mode
 302         and no operand size override is present.
 303         (OP_J): Use get32s for obtaining the displacement also when rex64
 304         is present.
 305
 306 2005-09-08  Paul Brook  <paul@codesourcery.com>
 307
 308         * arm-dis.c (arm_opcodes, thumb32_opcodes): Rename smi to smc.
 309
 310 2005-09-06  Chao-ying Fu  <fu@mips.com>
 311
 312         * mips-opc.c (MT32): New define.
 313         (mips_builtin_opcodes): Move "bc0f", "bc0fl", "bc0t", "bc0tl" to the
 314         bottom to avoid opcode collision with "mftr" and "mttr".
 315         Add MT instructions.
 316         * mips-dis.c (mips_arch_choices): Enable INSN_MT for mips32r2.
 317         (print_insn_args): Add supports for +t, +T, !, $, *, &, g operand
 318         formats.
 319
 320 2005-09-02  Paul Brook  <paul@codesourcery.com>
 321
 322         * arm-dis.c (coprocessor_opcodes): Add null terminator.
 323
 324 2005-09-02  Paul Brook  <paul@codesourcery.com>
 325
 326         * arm-dis.c (coprocessor_opcodes): New.
 327         (arm_opcodes, thumb32_opcodes): Remove coprocessor insns.
 328         (print_insn_coprocessor): New function.
 329         (print_insn_arm): Use print_insn_coprocessor.  Remove coprocessor
 330         format characters.
 331         (print_insn_thumb32): Use print_insn_coprocessor.
 332
 333 2005-08-30  Paul Brook  <paul@codesourcery.com>
 334
 335         * arm-dis.c (thumb_opcodes): Disassemble sub(3) as subs.
 336
 337 2005-08-26  Jan Beulich  <jbeulich@novell.com>
 338
 339         * i386-dis.c (intel_operand_size): New, broken out from OP_E for
 340         re-use.
 341         (OP_E): Call intel_operand_size, move call site out of mode
 342         dependent code.
 343         (OP_OFF): Call intel_operand_size if suffix_always. Remove
 344         ATTRIBUTE_UNUSED from parameters.
 345         (OP_OFF64): Likewise.
 346         (OP_ESreg): Call intel_operand_size.
 347         (OP_DSreg): Likewise.
 348         (OP_DIR): Use colon rather than semicolon as separator of far
 349         jump/call operands.
 350
 351 2005-08-25  Chao-ying Fu  <fu@mips.com>
 352
 353         * mips-opc.c (WR_a, RD_a, MOD_a, DSP_VOLA, D32): New define.
 354         (mips_builtin_opcodes): Add DSP instructions.
 355         * mips-dis.c (mips_arch_choices): Enable INSN_DSP for mips32, mips32r2,
 356         mips64, mips64r2.
 357         (print_insn_args): Add supports for 3, 4, 5, 6, 7, 8, 9, 0, :, ', @
 358         operand formats.
 359
 360 2005-08-23  David Ung  <davidu@mips.com>
 361
 362         * mips16-opc.c (mips16_opcodes): Add the MIPS16e jalrc/jrc
 363         instructions to the table.
 364
 365 2005-08-18  Alan Modra  <amodra@bigpond.net.au>
 366
 367         * a29k-dis.c: Delete.
 368         * Makefile.am: Remove a29k support.
 369         * configure.in: Likewise.
 370         * disassemble.c: Likewise.
 371         * Makefile.in: Regenerate.
 372         * configure: Regenerate.
 373         * po/POTFILES.in: Regenerate.
 374
 375 2005-08-15  Daniel Jacobowitz  <dan@codesourcery.com>
 376
 377         * ppc-dis.c (powerpc_dialect): Handle e300.
 378         (print_ppc_disassembler_options): Likewise.
 379         * ppc-opc.c (PPCE300): Define.
 380         (powerpc_opcodes): Mark icbt as available for the e300.
 381
 382 2005-08-13  John David Anglin  <dave.anglin@nrc-cnrc.gc.ca>
 383
 384         * hppa-dis.c (print_insn_hppa): Don't print '%' before register names.
 385         Use "rp" instead of "%r2" in "b,l" insns.
 386
 387 2005-08-12 Martin Schwidefsky  <schwidefsky@de.ibm.com>
 388
 389         * s390-dis.c (print_insn_s390): Print unsigned operands with %u.
 390         * s390-mkopc.c (s390_opcode_cpu_val): Add support for cpu type z9-109.
 391         (main): Likewise.
 392         * s390-opc.c (I32_16, U32_16, M_16): Add defines 32 bit immediates
 393         and 4 bit optional masks.
 394         (INSTR_RIL_RI, INSTR_RIL_RU, INSTR_RRF_M0RR, INSTR_RSE_CCRD,
 395         INSTR_RSY_CCRD, INSTR_SSF_RRDRD): Add new instruction formats.
 396         (MASK_RIL_RI, MASK_RIL_RU, MASK_RRF_M0RR, MASK_RSE_CCRD,
 397         MASK_RSY_CCRD, MASK_SSF_RRDRD): Likewise.
 398         (s390_opformats): Likewise.
 399         * s390-opc.txt: Add new instructions for cpu type z9-109.
 400
 401 2005-08-05  John David Anglin  <dave.anglin@nrc-crnc.gc.ca>
 402
 403         * hppa-dis.c (print_insn_hppa): Prefix 21-bit values with "L%".
 404
 405 2005-07-29  Paul Brook  <paul@codesourcery.com>
 406
 407         * arm-dis.c: Fix disassebly of thumb2 writeback addressing modes.
 408
 409 2005-07-29  Paul Brook  <paul@codesourcery.com>
 410
 411         * arm-dis.c (thumb32_opc): Fix addressing mode for tbh.
 412         (print_insn_thumb32): Fix decoding of thumb2 'I' operands.
 413
 414 2005-07-25  DJ Delorie  <dj@redhat.com>
 415
 416         * m32c-asm.c Regenerate.
 417         * m32c-dis.c Regenerate.
 418
 419 2005-07-20  DJ Delorie  <dj@redhat.com>
 420
 421         * disassemble.c (disassemble_init_for_target): M32C ISAs are
 422         enums, so convert them to bit masks, which attributes are.
 423
 424 2005-07-18  Nick Clifton  <nickc@redhat.com>
 425
 426         * configure.in: Restore alpha ordering to list of arches.
 427         * configure: Regenerate.
 428         * disassemble.c: Restore alpha ordering to list of arches.
 429
 430 2005-07-18  Nick Clifton  <nickc@redhat.com>
 431
 432         * m32c-asm.c: Regenerate.
 433         * m32c-desc.c: Regenerate.
 434         * m32c-desc.h: Regenerate.
 435         * m32c-dis.c: Regenerate.
 436         * m32c-ibld.h: Regenerate.
 437         * m32c-opc.c: Regenerate.
 438         * m32c-opc.h: Regenerate.
 439
 440 2005-07-18  H.J. Lu  <hongjiu.lu@intel.com>
 441
 442         * i386-dis.c (PNI_Fixup): Update comment.
 443         (VMX_Fixup): Properly handle the suffix check.
 444
 445 2005-07-16  John David Anglin  <dave.anglin@nrc-cnrc.gc.ca>
 446
 447         * hppa-dis.c (print_insn_hppa): Add space after 'w' in wide-mode
 448         mfctl disassembly.
 449
 450 2005-07-16  Alan Modra  <amodra@bigpond.net.au>
 451
 452         * Makefile.am: Run "make dep-am".
 453         (stamp-m32c): Fix cpu dependencies.
 454         * Makefile.in: Regenerate.
 455         * ip2k-dis.c: Regenerate.
 456
 457 2007-07-15  H.J. Lu <hongjiu.lu@intel.com>
 458
 459         * i386-dis.c (OP_VMX): New. Handle Intel VMX Instructions.
 460         (VMX_Fixup): New. Fix up Intel VMX Instructions.
 461         (Em): New.
 462         (Gm): New.
 463         (VM): New.
 464         (dis386_twobyte): Updated entries 0x78 and 0x79.
 465         (twobyte_has_modrm): Likewise.
 466         (grps): Use OP_VMX in the "sgdtIQ" entry. Updated GRP9.
 467         (OP_G): Handle m_mode.
 468
 469 2005-07-14  Jim Blandy  <jimb@redhat.com>
 470
 471         Add support for the Renesas M32C and M16C.
 472         * m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c: New.
 473         * m32c-desc.h, m32c-opc.h: New.
 474         * Makefile.am (HFILES): List m32c-desc.h and m32c-opc.h.
 475         (CFILES): List m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c,
 476         m32c-opc.c.
 477         (ALL_MACHINES): List m32c-asm.lo, m32c-desc.lo, m32c-dis.lo,
 478         m32c-ibld.lo, m32c-opc.lo.
 479         (CLEANFILES): List stamp-m32c.
 480         (M32C_DEPS): List stamp-m32c, if CGEN_MAINT.
 481         (CGEN_CPUS): Add m32c.
 482         (m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c)
 483         (m32c-desc.h, m32c-opc.h): Depend on M32C_DEPS.
 484         (m32c_opc_h): New variable.
 485         (stamp-m32c, m32c-asm.lo, m32c-desc.lo, m32c-dis.lo, m32c-ibld.lo)
 486         (m32c-opc.lo): New rules.
 487         * Makefile.in: Regenerated.
 488         * configure.in: Add case for bfd_m32c_arch.
 489         * configure: Regenerated.
 490         * disassemble.c (ARCH_m32c): New.
 491         [ARCH_m32c]: #include "m32c-desc.h".
 492         (disassembler) [ARCH_m32c]: Add case for bfd_arch_m32c.
 493         (disassemble_init_for_target) [ARCH_m32c]: Same.
 494
 495         * cgen-ops.h, cgen-types.h: New files.
 496         * Makefile.am (HFILES): List them.
 497         * Makefile.in: Regenerated.
 498
 499 2005-07-07  Kaveh R. Ghazi  <ghazi@caip.rutgers.edu>
 500
 501         * arc-dis.c, arm-dis.c, cris-dis.c, crx-dis.c, d10v-dis.c,
 502         d30v-dis.c, fr30-dis.c, h8300-dis.c, h8500-dis.c, i860-dis.c,
 503         ia64-dis.c, ip2k-dis.c, m10200-dis.c, m10300-dis.c,
 504         m88k-dis.c, mcore-dis.c, mips-dis.c, ms1-dis.c, or32-dis.c,
 505         ppc-dis.c, sh64-dis.c, sparc-dis.c, tic4x-dis.c, tic80-dis.c,
 506         v850-dis.c: Fix format bugs.
 507         * ia64-gen.c (fail, warn): Add format attribute.
 508         * or32-opc.c (debug): Likewise.
 509
 510 2005-07-07  Khem Raj  <kraj@mvista.com>
 511
 512         * arm-dis.c (opcode32 arm_opcodes): Fix ARM VFP fadds instruction
 513         disassembly pattern.
 514
 515 2005-07-06  Alan Modra  <amodra@bigpond.net.au>
 516
 517         * Makefile.am (stamp-m32r): Fix path to cpu files.
 518         (stamp-m32r, stamp-iq2000): Likewise.
 519         * Makefile.in: Regenerate.
 520         * m32r-asm.c: Regenerate.
 521         * po/POTFILES.in: Remove arm-opc.h.  Add ms1-asm.c, ms1-desc.c,
 522         ms1-desc.h, ms1-dis.c, ms1-ibld.c, ms1-opc.c, ms1-opc.h.
 523
 524 2005-07-05  Nick Clifton  <nickc@redhat.com>
 525
 526         * iq2000-asm.c: Regenerate.
 527         * ms1-asm.c: Regenerate.
 528
 529 2005-07-05  Jan Beulich  <jbeulich@novell.com>
 530
 531         * i386-dis.c (SVME_Fixup): New.
 532         (grps): Use it for the lidt entry.
 533         (PNI_Fixup): Call OP_M rather than OP_E.
 534         (INVLPG_Fixup): Likewise.
 535
 536 2005-07-04  H.J. Lu  <hongjiu.lu@intel.com>
 537
 538         * tic30-dis.c (cnvt_tmsfloat_ieee): Use HUGE_VALF if defined.
 539
 540 2005-07-01  Nick Clifton  <nickc@redhat.com>
 541
 542         * a29k-dis.c: Update to ISO C90 style function declarations and
 543         fix formatting.
 544         * alpha-opc.c: Likewise.
 545         * arc-dis.c: Likewise.
 546         * arc-opc.c: Likewise.
 547         * avr-dis.c: Likewise.
 548         * cgen-asm.in: Likewise.
 549         * cgen-dis.in: Likewise.
 550         * cgen-ibld.in: Likewise.
 551         * cgen-opc.c: Likewise.
 552         * cris-dis.c: Likewise.
 553         * d10v-dis.c: Likewise.
 554         * d30v-dis.c: Likewise.
 555         * d30v-opc.c: Likewise.
 556         * dis-buf.c: Likewise.
 557         * dlx-dis.c: Likewise.
 558         * h8300-dis.c: Likewise.
 559         * h8500-dis.c: Likewise.
 560         * hppa-dis.c: Likewise.
 561         * i370-dis.c: Likewise.
 562         * i370-opc.c: Likewise.
 563         * m10200-dis.c: Likewise.
 564         * m10300-dis.c: Likewise.
 565         * m68k-dis.c: Likewise.
 566         * m88k-dis.c: Likewise.
 567         * mips-dis.c: Likewise.
 568         * mmix-dis.c: Likewise.
 569         * msp430-dis.c: Likewise.
 570         * ns32k-dis.c: Likewise.
 571         * or32-dis.c: Likewise.
 572         * or32-opc.c: Likewise.
 573         * pdp11-dis.c: Likewise.
 574         * pj-dis.c: Likewise.
 575         * s390-dis.c: Likewise.
 576         * sh-dis.c: Likewise.
 577         * sh64-dis.c: Likewise.
 578         * sparc-dis.c: Likewise.
 579         * sparc-opc.c: Likewise.
 580         * sysdep.h: Likewise.
 581         * tic30-dis.c: Likewise.
 582         * tic4x-dis.c: Likewise.
 583         * tic80-dis.c: Likewise.
 584         * v850-dis.c: Likewise.
 585         * v850-opc.c: Likewise.
 586         * vax-dis.c: Likewise.
 587         * w65-dis.c: Likewise.
 588         * z8kgen.c: Likewise.
 589
 590         * fr30-*: Regenerate.
 591         * frv-*: Regenerate.
 592         * ip2k-*: Regenerate.
 593         * iq2000-*: Regenerate.
 594         * m32r-*: Regenerate.
 595         * ms1-*: Regenerate.
 596         * openrisc-*: Regenerate.
 597         * xstormy16-*: Regenerate.
 598
 599 2005-06-23  Ben Elliston  <bje@gnu.org>
 600
 601         * m68k-dis.c: Use ISC C90.
 602         * m68k-opc.c: Formatting fixes.
 603
 604 2005-06-16  David Ung  <davidu@mips.com>
 605
 606         * mips16-opc.c (mips16_opcodes): Add the following MIPS16e
 607         instructions to the table; seb/seh/sew/zeb/zeh/zew.
 608
 609 2005-06-15  Dave Brolley  <brolley@redhat.com>
 610
 611         Contribute Morpho ms1 on behalf of Red Hat
 612         * ms1-asm.c, ms1-desc.c, ms1-dis.c, ms1-ibld.c, ms1-opc.c,
 613         ms1-opc.h: New files, Morpho ms1 target.
 614
 615         2004-05-14  Stan Cox  <scox@redhat.com>
 616
 617         * disassemble.c (ARCH_ms1): Define.
 618         (disassembler): Handle bfd_arch_ms1
 619
 620         2004-05-13  Michael Snyder  <msnyder@redhat.com>
 621
 622         * Makefile.am, Makefile.in: Add ms1 target.
 623         * configure.in: Ditto.
 624
 625 2005-06-08  Zack Weinberg  <zack@codesourcery.com>
 626
 627         * arm-opc.h: Delete; fold contents into ...
 628         * arm-dis.c: ... here.  Move includes of internal COFF headers
 629         next to includes of internal ELF headers.
 630         (streq, WORD_ADDRESS, BDISP, BDISP23): Delete, unused.
 631         (struct arm_opcode): Rename struct opcode32.  Make 'assembler' const.
 632         (struct thumb_opcode): Rename struct opcode16.  Make 'assembler' const.
 633         (arm_conditional, arm_fp_const, arm_shift, arm_regname, regnames)
 634         (iwmmxt_wwnames, iwmmxt_wwssnames):
 635         Make const.
 636         (regnames): Remove iWMMXt coprocessor register sets.
 637         (iwmmxt_regnames, iwmmxt_cregnames): New statics.
 638         (get_arm_regnames): Adjust fourth argument to match above changes.
 639         (set_iwmmxt_regnames): Delete.
 640         (print_insn_arm): Constify 'c'.  Use ISO syntax for function
 641         pointer calls.  Expand sole use of BDISP.  Use iwmmxt_regnames
 642         and iwmmxt_cregnames, not set_iwmmxt_regnames.
 643         (print_insn_thumb16, print_insn_thumb32): Constify 'c'.  Use
 644         ISO syntax for function pointer calls.
 645
 646 2005-06-07  Zack Weinberg  <zack@codesourcery.com>
 647
 648         * arm-dis.c: Split up the comments describing the format codes, so
 649         that the ARM and 16-bit Thumb opcode tables each have comments
 650         preceding them that describe all the codes, and only the codes,
 651         valid in those tables.  (32-bit Thumb table is already like this.)
 652         Reorder the lists in all three comments to match the order in
 653         which the codes are implemented.
 654         Remove all forward declarations of static functions.  Convert all
 655         function definitions to ISO C format.
 656         (print_insn_arm, print_insn_thumb16, print_insn_thumb32):
 657         Return nothing.
 658         (print_insn_thumb16): Remove unused case 'I'.
 659         (print_insn): Update for changed calling convention of subroutines.
 660
 661 2005-05-25  Jan Beulich  <jbeulich@novell.com>
 662
 663         * i386-dis.c (OP_E): In Intel mode, display 32-bit displacements in
 664         hex (but retain it being displayed as signed). Remove redundant
 665         checks. Add handling of displacements for 16-bit addressing in Intel
 666         mode.
 667
 668 2005-05-25  Jan Beulich  <jbeulich@novell.com>
 669
 670         * i386-dis.c (prefix_name): Remove pointless mode_64bit check.
 671         (OP_E): Remove redundant REX_EXTZ handling. Remove pointless
 672         masking of 'rm' in 16-bit memory address handling.
 673
 674 2005-05-19  Anton Blanchard  <anton@samba.org>
 675
 676         * ppc-dis.c (powerpc_dialect): Handle "-Mpower5".
 677         (print_ppc_disassembler_options): Document it.
 678         * ppc-opc.c (SVC_LEV): Define.
 679         (LEV): Allow optional operand.
 680         (POWER5): Define.
 681         (powerpc_opcodes): Extend "sc".  Adjust "svc" and "svcl".  Add
 682         "hrfid", "popcntb", "fsqrtes", "fsqrtes.", "fre" and "fre.".
 683
 684 2005-05-19  Kelley Cook  <kcook@gcc.gnu.org>
 685
 686         * Makefile.in:  Regenerate.
 687
 688 2005-05-17  Zack Weinberg  <zack@codesourcery.com>
 689
 690         * arm-dis.c (thumb_opcodes): Add disassembly for V6T2 16-bit
 691         instructions.  Adjust disassembly of some opcodes to match
 692         unified syntax.
 693         (thumb32_opcodes): New table.
 694         (print_insn_thumb): Rename print_insn_thumb16; don't handle
 695         two-halfword branches here.
 696         (print_insn_thumb32): New function.
 697         (print_insn): Choose among print_insn_arm, print_insn_thumb16,
 698         and print_insn_thumb32.  Be consistent about order of
 699         halfwords when printing 32-bit instructions.
 700
 701 2005-05-07  H.J. Lu  <hongjiu.lu@intel.com>
 702
 703         PR 843
 704         * i386-dis.c (branch_v_mode): New.
 705         (indirEv): Use branch_v_mode instead of v_mode.
 706         (OP_E): Handle branch_v_mode.
 707
 708 2005-05-07  H.J. Lu  <hongjiu.lu@intel.com>
 709
 710         * d10v-dis.c (dis_2_short): Support 64bit host.
 711
 712 2005-05-07  Nick Clifton  <nickc@redhat.com>
 713
 714         * po/nl.po: Updated translation.
 715
 716 2005-05-07  Nick Clifton  <nickc@redhat.com>
 717
 718         * Update the address and phone number of the FSF organization in
 719         the GPL notices in the following files:
 720         a29k-dis.c, aclocal.m4, alpha-dis.c, alpha-opc.c, arc-dis.c,
 721         arc-dis.h, arc-ext.c, arc-ext.h, arc-opc.c, arm-dis.c, arm-opc.h,
 722         avr-dis.c, cgen-asm.c, cgen-asm.in, cgen-dis.c, cgen-dis.in,
 723         cgen-ibld.in, cgen-opc.c, cgen.sh, cris-dis.c, cris-opc.c,
 724         crx-dis.c, crx-opc.c, d10v-dis.c, d10v-opc.c, d30v-dis.c,
 725         d30v-opc.c, dis-buf.c, dis-init.c, disassemble.c, dlx-dis.c,
 726         fr30-asm.c, fr30-desc.c, fr30-desc.h, fr30-dis.c, fr30-ibld.c,
 727         fr30-opc.c, fr30-opc.h, frv-asm.c, frv-desc.c, frv-desc.h,
 728         frv-dis.c, frv-ibld.c, frv-opc.c, frv-opc.h, h8300-dis.c,
 729         h8500-dis.c, h8500-opc.h, hppa-dis.c, i370-dis.c, i370-opc.c,
 730         i386-dis.c, i860-dis.c, i960-dis.c, ia64-asmtab.h, ia64-dis.c,
 731         ia64-gen.c, ia64-opc-a.c, ia64-opc-b.c, ia64-opc-d.c,
 732         ia64-opc-f.c, ia64-opc-i.c, ia64-opc-m.c, ia64-opc-x.c,
 733         ia64-opc.c, ia64-opc.h, ip2k-asm.c, ip2k-desc.c, ip2k-desc.h,
 734         ip2k-dis.c, ip2k-ibld.c, ip2k-opc.c, ip2k-opc.h, iq2000-asm.c,
 735         iq2000-desc.c, iq2000-desc.h, iq2000-dis.c, iq2000-ibld.c,
 736         iq2000-opc.c, iq2000-opc.h, m10200-dis.c, m10200-opc.c,
 737         m10300-dis.c, m10300-opc.c, m32r-asm.c, m32r-desc.c, m32r-desc.h,
 738         m32r-dis.c, m32r-ibld.c, m32r-opc.c, m32r-opc.h, m32r-opinst.c,
 739         m68hc11-dis.c, m68hc11-opc.c, m68k-dis.c, m68k-opc.c, m88k-dis.c,
 740         maxq-dis.c, mcore-dis.c, mcore-opc.h, mips-dis.c, mips-opc.c,
 741         mips16-opc.c, mmix-dis.c, mmix-opc.c, msp430-dis.c, ns32k-dis.c,
 742         openrisc-asm.c, openrisc-desc.c, openrisc-desc.h, openrisc-dis.c,
 743         openrisc-ibld.c, openrisc-opc.c, openrisc-opc.h, opintl.h,
 744         or32-dis.c, or32-opc.c, pdp11-dis.c, pdp11-opc.c, pj-dis.c,
 745         pj-opc.c, ppc-dis.c, ppc-opc.c, s390-dis.c, s390-mkopc.c,
 746         s390-opc.c, sh-dis.c, sh-opc.h, sh64-dis.c, sh64-opc.c,
 747         sh64-opc.h, sparc-dis.c, sparc-opc.c, sysdep.h, tic30-dis.c,
 748         tic4x-dis.c, tic54x-dis.c, tic54x-opc.c, tic80-dis.c, tic80-opc.c,
 749         v850-dis.c, v850-opc.c, vax-dis.c, w65-dis.c, w65-opc.h,
 750         xstormy16-asm.c, xstormy16-desc.c, xstormy16-desc.h,
 751         xstormy16-dis.c, xstormy16-ibld.c, xstormy16-opc.c,
 752         xstormy16-opc.h, xtensa-dis.c, z8k-dis.c, z8kgen.c
 753
 754 2005-05-05  James E Wilson  <wilson@specifixinc.com>
 755
 756         * ia64-opc.c: Include sysdep.h before libiberty.h.
 757
 758 2005-05-05  Nick Clifton  <nickc@redhat.com>
 759
 760         * configure.in (ALL_LINGUAS): Add vi.
 761         * configure: Regenerate.
 762         * po/vi.po: New.
 763
 764 2005-04-26  Jerome Guitton  <guitton@gnat.com>
 765
 766         * configure.in: Fix the check for basename declaration.
 767         * configure: Regenerate.
 768
 769 2005-04-19  Alan Modra  <amodra@bigpond.net.au>
 770
 771         * ppc-opc.c (RTO): Define.
 772         (powerpc_opcodes <tlbsx, tlbsx., tlbre>): Combine PPC403 and BOOKE
 773         entries to suit PPC440.
 774
 775 2005-04-18  Mark Kettenis  <kettenis@gnu.org>
 776
 777         * i386-dis.c: Insert hyphens into selected VIA PadLock extensions.
 778         Add xcrypt-ctr.
 779
 780 2005-04-14  Nick Clifton  <nickc@redhat.com>
 781
 782         * po/fi.po: New translation: Finnish.
 783         * configure.in (ALL_LINGUAS): Add fi.
 784         * configure: Regenerate.
 785
 786 2005-04-14  Alan Modra  <amodra@bigpond.net.au>
 787
 788         * Makefile.am (NO_WERROR): Define.
 789         * configure.in: Invoke AM_BINUTILS_WARNINGS.
 790         * Makefile.in: Regenerate.
 791         * aclocal.m4: Regenerate.
 792         * configure: Regenerate.
 793
 794 2005-04-04  Nick Clifton  <nickc@redhat.com>
 795
 796         * fr30-asm.c: Regenerate.
 797         * frv-asm.c: Regenerate.
 798         * iq2000-asm.c: Regenerate.
 799         * m32r-asm.c: Regenerate.
 800         * openrisc-asm.c: Regenerate.
 801
 802 2005-04-01  Jan Beulich  <jbeulich@novell.com>
 803
 804         * i386-dis.c (PNI_Fixup): Neither mwait nor monitor have any
 805         visible operands in Intel mode. The first operand of monitor is
 806         %rax in 64-bit mode.
 807
 808 2005-04-01  Jan Beulich  <jbeulich@novell.com>
 809
 810         * i386-dis.c (INVLPG_Fixup): Decode rdtscp; change code to allow for
 811         easier future additions.
 812
 813 2005-03-31  Jerome Guitton  <guitton@gnat.com>
 814
 815         * configure.in: Check for basename.
 816         * configure: Regenerate.
 817         * config.in: Ditto.
 818
 819 2005-03-29  H.J. Lu  <hongjiu.lu@intel.com>
 820
 821         * i386-dis.c (SEG_Fixup): New.
 822         (Sv): New.
 823         (dis386): Use "Sv" for 0x8c and 0x8e.
 824
 825 2005-03-21  Jan-Benedict Glaw  <jbglaw@lug-owl.de>
 826             Nick Clifton  <nickc@redhat.com>
 827
 828         * vax-dis.c: (entry_addr): New varible:  An array of user supplied
 829         function entry mask addresses.
 830         (entry_addr_occupied_slots): New variable: The number of occupied
 831         elements in entry_addr.
 832         (entry_addr_total_slots): New variable: The total number of
 833         elements in entry_addr.
 834         (parse_disassembler_options): New function.  Fills in the entry_addr
 835         array.
 836         (free_entry_array): New function.  Release the memory used by the
 837         entry addr array.  Suppressed because there is no way to call it.
 838         (is_function_entry): Check if a given address is a function's
 839         start address by looking at supplied entry mask addresses and
 840         symbol information, if available.
 841         (print_insn_vax): Use parse_disassembler_options and is_function_entry.
 842
 843 2005-03-23  H.J. Lu  <hongjiu.lu@intel.com>
 844
 845         * cris-dis.c (print_with_operands): Use ~31L for long instead
 846         of ~31.
 847
 848 2005-03-20  H.J. Lu  <hongjiu.lu@intel.com>
 849
 850         * mmix-opc.c (O): Revert the last change.
 851         (Z): Likewise.
 852
 853 2005-03-19  H.J. Lu  <hongjiu.lu@intel.com>
 854
 855         * mmix-opc.c (O): Use 24UL instead of 24 for unsigned long.
 856         (Z): Likewise.
 857
 858 2005-03-19  Hans-Peter Nilsson  <hp@bitrange.com>
 859
 860         * mmix-opc.c (O, Z): Force expression as unsigned long.
 861
 862 2005-03-18  Nick Clifton  <nickc@redhat.com>
 863
 864         * ip2k-asm.c: Regenerate.
 865         * op/opcodes.pot: Regenerate.
 866
 867 2005-03-16  Nick Clifton  <nickc@redhat.com>
 868             Ben Elliston  <bje@au.ibm.com>
 869
 870         * configure.in (werror): New switch: Add -Werror to the
 871         compiler command line.  Enabled by default.  Disable via
 872         --disable-werror.
 873         * configure: Regenerate.
 874
 875 2005-03-16  Alan Modra  <amodra@bigpond.net.au>
 876
 877         * ppc-dis.c (powerpc_dialect): Don't set PPC_OPCODE_ALTIVEC when
 878         BOOKE.
 879
 880 2005-03-15  Alan Modra  <amodra@bigpond.net.au>
 881
 882         * po/es.po: Commit new Spanish translation.
 883
 884         * po/fr.po: Commit new French translation.
 885
 886 2005-03-14  Jan-Benedict Glaw  <jbglaw@lug-owl.de>
 887
 888         * vax-dis.c: Fix spelling error
 889         (print_insn_vax): Use ".word 0x0012 # Entry mask: r1 r2 >" instead
 890         of just "Entry mask: < r1 ... >"
 891
 892 2005-03-12  Zack Weinberg  <zack@codesourcery.com>
 893
 894         * arm-dis.c (arm_opcodes): Document %E and %V.
 895         Add entries for v6T2 ARM instructions:
 896         bfc bfi mls strht ldrht ldrsht ldrsbt movw movt rbit ubfx sbfx.
 897         (print_insn_arm): Add support for %E and %V.
 898         (thumb_opcodes): Add ARMv6K instructions nop, sev, wfe, wfi, yield.
 899
 900 2005-03-10  Jeff Baker  <jbaker@qnx.com>
 901             Alan Modra  <amodra@bigpond.net.au>
 902
 903         * ppc-opc.c (insert_sprg, extract_sprg): New Functions.
 904         (powerpc_operands <SPRG>): Call the above.  Bit field is 5 bits.
 905         (SPRG_MASK): Delete.
 906         (XSPRG_MASK): Mask off extra bits now part of sprg field.
 907         (powerpc_opcodes): Asjust mfsprg and mtsprg to suit new mask.  Move
 908         mfsprg4..7 after msprg and consolidate.
 909
 910 2005-03-09  Jan-Benedict Glaw  <jbglaw@lug-owl.de>
 911
 912         * vax-dis.c (entry_mask_bit): New array.
 913         (print_insn_vax): Decode function entry mask.
 914
 915 2005-03-07  Aldy Hernandez  <aldyh@redhat.com>
 916
 917         * ppc-opc.c (powerpc_opcodes): Fix encoding of efscfd.
 918
 919 2005-03-05  Alan Modra  <amodra@bigpond.net.au>
 920
 921         * po/opcodes.pot: Regenerate.
 922
 923 2005-03-03  Ramana Radhakrishnan  <ramana.radhakrishnan@codito.com>
 924
 925         * arc-dis.c (a4_decoding_class): New enum.
 926         (dsmOneArcInst): Use the enum values for the decoding class.
 927         Remove redundant case in the switch for decodingClass value 11.
 928
 929 2005-03-02  Jan Beulich  <jbeulich@novell.com>
 930
 931         * i386-dis.c (print_insn): Suppress lock prefix printing for cr8...15
 932         accesses.
 933         (OP_C): Consider lock prefix in non-64-bit modes.
 934
 935 2005-02-24  Alan Modra  <amodra@bigpond.net.au>
 936
 937         * cris-dis.c (format_hex): Remove ineffective warning fix.
 938         * crx-dis.c (make_instruction): Warning fix.
 939         * frv-asm.c: Regenerate.
 940
 941 2005-02-23  Nick Clifton  <nickc@redhat.com>
 942
 943         * cgen-dis.in: Use bfd_byte for buffers that are passed to
 944         read_memory.
 945
 946         * ia64-opc.c (locate_opcode_ent): Initialise opval array.
 947
 948         * crx-dis.c (make_instruction): Move argument structure into inner
 949         scope and ensure that all of its fields are initialised before
 950         they are used.
 951
 952         * fr30-asm.c: Regenerate.
 953         * fr30-dis.c: Regenerate.
 954         * frv-asm.c: Regenerate.
 955         * frv-dis.c: Regenerate.
 956         * ip2k-asm.c: Regenerate.
 957         * ip2k-dis.c: Regenerate.
 958         * iq2000-asm.c: Regenerate.
 959         * iq2000-dis.c: Regenerate.
 960         * m32r-asm.c: Regenerate.
 961         * m32r-dis.c: Regenerate.
 962         * openrisc-asm.c: Regenerate.
 963         * openrisc-dis.c: Regenerate.
 964         * xstormy16-asm.c: Regenerate.
 965         * xstormy16-dis.c: Regenerate.
 966
 967 2005-02-22  Alan Modra  <amodra@bigpond.net.au>
 968
 969         * arc-ext.c: Warning fixes.
 970         * arc-ext.h: Likewise.
 971         * cgen-opc.c: Likewise.
 972         * ia64-gen.c: Likewise.
 973         * maxq-dis.c: Likewise.
 974         * ns32k-dis.c: Likewise.
 975         * w65-dis.c: Likewise.
 976         * ia64-asmtab.c: Regenerate.
 977
 978 2005-02-22  Alan Modra  <amodra@bigpond.net.au>
 979
 980         * fr30-desc.c: Regenerate.
 981         * fr30-desc.h: Regenerate.
 982         * fr30-opc.c: Regenerate.
 983         * fr30-opc.h: Regenerate.
 984         * frv-desc.c: Regenerate.
 985         * frv-desc.h: Regenerate.
 986         * frv-opc.c: Regenerate.
 987         * frv-opc.h: Regenerate.
 988         * ip2k-desc.c: Regenerate.
 989         * ip2k-desc.h: Regenerate.
 990         * ip2k-opc.c: Regenerate.
 991         * ip2k-opc.h: Regenerate.
 992         * iq2000-desc.c: Regenerate.
 993         * iq2000-desc.h: Regenerate.
 994         * iq2000-opc.c: Regenerate.
 995         * iq2000-opc.h: Regenerate.
 996         * m32r-desc.c: Regenerate.
 997         * m32r-desc.h: Regenerate.
 998         * m32r-opc.c: Regenerate.
 999         * m32r-opc.h: Regenerate.
1000         * m32r-opinst.c: Regenerate.
1001         * openrisc-desc.c: Regenerate.
1002         * openrisc-desc.h: Regenerate.
1003         * openrisc-opc.c: Regenerate.
1004         * openrisc-opc.h: Regenerate.
1005         * xstormy16-desc.c: Regenerate.
1006         * xstormy16-desc.h: Regenerate.
1007         * xstormy16-opc.c: Regenerate.
1008         * xstormy16-opc.h: Regenerate.
1009
1010 2005-02-21  Alan Modra  <amodra@bigpond.net.au>
1011
1012         * Makefile.am: Run "make dep-am"
1013         * Makefile.in: Regenerate.
1014
1015 2005-02-15  Nick Clifton  <nickc@redhat.com>
1016
1017         * cgen-dis.in (print_address): Add an ATTRIBUTE_UNUSED to prevent
1018         compile time warnings.
1019         (print_keyword): Likewise.
1020         (default_print_insn): Likewise.
1021
1022         * fr30-desc.c: Regenerated.
1023         * fr30-desc.h: Regenerated.
1024         * fr30-dis.c: Regenerated.
1025         * fr30-opc.c: Regenerated.
1026         * fr30-opc.h: Regenerated.
1027         * frv-desc.c: Regenerated.
1028         * frv-dis.c: Regenerated.
1029         * frv-opc.c: Regenerated.
1030         * ip2k-asm.c: Regenerated.
1031         * ip2k-desc.c: Regenerated.
1032         * ip2k-desc.h: Regenerated.
1033         * ip2k-dis.c: Regenerated.
1034         * ip2k-opc.c: Regenerated.
1035         * ip2k-opc.h: Regenerated.
1036         * iq2000-desc.c: Regenerated.
1037         * iq2000-dis.c: Regenerated.
1038         * iq2000-opc.c: Regenerated.
1039         * m32r-asm.c: Regenerated.
1040         * m32r-desc.c: Regenerated.
1041         * m32r-desc.h: Regenerated.
1042         * m32r-dis.c: Regenerated.
1043         * m32r-opc.c: Regenerated.
1044         * m32r-opc.h: Regenerated.
1045         * m32r-opinst.c: Regenerated.
1046         * openrisc-desc.c: Regenerated.
1047         * openrisc-desc.h: Regenerated.
1048         * openrisc-dis.c: Regenerated.
1049         * openrisc-opc.c: Regenerated.
1050         * openrisc-opc.h: Regenerated.
1051         * xstormy16-desc.c: Regenerated.
1052         * xstormy16-desc.h: Regenerated.
1053         * xstormy16-dis.c: Regenerated.
1054         * xstormy16-opc.c: Regenerated.
1055         * xstormy16-opc.h: Regenerated.
1056
1057 2005-02-14  H.J. Lu  <hongjiu.lu@intel.com>
1058
1059         * dis-buf.c (perror_memory): Use sprintf_vma to print out
1060         address.
1061
1062 2005-02-11  Nick Clifton  <nickc@redhat.com>
1063
1064         * iq2000-asm.c: Regenerate.
1065
1066         * frv-dis.c: Regenerate.
1067
1068 2005-02-07  Jim Blandy  <jimb@redhat.com>
1069
1070         * Makefile.am (CGEN): Load guile.scm before calling the main
1071         application script.
1072         * Makefile.in: Regenerated.
1073         * cgen.sh: Be prepared for the 'cgen' argument to contain spaces.
1074         Simply pass the cgen-opc.scm path to ${cgen} as its first
1075         argument; ${cgen} itself now contains the '-s', or whatever is
1076         appropriate for the Scheme being used.
1077
1078 2005-01-31  Andrew Cagney  <cagney@gnu.org>
1079
1080         * configure: Regenerate to track ../gettext.m4.
1081
1082 2005-01-31  Jan Beulich  <jbeulich@novell.com>
1083
1084         * ia64-gen.c (NELEMS): Define.
1085         (shrink): Generate alias with missing second predicate register when
1086         opcode has two outputs and these are both predicates.
1087         * ia64-opc-i.c (FULL17): Define.
1088         (ia64_opcodes_i): Add mov-to-pr alias without second input. Use FULL17
1089         here to generate output template.
1090         (TBITCM, TNATCM): Undefine after use.
1091         * ia64-opc-m.c (ia64_opcodes_i): Add alloc alias without ar.pfs as
1092         first input. Add ld16 aliases without ar.csd as second output. Add
1093         st16 aliases without ar.csd as second input. Add cmpxchg aliases
1094         without ar.ccv as third input. Add cmp8xchg16 aliases without ar.csd/
1095         ar.ccv as third/fourth inputs. Consolidate through...
1096         (CMPXCHG_acq, CMPXCHG_rel, CMPXCHG_1, CMPXCHG_2, CMPXCHG_4, CMPXCHG_8,
1097         CMPXCHGn, CMP8XCHG16, CMPXCHG_ALL): Define.
1098         * ia64-asmtab.c: Regenerate.
1099
1100 2005-01-27  Andrew Cagney  <cagney@gnu.org>
1101
1102         * configure: Regenerate to track ../gettext.m4 change.
1103
1104 2005-01-25  Alexandre Oliva  <aoliva@redhat.com>
1105
1106         2004-11-10  Alexandre Oliva  <aoliva@redhat.com>
1107         * frv-asm.c: Rebuilt.
1108         * frv-desc.c: Rebuilt.
1109         * frv-desc.h: Rebuilt.
1110         * frv-dis.c: Rebuilt.
1111         * frv-ibld.c: Rebuilt.
1112         * frv-opc.c: Rebuilt.
1113         * frv-opc.h: Rebuilt.
1114
1115 2005-01-24  Andrew Cagney  <cagney@gnu.org>
1116
1117         * configure: Regenerate, ../gettext.m4 was updated.
1118
1119 2005-01-21  Fred Fish  <fnf@specifixinc.com>
1120
1121         * mips-opc.c:  Change INSN_ALIAS to INSN2_ALIAS.
1122         Change INSN_WRITE_MDMX_ACC to INSN2_WRITE_MDMX_ACC.
1123         Change INSN_READ_MDMX_ACC to INSN2_READ_MDMX_ACC.
1124         * mips-dis.c: Ditto.
1125
1126 2005-01-20  Alan Modra  <amodra@bigpond.net.au>
1127
1128         * ppc-opc.c (powerpc_opcodes): Add optional 'l' arg to tlbiel.
1129
1130 2005-01-19  Fred Fish  <fnf@specifixinc.com>
1131
1132         * mips-dis.c (no_aliases): New disassembly option flag.
1133         (set_default_mips_dis_options): Init no_aliases to zero.
1134         (parse_mips_dis_option): Handle no-aliases option.
1135         (print_insn_mips): Ignore table entries that are aliases
1136         if no_aliases is set.
1137         (print_insn_mips16): Ditto.
1138         * mips-opc.c (mips_builtin_opcodes): Add initializer column for
1139         new pinfo2 member and add INSN_ALIAS initializers as needed.  Also
1140         move WR_MACC and RD_MACC initializers from pinfo to pinfo2.
1141         * mips16-opc.c (mips16_opcodes): Ditto.
1142
1143 2005-01-17  Andrew Stubbs  <andrew.stubbs@st.com>
1144
1145         * sh-opc.h (arch_sh2a_or_sh3e,arch_sh2a_or_sh4): Correct definition.
1146         (inheritance diagram): Add missing edge.
1147         (arch_sh1_up): Rename arch_sh_up to match external name to make life
1148         easier for the testsuite.
1149         (arch_sh4_nofp_up): Likewise, rename arch_sh4_nofpu_up.
1150         (arch_sh4a_nofp_up): Likewise, rename arch_sh4a_nofpu_up.
1151         (arch_sh2a_nofpu_or_sh4_nommu_nofpu_up): Add missing
1152         arch_sh2a_or_sh4_up child.
1153         (sh_table): Do renaming as above.
1154         Correct comment for ldc.l for gas testsuite to read.
1155         Remove rogue mul.l from sh1 (duplicate of the one for sh2).
1156         Correct comments for movy.w and movy.l for gas testsuite to read.
1157         Correct comments for fmov.d and fmov.s for gas testsuite to read.
1158
1159 2005-01-12  H.J. Lu  <hongjiu.lu@intel.com>
1160
1161         * i386-dis.c (OP_E): Don't ignore scale in SIB for 64 bit mode.
1162
1163 2005-01-12  H.J. Lu  <hongjiu.lu@intel.com>
1164
1165         * i386-dis.c (OP_E): Ignore scale when index == 0x4 in SIB.
1166
1167 2005-01-10  Andreas Schwab  <schwab@suse.de>
1168
1169         * disassemble.c (disassemble_init_for_target) <case
1170         bfd_arch_ia64>: Set skip_zeroes to 16.
1171         <case bfd_arch_tic4x>: Set skip_zeroes to 32.
1172
1173 2004-12-23  Tomer Levi  <Tomer.Levi@nsc.com>
1174
1175         * crx-opc.c: Mark 'bcop' instruction as RELAXABLE.
1176
1177 2004-12-14  Svein E. Seldal  <Svein.Seldal@solidas.com>
1178
1179         * avr-dis.c: Prettyprint. Added printing of symbol names in all
1180         memory references. Convert avr_operand() to C90 formatting.
1181
1182 2004-12-05  Tomer Levi  <Tomer.Levi@nsc.com>
1183
1184         * crx-dis.c (print_arg): Use 'info->print_address_func' for address printing.
1185
1186 2004-11-29  Tomer Levi  <Tomer.Levi@nsc.com>
1187
1188         * crx-opc.c (crx_optab): Mark all rbase_disps* operands as signed.
1189         (no_op_insn): Initialize array with instructions that have no
1190         operands.
1191         * crx-dis.c (make_instruction): Get rid of COP_BRANCH_INS operand swapping.
1192
1193 2004-11-29  Richard Earnshaw  <rearnsha@arm.com>
1194
1195         * arm-dis.c: Correct top-level comment.
1196
1197 2004-11-27  Richard Earnshaw  <rearnsha@arm.com>
1198
1199         * arm-opc.h (arm_opcode, thumb_opcode): Add extra field for the
1200         architecuture defining the insn.
1201         (arm_opcodes, thumb_opcodes): Delete.  Move to ...
1202         * arm-dis.c (arm_opcodes, thumb_opcodes): Here.  Add architecutre
1203         field.
1204         Also include opcode/arm.h.
1205         * Makefile.am (arm-dis.lo): Update dependency list.
1206         * Makefile.in: Regenerate.
1207
1208 2004-11-22  Ravi Ramaseshan  <ravi.ramaseshan@codito.com>
1209
1210         * opcode/arc-opc.c (insert_base): Modify ls_operand[LS_OFFSET] to
1211         reflect the change to the short immediate syntax.
1212
1213 2004-11-19  Alan Modra  <amodra@bigpond.net.au>
1214
1215         * or32-opc.c (debug): Warning fix.
1216         * po/POTFILES.in: Regenerate.
1217
1218         * maxq-dis.c: Formatting.
1219         (print_insn): Warning fix.
1220
1221 2004-11-17  Daniel Jacobowitz  <dan@codesourcery.com>
1222
1223         * arm-dis.c (WORD_ADDRESS): Define.
1224         (print_insn): Use it.  Correct big-endian end-of-section handling.
1225
1226 2004-11-08  Inderpreet Singh   <inderpreetb@nioda.hcltech.com>
1227             Vineet Sharma      <vineets@noida.hcltech.com>
1228
1229         * maxq-dis.c: New file.
1230         * disassemble.c (ARCH_maxq): Define.
1231         (disassembler): Add 'print_insn_maxq_little' for handling maxq
1232         instructions..
1233         * configure.in: Add case for bfd_maxq_arch.
1234         * configure: Regenerate.
1235         * Makefile.am: Add support for maxq-dis.c
1236         * Makefile.in: Regenerate.
1237         * aclocal.m4: Regenerate.
1238
1239 2004-11-05  Tomer Levi  <Tomer.Levi@nsc.com>
1240
1241         * crx-opc.c (crx_optab): Rename 'arg_icr' to 'arg_idxr' for Index register
1242         mode.
1243         * crx-dis.c: Likewise.
1244
1245 2004-11-04  Hans-Peter Nilsson  <hp@axis.com>
1246
1247         Generally, handle CRISv32.
1248         * cris-dis.c (TRACE_CASE): Define as (disdata->trace_case).
1249         (struct cris_disasm_data): New type.
1250         (format_reg, format_hex, cris_constraint, print_flags)
1251         (get_opcode_entry): Add struct cris_disasm_data * parameter.  All
1252         callers changed.
1253         (format_sup_reg, print_insn_crisv32_with_register_prefix)
1254         (print_insn_crisv32_without_register_prefix)
1255         (print_insn_crisv10_v32_with_register_prefix)
1256         (print_insn_crisv10_v32_without_register_prefix)
1257         (cris_parse_disassembler_options): New functions.
1258         (bytes_to_skip, cris_spec_reg): Add enum cris_disass_family
1259         parameter.  All callers changed.
1260         (get_opcode_entry): Call malloc, not xmalloc.  Return NULL on
1261         failure.
1262         (cris_constraint) <case 'Y', 'U'>: New cases.
1263         (bytes_to_skip): Handle 'Y' and 'N' as 's'.  Skip size is 4 bytes
1264         for constraint 'n'.
1265         (print_with_operands) <case 'Y'>: New case.
1266         (print_with_operands) <case 'T', 'A', '[', ']', 'd', 'n', 'u'>
1267         <case 'N', 'Y', 'Q'>: New cases.
1268         (print_insn_cris_generic): Emit "bcc ." for zero and CRISv32.
1269         (print_insn_cris_with_register_prefix)
1270         (print_insn_cris_without_register_prefix): Call
1271         cris_parse_disassembler_options.
1272         * cris-opc.c (cris_spec_regs): Mention that this table isn't used
1273         for CRISv32 and the size of immediate operands.  New v32-only
1274         entries for bz, pid, srs, wz, exs, eda, dz, ebp, erp, nrp, ccs and
1275         spc.  Add v32-only 4-byte entries for p2, p3, p5 and p6.  Change
1276         ccr, ibr, irp to be v0..v10.  Change bar, dccr to be v8..v10.
1277         Change brp to be v3..v10.
1278         (cris_support_regs): New vector.
1279         (cris_opcodes): Update head comment.  New format characters '[',
1280         ']', space, 'A', 'd', 'N', 'n', 'Q', 'T', 'u', 'U', 'Y'.
1281         Add new opcodes for v32 and adjust existing opcodes to accommodate
1282         differences to earlier variants.
1283         (cris_cond15s): New vector.
1284
1285 2004-11-04 Jan Beulich <jbeulich@novell.com>
1286
1287         * i386-dis.c (Eq, Edqw, indirEp, Gdq, I1): Define.
1288         (indirEb): Remove.
1289         (Mp): Use f_mode rather than none at all.
1290         (t_mode, dq_mode, dqw_mode, f_mode, const_1_mode): Define. t_mode
1291         replaces what previously was x_mode; x_mode now means 128-bit SSE
1292         operands.
1293         (dis386): Make far jumps and calls have an 'l' prefix only in AT&T
1294         mode. movmskpX's, pextrw's, and pmovmskb's first operands are Gdq.
1295         pinsrw's second operand is Edqw.
1296         (grps): 1-bit shifts' and rotates' second operands are I1. cmpxchg8b's
1297         operand is Eq. movntq's and movntdq's first operands are EM. s[gi]dt,
1298         fldenv, frstor, fsave, fstenv all should also have suffixes in Intel
1299         mode when an operand size override is present or always suffixing.
1300         More instructions will need to be added to this group.
1301         (putop): Handle new macro chars 'C' (short/long suffix selector),
1302         'I' (Intel mode override for following macro char), and 'J' (for
1303         adding the 'l' prefix to far branches in AT&T mode). When an
1304         alternative was specified in the template, honor macro character when
1305         specified for Intel mode.
1306         (OP_E): Handle new *_mode values. Correct pointer specifications for
1307         memory operands. Consolidate output of index register.
1308         (OP_G): Handle new *_mode values.
1309         (OP_I): Handle const_1_mode.
1310         (OP_ESreg, OP_DSreg): Generate pointer specifications. Indicate
1311         respective opcode prefix bits have been consumed.
1312         (OP_EM, OP_EX): Provide some default handling for generating pointer
1313         specifications.
1314
1315 2004-10-28  Tomer Levi  <Tomer.Levi@nsc.com>
1316
1317         * crx-opc.c (REV_COP_INST): New macro, reverse operand order of
1318         COP_INST macro.
1319
1320 2004-10-27  Tomer Levi  <Tomer.Levi@nsc.com>
1321
1322         * crx-dis.c (enum REG_ARG_TYPE): New, replacing COP_ARG_TYPE.
1323         (getregliststring): Support HI/LO and user registers.
1324         * crx-opc.c (crx_instruction): Update data structure according to the
1325         rearrangement done in CRX opcode header file.
1326         (crx_regtab):  Likewise.
1327         (crx_optab):  Likewise.
1328         (crx_instruction): Reorder load/stor instructions, remove unsupported
1329         formats.
1330         support new Co-Processor instruction 'cpi'.
1331
1332 2004-10-27  Nick Clifton  <nickc@redhat.com>
1333
1334         * opcodes/iq2000-asm.c: Regenerate.
1335         * opcodes/iq2000-desc.c: Regenerate.
1336         * opcodes/iq2000-desc.h: Regenerate.
1337         * opcodes/iq2000-dis.c: Regenerate.
1338         * opcodes/iq2000-ibld.c: Regenerate.
1339         * opcodes/iq2000-opc.c: Regenerate.
1340         * opcodes/iq2000-opc.h: Regenerate.
1341
1342 2004-10-21  Tomer Levi  <Tomer.Levi@nsc.com>
1343
1344         * crx-opc.c (crx_instruction): Replace i3, i4, i5 with us3,
1345         us4, us5 (respectively).
1346         Remove unsupported 'popa' instruction.
1347         Reverse operands order in store co-processor instructions.
1348
1349 2004-10-15  Alan Modra  <amodra@bigpond.net.au>
1350
1351         * Makefile.am: Run "make dep-am"
1352         * Makefile.in: Regenerate.
1353
1354 2004-10-12  Bob Wilson  <bob.wilson@acm.org>
1355
1356         * xtensa-dis.c: Use ISO C90 formatting.
1357
1358 2004-10-09  Alan Modra  <amodra@bigpond.net.au>
1359
1360         * ppc-opc.c: Revert 2004-09-09 change.
1361
1362 2004-10-07  Bob Wilson  <bob.wilson@acm.org>
1363
1364         * xtensa-dis.c (state_names): Delete.
1365         (fetch_data): Use xtensa_isa_maxlength.
1366         (print_xtensa_operand): Replace operand parameter with opcode/operand
1367         pair.  Remove print_sr_name parameter.  Use new xtensa-isa.h functions.
1368         (print_insn_xtensa): Use new xtensa-isa.h functions.  Handle multislot
1369         instruction bundles.  Use xmalloc instead of malloc.
1370
1371 2004-10-07  David Gibson  <david@gibson.dropbear.id.au>
1372
1373         * ppc-opc.c: Replace literal "0"s with NULLs in pointer
1374         initializers.
1375
1376 2004-10-07  Tomer Levi  <Tomer.Levi@nsc.com>
1377
1378         * crx-opc.c (crx_instruction): Support Co-processor insns.
1379         * crx-dis.c (COP_ARG_TYPE): New enum for CO-Processor arguments.
1380         (getregliststring): Change function to use the above enum.
1381         (print_arg): Handle CO-Processor insns.
1382         (crx_cinvs): Add 'b' option to invalidate the branch-target
1383         cache.
1384
1385 2004-10-06  Aldy Hernandez  <aldyh@redhat.com>
1386
1387         * ppc-opc.c (powerpc_opcodes): Add efscfd, efdabs, efdnabs,
1388         efdneg, efdadd, efdsub, efdmul, efddiv, efdcmpgt, efdcmplt,
1389         efdcmpeq, efdtstgt, efdtstlt, efdtsteq, efdcfsi, efdcfsid,
1390         efdcfui, efdcfuid, efdcfsf, efdcfuf, efdctsi, efdctsidz, efdctsiz,
1391         efdctui, efdctuidz, efdctuiz, efdctsf, efdctuf, efdctuf, efdcfs.
1392
1393 2004-10-01  Bill Farmer  <Bill@the-farmers.freeserve.co.uk>
1394
1395         * pdp11-dis.c (print_insn_pdp11): Subtract the SOB's displacement
1396         rather than add it.
1397
1398 2004-09-30  Paul Brook  <paul@codesourcery.com>
1399
1400         * arm-dis.c (print_insn_arm): Handle 'e' for SMI instruction.
1401         * arm-opc.h: Document %e.  Add ARMv6ZK instructions.
1402
1403 2004-09-17  H.J. Lu  <hongjiu.lu@intel.com>
1404
1405         * Makefile.am (AUTOMAKE_OPTIONS): Require 1.9.
1406         (CONFIG_STATUS_DEPENDENCIES): New.
1407         (Makefile): Removed.
1408         (config.status): Likewise.
1409         * Makefile.in: Regenerated.
1410
1411 2004-09-17  Alan Modra  <amodra@bigpond.net.au>
1412
1413         * Makefile.am: Run "make dep-am".
1414         * Makefile.in: Regenerate.
1415         * aclocal.m4: Regenerate.
1416         * configure: Regenerate.
1417         * po/POTFILES.in: Regenerate.
1418         * po/opcodes.pot: Regenerate.
1419
1420 2004-09-11  Andreas Schwab  <schwab@suse.de>
1421
1422         * configure: Rebuild.
1423
1424 2004-09-09  Segher Boessenkool  <segher@kernel.crashing.org>
1425
1426         * ppc-opc.c (L): Make this field not optional.
1427
1428 2004-09-03  Tomer Levi  <Tomer.Levi@nsc.com>
1429
1430         * opc-crx.c: Rename 'popma' to 'popa', remove 'pushma'.
1431         Fix parameter to 'm[t|f]csr' insns.
1432
1433 2004-08-30  Nathanael Nerode  <neroden@gcc.gnu.org>
1434
1435         * configure.in: Autoupdate to autoconf 2.59.
1436         * aclocal.m4: Rebuild with aclocal 1.4p6.
1437         * configure: Rebuild with autoconf 2.59.
1438         * Makefile.in: Rebuild with automake 1.4p6 (picking up
1439         bfd changes for autoconf 2.59 on the way).
1440         * config.in: Rebuild with autoheader 2.59.
1441
1442 2004-08-27  Richard Sandiford  <rsandifo@redhat.com>
1443
1444         * frv-desc.[ch], frv-opc.[ch]: Regenerated.
1445
1446 2004-07-30  Michal Ludvig  <mludvig@suse.cz>
1447
1448         * i386-dis.c (GRPPADLCK): Renamed to GRPPADLCK1
1449         (GRPPADLCK2): New define.
1450         (twobyte_has_modrm): True for 0xA6.
1451         (grps): GRPPADLCK2 for opcode 0xA6.
1452
1453 2004-07-29  Alexandre Oliva  <aoliva@redhat.com>
1454
1455         Introduce SH2a support.
1456         * sh-opc.h (arch_sh2a_base): Renumber.
1457         (arch_sh2a_nofpu_base): Remove.
1458         (arch_sh_base_mask): Adjust.
1459         (arch_opann_mask): New.
1460         (arch_sh2a, arch_sh2a_nofpu): Adjust.
1461         (arch_sh2a_up, arch_sh2a_nofpu_up): Likewise.
1462         (sh_table): Adjust whitespace.
1463         2004-02-24  Corinna Vinschen  <vinschen@redhat.com>
1464         * sh-opc.h (arch_sh2a_nofpu_up): New.  Use instead of arch_sh2a_up in
1465         instruction list throughout.
1466         (arch_sh2a_up): Redefine to include fpu instruction set.  Use instead
1467         of arch_sh2a in instruction list throughout.
1468         (arch_sh2e_up): Accomodate above changes.
1469         (arch_sh2_up): Ditto.
1470         2004-02-20  Corinna Vinschen  <vinschen@redhat.com>
1471         * sh-opc.h: Add arch_sh2a_nofpu to arch_sh2_up.
1472         2004-02-18  Corinna Vinschen  <vinschen@redhat.com>
1473         * sh-dis.c (print_insn_sh): Add bfd_mach_sh2a_nofpu handling.
1474         * sh-opc.h (arch_sh2a_nofpu): New.
1475         (arch_sh2a_up): New, defines sh2a and sh2a_nofpu.
1476         (sh_table): Change all arch_sh2a to arch_sh2a_up unless FPU
1477         instruction.
1478         2004-01-20  DJ Delorie  <dj@redhat.com>
1479         * sh-dis.c (print_insn_sh): SH2A does not have 'X' fp regs.
1480         2003-12-29  DJ Delorie  <dj@redhat.com>
1481         * sh-opc.c (sh_nibble_type, sh_arg_type, arch_2a, arch_2e_up,
1482         sh_opcode_info, sh_table): Add sh2a support.
1483         (arch_op32): New, to tag 32-bit opcodes.
1484         * sh-dis.c (print_insn_sh): Support sh2a opcodes.
1485         2003-12-02  Michael Snyder  <msnyder@redhat.com>
1486         * sh-opc.h (arch_sh2a): Add.
1487         * sh-dis.c (arch_sh2a): Handle.
1488         * sh-opc.h (arch_sh2_up): Fix up to include arch_sh2a.
1489
1490 2004-07-27  Tomer Levi  <Tomer.Levi@nsc.com>
1491
1492         * crx-opc.c: Add popx,pushx insns. Indent code, fix comments.
1493
1494 2004-07-22  Nick Clifton  <nickc@redhat.com>
1495
1496         PR/280
1497         * h8300-dis.c (bfd_h8_disassemble): Do not dump raw bytes for the
1498         insns - this is done by objdump itself.
1499         * h8500-dis.c (print_insn_h8500): Likewise.
1500
1501 2004-07-21  Jan Beulich <jbeulich@novell.com>
1502
1503         * i386-dis.c (OP_E): Show rip-relative addressing in 64-bit mode
1504         regardless of address size prefix in effect.
1505         (ptr_reg): Size or address registers does not depend on rex64, but
1506         on the presence of an address size override.
1507         (OP_MMX): Use rex.x only for xmm registers.
1508         (OP_EM): Use rex.z only for xmm registers.
1509
1510 2004-07-20  Maciej W. Rozycki  <macro@linux-mips.org>
1511
1512         * mips-opc.c (mips_builtin_opcodes): Move coprocessor 2
1513         move/branch operations to the bottom so that VR5400 multimedia
1514         instructions take precedence in disassembly.
1515
1516 2004-07-20  Maciej W. Rozycki  <macro@linux-mips.org>
1517
1518         * mips-opc.c (mips_builtin_opcodes): Remove the MIPS32
1519         ISA-specific "break" encoding.
1520
1521 2004-07-13  Elvis Chiang  <elvisfb@gmail.com>
1522
1523         * arm-opc.h: Fix typo in comment.
1524
1525 2004-07-11  Andreas Schwab  <schwab@suse.de>
1526
1527         * m68k-dis.c (m68k_valid_ea): Fix typos in last change.
1528
1529 2004-07-09  Andreas Schwab  <schwab@suse.de>
1530
1531         * m68k-dis.c (m68k_valid_ea): Check validity of all codes.
1532
1533 2004-07-07  Tomer Levi  <Tomer.Levi@nsc.com>
1534
1535         * Makefile.am (CFILES): Add crx-dis.c, crx-opc.c.
1536         (ALL_MACHINES): Add crx-dis.lo, crx-opc.lo.
1537         (crx-dis.lo): New target.
1538         (crx-opc.lo): Likewise.
1539         * Makefile.in: Regenerate.
1540         * configure.in: Handle bfd_crx_arch.
1541         * configure: Regenerate.
1542         * crx-dis.c: New file.
1543         * crx-opc.c: New file.
1544         * disassemble.c (ARCH_crx): Define.
1545         (disassembler): Handle ARCH_crx.
1546
1547 2004-06-29  James E Wilson  <wilson@specifixinc.com>
1548
1549         * ia64-opc-a.c (ia64_opcodes_a): Delete mov immediate pseudo for adds.
1550         * ia64-asmtab.c: Regnerate.
1551
1552 2004-06-28  Alan Modra  <amodra@bigpond.net.au>
1553
1554         * ppc-opc.c (insert_fxm): Handle mfocrf and mtocrf.
1555         (extract_fxm): Don't test dialect.
1556         (XFXFXM_MASK): Include the power4 bit.
1557         (XFXM): Add p4 param.
1558         (powerpc_opcodes): Add mfocrf and mtocrf.  Adjust mtcr.
1559
1560 2004-06-27  Alexandre Oliva  <aoliva@redhat.com>
1561
1562         2003-07-21  Richard Sandiford  <rsandifo@redhat.com>
1563         * disassemble.c (disassembler): Handle bfd_mach_h8300sxn.
1564
1565 2004-06-26  Alan Modra  <amodra@bigpond.net.au>
1566
1567         * ppc-opc.c (BH, XLBH_MASK): Define.
1568         (powerpc_opcodes): Allow BH field on bclr, bclrl, bcctr, bcctrl.
1569
1570 2004-06-24  Alan Modra  <amodra@bigpond.net.au>
1571
1572         * i386-dis.c (x_mode): Comment.
1573         (two_source_ops): File scope.
1574         (float_mem): Correct fisttpll and fistpll.
1575         (float_mem_mode): New table.
1576         (dofloat): Use it.
1577         (OP_E): Correct intel mode PTR output.
1578         (ptr_reg): Use open_char and close_char.
1579         (PNI_Fixup): Handle possible suffix on sidt.  Use op1out etc. for
1580         operands.  Set two_source_ops.
1581
1582 2004-06-15  Alan Modra  <amodra@bigpond.net.au>
1583
1584         * arc-ext.c (build_ARC_extmap): Use bfd_get_section_size
1585         instead of _raw_size.
1586
1587 2004-06-08  Jakub Jelinek  <jakub@redhat.com>
1588
1589         * ia64-gen.c (in_iclass): Handle more postinc st
1590         and ld variants.
1591         * ia64-asmtab.c: Rebuilt.
1592
1593 2004-06-01  Martin Schwidefsky  <schwidefsky@de.ibm.com>
1594
1595         * s390-opc.txt: Correct architecture mask for some opcodes.
1596         lrv, lrvh, strv, ml, dl, alc, slb rll and mvclu are available
1597         in the esa mode as well.
1598
1599 2004-05-28  Andrew Stubbs <andrew.stubbs@superh.com>
1600
1601         * sh-dis.c (target_arch): Make unsigned.
1602         (print_insn_sh): Replace (most of) switch with a call to
1603         sh_get_arch_from_bfd_mach(). Also use new architecture flags system.
1604         * sh-opc.h: Redefine architecture flags values.
1605         Add sh3-nommu architecture.
1606         Reorganise <arch>_up macros so they make more visual sense.
1607         (SH_MERGE_ARCH_SET): Define new macro.
1608         (SH_VALID_BASE_ARCH_SET): Likewise.
1609         (SH_VALID_MMU_ARCH_SET): Likewise.
1610         (SH_VALID_CO_ARCH_SET): Likewise.
1611         (SH_VALID_ARCH_SET): Likewise.
1612         (SH_MERGE_ARCH_SET_VALID): Likewise.
1613         (SH_ARCH_SET_HAS_FPU): Likewise.
1614         (SH_ARCH_SET_HAS_DSP): Likewise.
1615         (SH_ARCH_UNKNOWN_ARCH): Likewise.
1616         (sh_get_arch_from_bfd_mach): Add prototype.
1617         (sh_get_arch_up_from_bfd_mach): Likewise.
1618         (sh_get_bfd_mach_from_arch_set): Likewise.
1619         (sh_merge_bfd_arc): Likewise.
1620
1621 2004-05-24  Peter Barada  <peter@the-baradas.com>
1622
1623         * m68k-dis.c(print_insn_m68k): Strip body of diassembly out
1624         into new match_insn_m68k function.  Loop over canidate
1625         matches and select first that completely matches.
1626         * m68k-dis.c(print_insn_arg): Fix 'g' case to only extract 1 bit.
1627         * m68k-dis.c(print_insn_arg): Call new function m68k_valid_ea
1628         to verify addressing for MAC/EMAC.
1629         * m68k-dis.c(print_insn_arg): Use reg_half_names for MAC/EMAC
1630         reigster halves since 'fpu' and 'spl' look misleading.
1631         * m68k-dis.c(fetch_arg): Fix 'G', 'H', 'I', 'f', 'M', 'N' cases.
1632         * m68k-opc.c: Rearragne mac/emac cases to use longest for
1633         first, tighten up match masks.
1634         * m68k-opc.c: Add 'size' field to struct m68k_opcode.  Produce
1635         'size' from special case code in print_insn_m68k to
1636         determine decode size of insns.
1637
1638 2004-05-19  Alan Modra  <amodra@bigpond.net.au>
1639
1640         * ppc-opc.c (insert_fxm): Enable two operand mfcr when -many as
1641         well as when -mpower4.
1642
1643 2004-05-13  Nick Clifton  <nickc@redhat.com>
1644
1645         * po/fr.po: Updated French translation.
1646
1647 2004-05-05  Peter Barada  <peter@the-baradas.com>
1648
1649         * m68k-dis.c(print_insn_m68k): Add new chips, use core
1650         variants in arch_mask.  Only set m68881/68851 for 68k chips.
1651         * m68k-op.c: Switch from ColdFire chips to core variants.
1652
1653 2004-05-05  Alan Modra  <amodra@bigpond.net.au>
1654
1655         PR 147.
1656         * ppc-opc.c (PPCVEC): Remove PPC_OPCODE_PPC.
1657
1658 2004-04-29  Ben Elliston  <bje@au.ibm.com>
1659
1660         * ppc-opc.c (XCMPL): Renmame to XOPL. Update users.
1661         (powerpc_opcodes): Add "dbczl" instruction for PPC970.
1662
1663 2004-04-22  Kaz Kojima  <kkojima@rr.iij4u.or.jp>
1664
1665         * sh-dis.c (print_insn_sh): Print the value in constant pool
1666         as a symbol if it looks like a symbol.
1667
1668 2004-04-22  Peter Barada <peter@the-baradas.com>
1669
1670         * m68k-dis.c(print_insn_m68k): Set mfcmac/mcfemac on
1671         appropriate ColdFire architectures.
1672         (print_insn_m68k): Handle EMAC, MAC/EMAC scalefactor, and MAC/EMAC
1673         mask addressing.
1674         Add EMAC instructions, fix MAC instructions. Remove
1675         macmw/macml/msacmw/msacml instructions since mask addressing now
1676         supported.
1677
1678 2004-04-20  Jakub Jelinek  <jakub@redhat.com>
1679
1680         * sparc-opc.c (fmoviccx, fmovfccx, fmovccx): Define.
1681         (fmovicc, fmovfcc, fmovcc): Remove fpsize argument, change opcode to
1682         suffix.  Use fmov*x macros, create all 3 fpsize variants in one
1683         macro.  Adjust all users.
1684
1685 2004-04-15  Anil Paranjpe  <anilp1@kpitcummins.com>
1686
1687         * h8300-dis.c (bfd_h8_disassemble) : Treat "adds" & "subs"
1688         separately.
1689
1690 2004-03-30  Kazuhiro Inaoka  <inaoka.kazuhiro@renesas.com>
1691
1692         * m32r-asm.c: Regenerate.
1693
1694 2004-03-29  Stan Shebs  <shebs@apple.com>
1695
1696         * mpw-config.in, mpw-make.sed: Remove MPW support files, no longer
1697         used.
1698
1699 2004-03-19  Alan Modra  <amodra@bigpond.net.au>
1700
1701         * aclocal.m4: Regenerate.
1702         * config.in: Regenerate.
1703         * configure: Regenerate.
1704         * po/POTFILES.in: Regenerate.
1705         * po/opcodes.pot: Regenerate.
1706
1707 2004-03-16  Alan Modra  <amodra@bigpond.net.au>
1708
1709         * ppc-dis.c (print_insn_powerpc): Don't print tabs.  Handle
1710         PPC_OPERANDS_GPR_0.
1711         * ppc-opc.c (RA0): Define.
1712         (RAQ, RAL, RAM, RAS, RSQ, RTQ, RSO): Use PPC_OPERAND_GPR_0.
1713         (RAOPT): Rename from RAO.  Update all uses.
1714         (powerpc_opcodes): Use RA0 as appropriate.
1715
1716 2004-03-15  Aldy Hernandez  <aldyh@redhat.com>
1717
1718         * ppc-opc.c (powerpc_opcodes): Add BOOKE versions of mfsprg.
1719
1720 2004-03-15  Alan Modra  <amodra@bigpond.net.au>
1721
1722         * sparc-dis.c (print_insn_sparc): Update getword prototype.
1723
1724 2004-03-12  Michal Ludvig  <mludvig@suse.cz>
1725
1726         * i386-dis.c (GRPPLOCK): Delete.
1727         (grps): Delete GRPPLOCK entry.
1728
1729 2004-03-12  Alan Modra  <amodra@bigpond.net.au>
1730
1731         * i386-dis.c (OP_M, OP_0f0e, OP_0fae, NOP_Fixup): New functions.
1732         (M, Mp): Use OP_M.
1733         (None, PADLOCK_SPECIAL, PADLOCK_0): Delete.
1734         (GRPPADLCK): Define.
1735         (dis386): Use NOP_Fixup on "nop".
1736         (dis386_twobyte): Use GRPPADLCK on opcode 0xa7.
1737         (twobyte_has_modrm): Set for 0xa7.
1738         (padlock_table): Delete.  Move to..
1739         (grps): ..here, using OP_0f07.  Use OP_Ofae on lfence, mfence
1740         and clflush.
1741         (print_insn): Revert PADLOCK_SPECIAL code.
1742         (OP_E): Delete sfence, lfence, mfence checks.
1743
1744 2004-03-12  Jakub Jelinek  <jakub@redhat.com>
1745
1746         * i386-dis.c (grps): Use INVLPG_Fixup instead of OP_E for invlpg.
1747         (INVLPG_Fixup): New function.
1748         (PNI_Fixup): Remove ATTRIBUTE_UNUSED from sizeflag.
1749
1750 2004-03-12  Michal Ludvig  <mludvig@suse.cz>
1751
1752         * i386-dis.c (PADLOCK_SPECIAL, PADLOCK_0): New defines.
1753         (dis386_twobyte): Opcode 0xa7 is PADLOCK_0.
1754         (padlock_table): New struct with PadLock instructions.
1755         (print_insn): Handle PADLOCK_SPECIAL.
1756
1757 2004-03-12  Alan Modra  <amodra@bigpond.net.au>
1758
1759         * i386-dis.c (grps): Use clflush by default for 0x0fae/7.
1760         (OP_E): Twiddle clflush to sfence here.
1761
1762 2004-03-08  Nick Clifton  <nickc@redhat.com>
1763
1764         * po/de.po: Updated German translation.
1765
1766 2003-03-03  Andrew Stubbs  <andrew.stubbs@superh.com>
1767
1768         * sh-dis.c (print_insn_sh): Don't disassemble fp instructions in
1769         nofpu mode.  Add BFD type bfd_mach_sh4_nommu_nofpu.
1770         * sh-opc.h: Add sh4_nommu_nofpu architecture and adjust instructions
1771         accordingly.
1772
1773 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
1774
1775         * frv-asm.c: Regenerate.
1776         * frv-desc.c: Regenerate.
1777         * frv-desc.h: Regenerate.
1778         * frv-dis.c: Regenerate.
1779         * frv-ibld.c: Regenerate.
1780         * frv-opc.c: Regenerate.
1781         * frv-opc.h: Regenerate.
1782
1783 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
1784
1785         * frv-desc.c, frv-opc.c: Regenerate.
1786
1787 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
1788
1789         * frv-desc.c, frv-opc.c, frv-opc.h: Regenerate.
1790
1791 2004-02-26  Andrew Stubbs  <andrew.stubbs@superh.com>
1792
1793         * sh-opc.h: Move fsca and fsrra instructions from sh4a to sh4.
1794         Also correct mistake in the comment.
1795
1796 2004-02-26  Andrew Stubbs <andrew.stubbs@superh.com>
1797
1798         * sh-dis.c (print_insn_sh): Add REG_N_D nibble type to
1799         ensure that double registers have even numbers.
1800         Add REG_N_B01 for nn01 (binary 01) nibble to ensure
1801         that reserved instruction 0xfffd does not decode the same
1802         as 0xfdfd (ftrv).
1803         * sh-opc.h: Add REG_N_D nibble type and use it whereever
1804         REG_N refers to a double register.
1805         Add REG_N_B01 nibble type and use it instead of REG_NM
1806         in ftrv.
1807         Adjust the bit patterns in a few comments.
1808
1809 2004-02-25  Aldy Hernandez  <aldyh@redhat.com>
1810
1811         * ppc-opc.c (powerpc_opcodes): Change mask for dcbt and dcbtst.
1812
1813 2004-02-20  Aldy Hernandez  <aldyh@redhat.com>
1814
1815         * ppc-opc.c (powerpc_opcodes): Move mfmcsrr0 before mfdc_dat.
1816
1817 2004-02-20  Aldy Hernandez  <aldyh@redhat.com>
1818
1819         * ppc-opc.c (powerpc_opcodes): Add m*ivor35.
1820
1821 2004-02-20  Aldy Hernandez  <aldyh@redhat.com>
1822
1823         * ppc-opc.c (powerpc_opcodes): Add mfivor32, mfivor33, mfivor34,
1824         mtivor32, mtivor33, mtivor34.
1825
1826 2004-02-19  Aldy Hernandez  <aldyh@redhat.com>
1827
1828         * ppc-opc.c (powerpc_opcodes): Add mfmcar.
1829
1830 2004-02-10  Petko Manolov  <petkan@nucleusys.com>
1831
1832         * arm-opc.h Maverick accumulator register opcode fixes.
1833
1834 2004-02-13  Ben Elliston  <bje@wasabisystems.com>
1835
1836         * m32r-dis.c: Regenerate.
1837
1838 2004-01-27  Michael Snyder  <msnyder@redhat.com>
1839
1840         * sh-opc.h (sh_table): "fsrra", not "fssra".
1841
1842 2004-01-23  Andrew Over <andrew.over@cs.anu.edu.au>
1843
1844         * sparc-opc.c (fdtox, fstox, fqtox, fxtod, fxtos, fxtoq): Tighten
1845         contraints.
1846
1847 2004-01-19  Andrew Over  <andrew.over@cs.anu.edu.au>
1848
1849         * sparc-opc.c (sparc_opcodes) <f[dsq]tox, fxto[dsq]>: Fix args.
1850
1851 2004-01-19  Alan Modra  <amodra@bigpond.net.au>
1852
1853         * i386-dis.c (OP_E): Print scale factor on intel mode sib when not
1854         1.  Don't print scale factor on AT&T mode when index missing.
1855
1856 2004-01-16  Alexandre Oliva  <aoliva@redhat.com>
1857
1858         * m10300-opc.c (mov): 8- and 24-bit immediates are zero-extended
1859         when loaded into XR registers.
1860
1861 2004-01-14  Richard Sandiford  <rsandifo@redhat.com>
1862
1863         * frv-desc.h: Regenerate.
1864         * frv-desc.c: Regenerate.
1865         * frv-opc.c: Regenerate.
1866
1867 2004-01-13  Michael Snyder  <msnyder@redhat.com>
1868
1869         * sh-dis.c (print_insn_sh): Allocate 4 bytes for insn.
1870
1871 2004-01-09  Paul Brook  <paul@codesourcery.com>
1872
1873         * arm-opc.h (arm_opcodes): Move generic mcrr after known
1874         specific opcodes.
1875
1876 2004-01-07  Daniel Jacobowitz  <drow@mvista.com>
1877
1878         * Makefile.am (libopcodes_la_DEPENDENCIES)
1879         (libopcodes_la_LIBADD): Revert 2003-05-17 change.  Add explanatory
1880         comment about the problem.
1881         * Makefile.in: Regenerate.
1882
1883 2004-01-06  Alexandre Oliva  <aoliva@redhat.com>
1884
1885         2003-12-19  Alexandre Oliva  <aoliva@redhat.com>
1886         * frv-asm.c (parse_ulo16, parse_uhi16, parse_d12): Fix some
1887         cut&paste errors in shifting/truncating numerical operands.
1888         2003-08-04  Alexandre Oliva  <aoliva@redhat.com>
1889         * frv-asm.c (parse_ulo16): Parse gotofflo and gotofffuncdesclo.
1890         (parse_uslo16): Likewise.
1891         (parse_uhi16): Parse gotoffhi and gotofffuncdeschi.
1892         (parse_d12): Parse gotoff12 and gotofffuncdesc12.
1893         (parse_s12): Likewise.
1894         2003-08-04  Alexandre Oliva  <aoliva@redhat.com>
1895         * frv-asm.c (parse_ulo16): Parse gotlo and gotfuncdesclo.
1896         (parse_uslo16): Likewise.
1897         (parse_uhi16): Parse gothi and gotfuncdeschi.
1898         (parse_d12): Parse got12 and gotfuncdesc12.
1899         (parse_s12): Likewise.
1900
1901 2004-01-02  Albert Bartoszko  <albar@nt.kegel.com.pl>
1902
1903         * msp430-dis.c (msp430_doubleoperand): Check for an 'add'
1904         instruction which looks similar to an 'rla' instruction.
1905
1906 For older changes see ChangeLog-0203
1907 \f
1908 Local Variables:
1909 mode: change-log
1910 left-margin: 8
1911 fill-column: 74
1912 version-control: never
1913 End: