1 2014-04-23 Andrew Bennett <andrew.bennett@imgtec.com>
3 * mips-dis.c (mips_arch_choices): Update mips32r2 and mips64r2
4 to allow the MIPS XPA ASE.
5 (parse_mips_dis_option): Process the -Mxpa option.
6 * mips-opc.c (XPA): New define.
7 (mips_builtin_opcodes): Add MIPS XPA instructions and move the
8 locations of the ctc0 and cfc0 instructions.
10 2014-04-22 Christian Svensson <blue@cmd.nu>
12 * Makefile.am: Remove openrisc and or32 support. Add support for or1k.
13 * configure.in: Likewise.
14 * disassemble.c: Likewise.
15 * or1k-asm.c: New file.
16 * or1k-desc.c: New file.
17 * or1k-desc.h: New file.
18 * or1k-dis.c: New file.
19 * or1k-ibld.c: New file.
20 * or1k-opc.c: New file.
21 * or1k-opc.h: New file.
22 * or1k-opinst.c: New file.
23 * Makefile.in: Regenerate.
24 * configure: Regenerate.
25 * openrisc-asm.c: Delete.
26 * openrisc-desc.c: Delete.
27 * openrisc-desc.h: Delete.
28 * openrisc-dis.c: Delete.
29 * openrisc-ibld.c: Delete.
30 * openrisc-opc.c: Delete.
31 * openrisc-opc.h: Delete.
35 2014-04-04 Ilya Tocar <ilya.tocar@intel.com>
37 * i386-dis.c (rm_table): Add encls, enclu.
38 * i386-gen.c (cpu_flag_init): Add CPU_SE1_FLAGS,
39 (cpu_flags): Add CpuSE1.
40 * i386-opc.h (enum): Add CpuSE1.
41 (i386_cpu_flags): Add cpuse1.
42 * i386-opc.tbl: Add encls, enclu.
43 * i386-init.h: Regenerated.
44 * i386-tbl.h: Likewise.
46 2014-04-02 Anthony Green <green@moxielogic.com>
48 * moxie-opc.c (moxie_form1_opc_info): Add sign-extension
49 instructions, sex.b and sex.s.
51 2014-03-26 Jiong Wang <jiong.wang@arm.com>
53 * aarch64-dis.c (aarch64_ext_ldst_elemlist): Check H/S undefined
56 2014-03-20 Ilya Tocar <ilya.tocar@intel.com>
58 * i386-opc.tbl: Change memory size for vgatherpf0qps, vgatherpf1qps,
59 vscatterpf0qps, vscatterpf1qps, vgatherqps, vpgatherqd, vpscatterqd,
61 * i386-tbl.h: Regenerate.
63 2014-03-19 Jose E. Marchesi <jose.marchesi@oracle.com>
65 * sparc-dis.c (v9_hpriv_reg_names): Names for %hstick_offset and
68 2014-03-19 Nick Clifton <nickc@redhat.com>
70 * rx-decode.opc (bwl): Allow for bogus instructions with a size
72 (sbwl, ubwl, SCALE): Likewise.
73 * rx-decode.c: Regenerate.
75 2014-03-12 Alan Modra <amodra@gmail.com>
77 * Makefile.in: Regenerate.
79 2014-03-05 Alan Modra <amodra@gmail.com>
81 Update copyright years.
83 2014-03-04 Heiher <r@hev.cc>
85 * mips-dis.c (mips_arch_choices): Usee ISA_MIPS64R2 for Loongson-3A.
87 2014-03-04 Richard Sandiford <rdsandiford@googlemail.com>
89 * mips-opc.c (mips_builtin_opcodes): Move the udi* instructions
90 so that they come after the Loongson extensions.
92 2014-03-03 Alan Modra <amodra@gmail.com>
94 * i386-gen.c (process_copyright): Emit copyright notice on one line.
96 2014-02-28 Alan Modra <amodra@gmail.com>
98 * msp430-decode.c: Regenerate.
100 2014-02-27 Jiong Wang <jiong.wang@arm.com>
102 * aarch64-tbl.h (aarch64_opcode_table): Replace IMM0 with
103 FPIMM0 for fcmeq, fcmgt, fcmge, fcmlt and fcmle.
105 2014-02-27 Yufeng Zhang <yufeng.zhang@arm.com>
107 * aarch64-opc.c (print_register_offset_address): Call
108 get_int_reg_name to prepare the register name.
110 2014-02-25 Ilya Tocar <ilya.tocar@intel.com>
112 * i386-opc.tbl: Remove wrong variant of vcvtps2ph
113 * i386-tbl.h: Regenerate.
115 2014-02-20 Ilya Tocar <ilya.tocar@intel.com>
117 * i386-gen.c (cpu_flag_init): Add CPU_PREFETCHWT1_FLAGS/
118 (cpu_flags): Add CpuPREFETCHWT1.
119 * i386-init.h: Regenerate.
120 * i386-opc.h (CpuPREFETCHWT1): New.
121 (i386_cpu_flags): Add cpuprefetchwt1.
122 * i386-opc.tbl: Cahnge CPU of prefetchwt1 from CpuAVX512PF to CpuPREFETCHWT1.
123 * i386-tbl.h: Regenerate.
125 2014-02-20 Ilya Tocar <ilya.tocar@intel.com>
127 * i386-opc.tbl: Change CPU of vptestnmq, vptestnmd from CpuAVX512CD,
129 * i386-tbl.h: Regenerate.
131 2014-02-19 H.J. Lu <hongjiu.lu@intel.com>
133 * i386-gen.c (output_cpu_flags): Don't output trailing space.
134 (output_opcode_modifier): Likewise.
135 (output_operand_type): Likewise.
136 * i386-init.h: Regenerated.
137 * i386-tbl.h: Likewise.
139 2014-02-12 Ilya Tocar <ilya.tocar@intel.com>
141 * i386-dis.c (MOD enum): Add MOD_0FC7_REG_3, MOD_0FC7_REG_4,
143 (PREFIX enum): Add PREFIX_0FAE_REG_7.
144 (reg_table): Add MOD_0FC7_REG_3, MOD_0FC7_REG_4 MOD_0FC7_REG_5.
145 (prefix_table): Add clflusopt.
146 (mod_table): Add xrstors, xsavec, xsaves.
147 * i386-gen.c (cpu_flag_init): Add CPU_CLFLUSHOPT_FLAGS,
148 CPU_XSAVES_FLAGS, CPU_XSAVEC_FLAGS.
149 (cpu_flags): Add CpuClflushOpt, CpuXSAVES, CpuXSAVEC.
150 * i386-init.h: Regenerate.
151 * i386-opc.tbl: Add clflushopt, xrstors, xrstors64, xsaves,
152 xsaves64, xsavec, xsavec64.
153 * i386-tbl.h: Regenerate.
155 2014-02-10 Alan Modra <amodra@gmail.com>
157 * po/POTFILES.in: Regenerate.
158 * po/opcodes.pot: Regenerate.
160 2014-01-30 Michael Zolotukhin <michael.v.zolotukhin@gmail.com>
161 Jan Beulich <jbeulich@suse.com>
164 * i386-dis.c (OP_E_memory): Fix shift computation for
165 vex_vsib_q_w_dq_mode.
167 2014-01-09 Bradley Nelson <bradnelson@google.com>
168 Roland McGrath <mcgrathr@google.com>
170 * i386-dis.c (print_insn): Do not touch all_prefixes[-1] when
171 last_rex_prefix is -1.
173 2014-01-08 H.J. Lu <hongjiu.lu@intel.com>
175 * i386-gen.c (process_copyright): Update copyright year to 2014.
177 2014-01-03 Maciej W. Rozycki <macro@codesourcery.com>
179 * nds32-asm.c (parse_operand): Fix out-of-range integer constant.
181 For older changes see ChangeLog-2013
183 Copyright (C) 2014 Free Software Foundation, Inc.
185 Copying and distribution of this file, with or without modification,
186 are permitted in any medium without royalty provided the copyright
187 notice and this notice are preserved.
193 version-control: never