opcodes/ChangeLog

   1 2004-09-11  Andreas Schwab  <schwab@suse.de>
   2
   3         * configure: Rebuild.
   4
   5 2004-09-09  Segher Boessenkool  <segher@kernel.crashing.org>
   6
   7         * ppc-opc.c (L): Make this field not optional.
   8
   9 2004-09-03  Tomer Levi  <Tomer.Levi@nsc.com>
  10
  11         * opc-crx.c: Rename 'popma' to 'popa', remove 'pushma'.
  12         Fix parameter to 'm[t|f]csr' insns.
  13
  14 2004-08-30  Nathanael Nerode  <neroden@gcc.gnu.org>
  15
  16         * configure.in: Autoupdate to autoconf 2.59.
  17         * aclocal.m4: Rebuild with aclocal 1.4p6.
  18         * configure: Rebuild with autoconf 2.59.
  19         * Makefile.in: Rebuild with automake 1.4p6 (picking up
  20         bfd changes for autoconf 2.59 on the way).
  21         * config.in: Rebuild with autoheader 2.59.
  22
  23 2004-08-27  Richard Sandiford  <rsandifo@redhat.com>
  24
  25         * frv-desc.[ch], frv-opc.[ch]: Regenerated.
  26
  27 2004-07-30  Michal Ludvig  <mludvig@suse.cz>
  28
  29         * i386-dis.c (GRPPADLCK): Renamed to GRPPADLCK1
  30         (GRPPADLCK2): New define.
  31         (twobyte_has_modrm): True for 0xA6.
  32         (grps): GRPPADLCK2 for opcode 0xA6.
  33
  34 2004-07-29  Alexandre Oliva  <aoliva@redhat.com>
  35
  36         Introduce SH2a support.
  37         * sh-opc.h (arch_sh2a_base): Renumber.
  38         (arch_sh2a_nofpu_base): Remove.
  39         (arch_sh_base_mask): Adjust.
  40         (arch_opann_mask): New.
  41         (arch_sh2a, arch_sh2a_nofpu): Adjust.
  42         (arch_sh2a_up, arch_sh2a_nofpu_up): Likewise.
  43         (sh_table): Adjust whitespace.
  44         2004-02-24  Corinna Vinschen  <vinschen@redhat.com>
  45         * sh-opc.h (arch_sh2a_nofpu_up): New.  Use instead of arch_sh2a_up in
  46         instruction list throughout.
  47         (arch_sh2a_up): Redefine to include fpu instruction set.  Use instead
  48         of arch_sh2a in instruction list throughout.
  49         (arch_sh2e_up): Accomodate above changes.
  50         (arch_sh2_up): Ditto.
  51         2004-02-20  Corinna Vinschen  <vinschen@redhat.com>
  52         * sh-opc.h: Add arch_sh2a_nofpu to arch_sh2_up.
  53         2004-02-18  Corinna Vinschen  <vinschen@redhat.com>
  54         * sh-dis.c (print_insn_sh): Add bfd_mach_sh2a_nofpu handling.
  55         * sh-opc.h (arch_sh2a_nofpu): New.
  56         (arch_sh2a_up): New, defines sh2a and sh2a_nofpu.
  57         (sh_table): Change all arch_sh2a to arch_sh2a_up unless FPU
  58         instruction.
  59         2004-01-20  DJ Delorie  <dj@redhat.com>
  60         * sh-dis.c (print_insn_sh): SH2A does not have 'X' fp regs.
  61         2003-12-29  DJ Delorie  <dj@redhat.com>
  62         * sh-opc.c (sh_nibble_type, sh_arg_type, arch_2a, arch_2e_up,
  63         sh_opcode_info, sh_table): Add sh2a support.
  64         (arch_op32): New, to tag 32-bit opcodes.
  65         * sh-dis.c (print_insn_sh): Support sh2a opcodes.
  66         2003-12-02  Michael Snyder  <msnyder@redhat.com>
  67         * sh-opc.h (arch_sh2a): Add.
  68         * sh-dis.c (arch_sh2a): Handle.
  69         * sh-opc.h (arch_sh2_up): Fix up to include arch_sh2a.
  70
  71 2004-07-27  Tomer Levi  <Tomer.Levi@nsc.com>
  72
  73         * crx-opc.c: Add popx,pushx insns. Indent code, fix comments.
  74
  75 2004-07-22  Nick Clifton  <nickc@redhat.com>
  76
  77         PR/280
  78         * h8300-dis.c (bfd_h8_disassemble): Do not dump raw bytes for the
  79         insns - this is done by objdump itself.
  80         * h8500-dis.c (print_insn_h8500): Likewise.
  81
  82 2004-07-21  Jan Beulich <jbeulich@novell.com>
  83
  84         * i386-dis.c (OP_E): Show rip-relative addressing in 64-bit mode
  85         regardless of address size prefix in effect.
  86         (ptr_reg): Size or address registers does not depend on rex64, but
  87         on the presence of an address size override.
  88         (OP_MMX): Use rex.x only for xmm registers.
  89         (OP_EM): Use rex.z only for xmm registers.
  90
  91 2004-07-20  Maciej W. Rozycki  <macro@linux-mips.org>
  92
  93         * mips-opc.c (mips_builtin_opcodes): Move coprocessor 2
  94         move/branch operations to the bottom so that VR5400 multimedia
  95         instructions take precedence in disassembly.
  96
  97 2004-07-20  Maciej W. Rozycki  <macro@linux-mips.org>
  98
  99         * mips-opc.c (mips_builtin_opcodes): Remove the MIPS32
 100         ISA-specific "break" encoding.
 101
 102 2004-07-13  Elvis Chiang  <elvisfb@gmail.com>
 103
 104         * arm-opc.h: Fix typo in comment.
 105
 106 2004-07-11  Andreas Schwab  <schwab@suse.de>
 107
 108         * m68k-dis.c (m68k_valid_ea): Fix typos in last change.
 109
 110 2004-07-09  Andreas Schwab  <schwab@suse.de>
 111
 112         * m68k-dis.c (m68k_valid_ea): Check validity of all codes.
 113
 114 2004-07-07  Tomer Levi  <Tomer.Levi@nsc.com>
 115
 116         * Makefile.am (CFILES): Add crx-dis.c, crx-opc.c.
 117         (ALL_MACHINES): Add crx-dis.lo, crx-opc.lo.
 118         (crx-dis.lo): New target.
 119         (crx-opc.lo): Likewise.
 120         * Makefile.in: Regenerate.
 121         * configure.in: Handle bfd_crx_arch.
 122         * configure: Regenerate.
 123         * crx-dis.c: New file.
 124         * crx-opc.c: New file.
 125         * disassemble.c (ARCH_crx): Define.
 126         (disassembler): Handle ARCH_crx.
 127
 128 2004-06-29  James E Wilson  <wilson@specifixinc.com>
 129
 130         * ia64-opc-a.c (ia64_opcodes_a): Delete mov immediate pseudo for adds.
 131         * ia64-asmtab.c: Regnerate.
 132
 133 2004-06-28  Alan Modra  <amodra@bigpond.net.au>
 134
 135         * ppc-opc.c (insert_fxm): Handle mfocrf and mtocrf.
 136         (extract_fxm): Don't test dialect.
 137         (XFXFXM_MASK): Include the power4 bit.
 138         (XFXM): Add p4 param.
 139         (powerpc_opcodes): Add mfocrf and mtocrf.  Adjust mtcr.
 140
 141 2004-06-27  Alexandre Oliva  <aoliva@redhat.com>
 142
 143         2003-07-21  Richard Sandiford  <rsandifo@redhat.com>
 144         * disassemble.c (disassembler): Handle bfd_mach_h8300sxn.
 145
 146 2004-06-26  Alan Modra  <amodra@bigpond.net.au>
 147
 148         * ppc-opc.c (BH, XLBH_MASK): Define.
 149         (powerpc_opcodes): Allow BH field on bclr, bclrl, bcctr, bcctrl.
 150
 151 2004-06-24  Alan Modra  <amodra@bigpond.net.au>
 152
 153         * i386-dis.c (x_mode): Comment.
 154         (two_source_ops): File scope.
 155         (float_mem): Correct fisttpll and fistpll.
 156         (float_mem_mode): New table.
 157         (dofloat): Use it.
 158         (OP_E): Correct intel mode PTR output.
 159         (ptr_reg): Use open_char and close_char.
 160         (PNI_Fixup): Handle possible suffix on sidt.  Use op1out etc. for
 161         operands.  Set two_source_ops.
 162
 163 2004-06-15  Alan Modra  <amodra@bigpond.net.au>
 164
 165         * arc-ext.c (build_ARC_extmap): Use bfd_get_section_size
 166         instead of _raw_size.
 167
 168 2004-06-08  Jakub Jelinek  <jakub@redhat.com>
 169
 170         * ia64-gen.c (in_iclass): Handle more postinc st
 171         and ld variants.
 172         * ia64-asmtab.c: Rebuilt.
 173
 174 2004-06-01  Martin Schwidefsky  <schwidefsky@de.ibm.com>
 175
 176         * s390-opc.txt: Correct architecture mask for some opcodes.
 177         lrv, lrvh, strv, ml, dl, alc, slb rll and mvclu are available
 178         in the esa mode as well.
 179
 180 2004-05-28  Andrew Stubbs <andrew.stubbs@superh.com>
 181
 182         * sh-dis.c (target_arch): Make unsigned.
 183         (print_insn_sh): Replace (most of) switch with a call to
 184         sh_get_arch_from_bfd_mach(). Also use new architecture flags system.
 185         * sh-opc.h: Redefine architecture flags values.
 186         Add sh3-nommu architecture.
 187         Reorganise <arch>_up macros so they make more visual sense.
 188         (SH_MERGE_ARCH_SET): Define new macro.
 189         (SH_VALID_BASE_ARCH_SET): Likewise.
 190         (SH_VALID_MMU_ARCH_SET): Likewise.
 191         (SH_VALID_CO_ARCH_SET): Likewise.
 192         (SH_VALID_ARCH_SET): Likewise.
 193         (SH_MERGE_ARCH_SET_VALID): Likewise.
 194         (SH_ARCH_SET_HAS_FPU): Likewise.
 195         (SH_ARCH_SET_HAS_DSP): Likewise.
 196         (SH_ARCH_UNKNOWN_ARCH): Likewise.
 197         (sh_get_arch_from_bfd_mach): Add prototype.
 198         (sh_get_arch_up_from_bfd_mach): Likewise.
 199         (sh_get_bfd_mach_from_arch_set): Likewise.
 200         (sh_merge_bfd_arc): Likewise.
 201
 202 2004-05-24  Peter Barada  <peter@the-baradas.com>
 203
 204         * m68k-dis.c(print_insn_m68k): Strip body of diassembly out
 205         into new match_insn_m68k function.  Loop over canidate
 206         matches and select first that completely matches.
 207         * m68k-dis.c(print_insn_arg): Fix 'g' case to only extract 1 bit.
 208         * m68k-dis.c(print_insn_arg): Call new function m68k_valid_ea
 209         to verify addressing for MAC/EMAC.
 210         * m68k-dis.c(print_insn_arg): Use reg_half_names for MAC/EMAC
 211         reigster halves since 'fpu' and 'spl' look misleading.
 212         * m68k-dis.c(fetch_arg): Fix 'G', 'H', 'I', 'f', 'M', 'N' cases.
 213         * m68k-opc.c: Rearragne mac/emac cases to use longest for
 214         first, tighten up match masks.
 215         * m68k-opc.c: Add 'size' field to struct m68k_opcode.  Produce
 216         'size' from special case code in print_insn_m68k to
 217         determine decode size of insns.
 218
 219 2004-05-19  Alan Modra  <amodra@bigpond.net.au>
 220
 221         * ppc-opc.c (insert_fxm): Enable two operand mfcr when -many as
 222         well as when -mpower4.
 223
 224 2004-05-13  Nick Clifton  <nickc@redhat.com>
 225
 226         * po/fr.po: Updated French translation.
 227
 228 2004-05-05  Peter Barada  <peter@the-baradas.com>
 229
 230         * m68k-dis.c(print_insn_m68k): Add new chips, use core
 231         variants in arch_mask.  Only set m68881/68851 for 68k chips.
 232         * m68k-op.c: Switch from ColdFire chips to core variants.
 233
 234 2004-05-05  Alan Modra  <amodra@bigpond.net.au>
 235
 236         PR 147.
 237         * ppc-opc.c (PPCVEC): Remove PPC_OPCODE_PPC.
 238
 239 2004-04-29  Ben Elliston  <bje@au.ibm.com>
 240
 241         * ppc-opc.c (XCMPL): Renmame to XOPL. Update users.
 242         (powerpc_opcodes): Add "dbczl" instruction for PPC970.
 243
 244 2004-04-22  Kaz Kojima  <kkojima@rr.iij4u.or.jp>
 245
 246         * sh-dis.c (print_insn_sh): Print the value in constant pool
 247         as a symbol if it looks like a symbol.
 248
 249 2004-04-22  Peter Barada <peter@the-baradas.com>
 250
 251         * m68k-dis.c(print_insn_m68k): Set mfcmac/mcfemac on
 252         appropriate ColdFire architectures.
 253         (print_insn_m68k): Handle EMAC, MAC/EMAC scalefactor, and MAC/EMAC
 254         mask addressing.
 255         Add EMAC instructions, fix MAC instructions. Remove
 256         macmw/macml/msacmw/msacml instructions since mask addressing now
 257         supported.
 258
 259 2004-04-20  Jakub Jelinek  <jakub@redhat.com>
 260
 261         * sparc-opc.c (fmoviccx, fmovfccx, fmovccx): Define.
 262         (fmovicc, fmovfcc, fmovcc): Remove fpsize argument, change opcode to
 263         suffix.  Use fmov*x macros, create all 3 fpsize variants in one
 264         macro.  Adjust all users.
 265
 266 2004-04-15  Anil Paranjpe  <anilp1@kpitcummins.com>
 267
 268         * h8300-dis.c (bfd_h8_disassemble) : Treat "adds" & "subs"
 269         separately.
 270
 271 2004-03-30  Kazuhiro Inaoka  <inaoka.kazuhiro@renesas.com>
 272
 273         * m32r-asm.c: Regenerate.
 274
 275 2004-03-29  Stan Shebs  <shebs@apple.com>
 276
 277         * mpw-config.in, mpw-make.sed: Remove MPW support files, no longer
 278         used.
 279
 280 2004-03-19  Alan Modra  <amodra@bigpond.net.au>
 281
 282         * aclocal.m4: Regenerate.
 283         * config.in: Regenerate.
 284         * configure: Regenerate.
 285         * po/POTFILES.in: Regenerate.
 286         * po/opcodes.pot: Regenerate.
 287
 288 2004-03-16  Alan Modra  <amodra@bigpond.net.au>
 289
 290         * ppc-dis.c (print_insn_powerpc): Don't print tabs.  Handle
 291         PPC_OPERANDS_GPR_0.
 292         * ppc-opc.c (RA0): Define.
 293         (RAQ, RAL, RAM, RAS, RSQ, RTQ, RSO): Use PPC_OPERAND_GPR_0.
 294         (RAOPT): Rename from RAO.  Update all uses.
 295         (powerpc_opcodes): Use RA0 as appropriate.
 296
 297 2004-03-15  Aldy Hernandez  <aldyh@redhat.com>
 298
 299         * ppc-opc.c (powerpc_opcodes): Add BOOKE versions of mfsprg.
 300
 301 2004-03-15  Alan Modra  <amodra@bigpond.net.au>
 302
 303         * sparc-dis.c (print_insn_sparc): Update getword prototype.
 304
 305 2004-03-12  Michal Ludvig  <mludvig@suse.cz>
 306
 307         * i386-dis.c (GRPPLOCK): Delete.
 308         (grps): Delete GRPPLOCK entry.
 309
 310 2004-03-12  Alan Modra  <amodra@bigpond.net.au>
 311
 312         * i386-dis.c (OP_M, OP_0f0e, OP_0fae, NOP_Fixup): New functions.
 313         (M, Mp): Use OP_M.
 314         (None, PADLOCK_SPECIAL, PADLOCK_0): Delete.
 315         (GRPPADLCK): Define.
 316         (dis386): Use NOP_Fixup on "nop".
 317         (dis386_twobyte): Use GRPPADLCK on opcode 0xa7.
 318         (twobyte_has_modrm): Set for 0xa7.
 319         (padlock_table): Delete.  Move to..
 320         (grps): ..here, using OP_0f07.  Use OP_Ofae on lfence, mfence
 321         and clflush.
 322         (print_insn): Revert PADLOCK_SPECIAL code.
 323         (OP_E): Delete sfence, lfence, mfence checks.
 324
 325 2004-03-12  Jakub Jelinek  <jakub@redhat.com>
 326
 327         * i386-dis.c (grps): Use INVLPG_Fixup instead of OP_E for invlpg.
 328         (INVLPG_Fixup): New function.
 329         (PNI_Fixup): Remove ATTRIBUTE_UNUSED from sizeflag.
 330
 331 2004-03-12  Michal Ludvig  <mludvig@suse.cz>
 332
 333         * i386-dis.c (PADLOCK_SPECIAL, PADLOCK_0): New defines.
 334         (dis386_twobyte): Opcode 0xa7 is PADLOCK_0.
 335         (padlock_table): New struct with PadLock instructions.
 336         (print_insn): Handle PADLOCK_SPECIAL.
 337
 338 2004-03-12  Alan Modra  <amodra@bigpond.net.au>
 339
 340         * i386-dis.c (grps): Use clflush by default for 0x0fae/7.
 341         (OP_E): Twiddle clflush to sfence here.
 342
 343 2004-03-08  Nick Clifton  <nickc@redhat.com>
 344
 345         * po/de.po: Updated German translation.
 346
 347 2003-03-03  Andrew Stubbs  <andrew.stubbs@superh.com>
 348
 349         * sh-dis.c (print_insn_sh): Don't disassemble fp instructions in
 350         nofpu mode.  Add BFD type bfd_mach_sh4_nommu_nofpu.
 351         * sh-opc.h: Add sh4_nommu_nofpu architecture and adjust instructions
 352         accordingly.
 353
 354 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
 355
 356         * frv-asm.c: Regenerate.
 357         * frv-desc.c: Regenerate.
 358         * frv-desc.h: Regenerate.
 359         * frv-dis.c: Regenerate.
 360         * frv-ibld.c: Regenerate.
 361         * frv-opc.c: Regenerate.
 362         * frv-opc.h: Regenerate.
 363
 364 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
 365
 366         * frv-desc.c, frv-opc.c: Regenerate.
 367
 368 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
 369
 370         * frv-desc.c, frv-opc.c, frv-opc.h: Regenerate.
 371
 372 2004-02-26  Andrew Stubbs  <andrew.stubbs@superh.com>
 373
 374         * sh-opc.h: Move fsca and fsrra instructions from sh4a to sh4.
 375         Also correct mistake in the comment.
 376
 377 2004-02-26  Andrew Stubbs <andrew.stubbs@superh.com>
 378
 379         * sh-dis.c (print_insn_sh): Add REG_N_D nibble type to
 380         ensure that double registers have even numbers.
 381         Add REG_N_B01 for nn01 (binary 01) nibble to ensure
 382         that reserved instruction 0xfffd does not decode the same
 383         as 0xfdfd (ftrv).
 384         * sh-opc.h: Add REG_N_D nibble type and use it whereever
 385         REG_N refers to a double register.
 386         Add REG_N_B01 nibble type and use it instead of REG_NM
 387         in ftrv.
 388         Adjust the bit patterns in a few comments.
 389
 390 2004-02-25  Aldy Hernandez  <aldyh@redhat.com>
 391
 392         * ppc-opc.c (powerpc_opcodes): Change mask for dcbt and dcbtst.
 393
 394 2004-02-20  Aldy Hernandez  <aldyh@redhat.com>
 395
 396         * ppc-opc.c (powerpc_opcodes): Move mfmcsrr0 before mfdc_dat.
 397
 398 2004-02-20  Aldy Hernandez  <aldyh@redhat.com>
 399
 400         * ppc-opc.c (powerpc_opcodes): Add m*ivor35.
 401
 402 2004-02-20  Aldy Hernandez  <aldyh@redhat.com>
 403
 404         * ppc-opc.c (powerpc_opcodes): Add mfivor32, mfivor33, mfivor34,
 405         mtivor32, mtivor33, mtivor34.
 406
 407 2004-02-19  Aldy Hernandez  <aldyh@redhat.com>
 408
 409         * ppc-opc.c (powerpc_opcodes): Add mfmcar.
 410
 411 2004-02-10  Petko Manolov  <petkan@nucleusys.com>
 412
 413         * arm-opc.h Maverick accumulator register opcode fixes.
 414
 415 2004-02-13  Ben Elliston  <bje@wasabisystems.com>
 416
 417         * m32r-dis.c: Regenerate.
 418
 419 2004-01-27  Michael Snyder  <msnyder@redhat.com>
 420
 421         * sh-opc.h (sh_table): "fsrra", not "fssra".
 422
 423 2004-01-23  Andrew Over <andrew.over@cs.anu.edu.au>
 424
 425         * sparc-opc.c (fdtox, fstox, fqtox, fxtod, fxtos, fxtoq): Tighten
 426         contraints.
 427
 428 2004-01-19  Andrew Over  <andrew.over@cs.anu.edu.au>
 429
 430         * sparc-opc.c (sparc_opcodes) <f[dsq]tox, fxto[dsq]>: Fix args.
 431
 432 2004-01-19  Alan Modra  <amodra@bigpond.net.au>
 433
 434         * i386-dis.c (OP_E): Print scale factor on intel mode sib when not
 435         1.  Don't print scale factor on AT&T mode when index missing.
 436
 437 2004-01-16  Alexandre Oliva  <aoliva@redhat.com>
 438
 439         * m10300-opc.c (mov): 8- and 24-bit immediates are zero-extended
 440         when loaded into XR registers.
 441
 442 2004-01-14  Richard Sandiford  <rsandifo@redhat.com>
 443
 444         * frv-desc.h: Regenerate.
 445         * frv-desc.c: Regenerate.
 446         * frv-opc.c: Regenerate.
 447
 448 2004-01-13  Michael Snyder  <msnyder@redhat.com>
 449
 450         * sh-dis.c (print_insn_sh): Allocate 4 bytes for insn.
 451
 452 2004-01-09  Paul Brook  <paul@codesourcery.com>
 453
 454         * arm-opc.h (arm_opcodes): Move generic mcrr after known
 455         specific opcodes.
 456
 457 2004-01-07  Daniel Jacobowitz  <drow@mvista.com>
 458
 459         * Makefile.am (libopcodes_la_DEPENDENCIES)
 460         (libopcodes_la_LIBADD): Revert 2003-05-17 change.  Add explanatory
 461         comment about the problem.
 462         * Makefile.in: Regenerate.
 463
 464 2004-01-06  Alexandre Oliva  <aoliva@redhat.com>
 465
 466         2003-12-19  Alexandre Oliva  <aoliva@redhat.com>
 467         * frv-asm.c (parse_ulo16, parse_uhi16, parse_d12): Fix some
 468         cut&paste errors in shifting/truncating numerical operands.
 469         2003-08-04  Alexandre Oliva  <aoliva@redhat.com>
 470         * frv-asm.c (parse_ulo16): Parse gotofflo and gotofffuncdesclo.
 471         (parse_uslo16): Likewise.
 472         (parse_uhi16): Parse gotoffhi and gotofffuncdeschi.
 473         (parse_d12): Parse gotoff12 and gotofffuncdesc12.
 474         (parse_s12): Likewise.
 475         2003-08-04  Alexandre Oliva  <aoliva@redhat.com>
 476         * frv-asm.c (parse_ulo16): Parse gotlo and gotfuncdesclo.
 477         (parse_uslo16): Likewise.
 478         (parse_uhi16): Parse gothi and gotfuncdeschi.
 479         (parse_d12): Parse got12 and gotfuncdesc12.
 480         (parse_s12): Likewise.
 481
 482 2004-01-02  Albert Bartoszko  <albar@nt.kegel.com.pl>
 483
 484         * msp430-dis.c (msp430_doubleoperand): Check for an 'add'
 485         instruction which looks similar to an 'rla' instruction.
 486
 487 For older changes see ChangeLog-0203
 488 \f
 489 Local Variables:
 490 mode: change-log
 491 left-margin: 8
 492 fill-column: 74
 493 version-control: never
 494 End: