1 2016-05-27 H.J. Lu <hongjiu.lu@intel.com>
4 * i386-gen.c (cpu_flag_init): Update CPU_XXX_FLAGS. Remove
5 CpuMMX from CPU_SSE_FLAGS. Remove AVX and AVX512 bits from
6 CPU_ANY_SSE_FLAGS. Remove AVX512 bits from CPU_ANY_AVX_FLAGS.
7 Add CPU_XSAVE_FLAGS to CPU_XSAVEOPT_FLAGS, CPU_XSAVE_FLAGS and
8 CpuXSAVEC. Add CPU_AVX_FLAGS to CpuF16C. Remove CpuMMX from
9 CPU_AVX512F_FLAGS, CPU_AVX512CD_FLAGS, CPU_AVX512ER_FLAGS,
10 CPU_AVX512PF_FLAGS, CPU_AVX512DQ_FLAGS and CPU_AVX512BW_FLAGS.
11 Add CPU_SSE2_FLAGS to CPU_SHA_FLAGS. Add CPU_ANY_287_FLAGS,
12 CPU_ANY_387_FLAGS, CPU_ANY_687_FLAGS, CPU_ANY_SSE2_FLAGS,
13 CPU_ANY_SSE3_FLAGS, CPU_ANY_SSSE3_FLAGS, CPU_ANY_SSE4_1_FLAGS,
14 CPU_ANY_SSE4_2_FLAGS and CPU_ANY_AVX2_FLAGS. Enable CpuRegMMX
15 for MMX. Enable CpuRegXMM for SSE, AVX and AVX512. Enable
16 CpuRegYMM for AVX and AVX512VL, Enable CpuRegZMM and
17 CpuRegMask for AVX512.
18 (cpu_flags): Add CpuRegMMX, CpuRegXMM, CpuRegYMM, CpuRegZMM
20 (set_bitfield_from_cpu_flag_init): New function.
21 (set_bitfield): Remove const on f. Call
22 set_bitfield_from_cpu_flag_init to handle CPU_XXX_FLAGS.
23 * i386-opc.h (CpuRegMMX): New.
24 (CpuRegXMM): Likewise.
25 (CpuRegYMM): Likewise.
26 (CpuRegZMM): Likewise.
27 (CpuRegMask): Likewise.
28 (i386_cpu_flags): Add cpuregmmx, cpuregxmm, cpuregymm, cpuregzmm
30 * i386-init.h: Regenerated.
31 * i386-tbl.h: Likewise.
33 2016-05-27 H.J. Lu <hongjiu.lu@intel.com>
36 * i386-gen.c (cpu_flags): Remove CpuAMD64 and CpuIntel64.
37 (opcode_modifiers): Add AMD64 and Intel64.
38 (main): Properly verify CpuMax.
39 * i386-opc.h (CpuAMD64): Removed.
40 (CpuIntel64): Likewise.
41 (CpuMax): Set to CpuNo64.
42 (i386_cpu_flags): Remove cpuamd64 and cpuintel64.
45 (i386_opcode_modifier): Add amd64 and intel64.
46 (i386-opc.tbl): Replace CpuAMD64/CpuIntel64 with AMD64/Intel64
48 * i386-init.h: Regenerated.
49 * i386-tbl.h: Likewise.
51 2016-05-27 H.J. Lu <hongjiu.lu@intel.com>
54 * i386-gen.c (main): Fail if CpuMax is incorrect.
55 * i386-opc.h (CpuMax): Set to CpuIntel64.
56 * i386-tbl.h: Regenerated.
58 2016-05-27 Nick Clifton <nickc@redhat.com>
61 * msp430-dis.c (msp430dis_read_two_bytes): New function.
62 (msp430dis_opcode_unsigned): New function.
63 (msp430dis_opcode_signed): New function.
64 (msp430_singleoperand): Use the new opcode reading functions.
65 Only disassenmble bytes if they were successfully read.
66 (msp430_doubleoperand): Likewise.
67 (msp430_branchinstr): Likewise.
68 (msp430x_callx_instr): Likewise.
69 (print_insn_msp430): Check that it is safe to read bytes before
70 attempting disassembly. Use the new opcode reading functions.
72 2016-05-26 Peter Bergner <bergner@vnet.ibm.com>
74 * ppc-opc.c (CY): New define. Document it.
75 (powerpc_opcodes) <addex[.], lwzmx, vmsumudm>: New mnemonics.
77 2016-05-25 H.J. Lu <hongjiu.lu@intel.com>
79 * i386-gen.c (cpu_flag_init): Add CpuVREX to CPU_AVX512DQ_FLAGS,
80 CPU_AVX512BW_FLAGS, CPU_AVX512VL_FLAGS, CPU_AVX512IFMA_FLAGS
81 and CPU_AVX512VBMI_FLAGS. Add CpuAVX512DQ, CpuAVX512BW,
82 CpuAVX512VL, CpuAVX512IFMA and CpuAVX512VBMI to
84 * i386-init.h: Regenerated.
86 2016-05-25 H.J. Lu <hongjiu.lu@intel.com>
89 * i386-gen.c (cpu_flag_init): Add CpuVREX to CPU_AVX512F_FLAGS,
90 CPU_AVX512CD_FLAGS, CPU_AVX512ER_FLAGS and CPU_AVX512PF_FLAGS.
91 * i386-init.h: Regenerated.
93 2016-05-25 H.J. Lu <hongjiu.lu@intel.com>
95 * i386-gen.c (cpu_flag_init): Rename CPU_ANY87_FLAGS to
96 CPU_ANY_X87_FLAGS. Add CPU_ANY_MMX_FLAGS.
97 * i386-init.h: Regenerated.
99 2016-05-23 Claudiu Zissulescu <claziss@synopsys.com>
101 * arc-dis.c (print_flags): Set branch_delay_insns, and insn_type
103 (print_insn_arc): Set insn_type information.
104 * arc-opc.c (C_CC): Add F_CLASS_COND.
105 * arc-tbl.h (bbit0, bbit1): Update subclass to COND.
106 (beq_s, bge_s, bgt_s, bhi_s, bhs_s): Likewise.
107 (ble_s, blo_s, bls_s, blt_s, bne_s): Likewise.
108 (breq, breq_s, brge, brhs, brlo, brlt): Likewise.
109 (brne, brne_s, jeq_s, jne_s): Likewise.
111 2016-05-23 Claudiu Zissulescu <claziss@synopsys.com>
113 * arc-tbl.h (neg): New instruction variant.
115 2016-05-23 Cupertino Miranda <cmiranda@synopsys.com>
117 * arc-dis.c (find_format, find_format, get_auxreg)
118 (print_insn_arc): Changed.
119 * arc-ext.h (INSERT_XOP): Likewise.
121 2016-05-23 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
123 * tic54x-dis.c (sprint_mmr): Adjust.
124 * tic54x-opc.c: Likewise.
126 2016-05-19 Alan Modra <amodra@gmail.com>
128 * ppc-opc.c (NSISIGNOPT): Use insert_nsi and extract_nsi.
130 2016-05-19 Alan Modra <amodra@gmail.com>
132 * ppc-opc.c: Formatting.
133 (NSISIGNOPT): Define.
134 (powerpc_opcodes <subis>): Use NSISIGNOPT.
136 2016-05-18 Maciej W. Rozycki <macro@imgtec.com>
138 * mips-dis.c (is_compressed_mode_p): Add `micromips_p' operand,
139 replacing references to `micromips_ase' throughout.
140 (_print_insn_mips): Don't use file-level microMIPS annotation to
141 determine the disassembly mode with the symbol table.
143 2016-05-13 Peter Bergner <bergner@vnet.ibm.com>
145 * ppc-opc.c (IMM8): Use PPC_OPERAND_SIGNOPT.
147 2016-05-11 Andrew Bennett <andrew.bennett@imgtec.com>
149 * mips-dis.c (mips_arch_choices): Add ASE_DSPR3 to mips32r6 and
151 * mips-opc.c (D34): New macro.
152 (mips_builtin_opcodes): Define bposge32c for DSPr3.
154 2016-05-10 Alexander Fomin <alexander.fomin@intel.com>
156 * i386-dis.c (prefix_table): Add RDPID instruction.
157 * i386-gen.c (cpu_flag_init): Add RDPID flag.
158 (cpu_flags): Add RDPID bitfield.
159 * i386-opc.h (enum): Add RDPID element.
160 (i386_cpu_flags): Add RDPID field.
161 * i386-opc.tbl: Add RDPID instruction.
162 * i386-init.h: Regenerate.
163 * i386-tbl.h: Regenerate.
165 2016-05-10 Thomas Preud'homme <thomas.preudhomme@arm.com>
167 * arm-dis.c (get_sym_code_type): Use ARM_GET_SYM_BRANCH_TYPE to get
168 branch type of a symbol.
169 (print_insn): Likewise.
171 2016-05-10 Thomas Preud'homme <thomas.preudhomme@arm.com>
173 * arm-dis.c (coprocessor_opcodes): Add entries for VFP ARMv8-M
174 Mainline Security Extensions instructions.
175 (thumb_opcodes): Add entries for narrow ARMv8-M Security
176 Extensions instructions.
177 (thumb32_opcodes): Add entries for wide ARMv8-M Security Extensions
179 (psr_name): Add new MSP_NS and PSP_NS ARMv8-M Security Extensions
182 2016-05-09 Jose E. Marchesi <jose.marchesi@oracle.com>
184 * sparc-opc.c (sparc_opcodes): Fix mnemonic of faligndatai.
186 2016-05-03 Claudiu Zissulescu <claziss@synopsys.com>
188 * arc-ext.c (dump_ARC_extmap): Handle SYNATX_NOP and SYNTAX_1OP.
189 (arcExtMap_genOpcode): Likewise.
190 * arc-opc.c (arg_32bit_rc): Define new variable.
191 (arg_32bit_u6): Likewise.
192 (arg_32bit_limm): Likewise.
194 2016-05-03 Szabolcs Nagy <szabolcs.nagy@arm.com>
196 * aarch64-gen.c (VERIFIER): Define.
197 * aarch64-opc.c (VERIFIER): Define.
198 (verify_ldpsw): Use static linkage.
199 * aarch64-opc.h (verify_ldpsw): Remove.
200 * aarch64-tbl.h: Use VERIFIER for verifiers.
202 2016-04-28 Nick Clifton <nickc@redhat.com>
205 * aarch64-dis.c (aarch64_opcode_decode): Run verifier if present.
206 * aarch64-opc.c (verify_ldpsw): New function.
207 * aarch64-opc.h (verify_ldpsw): New prototype.
208 * aarch64-tbl.h: Add initialiser for verifier field.
209 (LDPSW): Set verifier to verify_ldpsw.
211 2016-04-23 H.J. Lu <hongjiu.lu@intel.com>
215 * i386-dis.c (print_insn): Return -1 if size of bfd_vma is
216 smaller than address size.
218 2016-04-20 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
220 * alpha-dis.c: Regenerate.
221 * crx-dis.c: Likewise.
222 * disassemble.c: Likewise.
223 * epiphany-opc.c: Likewise.
224 * fr30-opc.c: Likewise.
225 * frv-opc.c: Likewise.
226 * ip2k-opc.c: Likewise.
227 * iq2000-opc.c: Likewise.
228 * lm32-opc.c: Likewise.
229 * lm32-opinst.c: Likewise.
230 * m32c-opc.c: Likewise.
231 * m32r-opc.c: Likewise.
232 * m32r-opinst.c: Likewise.
233 * mep-opc.c: Likewise.
234 * mt-opc.c: Likewise.
235 * or1k-opc.c: Likewise.
236 * or1k-opinst.c: Likewise.
237 * tic80-opc.c: Likewise.
238 * xc16x-opc.c: Likewise.
239 * xstormy16-opc.c: Likewise.
241 2016-04-19 Andrew Burgess <andrew.burgess@embecosm.com>
243 * arc-nps400-tbl.h: Add addb, subb, adcb, sbcb, andb, xorb, orb,
244 fxorb, wxorb, shlb, shrb, notb, cntbb, div, mod, divm, qcmp,
245 calcsd, and calcxd instructions.
246 * arc-opc.c (insert_nps_bitop_size): Delete.
247 (extract_nps_bitop_size): Delete.
248 (MAKE_SRC_POS_INSERT_EXTRACT_FUNCS): Define, and use.
249 (extract_nps_qcmp_m3): Define.
250 (extract_nps_qcmp_m2): Define.
251 (extract_nps_qcmp_m1): Define.
252 (arc_flag_operands): Add F_NPS_SX, F_NPS_AR, F_NPS_AL.
253 (arc_flag_classes): Add C_NPS_SX, C_NPS_AR_AL
254 (arc_operands): Add NPS_SRC2_POS, NPS_SRC1_POS, NPS_ADDB_SIZE,
255 NPS_ANDB_SIZE, NPS_FXORB_SIZ, NPS_WXORB_SIZ, NPS_R_XLDST,
256 NPS_DIV_UIMM4, NPS_QCMP_SIZE, NPS_QCMP_M1, NPS_QCMP_M2, and
259 2016-04-19 Andrew Burgess <andrew.burgess@embecosm.com>
261 * arc-nps400-tbl.h: Add dctcp, dcip, dcet, and dcacl instructions.
263 2016-04-15 H.J. Lu <hongjiu.lu@intel.com>
265 * Makefile.in: Regenerated with automake 1.11.6.
266 * aclocal.m4: Likewise.
268 2016-04-14 Andrew Burgess <andrew.burgess@embecosm.com>
270 * arc-nps400-tbl.h: Add xldb, xldw, xld, xstb, xstw, and xst
272 * arc-opc.c (insert_nps_cmem_uimm16): New function.
273 (extract_nps_cmem_uimm16): New function.
274 (arc_operands): Add NPS_XLDST_UIMM16 operand.
276 2016-04-14 Andrew Burgess <andrew.burgess@embecosm.com>
278 * arc-dis.c (arc_insn_length): New function.
279 (print_insn_arc): Use arc_insn_length, change insnLen to unsigned.
280 (find_format): Change insnLen parameter to unsigned.
282 2016-04-13 Nick Clifton <nickc@redhat.com>
285 * v850-opc.c (v850_opcodes): Correct masks for long versions of
286 the LD.B and LD.BU instructions.
288 2016-04-12 Claudiu Zissulescu <claziss@synopsys.com>
290 * arc-dis.c (find_format): Check for extension flags.
291 (print_flags): New function.
292 (print_insn_arc): Update for .extCondCode, .extCoreRegister and
294 * arc-ext.c (arcExtMap_coreRegName): Use
295 LAST_EXTENSION_CORE_REGISTER.
296 (arcExtMap_coreReadWrite): Likewise.
297 (dump_ARC_extmap): Update printing.
298 * arc-opc.c (arc_flag_classes): Add F_CLASS_EXTEND flag.
299 (arc_aux_regs): Add cpu field.
300 * arc-regs.h: Add cpu field, lower case name aux registers.
302 2016-04-12 Claudiu Zissulescu <claziss@synopsys.com>
304 * arc-tbl.h: Add rtsc, sleep with no arguments.
306 2016-04-12 Claudiu Zissulescu <claziss@synopsys.com>
308 * arc-opc.c (flags_none, flags_f, flags_cc, flags_ccf):
310 (arg_none, arg_32bit_rarbrc, arg_32bit_zarbrc, arg_32bit_rbrbrc)
311 (arg_32bit_rarbu6, arg_32bit_zarbu6, arg_32bit_rbrbu6)
312 (arg_32bit_rbrbs12, arg_32bit_ralimmrc, arg_32bit_rarblimm)
313 (arg_32bit_zalimmrc, arg_32bit_zarblimm, arg_32bit_rbrblimm)
314 (arg_32bit_ralimmu6, arg_32bit_zalimmu6, arg_32bit_zalimms12)
315 (arg_32bit_ralimmlimm, arg_32bit_zalimmlimm, arg_32bit_rbrc)
316 (arg_32bit_zarc, arg_32bit_rbu6, arg_32bit_zau6, arg_32bit_rblimm)
317 (arg_32bit_zalimm, arg_32bit_limmrc, arg_32bit_limmu6)
318 (arg_32bit_limms12, arg_32bit_limmlimm): Likewise.
319 (arc_opcode arc_opcodes): Null terminate the array.
320 (arc_num_opcodes): Remove.
321 * arc-ext.h (INSERT_XOP): Define.
322 (extInstruction_t): Likewise.
323 (arcExtMap_instName): Delete.
324 (arcExtMap_insn): New function.
325 (arcExtMap_genOpcode): Likewise.
326 * arc-ext.c (ExtInstruction): Remove.
327 (create_map): Zero initialize instruction fields.
328 (arcExtMap_instName): Remove.
329 (arcExtMap_insn): New function.
330 (dump_ARC_extmap): More info while debuging.
331 (arcExtMap_genOpcode): New function.
332 * arc-dis.c (find_format): New function.
333 (print_insn_arc): Use find_format.
334 (arc_get_disassembler): Enable dump_ARC_extmap only when
337 2016-04-11 Maciej W. Rozycki <macro@imgtec.com>
339 * mips-dis.c (print_mips16_insn_arg): Mask unused extended
340 instruction bits out.
342 2016-04-07 Andrew Burgess <andrew.burgess@embecosm.com>
344 * arc-nps400-tbl.h: Add schd, sync, and hwschd instructions.
345 * arc-opc.c (arc_flag_operands): Add new flags.
346 (arc_flag_classes): Add new classes.
348 2016-04-07 Andrew Burgess <andrew.burgess@embecosm.com>
350 * arc-opc.c (arc_opcodes): Extend comment to discus table layout.
352 2016-04-05 Andrew Burgess <andrew.burgess@embecosm.com>
354 * arc-nps400-tbl.h: Add movbi, decode1, fbset, fbclear, encode0,
355 encode1, rflt, crc16, and crc32 instructions.
356 * arc-opc.c (arc_flag_operands): Add F_NPS_R.
357 (arc_flag_classes): Add C_NPS_R.
358 (insert_nps_bitop_size_2b): New function.
359 (extract_nps_bitop_size_2b): Likewise.
360 (insert_nps_bitop_uimm8): Likewise.
361 (extract_nps_bitop_uimm8): Likewise.
362 (arc_operands): Add new operand entries.
364 2016-04-05 Claudiu Zissulescu <claziss@synopsys.com>
366 * arc-regs.h: Add a new subclass field. Add double assist
367 accumulator register values.
368 * arc-tbl.h: Use DPA subclass to mark the double assist
369 instructions. Use DPX/SPX subclas to mark the FPX instructions.
370 * arc-opc.c (RSP): Define instead of SP.
371 (arc_aux_regs): Add the subclass field.
373 2016-04-05 Jiong Wang <jiong.wang@arm.com>
375 * arm-dis.c: Support FP16 vmul, vmla, vmls (by scalar).
377 2016-03-31 Andrew Burgess <andrew.burgess@embecosm.com>
379 * arc-opc.c (arc_operands): Fix operand flags for NPS_R_DST, and
382 2016-03-30 Andrew Burgess <andrew.burgess@embecosm.com>
384 * arc-nps400-tbl.h: Add a header comment, and fix some whitespace
385 issues. No functional changes.
387 2016-03-30 Claudiu Zissulescu <claziss@synopsys.com>
389 * arc-regs.h (IC_RAM_ADDRESS, IC_TAG, IC_WP, IC_DATA, CONTROL0)
390 (AX2, AY2, MX2, MY2, AY0, AY1, DC_RAM_ADDR, DC_TAG, CONTROL1)
391 (RTT): Remove duplicate.
392 (LCDINSTR, LCDDATA, LCDSTAT, CC_*, PCT_COUNT*, PCT_SNAP*)
393 (PCT_CONFIG*): Remove.
394 (D1L, D1H, D2H, D2L): Define.
396 2016-03-29 Claudiu Zissulescu <claziss@synopsys.com>
398 * arc-ext-tbl.h (dsp_fp_i2flt): Fix typo.
400 2016-03-29 Claudiu Zissulescu <claziss@synopsys.com>
402 * arc-tbl.h (invld07): Remove.
403 * arc-ext-tbl.h: New file.
404 * arc-dis.c (FIELDA, FIELDB, FIELDC): Remove.
405 * arc-opc.c (arc_opcodes): Add ext-tbl include.
407 2016-03-24 Jan Kratochvil <jan.kratochvil@redhat.com>
409 Fix -Wstack-usage warnings.
410 * aarch64-dis.c (print_operands): Substitute size.
411 * aarch64-opc.c (print_register_offset_address): Substitute tblen.
413 2016-03-22 Jose E. Marchesi <jose.marchesi@oracle.com>
415 * sparc-opc.c (sparc_opcodes): Reorder entries for `rd' in order
416 to get a proper diagnostic when an invalid ASR register is used.
418 2016-03-22 Nick Clifton <nickc@redhat.com>
420 * configure: Regenerate.
422 2016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
424 * arc-nps400-tbl.h: New file.
425 * arc-opc.c: Add top level comment.
426 (insert_nps_3bit_dst): New function.
427 (extract_nps_3bit_dst): New function.
428 (insert_nps_3bit_src2): New function.
429 (extract_nps_3bit_src2): New function.
430 (insert_nps_bitop_size): New function.
431 (extract_nps_bitop_size): New function.
432 (arc_flag_operands): Add nps400 entries.
433 (arc_flag_classes): Add nps400 entries.
434 (arc_operands): Add nps400 entries.
435 (arc_opcodes): Add nps400 include.
437 2016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
439 * arc-opc.c (arc_flag_classes): Convert all flag classes to use
440 the new class enum values.
442 2016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
444 * arc-dis.c (print_insn_arc): Handle nps400.
446 2016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
448 * arc-opc.c (BASE): Delete.
450 2016-03-18 Nick Clifton <nickc@redhat.com>
453 * aarch64-tbl.h (aarch64_opcode_table): Fix type of second operand
454 of MOV insn that aliases an ORR insn.
456 2016-03-16 Jiong Wang <jiong.wang@arm.com>
458 * arm-dis.c (neon_opcodes): Support new FP16 instructions.
460 2016-03-07 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
462 * mcore-opc.h: Add const qualifiers.
463 * microblaze-opc.h (struct op_code_struct): Likewise.
464 * sh-opc.h: Likewise.
465 * tic4x-dis.c (tic4x_print_indirect): Likewise.
466 (tic4x_print_op): Likewise.
468 2016-03-02 Alan Modra <amodra@gmail.com>
470 * or1k-desc.h: Regenerate.
471 * fr30-ibld.c: Regenerate.
472 * rl78-decode.c: Regenerate.
474 2016-03-01 Nick Clifton <nickc@redhat.com>
477 * rl78-dis.c (print_insn_rl78_common): Fix typo.
479 2016-02-24 Renlin Li <renlin.li@arm.com>
481 * arm-dis.c (coprocessor_opcodes): Add fp16 instruction entries.
482 (print_insn_coprocessor): Support fp16 instructions.
484 2016-02-24 Renlin Li <renlin.li@arm.com>
486 * arm-dis.c (print_insn_coprocessor): Fix mask for vsel, vmaxnm,
489 2016-02-24 Renlin Li <renlin.li@arm.com>
491 * arm-dis.c (print_insn_coprocessor): Check co-processor number for
492 cpd/cpd2, mcr/mcr2, mrc/mrc2, ldc/ldc2, stc/stc2.
494 2016-02-15 H.J. Lu <hongjiu.lu@intel.com>
496 * i386-dis.c (print_insn): Parenthesize expression to prevent
500 2016-02-10 Claudiu Zissulescu <claziss@synopsys.com>
501 Janek van Oirschot <jvanoirs@synopsys.com>
503 * arc-opc.c (arc_relax_opcodes, arc_num_relax_opcodes): New
506 2016-02-04 Nick Clifton <nickc@redhat.com>
509 * msp430-dis.c (print_insn_msp430): Add a special case for
510 decoding an RRC instruction with the ZC bit set in the extension
513 2016-02-02 Andrew Burgess <andrew.burgess@embecosm.com>
515 * cgen-ibld.in (insert_normal): Rework calculation of shift.
516 * epiphany-ibld.c: Regenerate.
517 * fr30-ibld.c: Regenerate.
518 * frv-ibld.c: Regenerate.
519 * ip2k-ibld.c: Regenerate.
520 * iq2000-ibld.c: Regenerate.
521 * lm32-ibld.c: Regenerate.
522 * m32c-ibld.c: Regenerate.
523 * m32r-ibld.c: Regenerate.
524 * mep-ibld.c: Regenerate.
525 * mt-ibld.c: Regenerate.
526 * or1k-ibld.c: Regenerate.
527 * xc16x-ibld.c: Regenerate.
528 * xstormy16-ibld.c: Regenerate.
530 2016-02-02 Andrew Burgess <andrew.burgess@embecosm.com>
532 * epiphany-dis.c: Regenerated from latest cpu files.
534 2016-02-01 Michael McConville <mmcco@mykolab.com>
536 * cgen-dis.c (count_decodable_bits): Use unsigned value for mask
539 2016-01-25 Renlin Li <renlin.li@arm.com>
541 * arm-dis.c (mapping_symbol_for_insn): New function.
542 (find_ifthen_state): Call mapping_symbol_for_insn().
544 2016-01-20 Matthew Wahab <matthew.wahab@arm.com>
546 * aarch64-opc.c (operand_general_constraint_met_p): Check validity
547 of MSR UAO immediate operand.
549 2016-01-18 Maciej W. Rozycki <macro@imgtec.com>
551 * mips-dis.c (print_insn_micromips): Remove 48-bit microMIPS
554 2016-01-17 Alan Modra <amodra@gmail.com>
556 * configure: Regenerate.
558 2016-01-14 Nick Clifton <nickc@redhat.com>
560 * rl78-decode.opc (rl78_decode_opcode): Add 's' operand to movw
561 instructions that can support stack pointer operations.
562 * rl78-decode.c: Regenerate.
563 * rl78-dis.c: Fix display of stack pointer in MOVW based
566 2016-01-14 Matthew Wahab <matthew.wahab@arm.com>
568 * aarch64-opc.c (aarch64_sys_reg_supported_p): Merge conditionals
569 testing for RAS support. Add checks for erxfr_el1, erxctlr_el1,
570 erxtatus_el1 and erxaddr_el1.
572 2016-01-12 Matthew Wahab <matthew.wahab@arm.com>
574 * arm-dis.c (arm_opcodes): Add "esb".
575 (thumb_opcodes): Likewise.
577 2016-01-11 Peter Bergner <bergner@vnet.ibm.com>
579 * ppc-opc.c <xscmpnedp>: Delete.
580 <xvcmpnedp>: Likewise.
581 <xvcmpnedp.>: Likewise.
582 <xvcmpnesp>: Likewise.
583 <xvcmpnesp.>: Likewise.
585 2016-01-08 Andreas Schwab <schwab@linux-m68k.org>
588 * m68k-opc.c (moveb, movew): For ISA_B/C only allow #,d(An) in
591 2016-01-01 Alan Modra <amodra@gmail.com>
593 Update year range in copyright notice of all files.
595 For older changes see ChangeLog-2015
597 Copyright (C) 2016 Free Software Foundation, Inc.
599 Copying and distribution of this file, with or without modification,
600 are permitted in any medium without royalty provided the copyright
601 notice and this notice are preserved.
607 version-control: never