opcodes/ChangeLog

   1 2020-01-17  Christian Biesinger  <cbiesinger@google.com>
   2
   3         * opintl.h: Fix spelling error (seperate).
   4
   5 2020-01-17  H.J. Lu  <hongjiu.lu@intel.com>
   6
   7         * i386-opc.tbl: Add {vex} pseudo prefix.
   8         * i386-tbl.h: Regenerated.
   9
  10 2020-01-16  Andre Vieira  <andre.simoesdiasvieira@arm.com>
  11
  12         PR 25376
  13         * opcodes/arm-dis.c (coprocessor_opcodes): Use CORE_HIGH for MVE bits.
  14         (neon_opcodes): Likewise.
  15         (select_arm_features): Make sure we enable MVE bits when selecting
  16         armv8.1-m.main.  Make sure we do not enable MVE bits when not selecting
  17         any architecture.
  18
  19 2020-01-16  Jan Beulich  <jbeulich@suse.com>
  20
  21         * i386-opc.tbl: Drop stale comment from XOP section.
  22
  23 2020-01-16  Jan Beulich  <jbeulich@suse.com>
  24
  25         * i386-opc.tbl (movq): Add VexWIG to SSE2AVX XMM->XMM forms.
  26         (extractps): Add VexWIG to SSE2AVX forms.
  27         * i386-tbl.h: Re-generate.
  28
  29 2020-01-16  Jan Beulich  <jbeulich@suse.com>
  30
  31         * i386-opc.tbl (pextrq, pinsrq): Drop IgnoreSize and Qword. Drop
  32         Size64 from and use VexW1 on SSE2AVX forms.
  33         (vpextrq, vpinsrq): Drop IgnoreSize and Qword. Drop Size64 from
  34         VEX-encoded forms. Add Cpu64 to EVEX-encoded forms. Use VexW1.
  35         * i386-tbl.h: Re-generate.
  36
  37 2020-01-15  Alan Modra  <amodra@gmail.com>
  38
  39         * tic4x-dis.c (tic4x_version): Make unsigned long.
  40         (optab, optab_special, registernames): New file scope vars.
  41         (tic4x_print_register): Set up registernames rather than
  42         malloc'd registertable.
  43         (tic4x_disassemble): Delete optable and optable_special.  Use
  44         optab and optab_special instead.  Throw away old optab,
  45         optab_special and registernames when info->mach changes.
  46
  47 2020-01-14  Sergey Belyashov  <sergey.belyashov@gmail.com>
  48
  49         PR 25377
  50         * z80-dis.c (suffix): Use .db instruction to generate double
  51         prefix.
  52
  53 2020-01-14  Alan Modra  <amodra@gmail.com>
  54
  55         * z8k-dis.c (unpack_instr): Formatting.  Cast unsigned short
  56         values to unsigned before shifting.
  57
  58 2020-01-13  Thomas Troeger  <tstroege@gmx.de>
  59
  60         * arm-dis.c (print_insn_arm): Fill in insn info fields for control
  61         flow instructions.
  62         (print_insn_thumb16, print_insn_thumb32): Likewise.
  63         (print_insn): Initialize the insn info.
  64         * i386-dis.c (print_insn): Initialize the insn info fields, and
  65         detect jumps.
  66
  67 2012-01-13  Claudiu Zissulescu <claziss@gmail.com>
  68
  69         * arc-opc.c (C_NE): Make it required.
  70
  71 2012-01-13  Claudiu Zissulescu <claziss@gmail.com>
  72
  73         * opcode/arc-dis.c (regnames): Correct ACCL/ACCH naming, fix typo
  74         reserved register name.
  75
  76 2020-01-13  Alan Modra  <amodra@gmail.com>
  77
  78         * ns32k-dis.c (Is_gen): Use strchr, add 'f'.
  79         (print_insn_ns32k): Adjust ioffset for 'f' index_offset.
  80
  81 2020-01-13  Alan Modra  <amodra@gmail.com>
  82
  83         * wasm32-dis.c (print_insn_wasm32): Localise variables.  Store
  84         result of wasm_read_leb128 in a uint64_t and check that bits
  85         are not lost when copying to other locals.  Use uint32_t for
  86         most locals.  Use PRId64 when printing int64_t.
  87
  88 2020-01-13  Alan Modra  <amodra@gmail.com>
  89
  90         * score-dis.c: Formatting.
  91         * score7-dis.c: Formatting.
  92
  93 2020-01-13  Alan Modra  <amodra@gmail.com>
  94
  95         * score-dis.c (print_insn_score48): Use unsigned variables for
  96         unsigned values.  Don't left shift negative values.
  97         (print_insn_score32): Likewise.
  98         * score7-dis.c (print_insn_score32, print_insn_score16): Likewise.
  99
 100 2020-01-13  Alan Modra  <amodra@gmail.com>
 101
 102         * tic4x-dis.c (tic4x_print_register): Remove dead code.
 103
 104 2020-01-13  Alan Modra  <amodra@gmail.com>
 105
 106         * fr30-ibld.c: Regenerate.
 107
 108 2020-01-13  Alan Modra  <amodra@gmail.com>
 109
 110         * xgate-dis.c (print_insn): Don't left shift signed value.
 111         (ripBits): Formatting, use 1u.
 112
 113 2020-01-10  Alan Modra  <amodra@gmail.com>
 114
 115         * tilepro-opc.c (parse_insn_tilepro): Make opval unsigned.
 116         * tilegx-opc.c (parse_insn_tilegx): Likewise.  Delete raw_opval.
 117
 118 2020-01-10  Alan Modra  <amodra@gmail.com>
 119
 120         * m10300-dis.c (disassemble): Move extraction of DREG, AREG, RREG,
 121         and XRREG value earlier to avoid a shift with negative exponent.
 122         * m10200-dis.c (disassemble): Similarly.
 123
 124 2020-01-09  Nick Clifton  <nickc@redhat.com>
 125
 126         PR 25224
 127         * z80-dis.c (ld_ii_ii): Use correct cast.
 128
 129 2020-01-03  Sergey Belyashov  <sergey.belyashov@gmail.com>
 130
 131         PR 25224
 132         * z80-dis.c (ld_ii_ii): Use character constant when checking
 133         opcode byte value.
 134
 135 2020-01-09  Jan Beulich  <jbeulich@suse.com>
 136
 137         * i386-dis.c (SEP_Fixup): New.
 138         (SEP): Define.
 139         (dis386_twobyte): Use it for sysenter/sysexit.
 140         (enum x86_64_isa): Change amd64 enumerator to value 1.
 141         (OP_J): Compare isa64 against intel64 instead of amd64.
 142         * i386-opc.tbl (sysenter, sysexit): Split into AMD64 and Intel64
 143         forms.
 144         * i386-tbl.h: Re-generate.
 145
 146 2020-01-08  Alan Modra  <amodra@gmail.com>
 147
 148         * z8k-dis.c: Include libiberty.h
 149         (instr_data_s): Make max_fetched unsigned.
 150         (z8k_lookup_instr): Make nibl_index and tabl_index unsigned.
 151         Don't exceed byte_info bounds.
 152         (output_instr): Make num_bytes unsigned.
 153         (unpack_instr): Likewise for nibl_count and loop.
 154         * z8kgen.c (gas <opcode_entry_type>): Make noperands, length and
 155         idx unsigned.
 156         * z8k-opc.h: Regenerate.
 157
 158 2020-01-07  Shahab Vahedi  <shahab@synopsys.com>
 159
 160         * arc-tbl.h (llock): Use 'LLOCK' as class.
 161         (llockd): Likewise.
 162         (scond): Use 'SCOND' as class.
 163         (scondd): Likewise.
 164         (llockd): Set data_size_mode to 'C_ZZ_D' which is 64-bit.
 165         (scondd): Likewise.
 166
 167 2020-01-06  Alan Modra  <amodra@gmail.com>
 168
 169         * m32c-ibld.c: Regenerate.
 170
 171 2020-01-06  Alan Modra  <amodra@gmail.com>
 172
 173         PR 25344
 174         * z80-dis.c (suffix): Don't use a local struct buffer copy.
 175         Peek at next byte to prevent recursion on repeated prefix bytes.
 176         Ensure uninitialised "mybuf" is not accessed.
 177         (print_insn_z80): Don't zero n_fetch and n_used here,..
 178         (print_insn_z80_buf): ..do it here instead.
 179
 180 2020-01-04  Alan Modra  <amodra@gmail.com>
 181
 182         * m32r-ibld.c: Regenerate.
 183
 184 2020-01-04  Alan Modra  <amodra@gmail.com>
 185
 186         * cr16-dis.c (cr16_match_opcode): Avoid shift left of signed value.
 187
 188 2020-01-04  Alan Modra  <amodra@gmail.com>
 189
 190         * crx-dis.c (match_opcode): Avoid shift left of signed value.
 191
 192 2020-01-04  Alan Modra  <amodra@gmail.com>
 193
 194         * d30v-dis.c (print_insn): Avoid signed overflow in left shift.
 195
 196 2020-01-03  Jan Beulich  <jbeulich@suse.com>
 197
 198         * aarch64-tbl.h (aarch64_opcode_table): Use
 199         SVE_ADDR_RX_LSL{1,2,3} for LD1RO{H,W,D}.
 200
 201 2020-01-03  Jan Beulich  <jbeulich@suse.com>
 202
 203         * aarch64-tbl.h (aarch64_opcode_table): Correct SIMD
 204         forms of SUDOT and USDOT.
 205
 206 2020-01-03  Jan Beulich  <jbeulich@suse.com>
 207
 208         * aarch64-tbl.h (aarch64_opcode_table): Drop 'i' from
 209         uzip{1,2}.
 210         * opcodes/aarch64-dis-2.c: Re-generate.
 211
 212 2020-01-03  Jan Beulich  <jbeulich@suse.com>
 213
 214         * aarch64-tbl.h (aarch64_opcode_table): Correct 64-bit
 215         FMMLA encoding.
 216         * opcodes/aarch64-dis-2.c: Re-generate.
 217
 218 2020-01-02  Sergey Belyashov  <sergey.belyashov@gmail.com>
 219
 220         * z80-dis.c: Add support for eZ80 and Z80 instructions.
 221
 222 2020-01-01  Alan Modra  <amodra@gmail.com>
 223
 224         Update year range in copyright notice of all files.
 225
 226 For older changes see ChangeLog-2019
 227 \f
 228 Copyright (C) 2020 Free Software Foundation, Inc.
 229
 230 Copying and distribution of this file, with or without modification,
 231 are permitted in any medium without royalty provided the copyright
 232 notice and this notice are preserved.
 233
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