opcodes/ChangeLog

   1 2012-10-26  Christian Groessler  <chris@groessler.org>
   2
   3         * z8kgen.c (struct op): Fix encoding for translate opcodes (trdb,
   4         trdrb, trib, trirb, trtdb, trtdrb, trtib, trtirb).  Remove
   5         non-existing opcode trtrb.
   6         * z8k-opc.h: Regenerate.
   7
   8 2012-10-26  Alan Modra  <amodra@gmail.com>
   9
  10         * ppc-opc (powerpc_opcodes): "lfdp" and "stfdp" use DS offset.
  11
  12 2012-10-24  Roland McGrath  <mcgrathr@google.com>
  13
  14         * i386-dis.c (ckprefix): When bailing out for fwait with prefixes,
  15         set rex_used to rex.
  16
  17 2012-10-22  Peter Bergner  <bergner@vnet.ibm.com>
  18
  19         * ppc-opc.c (powerpc_opcodes) <vcfpsxws>: Fix opcode spelling.
  20
  21 2012-10-18  Tom Tromey  <tromey@redhat.com>
  22
  23         * tic54x-dis.c (print_instruction): Don't use K&R style.
  24         (print_parallel_instruction, sprint_dual_address)
  25         (sprint_indirect_address, sprint_direct_address, sprint_mmr)
  26         (sprint_cc2, sprint_condition): Likewise.
  27
  28 2012-10-18  Kai Tietz  <ktietz@redhat.com>
  29
  30         * aarch64-asm.c (aarch64_ins_ldst_reglist): Initialize
  31         value with a default.
  32         (do_special_encoding): Likewise.
  33         (aarch64_ins_ldst_elemlist): Pre-initialize QSsize, and opcodeh2
  34         variables with default.
  35         * arc-dis.c (write_comments_): Don't use strncat due
  36         size of state->commentBuffer pointer isn't predictable.
  37
  38 2012-10-15  Yufeng Zhang  <yufeng.zhang@arm.com>
  39
  40         * aarch64-opc.c (aarch64_sys_regs): Add rmr_el1, rmr_el2 and
  41         rmr_el3; remove daifset and daifclr.
  42
  43 2012-10-15  Yufeng Zhang  <yufeng.zhang@arm.com>
  44
  45         * aarch64-opc.c (operand_general_constraint_met_p): Change to check
  46         the alignment of addr.offset.imm instead of that of shifter.amount for
  47         operand type AARCH64_OPND_ADDR_UIMM12.
  48
  49 2012-10-11  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
  50
  51         * arm-dis.c: Use preferred form of vrint instruction variants
  52         for disassembly.
  53
  54 2012-10-09  Nagajyothi Eggone  <nagajyothi.eggone@amd.com>
  55
  56         * i386-gen.c (cpu_flag_init): Add CPU_BDVER3_FLAGS.
  57         * i386-init.h: Regenerated.
  58
  59 2012-10-05  Peter Bergner  <bergner@vnet.ibm.com>
  60
  61         * ppc-dis.c (ppc_opts) <altivec>: Use PPC_OPCODE_ALTIVEC2;
  62         * ppc-opc.c (VBA): New define.
  63         (powerpc_opcodes) <vcuxwfp, vcsxwfp, vcfpuxws, vcfpsxsw, vmr, vnot,
  64         mfppr, mfppr32, mtppr, mtppr32>: New extended mnemonics.
  65
  66 2012-10-04  Nick Clifton  <nickc@redhat.com>
  67
  68         * v850-dis.c (disassemble): Place square parentheses around second
  69         register operand of clr1, not1, set1 and tst1 instructions.
  70
  71 2012-10-04  Andreas Krebbel  <Andreas.Krebbel@de.ibm.com>
  72
  73         * s390-mkopc.c: Support new option zEC12.
  74         * s390-opc.c: Add new instruction formats.
  75         * s390-opc.txt: Add new instructions for zEC12.
  76
  77 2012-09-27  Anthony Green  <green@moxielogic.com>
  78
  79         * moxie-dis.c (print_insn_moxie): Print 'bad' instructions.
  80         * moxie-opc.c: All 'bad' instructions have the itype MOXIE_BAD.
  81
  82 2012-09-25  Saravanan Ekanathan <saravanan.ekanathan@amd.com>
  83
  84         * i386-gen.c (cpu_flag_init): Add missing Cpu flags in
  85         CPU_BDVER1_FLAGS, CPU_BDVER2_FLAGS, CPU_BTVER1_FLAGS
  86         and CPU_BTVER2_FLAGS.
  87         * i386-init.h: Regenerated.
  88
  89 2012-09-20  Michael Zolotukhin  <michael.v.zolotukhin@intel.com>
  90
  91         * i386-gen.c (cpu_flag_init): Add CpuCX16 to CPU_NOCONA_FLAGS,
  92         CPU_CORE_FLAGS, CPU_CORE2_FLAGS, CPU_COREI7_FLAGS,
  93         CPU_BDVER1_FLAGS, CPU_BDVER2_FLAGS, CPU_BTVER1_FLAGS,
  94         CPU_BTVER2_FLAGS.  Add CPU_CX16_FLAGS.
  95         (cpu_flags): Add CpuCX16.
  96         * i386-opc.h (CpuCX16): New.
  97         (i386_cpu_flags): Add cpucx16.
  98         * i386-opc.tbl: Replace CpuSSE3 with CpuCX16 for cmpxchg16b.
  99         * i386-tbl.h: Regenerate.
 100         * i386-init.h: Likewise.
 101
 102 2012-09-18  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
 103
 104         * arm-dis.c: Changed ldra and strl-form mnemonics
 105         to lda and stl-form.
 106
 107 2012-09-18  Chao-ying Fu  <fu@mips.com>
 108
 109         * micromips-opc.c (micromips_opcodes): Correct the encoding of
 110         the "swxc1" instruction.
 111
 112 2012-09-17  Yufeng Zhang  <yufeng.zhang@arm.com>
 113
 114         * aarch64-asm.c (aarch64_ins_imm_half): Remove ATTRIBUTE_UNUSED from
 115         the parameter 'inst'.
 116         (aarch64_ins_addr_simm): Add ATTRIBUTE_UNUSED to the parameter 'inst'.
 117         (convert_mov_to_movewide): Change to assert (0) when
 118         aarch64_wide_constant_p returns FALSE.
 119
 120 2012-09-14  David Edelsohn  <dje.gcc@gmail.com>
 121
 122         * configure: Regenerate.
 123
 124 2012-09-14  Anthony Green  <green@moxielogic.com>
 125
 126         * moxie-dis.c (print_insn_moxie): Branch targets are relative to
 127         the address after the branch instruction.
 128
 129 2012-09-13  Anthony Green  <green@moxielogic.com>
 130
 131         * moxie-dis.c (print_insn_moxie): Handle bi-endian encodings.
 132
 133 2012-09-10  Matthias Klose  <doko@ubuntu.com>
 134
 135         * config.in: Disable sanity check for kfreebsd.
 136
 137 2012-09-10  H.J. Lu  <hongjiu.lu@intel.com>
 138
 139         * configure: Regenerated.
 140
 141 2012-09-04  Sergey A. Guriev <sergey.a.guriev@intel.com>
 142
 143         * ia64-asmtab.h (completer_index): Extend bitfield to full uint.
 144         * ia64-gen.c: Promote completer index type to longlong.
 145         (irf_operand): Add new register recognition.
 146         (in_iclass_mov_x): Add an entry for the new mov_* instruction type.
 147         (lookup_specifier): Add new resource recognition.
 148         (insert_bit_table_ent): Relax abort condition according to the
 149         changed completer index type.
 150         (print_dis_table): Fix printf format for completer index.
 151         * ia64-ic.tbl: Add a new instruction class.
 152         * ia64-opc-i.c (ia64_opcodes_i): Define new I-instructions.
 153         * ia64-opc-m.c (ia64_opcodes_m): Define new M-instructions.
 154         * ia64-opc.h: Define short names for new operand types.
 155         * ia64-raw.tbl: Add new RAW resource for DAHR register.
 156         * ia64-waw.tbl: Add new WAW resource for DAHR register.
 157         * ia64-asmtab.c: Regenerate.
 158
 159 2012-08-29  Peter Bergner  <bergner@vnet.ibm.com>
 160
 161         * ppc-opc.c (VXASHB_MASK): New define.
 162         (powerpc_opcodes) <vsldoi>: Use VXASHB_MASK.
 163
 164 2012-08-28  Peter Bergner  <bergner@vnet.ibm.com>
 165
 166         * ppc-opc.c (UIMM4, UIMM3, UIMM2, VXVA_MASK, VXVB_MASK, VXVAVB_MASK,
 167         VXVDVA_MASK, VXUIMM4_MASK, VXUIMM3_MASK, VXUIMM2_MASK): New defines.
 168         (powerpc_opcodes) <vexptefp, vlogefp, vrefp, vrfim, vrfin, vrfip,
 169         vrfiz, vrsqrtefp, vupkhpx, vupkhsb, vupkhsh, vupklpx, vupklsb,
 170         vupklsh>: Use VXVA_MASK.
 171         <vspltisb, vspltish, vspltisw>: Use VXVB_MASK.
 172         <mfvscr>: Use VXVAVB_MASK.
 173         <mtvscr>: Use VXVDVA_MASK.
 174         <vspltb>: Use VXUIMM4_MASK.
 175         <vsplth>: Use VXUIMM3_MASK.
 176         <vspltw>: Use VXUIMM2_MASK.
 177
 178 2012-08-24  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 179
 180         * arm-dis.c (neon_opcodes): Add 2 operand sha instructions.
 181
 182 2012-08-24  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 183
 184         * arm-dis.c (neon_opcodes): Add SHA 3-operand instructions.
 185
 186 2012-08-24  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 187
 188         * arm-dis.c (neon_opcodes): Handle VMULL.P64.
 189
 190 2012-08-24  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 191
 192         * arm-dis.c (neon_opcodes): Add support for AES instructions.
 193
 194 2012-08-24  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 195
 196         * arm-dis.c (coprocessor_opcodes): Add support for HP/DP
 197         conversions.
 198
 199 2012-08-24  Matthew  Gretton-Dann  <matthew.gretton-dann@arm.com>
 200
 201         * arm-dis.c (coprocessor_opcodes): Add VRINT.
 202         (neon_opcodes): Likewise.
 203
 204 2012-08-24  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 205
 206         * arm-dis.c (coprocessor_opcodes): Add support for new VCVT
 207         variants.
 208         (neon_opcodes): Likewise.
 209
 210 2012-08-24  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 211
 212         * arm-dis.c (coprocessor_opcodes): Add VMAXNM/VMINNM.
 213         (neon_opcodes): Likewise.
 214
 215 2012-08-24  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 216
 217         * arm-dis.c (coprocessor_opcodes): Add VSEL.
 218         (print_insn_coprocessor): Add new %<>c bitfield format
 219         specifier.
 220
 221 2012-08-24  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 222
 223         * arm-dis.c (arm_opcodes): Add LDRA/STRL instructions.
 224         (thumb32_opcodes): Likewise.
 225         (print_arm_insn): Add support for %<>T formatter.
 226
 227 2012-08-24  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 228
 229         * arm-dis.c (arm_opcodes): Add HLT.
 230         (thumb_opcodes): Likewise.
 231
 232 2012-08-24  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 233
 234         * arm-dis.c (thumb32_opcodes): Add DCPS instruction.
 235
 236 2012-08-24  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 237
 238         * arm-dis.c (arm_opcodes): Add SEVL.
 239         (thumb_opcodes): Likewise.
 240         (thumb32_opcodes): Likewise.
 241
 242 2012-08-24  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 243
 244         * arm-dis.c (data_barrier_option): New function.
 245         (print_insn_arm): Use data_barrier_option.
 246         (print_insn_thumb32): Use data_barrier_option.
 247
 248 2012-08-24  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com
 249
 250         * arm-dis.c (COND_UNCOND): New constant.
 251         (print_insn_coprocessor): Add support for %u format specifier.
 252         (print_insn_neon): Likewise.
 253
 254 2012-08-21  David S. Miller  <davem@davemloft.net>
 255
 256         * sparc-opc.c (4-argument crypto instructions): Fix encoding using
 257         F3F4 macro.
 258
 259 2012-08-20  Edmar Wienskoski  <edmar@freescale.com>
 260
 261         * ppc-opc.c (powerpc_opcodes): Changed opcode for vabsdub,
 262         vabsduh, vabsduw, mviwsplt.
 263
 264 2012-08-17  Nagajyothi Eggone  <nagajyothi.eggone@amd.com>
 265
 266         * i386-gen.c (cpu_flag_init): Add CPU_BTVER1_FLAGS and
 267         CPU_BTVER2_FLAGS.
 268
 269         * i386-opc.h: Update CpuPRFCHW comment.
 270
 271         * i386-opc.tbl: Enable prefetch instruction for CpuPRFCHW.
 272         * i386-init.h: Regenerated.
 273         * i386-tbl.h: Likewise.
 274
 275 2012-08-17  Nick Clifton  <nickc@redhat.com>
 276
 277         * po/uk.po: New Ukranian translation.
 278         * configure.in (ALL_LINGUAS): Add uk.
 279         * configure: Regenerate.
 280
 281 2012-08-16  Peter Bergner  <bergner@vnet.ibm.com>
 282
 283         * ppc-opc.c (powerpc_opcodes) <"lswx">: Use RAX for the second and
 284         RBX for the third operand.
 285         <"lswi">: Use RAX for second and NBI for the third operand.
 286
 287 2012-08-15  DJ Delorie  <dj@redhat.com>
 288
 289         * rl78-decode.opc (rl78_decode_opcode): Merge %e and %[01]
 290         operands, so that data addresses can be corrected when not
 291         ES-overridden.
 292         * rl78-decode.c: Regenerate.
 293         * rl78-dis.c (print_insn_rl78): Make order of modifiers
 294         irrelevent.  When the 'e' specifier is used on an operand and no
 295         ES prefix is provided, adjust address to make it absolute.
 296
 297 2012-08-15  Peter Bergner  <bergner@vnet.ibm.com>
 298
 299         * ppc-opc.c <RSQ, RTQ>: Use PPC_OPERAND_GPR.
 300
 301 2012-08-15  Peter Bergner  <bergner@vnet.ibm.com>
 302
 303         * ppc-opc.c <xnop, yield, mdoio, mdoom>: New extended mnemonics.
 304
 305 2012-08-14  Maciej W. Rozycki  <macro@codesourcery.com>
 306
 307         * mips-dis.c (print_insn_args): Add GET_OP and GET_OP_S local
 308         macros, use local variables for info struct member accesses,
 309         update the type of the variable used to hold the instruction
 310         word.
 311         (print_insn_mips, print_mips16_insn_arg): Likewise.
 312         (print_insn_mips16): Add GET_OP and GET_OP_S local macros, use
 313         local variables for info struct member accesses.
 314         (print_insn_micromips): Add GET_OP_S local macro.
 315         (_print_insn_mips): Update the type of the variable used to hold
 316         the instruction word.
 317
 318 2012-08-13  Ian Bolton  <ian.bolton@arm.com>
 319             Laurent Desnogues  <laurent.desnogues@arm.com>
 320             Jim MacArthur  <jim.macarthur@arm.com>
 321             Marcus Shawcroft  <marcus.shawcroft@arm.com>
 322             Nigel Stephens  <nigel.stephens@arm.com>
 323             Ramana Radhakrishnan  <ramana.radhakrishnan@arm.com>
 324             Richard Earnshaw  <rearnsha@arm.com>
 325             Sofiane Naci  <sofiane.naci@arm.com>
 326             Tejas Belagod  <tejas.belagod@arm.com>
 327             Yufeng Zhang  <yufeng.zhang@arm.com>
 328
 329         * Makefile.am: Add AArch64.
 330         * Makefile.in: Regenerate.
 331         * aarch64-asm.c: New file.
 332         * aarch64-asm.h: New file.
 333         * aarch64-dis.c: New file.
 334         * aarch64-dis.h: New file.
 335         * aarch64-gen.c: New file.
 336         * aarch64-opc.c: New file.
 337         * aarch64-opc.h: New file.
 338         * aarch64-tbl.h: New file.
 339         * configure.in: Add AArch64.
 340         * configure: Regenerate.
 341         * disassemble.c: Add AArch64.
 342         * aarch64-asm-2.c: New file (automatically generated).
 343         * aarch64-dis-2.c: New file (automatically generated).
 344         * aarch64-opc-2.c: New file (automatically generated).
 345         * po/POTFILES.in: Regenerate.
 346
 347 2012-08-13  Maciej W. Rozycki  <macro@codesourcery.com>
 348
 349         * micromips-opc.c (micromips_opcodes): Update comment.
 350         * mips-opc.c (mips_builtin_opcodes): Likewise.  Mark coprocessor
 351         instructions for IOCT as appropriate.
 352         * mips-dis.c (print_insn_mips): Replace OPCODE_IS_MEMBER with
 353         opcode_is_member.
 354         * configure.in: Substitute NO_WMISSING_FIELD_INITIALIZERS with
 355         the result of a check for the -Wno-missing-field-initializers
 356         GCC option.
 357         * Makefile.am (NO_WMISSING_FIELD_INITIALIZERS): New variable.
 358         (mips-opc.lo): Pass $(NO_WMISSING_FIELD_INITIALIZERS) to
 359         compilation.
 360         (mips16-opc.lo): Likewise.
 361         (micromips-opc.lo): Likewise.
 362         * aclocal.m4: Regenerate.
 363         * configure: Regenerate.
 364         * Makefile.in: Regenerate.
 365
 366 2012-08-11  Saravanan Ekanathan <saravanan.ekanathan@amd.com>
 367
 368         PR gas/14423
 369         * i386-gen.c (cpu_flag_init): Add CpuFMA in CPU_BDVER2_FLAGS.
 370         * i386-init.h: Regenerated.
 371
 372 2012-08-09  Nick Clifton  <nickc@redhat.com>
 373
 374         * po/vi.po: Updated Vietnamese translation.
 375
 376 2012-08-07  Roland McGrath  <mcgrathr@google.com>
 377
 378         * i386-dis.c (reg_table): Fill out REG_0F0D table with
 379         AMD-reserved cases as "prefetch".
 380         (MOD_0F18_REG_4, MOD_0F18_REG_5): New enum constants.
 381         (MOD_0F18_REG_6, MOD_0F18_REG_7): Likewise.
 382         (reg_table): Use those under REG_0F18.
 383         (mod_table): Add those cases as "nop/reserved".
 384
 385 2012-08-07  Jan Beulich <jbeulich@suse.com>
 386
 387         * i386-opc.tbl: Remove "FIXME" comments from SVME instructions.
 388
 389 2012-08-06  Roland McGrath  <mcgrathr@google.com>
 390
 391         * i386-dis.c (print_insn): Print spaces between multiple excess
 392         prefixes.  Return actual number of excess prefixes consumed,
 393         not always one.
 394
 395         * i386-dis.c (OP_REG): Ignore REX_B for segment register cases.
 396
 397 2012-08-06  Roland McGrath  <mcgrathr@google.com>
 398             Victor Khimenko  <khim@google.com>
 399             H.J. Lu  <hongjiu.lu@intel.com>
 400
 401         * i386-dis.c (OP_sI): In b_T_mode and v_mode, REX_W trumps DFLAG.
 402         (putop): For 'T', 'U', and 'V', treat REX_W like DFLAG.
 403         (intel_operand_size): For stack_v_mode, treat REX_W like DFLAG.
 404         (OP_E_register): Likewise.
 405         (OP_REG): For low 8 whole registers, treat REX_W like DFLAG.
 406
 407 2012-08-02  Jan-Benedict Glaw  <jbglaw@lug-owl.de>
 408
 409         * configure.in: Formatting.
 410         * configure: Regenerate.
 411
 412 2012-08-01  Alan Modra  <amodra@gmail.com>
 413
 414         * h8300-dis.c: Fix printf arg warnings.
 415         * i960-dis.c: Likewise.
 416         * mips-dis.c: Likewise.
 417         * pdp11-dis.c: Likewise.
 418         * sh-dis.c: Likewise.
 419         * v850-dis.c: Likewise.
 420         * configure.in: Formatting.
 421         * configure: Regenerate.
 422         * rl78-decode.c: Regenerate.
 423         * po/POTFILES.in: Regenerate.
 424
 425 2012-07-31  Chao-Ying Fu  <fu@mips.com>
 426             Catherine Moore  <clm@codesourcery.com>
 427             Maciej W. Rozycki  <macro@codesourcery.com>
 428
 429         * micromips-opc.c (WR_a, RD_a, MOD_a): New macros.
 430         (DSP_VOLA): Likewise.
 431         (D32, D33): Likewise.
 432         (micromips_opcodes): Add DSP ASE instructions.
 433         * mips-dis.c (print_insn_micromips) <'2', '3'>: New cases.
 434         <'4', '5', '6', '7', '8', '0', '^', '@'>: Likewise.
 435
 436 2012-07-31  Jan Beulich <jbeulich@suse.com>
 437
 438         * i386-opc.tbl (vmovntdqa): Move up into 256-bit integer AVX2
 439         instruction group. Mark as requiring AVX2.
 440         * i386-tbl.h: Re-generate.
 441
 442 2012-07-30  Nick Clifton  <nickc@redhat.com>
 443
 444         * po/opcodes.pot: Updated template.
 445         * po/es.po: Updated Spanish translation.
 446         * po/fi.po: Updated Finnish translation.
 447
 448 2012-07-27  Mike Frysinger  <vapier@gentoo.org>
 449
 450         * configure.in (BFD_VERSION): Run bfd/configure --version and
 451         parse the output of that.
 452         * configure: Regenerate.
 453
 454 2012-07-25  James Lemke  <jwlemke@codesourcery.com>
 455
 456         * ppc-opc.c (powerpc_opcodes): Add/remove PPCVLE for some 32-bit insns.
 457
 458 2012-07-24  Stephan McCamant  <smcc@cs.berkeley.edu>
 459             Dr David Alan Gilbert  <dave@treblig.org>
 460
 461         PR binutils/13135
 462         * arm-dis.c: Add necessary casts for printing integer values.
 463         Use %s when printing string values.
 464         * hppa-dis.c: Likewise.
 465         * m68k-dis.c: Likewise.
 466         * microblaze-dis.c: Likewise.
 467         * mips-dis.c: Likewise.
 468         * sparc-dis.c: Likewise.
 469
 470 2012-07-19  Michael Zolotukhin  <michael.v.zolotukhin@intel.com>
 471
 472         PR binutils/14355
 473         * i386-dis.c (VEX_LEN_0FXOP_08_CC): New.
 474         (VEX_LEN_0FXOP_08_CD): Likewise.
 475         (VEX_LEN_0FXOP_08_CE): Likewise.
 476         (VEX_LEN_0FXOP_08_CF): Likewise.
 477         (VEX_LEN_0FXOP_08_EC): Likewise.
 478         (VEX_LEN_0FXOP_08_ED): Likewise.
 479         (VEX_LEN_0FXOP_08_EE): Likewise.
 480         (VEX_LEN_0FXOP_08_EF): Likewise.
 481         (xop_table): Fix entries for vpcomb, vpcomw, vpcomd, vpcomq,
 482         vpcomub, vpcomuw, vpcomud, vpcomuq.
 483         (vex_len_table): Add entries for VEX_LEN_0FXOP_08_CC,
 484         VEX_LEN_0FXOP_08_CD, VEX_LEN_0FXOP_08_CE, VEX_LEN_0FXOP_08_CF,
 485         VEX_LEN_0FXOP_08_EC, VEX_LEN_0FXOP_08_ED, VEX_LEN_0FXOP_08_EE,
 486         VEX_LEN_0FXOP_08_EF.
 487
 488 2012-07-16  Michael Zolotukhin  <michael.v.zolotukhin@intel.com>
 489
 490         * i386-dis.c (PREFIX_0F38F6): New.
 491         (prefix_table): Add adcx, adox instructions.
 492         (three_byte_table): Use PREFIX_0F38F6.
 493         (mod_table): Add rdseed instruction.
 494         * i386-gen.c (cpu_flag_init): Add CpuADX, CpuRDSEED, CpuPRFCHW.
 495         (cpu_flags): Likewise.
 496         * i386-opc.h: Add CpuADX, CpuRDSEED, CpuPRFCHW.
 497         (i386_cpu_flags): Add fields cpurdseed, cpuadx, cpuprfchw.
 498         * i386-opc.tbl: Add instrcutions adcx, adox, rdseed. Extend
 499         prefetchw.
 500         * i386-tbl.h: Regenerate.
 501         * i386-init.h: Likewise.
 502
 503 2012-07-05  Thomas Schwinge  <thomas@codesourcery.com>
 504
 505         * mips-dis.c: Remove gratuitous newline.
 506
 507 2012-07-05  Sean Keys  <skeys@ipdatasys.com>
 508
 509         * xgate-dis.c: Removed an IF statement that will
 510         always be false due to overlapping operand masks.
 511         * xgate-opc.c: Corrected 'com' opcode entry and
 512         fixed spacing.
 513
 514 2012-07-02  Roland McGrath  <mcgrathr@google.com>
 515
 516         * i386-opc.tbl: Add RepPrefixOk to nop.
 517         * i386-tbl.h: Regenerate.
 518
 519 2012-06-28  Nick Clifton  <nickc@redhat.com>
 520
 521         * po/vi.po: Updated Vietnamese translation.
 522
 523 2012-06-22  Roland McGrath  <mcgrathr@google.com>
 524
 525         * i386-opc.tbl: Add RepPrefixOk to ret.
 526         * i386-tbl.h: Regenerate.
 527
 528         * i386-opc.h (RepPrefixOk): New enum constant.
 529         (i386_opcode_modifier): New bitfield 'repprefixok'.
 530         * i386-gen.c (opcode_modifiers): Add RepPrefixOk.
 531         * i386-opc.tbl: Add RepPrefixOk to bsf, bsr, and to all
 532         instructions that have IsString.
 533         * i386-tbl.h: Regenerate.
 534
 535 2012-06-11  Andreas Schwab  <schwab@linux-m68k.org>
 536
 537         * ppc-opc.c (lvsl, lvebx, isellt, icbt, ldepx, lwepx, lvsr, lvehx)
 538         (iselgt, lvewx, iseleq, isel, dcbst, dcbstep, dcbfl, dcbf, lbepx)
 539         (lvx, dcbfep, dcbtstls, stvebx, dcbtstlse, stdepx, stwepx, dcbtls)
 540         (stvehx, dcbtlse, stvewx, stbepx, icblc, stvx, dcbtstt, dcbtst)
 541         (dcbtst, dcbtstep, dcbtt, dcbt, dcbt, lhepx, eciwx, dcbtep)
 542         (dcread, lxvdsx, lvxl, dcblc, sthepx, ecowx, dcbi, dcread, icbtls)
 543         (stvxl, lxsdx, lfdepx, stxsdx, stfdepx, dcba, dcbal, lxvw4x)
 544         (tlbivax, lfdpx, lxvd2x, tlbsrx., stxvw4x, tlbsx, tlbsx., stfdpx)
 545         (stfqx, stxvd2x, icbi, icbiep, icread, dcbzep): Change RA to RA0.
 546
 547 2012-05-19  Alan Modra  <amodra@gmail.com>
 548
 549         * ppc-dis.c: Don't include elf32-ppc.h, do include elf/ppc.h.
 550         (get_powerpc_dialect): Detect VLE sections from ELF sh_flags.
 551
 552 2012-05-18  Alan Modra  <amodra@gmail.com>
 553
 554         * ia64-opc.c: Remove #include "ansidecl.h".
 555         * z8kgen.c: Include sysdep.h first.
 556
 557         * arc-dis.c: Include sysdep.h first, remove some redundant includes.
 558         * bfin-dis.c: Likewise.
 559         * i860-dis.c: Likewise.
 560         * ia64-dis.c: Likewise.
 561         * ia64-gen.c: Likewise.
 562         * m68hc11-dis.c: Likewise.
 563         * mmix-dis.c: Likewise.
 564         * msp430-dis.c: Likewise.
 565         * or32-dis.c: Likewise.
 566         * rl78-dis.c: Likewise.
 567         * rx-dis.c: Likewise.
 568         * tic4x-dis.c: Likewise.
 569         * tilegx-opc.c: Likewise.
 570         * tilepro-opc.c: Likewise.
 571         * rx-decode.c: Regenerate.
 572
 573 2012-05-17  James Lemke  <jwlemke@codesourcery.com>
 574
 575         * ppc-opc.c (powerpc_macros): Add entries for e_extlwi to e_clrlslwi.
 576
 577 2012-05-17  James Lemke  <jwlemke@codesourcery.com>
 578
 579         * ppc-opc.c (extract_sprg): Use ALLOW8_SPRG to include VLE.
 580
 581 2012-05-17  Daniel Richard G.  <skunk@iskunk.org>
 582             Nick Clifton  <nickc@redhat.com>
 583
 584         PR 14072
 585         * configure.in: Add check that sysdep.h has been included before
 586         any system header files.
 587         * configure: Regenerate.
 588         * config.in: Regenerate.
 589         * sysdep.h: Generate an error if included before config.h.
 590         * alpha-opc.c: Include sysdep.h before any other header file.
 591         * alpha-dis.c: Likewise.
 592         * avr-dis.c: Likewise.
 593         * cgen-opc.c: Likewise.
 594         * cr16-dis.c: Likewise.
 595         * cris-dis.c: Likewise.
 596         * crx-dis.c: Likewise.
 597         * d10v-dis.c: Likewise.
 598         * d10v-opc.c: Likewise.
 599         * d30v-dis.c: Likewise.
 600         * d30v-opc.c: Likewise.
 601         * h8500-dis.c: Likewise.
 602         * i370-dis.c: Likewise.
 603         * i370-opc.c: Likewise.
 604         * m10200-dis.c: Likewise.
 605         * m10300-dis.c: Likewise.
 606         * micromips-opc.c: Likewise.
 607         * mips-opc.c: Likewise.
 608         * mips61-opc.c: Likewise.
 609         * moxie-dis.c: Likewise.
 610         * or32-opc.c: Likewise.
 611         * pj-dis.c: Likewise.
 612         * ppc-dis.c: Likewise.
 613         * ppc-opc.c: Likewise.
 614         * s390-dis.c: Likewise.
 615         * sh-dis.c: Likewise.
 616         * sh64-dis.c: Likewise.
 617         * sparc-dis.c: Likewise.
 618         * sparc-opc.c: Likewise.
 619         * spu-dis.c: Likewise.
 620         * tic30-dis.c: Likewise.
 621         * tic54x-dis.c: Likewise.
 622         * tic80-dis.c: Likewise.
 623         * tic80-opc.c: Likewise.
 624         * tilegx-dis.c: Likewise.
 625         * tilepro-dis.c: Likewise.
 626         * v850-dis.c: Likewise.
 627         * v850-opc.c: Likewise.
 628         * vax-dis.c: Likewise.
 629         * w65-dis.c: Likewise.
 630         * xgate-dis.c: Likewise.
 631         * xtensa-dis.c: Likewise.
 632         * rl78-decode.opc: Likewise.
 633         * rl78-decode.c: Regenerate.
 634         * rx-decode.opc: Likewise.
 635         * rx-decode.c: Regenerate.
 636
 637 2012-05-17  Alan Modra  <amodra@gmail.com>
 638
 639         * ppc_dis.c: Don't include elf/ppc.h.
 640
 641 2012-05-16  Meador Inge  <meadori@codesourcery.com>
 642
 643         * arm-dis.c (arm_opcodes): Don't disassemble STMFD/LDMIA sp!, {reg}
 644         to PUSH/POP {reg}.
 645
 646 2012-05-15  James Murray <jsm@jsm-net.demon.co.uk>
 647             Stephane Carrez <stcarrez@nerim.fr>
 648
 649         * configure.in: Add S12X and XGATE co-processor support to m68hc11
 650         target.
 651         * disassemble.c: Likewise.
 652         * configure: Regenerate.
 653         * m68hc11-dis.c: Make objdump output more consistent, use hex
 654         instead of decimal and use 0x prefix for hex.
 655         * m68hc11-opc.c: Add S12X and XGATE opcodes.
 656
 657 2012-05-14  James Lemke  <jwlemke@codesourcery.com>
 658
 659         * ppc-dis.c (get_powerpc_dialect): Use is_ppc_vle.
 660         (PPC_OPCD_SEGS, VLE_OPCD_SEGS): New defines.
 661         (vle_opcd_indices): New array.
 662         (lookup_vle): New function.
 663         (disassemble_init_powerpc): Revise for second (VLE) opcode table.
 664         (print_insn_powerpc): Likewise.
 665         * ppc-opc.c: Likewise.
 666
 667 2012-05-14  Catherine Moore  <clm@codesourcery.com>
 668             Maciej W. Rozycki  <macro@codesourcery.com>
 669             Rhonda Wittels  <rhonda@codesourcery.com>
 670             Nathan Froyd <froydnj@codesourcery.com>
 671
 672         * ppc-opc.c (insert_arx, extract_arx): New functions.
 673         (insert_ary, extract_ary): New functions.
 674         (insert_li20, extract_li20): New functions.
 675         (insert_rx, extract_rx): New functions.
 676         (insert_ry, extract_ry): New functions.
 677         (insert_sci8, extract_sci8): New functions.
 678         (insert_sci8n, extract_sci8n): New functions.
 679         (insert_sd4h, extract_sd4h): New functions.
 680         (insert_sd4w, extract_sd4w): New functions.
 681         (insert_vlesi, extract_vlesi): New functions.
 682         (insert_vlensi, extract_vlensi): New functions.
 683         (insert_vleui, extract_vleui): New functions.
 684         (insert_vleil, extract_vleil): New functions.
 685         (BI_MASK, BB_MASK, BT): Use PPC_OPERAND_CR_BIT.
 686         (BI16, BI32, BO32, B8): New.
 687         (B15, B24, CRD32, CRS): New.
 688         (CRD, OBF, BFA, CR, CRFS): Use PPC_OPERAND_CR_REG.
 689         (DB, IMM20, RD, Rx, ARX, RY, RZ): New.
 690         (ARY, SCLSCI8, SCLSCI8N, SE_SD, SE_SDH): New.
 691         (SH6_MASK): Use PPC_OPSHIFT_INV.
 692         (SI8, UI5, OIMM5, UI7, BO16): New.
 693         (VLESIMM, VLENSIMM, VLEUIMM, VLEUIMML): New.
 694         (XT6, XA6, XB6, XB6S, XC6): Use PPC_OPSHIFT_INV.
 695         (ALLOW8_SPRG): New.
 696         (insert_sprg, extract_sprg): Check ALLOW8_SPRG.
 697         (OPVUP, OPVUP_MASK OPVUP): New
 698         (BD8, BD8_MASK, BD8IO, BD8IO_MASK): New.
 699         (EBD8IO, EBD8IO1_MASK, EBD8IO2_MASK, EBD8IO3_MASK): New.
 700         (BD15, BD15_MASK, EBD15, EBD15_MASK, EBD15BI, EBD15BI_MASK): New.
 701         (BD24,BD24_MASK, C_LK, C_LK_MASK, C, C_MASK): New.
 702         (IA16, IA16_MASK, I16A, I16A_MASK, I16L, I16L_MASK): New.
 703         (IM7, IM7_MASK, LI20, LI20_MASK, SCI8, SCI8_MASK): New.
 704         (SCI8BF, SCI8BF_MASK, SD4, SD4_MASK): New.
 705         (SE_IM5, SE_IM5_MASK): New.
 706         (SE_R, SE_R_MASK, SE_RR, SE_RR_MASK): New.
 707         (EX, EX_MASK, BO16F, BO16T, BO32F, BO32T): New.
 708         (BO32DNZ, BO32DZ): New.
 709         (NO371, PPCSPE, PPCISEL, PPCEFS, MULHW): Include PPC_OPCODE_VLE.
 710         (PPCVLE): New.
 711         (powerpc_opcodes): Add new VLE instructions.  Update existing
 712         instruction to include PPCVLE if supported.
 713         * ppc-dis.c (ppc_opts): Add vle entry.
 714         (get_powerpc_dialect): New function.
 715         (powerpc_init_dialect): VLE support.
 716         (print_insn_big_powerpc): Call get_powerpc_dialect.
 717         (print_insn_little_powerpc): Likewise.
 718         (operand_value_powerpc): Handle negative shift counts.
 719         (print_insn_powerpc): Handle 2-byte instruction lengths.
 720
 721 2012-05-11  Daniel Richard G.  <skunk@iskunk.org>
 722
 723         PR binutils/14028
 724         * configure.in: Invoke ACX_HEADER_STRING.
 725         * configure: Regenerate.
 726         * config.in: Regenerate.
 727         * sysdep.h: If STRINGS_WITH_STRING is defined then include both
 728         string.h and strings.h.
 729
 730 2012-05-11  Nick Clifton  <nickc@redhat.com>
 731
 732         PR binutils/14006
 733         * arm-dis.c (print_insn): Fix detection of instruction mode in
 734         files containing multiple executable sections.
 735
 736 2012-05-03  Sean Keys  <skeys@ipdatasys.com>
 737
 738         * Makefile.in, configure: regenerate
 739         * disassemble.c (disassembler): Recognize ARCH_XGATE.
 740         * xgate-dis.c (read_memory, print_insn, print_insn_xgate):
 741         New functions.
 742         * configure.in: Recognize xgate.
 743         * xgate-dis.c, xgate-opc.c: New files for support of xgate
 744         * Makefile.am (CFILES, ALL_MACHINES): New files for disassembly
 745         and opcode generation for xgate.
 746
 747 2012-04-30  DJ Delorie  <dj@redhat.com>
 748
 749         * rx-decode.opc (MOV): Do not sign-extend immediates which are
 750         already the maximum bit size.
 751         * rx-decode.c: Regenerate.
 752
 753 2012-04-27  David S. Miller  <davem@davemloft.net>
 754
 755         * sparc-dis.c (v9a_asr_reg_names): Add 'cfr'.
 756         * sparc-opc.c (sparc_opcodes): Add rd/wr cases for %cfr.
 757
 758         * sparc-opc.c (sparc_opcodes): Add 'wr X, %pause' and 'pause'.
 759         * sparc-dis.c (v9a_asr_reg_names): Add 'pause'.
 760
 761         * sparc-opc.c (CBCOND): New define.
 762         (CBCOND_XCC): Likewise.
 763         (cbcond): New helper macro.
 764         (sparc_opcodes): Add compare-and-branch instructions.
 765
 766         * sparc-dis.c (print_insn_sparc): Handle ')'.
 767         * sparc-opc.c (sparc_opcodes): Add crypto instructions.
 768
 769         * sparc-opc.c (sparc_opcodes): Rework table to put HWCAP values
 770         into new struct sparc_opcode 'hwcaps' field instead of 'flags'.
 771
 772 2012-04-12  David S. Miller  <davem@davemloft.net>
 773
 774         * sparc-dis.c (X_DISP10): Define.
 775         (print_insn_sparc): Handle '='.
 776
 777 2012-04-01  Mike Frysinger  <vapier@gentoo.org>
 778
 779         * bfin-dis.c (fmtconst): Replace decimal handling with a single
 780         sprintf call and the '*' field width.
 781
 782 2012-03-23  Maxim Kuvyrkov  <maxim@codesourcery.com>
 783
 784         * mips-dis.c (mips_arch_choices): Add entry for Broadcom XLP.
 785
 786 2012-03-16  Alan Modra  <amodra@gmail.com>
 787
 788         * ppc-dis.c (PPC_OPC_SEGS, PPC_OP_TO_SEG): Delete.
 789         (powerpc_opcd_indices): Bump array size.
 790         (disassemble_init_powerpc): Set powerpc_opcd_indices entries
 791         corresponding to unused opcodes to following entry.
 792         (lookup_powerpc): New function, extracted and optimised from..
 793         (print_insn_powerpc): ..here.
 794
 795 2012-03-15  Alan Modra  <amodra@gmail.com>
 796             James Lemke  <jwlemke@codesourcery.com>
 797
 798         * disassemble.c (disassemble_init_for_target): Handle ppc init.
 799         * ppc-dis.c (private): New var.
 800         (powerpc_init_dialect): Don't return calloc failure, instead use
 801         private.
 802         (PPC_OPCD_SEGS, PPC_OP_TO_SEG): Define.
 803         (powerpc_opcd_indices): New array.
 804         (disassemble_init_powerpc): New function.
 805         (print_insn_big_powerpc): Don't init dialect here.
 806         (print_insn_little_powerpc): Likewise.
 807         (print_insn_powerpc): Start search using powerpc_opcd_indices.
 808
 809 2012-03-10  Edmar Wienskoski  <edmar@freescale.com>
 810
 811         * ppc-dis.c (ppc_opts): Add entries for "e5500" and "e6500".
 812         * ppc-opc.c (insert_ls, TMR, ESYNC, XSYNCLE_MASK): New.
 813         (PPCVEC2, PPCTMR, E6500): New short names.
 814         (powerpc_opcodes): Add vabsdub, vabsduh, vabsduw, dni, mvidsplt,
 815         mviwsplt, icblq., mftmr, mttmr, dcblq., miso, lvexbx, lvexhx,
 816         lvexwx, stvexbx, stvexhx, stvexwx, lvepx, lvepxl, stvepx, stvepxl,
 817         lvtrx, lvtrxl, lvtlx, lvtlxl, stvfrx, stvfrxl, stvflx, stvflxl,
 818         lvswx, lvswxl, stvswx, stvswxl, lvsm mnemonics. Accept LS, ESYNC
 819         optional operands on sync instruction for E6500 target.
 820
 821 2012-03-08  Andreas Krebbel  <Andreas.Krebbel@de.ibm.com>
 822
 823         * s390-opc.txt: Set instruction type of pku to SS_L2RDRD.
 824
 825 2012-02-27  Alan Modra  <amodra@gmail.com>
 826
 827         * mt-dis.c: Regenerate.
 828
 829 2012-02-27  Alan Modra  <amodra@gmail.com>
 830
 831         * v850-opc.c (extract_v8): Rearrange to make it obvious this
 832         is the inverse of corresponding insert function.
 833         (extract_d22, extract_u9, extract_r4): Likewise.
 834         (extract_d9): Correct sign extension.
 835         (extract_d16_15): Don't assume "long" is 32 bits, and don't
 836         rely on implementation defined behaviour for shift right of
 837         signed types.
 838         (extract_d16_16, extract_d17_16, extract_i9): Likewise.
 839         (extract_d23): Likewise, and correct mask.
 840
 841 2012-02-27  Alan Modra  <amodra@gmail.com>
 842
 843         * crx-dis.c (print_arg): Mask constant to 32 bits.
 844         * crx-opc.c (cst4_map): Use int array.
 845
 846 2012-02-27  Alan Modra  <amodra@gmail.com>
 847
 848         * arc-dis.c (BITS): Don't use shifts to mask off bits.
 849         (FIELDD): Sign extend with xor,sub.
 850
 851 2012-02-25  Walter Lee  <walt@tilera.com>
 852
 853         * tilegx-opc.c: Handle TILEGX_OPC_LD4S_TLS and TILEGX_OPC_LD_TLS.
 854         * tilepro-opc.c: Handle TILEPRO_OPC_LW_TLS and
 855         TILEPRO_OPC_LW_TLS_SN.
 856
 857 2012-02-21  H.J. Lu  <hongjiu.lu@intel.com>
 858
 859         * i386-opc.h (HLEPrefixNone): New.
 860         (HLEPrefixLock): Likewise.
 861         (HLEPrefixAny): Likewise.
 862         (HLEPrefixRelease): Likewise.
 863
 864 2012-02-08  H.J. Lu  <hongjiu.lu@intel.com>
 865
 866         * i386-dis.c (HLE_Fixup1): New.
 867         (HLE_Fixup2): Likewise.
 868         (HLE_Fixup3): Likewise.
 869         (Ebh1): Likewise.
 870         (Evh1): Likewise.
 871         (Ebh2): Likewise.
 872         (Evh2): Likewise.
 873         (Ebh3): Likewise.
 874         (Evh3): Likewise.
 875         (MOD_C6_REG_7): Likewise.
 876         (MOD_C7_REG_7): Likewise.
 877         (RM_C6_REG_7): Likewise.
 878         (RM_C7_REG_7): Likewise.
 879         (XACQUIRE_PREFIX): Likewise.
 880         (XRELEASE_PREFIX): Likewise.
 881         (dis386): Use Ebh1/Evh1 on add, adc, and, btc, btr, bts,
 882         cmpxchg, dec, inc, neg, not, or, sbb, sub, xor and xadd. Use
 883         Ebh2/Evh2 on xchg.  Use Ebh3/Evh3 on mov.
 884         (reg_table): Use Ebh1/Evh1 on add, adc, and, dec, inc, neg,
 885         not, or, sbb, sub and xor.  Use Ebh3/Evh3 on mov.  Use
 886         MOD_C6_REG_7 and MOD_C7_REG_7.
 887         (mod_table): Add MOD_C6_REG_7 and MOD_C7_REG_7.
 888         (rm_table): Add RM_C6_REG_7 and RM_C7_REG_7.  Add xend and
 889         xtest.
 890         (prefix_name): Handle XACQUIRE_PREFIX and XRELEASE_PREFIX.
 891         (CMPXCHG8B_Fixup): Handle HLE prefix on cmpxchg8b.
 892
 893         * i386-gen.c (cpu_flag_init): Add CPU_HLE_FLAGS and
 894         CPU_RTM_FLAGS.
 895         (cpu_flags): Add CpuHLE and CpuRTM.
 896         (opcode_modifiers): Add HLEPrefixOk.
 897
 898         * i386-opc.h (CpuHLE): New.
 899         (CpuRTM): Likewise.
 900         (HLEPrefixOk): Likewise.
 901         (i386_cpu_flags): Add cpuhle and cpurtm.
 902         (i386_opcode_modifier): Add hleprefixok.
 903
 904         * i386-opc.tbl: Add HLEPrefixOk=3 to mov.  Add HLEPrefixOk to
 905         add, adc, and, btc, btr, bts, cmpxchg, dec, inc, neg, not, or,
 906         sbb, sub, xor and xadd.  Add HLEPrefixOk=2 to xchg with memory
 907         operand.  Add xacquire, xrelease, xabort, xbegin, xend and
 908         xtest.
 909         * i386-init.h: Regenerated.
 910         * i386-tbl.h: Likewise.
 911
 912 2012-01-24  DJ Delorie  <dj@redhat.com>
 913
 914         * rl78-decode.opc (rl78_decode_opcode): Add NOT1.
 915         * rl78-decode.c: Regenerate.
 916
 917 2012-01-17  James Murray  <jsm@jsm-net.demon.co.uk>
 918
 919         PR binutils/10173
 920         * cr16-dis.c (print_arg): Test symtab_size not num_symbols.
 921
 922 2012-01-17  Andreas Schwab  <schwab@linux-m68k.org>
 923
 924         * m68k-opc.c (m68k_opcodes): Fix entries for pmove with BADx/BACx
 925         register and move them after pmove with PSR/PCSR register.
 926
 927 2012-01-13  H.J. Lu  <hongjiu.lu@intel.com>
 928
 929         * i386-dis.c (mod_table): Add vmfunc.
 930
 931         * i386-gen.c (cpu_flag_init): Add CPU_VMFUNC_FLAGS.
 932         (cpu_flags): CpuVMFUNC.
 933
 934         * i386-opc.h (CpuVMFUNC): New.
 935         (i386_cpu_flags): Add cpuvmfunc.
 936
 937         * i386-opc.tbl: Add vmfunc.
 938         * i386-init.h: Regenerated.
 939         * i386-tbl.h: Likewise.
 940
 941 For older changes see ChangeLog-2011
 942 \f
 943 Local Variables:
 944 mode: change-log
 945 left-margin: 8
 946 fill-column: 74
 947 version-control: never
 948 End: