opcodes/ChangeLog

   1 2016-05-27  Nick Clifton  <nickc@redhat.com>
   2
   3         PR target/20150
   4         * msp430-dis.c (msp430dis_read_two_bytes): New function.
   5         (msp430dis_opcode_unsigned): New function.
   6         (msp430dis_opcode_signed): New function.
   7         (msp430_singleoperand): Use the new opcode reading functions.
   8         Only disassenmble bytes if they were successfully read.
   9         (msp430_doubleoperand): Likewise.
  10         (msp430_branchinstr): Likewise.
  11         (msp430x_callx_instr): Likewise.
  12         (print_insn_msp430): Check that it is safe to read bytes before
  13         attempting disassembly.  Use the new opcode reading functions.
  14
  15 2016-05-26  Peter Bergner <bergner@vnet.ibm.com>
  16
  17         * ppc-opc.c (CY): New define.  Document it.
  18         (powerpc_opcodes) <addex[.], lwzmx, vmsumudm>: New mnemonics.
  19
  20 2016-05-25  H.J. Lu  <hongjiu.lu@intel.com>
  21
  22         * i386-gen.c (cpu_flag_init): Add CpuVREX to CPU_AVX512DQ_FLAGS,
  23         CPU_AVX512BW_FLAGS, CPU_AVX512VL_FLAGS, CPU_AVX512IFMA_FLAGS
  24         and CPU_AVX512VBMI_FLAGS.  Add CpuAVX512DQ, CpuAVX512BW,
  25         CpuAVX512VL, CpuAVX512IFMA and CpuAVX512VBMI to
  26         CPU_ANY_AVX_FLAGS.
  27         * i386-init.h: Regenerated.
  28
  29 2016-05-25  H.J. Lu  <hongjiu.lu@intel.com>
  30
  31         PR gas/20141
  32         * i386-gen.c (cpu_flag_init): Add CpuVREX to CPU_AVX512F_FLAGS,
  33         CPU_AVX512CD_FLAGS, CPU_AVX512ER_FLAGS and CPU_AVX512PF_FLAGS.
  34         * i386-init.h: Regenerated.
  35
  36 2016-05-25  H.J. Lu  <hongjiu.lu@intel.com>
  37
  38         * i386-gen.c (cpu_flag_init): Rename CPU_ANY87_FLAGS to
  39         CPU_ANY_X87_FLAGS.  Add CPU_ANY_MMX_FLAGS.
  40         * i386-init.h: Regenerated.
  41
  42 2016-05-23  Claudiu Zissulescu  <claziss@synopsys.com>
  43
  44         * arc-dis.c (print_flags): Set branch_delay_insns, and insn_type
  45         information.
  46         (print_insn_arc): Set insn_type information.
  47         * arc-opc.c (C_CC): Add F_CLASS_COND.
  48         * arc-tbl.h (bbit0, bbit1): Update subclass to COND.
  49         (beq_s, bge_s, bgt_s, bhi_s, bhs_s): Likewise.
  50         (ble_s, blo_s, bls_s, blt_s, bne_s): Likewise.
  51         (breq, breq_s, brge, brhs, brlo, brlt): Likewise.
  52         (brne, brne_s, jeq_s, jne_s): Likewise.
  53
  54 2016-05-23  Claudiu Zissulescu  <claziss@synopsys.com>
  55
  56         * arc-tbl.h (neg): New instruction variant.
  57
  58 2016-05-23  Cupertino Miranda  <cmiranda@synopsys.com>
  59
  60         * arc-dis.c (find_format, find_format, get_auxreg)
  61         (print_insn_arc): Changed.
  62         * arc-ext.h (INSERT_XOP): Likewise.
  63
  64 2016-05-23  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
  65
  66         * tic54x-dis.c (sprint_mmr): Adjust.
  67         * tic54x-opc.c: Likewise.
  68
  69 2016-05-19  Alan Modra  <amodra@gmail.com>
  70
  71         * ppc-opc.c (NSISIGNOPT): Use insert_nsi and extract_nsi.
  72
  73 2016-05-19  Alan Modra  <amodra@gmail.com>
  74
  75         * ppc-opc.c: Formatting.
  76         (NSISIGNOPT): Define.
  77         (powerpc_opcodes <subis>): Use NSISIGNOPT.
  78
  79 2016-05-18  Maciej W. Rozycki  <macro@imgtec.com>
  80
  81         * mips-dis.c (is_compressed_mode_p): Add `micromips_p' operand,
  82         replacing references to `micromips_ase' throughout.
  83         (_print_insn_mips): Don't use file-level microMIPS annotation to
  84         determine the disassembly mode with the symbol table.
  85
  86 2016-05-13  Peter Bergner <bergner@vnet.ibm.com>
  87
  88         * ppc-opc.c (IMM8): Use PPC_OPERAND_SIGNOPT.
  89
  90 2016-05-11  Andrew Bennett  <andrew.bennett@imgtec.com>
  91
  92         * mips-dis.c (mips_arch_choices): Add ASE_DSPR3 to mips32r6 and
  93         mips64r6.
  94         * mips-opc.c (D34): New macro.
  95         (mips_builtin_opcodes): Define bposge32c for DSPr3.
  96
  97 2016-05-10  Alexander Fomin  <alexander.fomin@intel.com>
  98
  99         * i386-dis.c (prefix_table): Add RDPID instruction.
 100         * i386-gen.c (cpu_flag_init): Add RDPID flag.
 101         (cpu_flags): Add RDPID bitfield.
 102         * i386-opc.h (enum): Add RDPID element.
 103         (i386_cpu_flags): Add RDPID field.
 104         * i386-opc.tbl: Add RDPID instruction.
 105         * i386-init.h: Regenerate.
 106         * i386-tbl.h: Regenerate.
 107
 108 2016-05-10  Thomas Preud'homme  <thomas.preudhomme@arm.com>
 109
 110         * arm-dis.c (get_sym_code_type): Use ARM_GET_SYM_BRANCH_TYPE to get
 111         branch type of a symbol.
 112         (print_insn): Likewise.
 113
 114 2016-05-10  Thomas Preud'homme  <thomas.preudhomme@arm.com>
 115
 116         * arm-dis.c (coprocessor_opcodes): Add entries for VFP ARMv8-M
 117         Mainline Security Extensions instructions.
 118         (thumb_opcodes): Add entries for narrow ARMv8-M Security
 119         Extensions instructions.
 120         (thumb32_opcodes): Add entries for wide ARMv8-M Security Extensions
 121         instructions.
 122         (psr_name): Add new MSP_NS and PSP_NS ARMv8-M Security Extensions
 123         special registers.
 124
 125 2016-05-09  Jose E. Marchesi  <jose.marchesi@oracle.com>
 126
 127         * sparc-opc.c (sparc_opcodes): Fix mnemonic of faligndatai.
 128
 129 2016-05-03  Claudiu Zissulescu  <claziss@synopsys.com>
 130
 131         * arc-ext.c (dump_ARC_extmap): Handle SYNATX_NOP and SYNTAX_1OP.
 132         (arcExtMap_genOpcode): Likewise.
 133         * arc-opc.c (arg_32bit_rc): Define new variable.
 134         (arg_32bit_u6): Likewise.
 135         (arg_32bit_limm): Likewise.
 136
 137 2016-05-03  Szabolcs Nagy  <szabolcs.nagy@arm.com>
 138
 139         * aarch64-gen.c (VERIFIER): Define.
 140         * aarch64-opc.c (VERIFIER): Define.
 141         (verify_ldpsw): Use static linkage.
 142         * aarch64-opc.h (verify_ldpsw): Remove.
 143         * aarch64-tbl.h: Use VERIFIER for verifiers.
 144
 145 2016-04-28  Nick Clifton  <nickc@redhat.com>
 146
 147         PR target/19722
 148         * aarch64-dis.c (aarch64_opcode_decode): Run verifier if present.
 149         * aarch64-opc.c (verify_ldpsw): New function.
 150         * aarch64-opc.h (verify_ldpsw): New prototype.
 151         * aarch64-tbl.h: Add initialiser for verifier field.
 152         (LDPSW): Set verifier to verify_ldpsw.
 153
 154 2016-04-23  H.J. Lu  <hongjiu.lu@intel.com>
 155
 156         PR binutils/19983
 157         PR binutils/19984
 158         * i386-dis.c (print_insn): Return -1 if size of bfd_vma is
 159         smaller than address size.
 160
 161 2016-04-20  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
 162
 163         * alpha-dis.c: Regenerate.
 164         * crx-dis.c: Likewise.
 165         * disassemble.c: Likewise.
 166         * epiphany-opc.c: Likewise.
 167         * fr30-opc.c: Likewise.
 168         * frv-opc.c: Likewise.
 169         * ip2k-opc.c: Likewise.
 170         * iq2000-opc.c: Likewise.
 171         * lm32-opc.c: Likewise.
 172         * lm32-opinst.c: Likewise.
 173         * m32c-opc.c: Likewise.
 174         * m32r-opc.c: Likewise.
 175         * m32r-opinst.c: Likewise.
 176         * mep-opc.c: Likewise.
 177         * mt-opc.c: Likewise.
 178         * or1k-opc.c: Likewise.
 179         * or1k-opinst.c: Likewise.
 180         * tic80-opc.c: Likewise.
 181         * xc16x-opc.c: Likewise.
 182         * xstormy16-opc.c: Likewise.
 183
 184 2016-04-19  Andrew Burgess  <andrew.burgess@embecosm.com>
 185
 186         * arc-nps400-tbl.h: Add addb, subb, adcb, sbcb, andb, xorb, orb,
 187         fxorb, wxorb, shlb, shrb, notb, cntbb, div, mod, divm, qcmp,
 188         calcsd, and calcxd instructions.
 189         * arc-opc.c (insert_nps_bitop_size): Delete.
 190         (extract_nps_bitop_size): Delete.
 191         (MAKE_SRC_POS_INSERT_EXTRACT_FUNCS): Define, and use.
 192         (extract_nps_qcmp_m3): Define.
 193         (extract_nps_qcmp_m2): Define.
 194         (extract_nps_qcmp_m1): Define.
 195         (arc_flag_operands): Add F_NPS_SX, F_NPS_AR, F_NPS_AL.
 196         (arc_flag_classes): Add C_NPS_SX, C_NPS_AR_AL
 197         (arc_operands): Add NPS_SRC2_POS, NPS_SRC1_POS, NPS_ADDB_SIZE,
 198         NPS_ANDB_SIZE, NPS_FXORB_SIZ, NPS_WXORB_SIZ, NPS_R_XLDST,
 199         NPS_DIV_UIMM4, NPS_QCMP_SIZE, NPS_QCMP_M1, NPS_QCMP_M2, and
 200         NPS_QCMP_M3.
 201
 202 2016-04-19  Andrew Burgess  <andrew.burgess@embecosm.com>
 203
 204         * arc-nps400-tbl.h: Add dctcp, dcip, dcet, and dcacl instructions.
 205
 206 2016-04-15  H.J. Lu  <hongjiu.lu@intel.com>
 207
 208         * Makefile.in: Regenerated with automake 1.11.6.
 209         * aclocal.m4: Likewise.
 210
 211 2016-04-14  Andrew Burgess  <andrew.burgess@embecosm.com>
 212
 213         * arc-nps400-tbl.h: Add xldb, xldw, xld, xstb, xstw, and xst
 214         instructions.
 215         * arc-opc.c (insert_nps_cmem_uimm16): New function.
 216         (extract_nps_cmem_uimm16): New function.
 217         (arc_operands): Add NPS_XLDST_UIMM16 operand.
 218
 219 2016-04-14  Andrew Burgess  <andrew.burgess@embecosm.com>
 220
 221         * arc-dis.c (arc_insn_length): New function.
 222         (print_insn_arc): Use arc_insn_length, change insnLen to unsigned.
 223         (find_format): Change insnLen parameter to unsigned.
 224
 225 2016-04-13  Nick Clifton  <nickc@redhat.com>
 226
 227         PR target/19937
 228         * v850-opc.c (v850_opcodes): Correct masks for long versions of
 229         the LD.B and LD.BU instructions.
 230
 231 2016-04-12  Claudiu Zissulescu  <claziss@synopsys.com>
 232
 233         * arc-dis.c (find_format): Check for extension flags.
 234         (print_flags): New function.
 235         (print_insn_arc): Update for .extCondCode, .extCoreRegister and
 236         .extAuxRegister.
 237         * arc-ext.c (arcExtMap_coreRegName): Use
 238         LAST_EXTENSION_CORE_REGISTER.
 239         (arcExtMap_coreReadWrite): Likewise.
 240         (dump_ARC_extmap): Update printing.
 241         * arc-opc.c (arc_flag_classes): Add F_CLASS_EXTEND flag.
 242         (arc_aux_regs): Add cpu field.
 243         * arc-regs.h: Add cpu field, lower case name aux registers.
 244
 245 2016-04-12  Claudiu Zissulescu  <claziss@synopsys.com>
 246
 247         * arc-tbl.h: Add rtsc, sleep with no arguments.
 248
 249 2016-04-12  Claudiu Zissulescu  <claziss@synopsys.com>
 250
 251         * arc-opc.c (flags_none, flags_f, flags_cc, flags_ccf):
 252         Initialize.
 253         (arg_none, arg_32bit_rarbrc, arg_32bit_zarbrc, arg_32bit_rbrbrc)
 254         (arg_32bit_rarbu6, arg_32bit_zarbu6, arg_32bit_rbrbu6)
 255         (arg_32bit_rbrbs12, arg_32bit_ralimmrc, arg_32bit_rarblimm)
 256         (arg_32bit_zalimmrc, arg_32bit_zarblimm, arg_32bit_rbrblimm)
 257         (arg_32bit_ralimmu6, arg_32bit_zalimmu6, arg_32bit_zalimms12)
 258         (arg_32bit_ralimmlimm, arg_32bit_zalimmlimm, arg_32bit_rbrc)
 259         (arg_32bit_zarc, arg_32bit_rbu6, arg_32bit_zau6, arg_32bit_rblimm)
 260         (arg_32bit_zalimm, arg_32bit_limmrc, arg_32bit_limmu6)
 261         (arg_32bit_limms12, arg_32bit_limmlimm): Likewise.
 262         (arc_opcode arc_opcodes): Null terminate the array.
 263         (arc_num_opcodes): Remove.
 264         * arc-ext.h (INSERT_XOP): Define.
 265         (extInstruction_t): Likewise.
 266         (arcExtMap_instName): Delete.
 267         (arcExtMap_insn): New function.
 268         (arcExtMap_genOpcode): Likewise.
 269         * arc-ext.c (ExtInstruction): Remove.
 270         (create_map): Zero initialize instruction fields.
 271         (arcExtMap_instName): Remove.
 272         (arcExtMap_insn): New function.
 273         (dump_ARC_extmap): More info while debuging.
 274         (arcExtMap_genOpcode): New function.
 275         * arc-dis.c (find_format): New function.
 276         (print_insn_arc): Use find_format.
 277         (arc_get_disassembler): Enable dump_ARC_extmap only when
 278         debugging.
 279
 280 2016-04-11  Maciej W. Rozycki  <macro@imgtec.com>
 281
 282         * mips-dis.c (print_mips16_insn_arg): Mask unused extended
 283         instruction bits out.
 284
 285 2016-04-07  Andrew Burgess  <andrew.burgess@embecosm.com>
 286
 287         * arc-nps400-tbl.h: Add schd, sync, and hwschd instructions.
 288         * arc-opc.c (arc_flag_operands): Add new flags.
 289         (arc_flag_classes): Add new classes.
 290
 291 2016-04-07  Andrew Burgess  <andrew.burgess@embecosm.com>
 292
 293         * arc-opc.c (arc_opcodes): Extend comment to discus table layout.
 294
 295 2016-04-05  Andrew Burgess  <andrew.burgess@embecosm.com>
 296
 297         * arc-nps400-tbl.h: Add movbi, decode1, fbset, fbclear, encode0,
 298         encode1, rflt, crc16, and crc32 instructions.
 299         * arc-opc.c (arc_flag_operands): Add F_NPS_R.
 300         (arc_flag_classes): Add C_NPS_R.
 301         (insert_nps_bitop_size_2b): New function.
 302         (extract_nps_bitop_size_2b): Likewise.
 303         (insert_nps_bitop_uimm8): Likewise.
 304         (extract_nps_bitop_uimm8): Likewise.
 305         (arc_operands): Add new operand entries.
 306
 307 2016-04-05  Claudiu Zissulescu  <claziss@synopsys.com>
 308
 309         * arc-regs.h: Add a new subclass field.  Add double assist
 310         accumulator register values.
 311         * arc-tbl.h: Use DPA subclass to mark the double assist
 312         instructions.  Use DPX/SPX subclas to mark the FPX instructions.
 313         * arc-opc.c (RSP): Define instead of SP.
 314         (arc_aux_regs): Add the subclass field.
 315
 316 2016-04-05  Jiong Wang  <jiong.wang@arm.com>
 317
 318         * arm-dis.c: Support FP16 vmul, vmla, vmls (by scalar).
 319
 320 2016-03-31  Andrew Burgess  <andrew.burgess@embecosm.com>
 321
 322         * arc-opc.c (arc_operands): Fix operand flags for NPS_R_DST, and
 323         NPS_R_SRC1.
 324
 325 2016-03-30  Andrew Burgess  <andrew.burgess@embecosm.com>
 326
 327         * arc-nps400-tbl.h: Add a header comment, and fix some whitespace
 328         issues.  No functional changes.
 329
 330 2016-03-30  Claudiu Zissulescu  <claziss@synopsys.com>
 331
 332         * arc-regs.h (IC_RAM_ADDRESS, IC_TAG, IC_WP, IC_DATA, CONTROL0)
 333         (AX2, AY2, MX2, MY2, AY0, AY1, DC_RAM_ADDR, DC_TAG, CONTROL1)
 334         (RTT): Remove duplicate.
 335         (LCDINSTR, LCDDATA, LCDSTAT, CC_*, PCT_COUNT*, PCT_SNAP*)
 336         (PCT_CONFIG*): Remove.
 337         (D1L, D1H, D2H, D2L): Define.
 338
 339 2016-03-29  Claudiu Zissulescu  <claziss@synopsys.com>
 340
 341         * arc-ext-tbl.h (dsp_fp_i2flt): Fix typo.
 342
 343 2016-03-29  Claudiu Zissulescu  <claziss@synopsys.com>
 344
 345         * arc-tbl.h (invld07): Remove.
 346         * arc-ext-tbl.h: New file.
 347         * arc-dis.c (FIELDA, FIELDB, FIELDC): Remove.
 348         * arc-opc.c (arc_opcodes): Add ext-tbl include.
 349
 350 2016-03-24  Jan Kratochvil  <jan.kratochvil@redhat.com>
 351
 352         Fix -Wstack-usage warnings.
 353         * aarch64-dis.c (print_operands): Substitute size.
 354         * aarch64-opc.c (print_register_offset_address): Substitute tblen.
 355
 356 2016-03-22  Jose E. Marchesi  <jose.marchesi@oracle.com>
 357
 358         * sparc-opc.c (sparc_opcodes): Reorder entries for `rd' in order
 359         to get a proper diagnostic when an invalid ASR register is used.
 360
 361 2016-03-22  Nick Clifton  <nickc@redhat.com>
 362
 363         * configure: Regenerate.
 364
 365 2016-03-21  Andrew Burgess  <andrew.burgess@embecosm.com>
 366
 367         * arc-nps400-tbl.h: New file.
 368         * arc-opc.c: Add top level comment.
 369         (insert_nps_3bit_dst): New function.
 370         (extract_nps_3bit_dst): New function.
 371         (insert_nps_3bit_src2): New function.
 372         (extract_nps_3bit_src2): New function.
 373         (insert_nps_bitop_size): New function.
 374         (extract_nps_bitop_size): New function.
 375         (arc_flag_operands): Add nps400 entries.
 376         (arc_flag_classes): Add nps400 entries.
 377         (arc_operands): Add nps400 entries.
 378         (arc_opcodes): Add nps400 include.
 379
 380 2016-03-21  Andrew Burgess  <andrew.burgess@embecosm.com>
 381
 382         * arc-opc.c (arc_flag_classes): Convert all flag classes to use
 383         the new class enum values.
 384
 385 2016-03-21  Andrew Burgess  <andrew.burgess@embecosm.com>
 386
 387         * arc-dis.c (print_insn_arc): Handle nps400.
 388
 389 2016-03-21  Andrew Burgess  <andrew.burgess@embecosm.com>
 390
 391         * arc-opc.c (BASE): Delete.
 392
 393 2016-03-18  Nick Clifton  <nickc@redhat.com>
 394
 395         PR target/19721
 396         * aarch64-tbl.h (aarch64_opcode_table): Fix type of second operand
 397         of MOV insn that aliases an ORR insn.
 398
 399 2016-03-16  Jiong Wang  <jiong.wang@arm.com>
 400
 401         * arm-dis.c (neon_opcodes): Support new FP16 instructions.
 402
 403 2016-03-07  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
 404
 405         * mcore-opc.h: Add const qualifiers.
 406         * microblaze-opc.h (struct op_code_struct): Likewise.
 407         * sh-opc.h: Likewise.
 408         * tic4x-dis.c (tic4x_print_indirect): Likewise.
 409         (tic4x_print_op): Likewise.
 410
 411 2016-03-02  Alan Modra  <amodra@gmail.com>
 412
 413         * or1k-desc.h: Regenerate.
 414         * fr30-ibld.c: Regenerate.
 415         * rl78-decode.c: Regenerate.
 416
 417 2016-03-01  Nick Clifton  <nickc@redhat.com>
 418
 419         PR target/19747
 420         * rl78-dis.c (print_insn_rl78_common): Fix typo.
 421
 422 2016-02-24  Renlin Li  <renlin.li@arm.com>
 423
 424         * arm-dis.c (coprocessor_opcodes): Add fp16 instruction entries.
 425         (print_insn_coprocessor): Support fp16 instructions.
 426
 427 2016-02-24  Renlin Li  <renlin.li@arm.com>
 428
 429         * arm-dis.c (print_insn_coprocessor): Fix mask for vsel, vmaxnm,
 430         vminnm, vrint(mpna).
 431
 432 2016-02-24  Renlin Li  <renlin.li@arm.com>
 433
 434         * arm-dis.c (print_insn_coprocessor): Check co-processor number for
 435         cpd/cpd2, mcr/mcr2, mrc/mrc2, ldc/ldc2, stc/stc2.
 436
 437 2016-02-15  H.J. Lu  <hongjiu.lu@intel.com>
 438
 439         * i386-dis.c (print_insn): Parenthesize expression to prevent
 440         truncated addresses.
 441         (OP_J): Likewise.
 442
 443 2016-02-10  Claudiu Zissulescu  <claziss@synopsys.com>
 444             Janek van Oirschot  <jvanoirs@synopsys.com>
 445
 446         * arc-opc.c (arc_relax_opcodes, arc_num_relax_opcodes): New
 447         variable.
 448
 449 2016-02-04  Nick Clifton  <nickc@redhat.com>
 450
 451         PR target/19561
 452         * msp430-dis.c (print_insn_msp430): Add a special case for
 453         decoding an RRC instruction with the ZC bit set in the extension
 454         word.
 455
 456 2016-02-02  Andrew Burgess  <andrew.burgess@embecosm.com>
 457
 458         * cgen-ibld.in (insert_normal): Rework calculation of shift.
 459         * epiphany-ibld.c: Regenerate.
 460         * fr30-ibld.c: Regenerate.
 461         * frv-ibld.c: Regenerate.
 462         * ip2k-ibld.c: Regenerate.
 463         * iq2000-ibld.c: Regenerate.
 464         * lm32-ibld.c: Regenerate.
 465         * m32c-ibld.c: Regenerate.
 466         * m32r-ibld.c: Regenerate.
 467         * mep-ibld.c: Regenerate.
 468         * mt-ibld.c: Regenerate.
 469         * or1k-ibld.c: Regenerate.
 470         * xc16x-ibld.c: Regenerate.
 471         * xstormy16-ibld.c: Regenerate.
 472
 473 2016-02-02  Andrew Burgess  <andrew.burgess@embecosm.com>
 474
 475         * epiphany-dis.c: Regenerated from latest cpu files.
 476
 477 2016-02-01  Michael McConville  <mmcco@mykolab.com>
 478
 479         * cgen-dis.c (count_decodable_bits): Use unsigned value for mask
 480         test bit.
 481
 482 2016-01-25  Renlin Li  <renlin.li@arm.com>
 483
 484         * arm-dis.c (mapping_symbol_for_insn): New function.
 485         (find_ifthen_state): Call mapping_symbol_for_insn().
 486
 487 2016-01-20  Matthew Wahab  <matthew.wahab@arm.com>
 488
 489         * aarch64-opc.c (operand_general_constraint_met_p): Check validity
 490         of MSR UAO immediate operand.
 491
 492 2016-01-18  Maciej W. Rozycki  <macro@imgtec.com>
 493
 494         * mips-dis.c (print_insn_micromips): Remove 48-bit microMIPS
 495         instruction support.
 496
 497 2016-01-17  Alan Modra  <amodra@gmail.com>
 498
 499         * configure: Regenerate.
 500
 501 2016-01-14  Nick Clifton  <nickc@redhat.com>
 502
 503         * rl78-decode.opc (rl78_decode_opcode): Add 's' operand to movw
 504         instructions that can support stack pointer operations.
 505         * rl78-decode.c: Regenerate.
 506         * rl78-dis.c: Fix display of stack pointer in MOVW based
 507         instructions.
 508
 509 2016-01-14  Matthew Wahab  <matthew.wahab@arm.com>
 510
 511         * aarch64-opc.c (aarch64_sys_reg_supported_p): Merge conditionals
 512         testing for RAS support.  Add checks for erxfr_el1, erxctlr_el1,
 513         erxtatus_el1 and erxaddr_el1.
 514
 515 2016-01-12  Matthew Wahab  <matthew.wahab@arm.com>
 516
 517         * arm-dis.c (arm_opcodes): Add "esb".
 518         (thumb_opcodes): Likewise.
 519
 520 2016-01-11  Peter Bergner <bergner@vnet.ibm.com>
 521
 522         * ppc-opc.c <xscmpnedp>: Delete.
 523         <xvcmpnedp>: Likewise.
 524         <xvcmpnedp.>: Likewise.
 525         <xvcmpnesp>: Likewise.
 526         <xvcmpnesp.>: Likewise.
 527
 528 2016-01-08  Andreas Schwab  <schwab@linux-m68k.org>
 529
 530         PR gas/13050
 531         * m68k-opc.c (moveb, movew): For ISA_B/C only allow #,d(An) in
 532         addition to ISA_A.
 533
 534 2016-01-01  Alan Modra  <amodra@gmail.com>
 535
 536         Update year range in copyright notice of all files.
 537
 538 For older changes see ChangeLog-2015
 539 \f
 540 Copyright (C) 2016 Free Software Foundation, Inc.
 541
 542 Copying and distribution of this file, with or without modification,
 543 are permitted in any medium without royalty provided the copyright
 544 notice and this notice are preserved.
 545
 546 Local Variables:
 547 mode: change-log
 548 left-margin: 8
 549 fill-column: 74
 550 version-control: never
 551 End: