opcodes/ChangeLog

   1 2004-05-28  Andrew Stubbs <andrew.stubbs@superh.com>
   2
   3         * sh-dis.c (target_arch): Make unsigned.
   4         (print_insn_sh): Replace (most of) switch with a call to
   5         sh_get_arch_from_bfd_mach(). Also use new architecture flags system.
   6         * sh-opc.h: Redefine architecture flags values.
   7         Add sh3-nommu architecture.
   8         Reorganise <arch>_up macros so they make more visual sense.
   9         (SH_MERGE_ARCH_SET): Define new macro.
  10         (SH_VALID_BASE_ARCH_SET): Likewise.
  11         (SH_VALID_MMU_ARCH_SET): Likewise.
  12         (SH_VALID_CO_ARCH_SET): Likewise.
  13         (SH_VALID_ARCH_SET): Likewise.
  14         (SH_MERGE_ARCH_SET_VALID): Likewise.
  15         (SH_ARCH_SET_HAS_FPU): Likewise.
  16         (SH_ARCH_SET_HAS_DSP): Likewise.
  17         (SH_ARCH_UNKNOWN_ARCH): Likewise.
  18         (sh_get_arch_from_bfd_mach): Add prototype.
  19         (sh_get_arch_up_from_bfd_mach): Likewise.
  20         (sh_get_bfd_mach_from_arch_set): Likewise.
  21         (sh_merge_bfd_arc): Likewise.
  22
  23 2004-05-24  Peter Barada  <peter@the-baradas.com>
  24
  25         * m68k-dis.c(print_insn_m68k): Strip body of diassembly out
  26         into new match_insn_m68k function.  Loop over canidate
  27         matches and select first that completely matches.
  28         * m68k-dis.c(print_insn_arg): Fix 'g' case to only extract 1 bit.
  29         * m68k-dis.c(print_insn_arg): Call new function m68k_valid_ea
  30         to verify addressing for MAC/EMAC.
  31         * m68k-dis.c(print_insn_arg): Use reg_half_names for MAC/EMAC
  32         reigster halves since 'fpu' and 'spl' look misleading.
  33         * m68k-dis.c(fetch_arg): Fix 'G', 'H', 'I', 'f', 'M', 'N' cases.
  34         * m68k-opc.c: Rearragne mac/emac cases to use longest for
  35         first, tighten up match masks.
  36         * m68k-opc.c: Add 'size' field to struct m68k_opcode.  Produce
  37         'size' from special case code in print_insn_m68k to
  38         determine decode size of insns.
  39
  40 2004-05-19  Alan Modra  <amodra@bigpond.net.au>
  41
  42         * ppc-opc.c (insert_fxm): Enable two operand mfcr when -many as
  43         well as when -mpower4.
  44
  45 2004-05-13  Nick Clifton  <nickc@redhat.com>
  46
  47         * po/fr.po: Updated French translation.
  48
  49 2004-05-05  Peter Barada  <peter@the-baradas.com>
  50
  51         * m68k-dis.c(print_insn_m68k): Add new chips, use core
  52         variants in arch_mask.  Only set m68881/68851 for 68k chips.
  53         * m68k-op.c: Switch from ColdFire chips to core variants.
  54
  55 2004-05-05  Alan Modra  <amodra@bigpond.net.au>
  56
  57         PR 147.
  58         * ppc-opc.c (PPCVEC): Remove PPC_OPCODE_PPC.
  59
  60 2004-04-29  Ben Elliston  <bje@au.ibm.com>
  61
  62         * ppc-opc.c (XCMPL): Renmame to XOPL. Update users.
  63         (powerpc_opcodes): Add "dbczl" instruction for PPC970.
  64
  65 2004-04-22  Kaz Kojima  <kkojima@rr.iij4u.or.jp>
  66
  67         * sh-dis.c (print_insn_sh): Print the value in constant pool
  68         as a symbol if it looks like a symbol.
  69
  70 2004-04-22  Peter Barada <peter@the-baradas.com>
  71
  72         * m68k-dis.c(print_insn_m68k): Set mfcmac/mcfemac on
  73         appropriate ColdFire architectures.
  74         (print_insn_m68k): Handle EMAC, MAC/EMAC scalefactor, and MAC/EMAC
  75         mask addressing.
  76         Add EMAC instructions, fix MAC instructions. Remove
  77         macmw/macml/msacmw/msacml instructions since mask addressing now
  78         supported.
  79
  80 2004-04-20  Jakub Jelinek  <jakub@redhat.com>
  81
  82         * sparc-opc.c (fmoviccx, fmovfccx, fmovccx): Define.
  83         (fmovicc, fmovfcc, fmovcc): Remove fpsize argument, change opcode to
  84         suffix.  Use fmov*x macros, create all 3 fpsize variants in one
  85         macro.  Adjust all users.
  86
  87 2004-04-15  Anil Paranjpe  <anilp1@kpitcummins.com>
  88
  89         * h8300-dis.c (bfd_h8_disassemble) : Treat "adds" & "subs"
  90         separately.
  91
  92 2004-03-30  Kazuhiro Inaoka  <inaoka.kazuhiro@renesas.com>
  93
  94         * m32r-asm.c: Regenerate.
  95
  96 2004-03-29  Stan Shebs  <shebs@apple.com>
  97
  98         * mpw-config.in, mpw-make.sed: Remove MPW support files, no longer
  99         used.
 100
 101 2004-03-19  Alan Modra  <amodra@bigpond.net.au>
 102
 103         * aclocal.m4: Regenerate.
 104         * config.in: Regenerate.
 105         * configure: Regenerate.
 106         * po/POTFILES.in: Regenerate.
 107         * po/opcodes.pot: Regenerate.
 108
 109 2004-03-16  Alan Modra  <amodra@bigpond.net.au>
 110
 111         * ppc-dis.c (print_insn_powerpc): Don't print tabs.  Handle
 112         PPC_OPERANDS_GPR_0.
 113         * ppc-opc.c (RA0): Define.
 114         (RAQ, RAL, RAM, RAS, RSQ, RTQ, RSO): Use PPC_OPERAND_GPR_0.
 115         (RAOPT): Rename from RAO.  Update all uses.
 116         (powerpc_opcodes): Use RA0 as appropriate.
 117
 118 2004-03-15  Aldy Hernandez  <aldyh@redhat.com>
 119
 120         * ppc-opc.c (powerpc_opcodes): Add BOOKE versions of mfsprg.
 121
 122 2004-03-15  Alan Modra  <amodra@bigpond.net.au>
 123
 124         * sparc-dis.c (print_insn_sparc): Update getword prototype.
 125
 126 2004-03-12  Michal Ludvig  <mludvig@suse.cz>
 127
 128         * i386-dis.c (GRPPLOCK): Delete.
 129         (grps): Delete GRPPLOCK entry.
 130
 131 2004-03-12  Alan Modra  <amodra@bigpond.net.au>
 132
 133         * i386-dis.c (OP_M, OP_0f0e, OP_0fae, NOP_Fixup): New functions.
 134         (M, Mp): Use OP_M.
 135         (None, PADLOCK_SPECIAL, PADLOCK_0): Delete.
 136         (GRPPADLCK): Define.
 137         (dis386): Use NOP_Fixup on "nop".
 138         (dis386_twobyte): Use GRPPADLCK on opcode 0xa7.
 139         (twobyte_has_modrm): Set for 0xa7.
 140         (padlock_table): Delete.  Move to..
 141         (grps): ..here, using OP_0f07.  Use OP_Ofae on lfence, mfence
 142         and clflush.
 143         (print_insn): Revert PADLOCK_SPECIAL code.
 144         (OP_E): Delete sfence, lfence, mfence checks.
 145
 146 2004-03-12  Jakub Jelinek  <jakub@redhat.com>
 147
 148         * i386-dis.c (grps): Use INVLPG_Fixup instead of OP_E for invlpg.
 149         (INVLPG_Fixup): New function.
 150         (PNI_Fixup): Remove ATTRIBUTE_UNUSED from sizeflag.
 151
 152 2004-03-12  Michal Ludvig  <mludvig@suse.cz>
 153
 154         * i386-dis.c (PADLOCK_SPECIAL, PADLOCK_0): New defines.
 155         (dis386_twobyte): Opcode 0xa7 is PADLOCK_0.
 156         (padlock_table): New struct with PadLock instructions.
 157         (print_insn): Handle PADLOCK_SPECIAL.
 158
 159 2004-03-12  Alan Modra  <amodra@bigpond.net.au>
 160
 161         * i386-dis.c (grps): Use clflush by default for 0x0fae/7.
 162         (OP_E): Twiddle clflush to sfence here.
 163
 164 2004-03-08  Nick Clifton  <nickc@redhat.com>
 165
 166         * po/de.po: Updated German translation.
 167
 168 2003-03-03  Andrew Stubbs  <andrew.stubbs@superh.com>
 169
 170         * sh-dis.c (print_insn_sh): Don't disassemble fp instructions in
 171         nofpu mode.  Add BFD type bfd_mach_sh4_nommu_nofpu.
 172         * sh-opc.h: Add sh4_nommu_nofpu architecture and adjust instructions
 173         accordingly.
 174
 175 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
 176
 177         * frv-asm.c: Regenerate.
 178         * frv-desc.c: Regenerate.
 179         * frv-desc.h: Regenerate.
 180         * frv-dis.c: Regenerate.
 181         * frv-ibld.c: Regenerate.
 182         * frv-opc.c: Regenerate.
 183         * frv-opc.h: Regenerate.
 184
 185 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
 186
 187         * frv-desc.c, frv-opc.c: Regenerate.
 188
 189 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
 190
 191         * frv-desc.c, frv-opc.c, frv-opc.h: Regenerate.
 192
 193 2004-02-26  Andrew Stubbs  <andrew.stubbs@superh.com>
 194
 195         * sh-opc.h: Move fsca and fsrra instructions from sh4a to sh4.
 196         Also correct mistake in the comment.
 197
 198 2004-02-26  Andrew Stubbs <andrew.stubbs@superh.com>
 199
 200         * sh-dis.c (print_insn_sh): Add REG_N_D nibble type to
 201         ensure that double registers have even numbers.
 202         Add REG_N_B01 for nn01 (binary 01) nibble to ensure
 203         that reserved instruction 0xfffd does not decode the same
 204         as 0xfdfd (ftrv).
 205         * sh-opc.h: Add REG_N_D nibble type and use it whereever
 206         REG_N refers to a double register.
 207         Add REG_N_B01 nibble type and use it instead of REG_NM
 208         in ftrv.
 209         Adjust the bit patterns in a few comments.
 210
 211 2004-02-25  Aldy Hernandez  <aldyh@redhat.com>
 212
 213         * ppc-opc.c (powerpc_opcodes): Change mask for dcbt and dcbtst.
 214
 215 2004-02-20  Aldy Hernandez  <aldyh@redhat.com>
 216
 217         * ppc-opc.c (powerpc_opcodes): Move mfmcsrr0 before mfdc_dat.
 218
 219 2004-02-20  Aldy Hernandez  <aldyh@redhat.com>
 220
 221         * ppc-opc.c (powerpc_opcodes): Add m*ivor35.
 222
 223 2004-02-20  Aldy Hernandez  <aldyh@redhat.com>
 224
 225         * ppc-opc.c (powerpc_opcodes): Add mfivor32, mfivor33, mfivor34,
 226         mtivor32, mtivor33, mtivor34.
 227
 228 2004-02-19  Aldy Hernandez  <aldyh@redhat.com>
 229
 230         * ppc-opc.c (powerpc_opcodes): Add mfmcar.
 231
 232 2004-02-10  Petko Manolov  <petkan@nucleusys.com>
 233
 234         * arm-opc.h Maverick accumulator register opcode fixes.
 235
 236 2004-02-13  Ben Elliston  <bje@wasabisystems.com>
 237
 238         * m32r-dis.c: Regenerate.
 239
 240 2004-01-27  Michael Snyder  <msnyder@redhat.com>
 241
 242         * sh-opc.h (sh_table): "fsrra", not "fssra".
 243
 244 2004-01-23  Andrew Over <andrew.over@cs.anu.edu.au>
 245
 246         * sparc-opc.c (fdtox, fstox, fqtox, fxtod, fxtos, fxtoq): Tighten
 247         contraints.
 248
 249 2004-01-19  Andrew Over  <andrew.over@cs.anu.edu.au>
 250
 251         * sparc-opc.c (sparc_opcodes) <f[dsq]tox, fxto[dsq]>: Fix args.
 252
 253 2004-01-19  Alan Modra  <amodra@bigpond.net.au>
 254
 255         * i386-dis.c (OP_E): Print scale factor on intel mode sib when not
 256         1.  Don't print scale factor on AT&T mode when index missing.
 257
 258 2004-01-16  Alexandre Oliva  <aoliva@redhat.com>
 259
 260         * m10300-opc.c (mov): 8- and 24-bit immediates are zero-extended
 261         when loaded into XR registers.
 262
 263 2004-01-14  Richard Sandiford  <rsandifo@redhat.com>
 264
 265         * frv-desc.h: Regenerate.
 266         * frv-desc.c: Regenerate.
 267         * frv-opc.c: Regenerate.
 268
 269 2004-01-13  Michael Snyder  <msnyder@redhat.com>
 270
 271         * sh-dis.c (print_insn_sh): Allocate 4 bytes for insn.
 272
 273 2004-01-09  Paul Brook  <paul@codesourcery.com>
 274
 275         * arm-opc.h (arm_opcodes): Move generic mcrr after known
 276         specific opcodes.
 277
 278 2004-01-07  Daniel Jacobowitz  <drow@mvista.com>
 279
 280         * Makefile.am (libopcodes_la_DEPENDENCIES)
 281         (libopcodes_la_LIBADD): Revert 2003-05-17 change.  Add explanatory
 282         comment about the problem.
 283         * Makefile.in: Regenerate.
 284
 285 2004-01-06  Alexandre Oliva  <aoliva@redhat.com>
 286
 287         2003-12-19  Alexandre Oliva  <aoliva@redhat.com>
 288         * frv-asm.c (parse_ulo16, parse_uhi16, parse_d12): Fix some
 289         cut&paste errors in shifting/truncating numerical operands.
 290         2003-08-04  Alexandre Oliva  <aoliva@redhat.com>
 291         * frv-asm.c (parse_ulo16): Parse gotofflo and gotofffuncdesclo.
 292         (parse_uslo16): Likewise.
 293         (parse_uhi16): Parse gotoffhi and gotofffuncdeschi.
 294         (parse_d12): Parse gotoff12 and gotofffuncdesc12.
 295         (parse_s12): Likewise.
 296         2003-08-04  Alexandre Oliva  <aoliva@redhat.com>
 297         * frv-asm.c (parse_ulo16): Parse gotlo and gotfuncdesclo.
 298         (parse_uslo16): Likewise.
 299         (parse_uhi16): Parse gothi and gotfuncdeschi.
 300         (parse_d12): Parse got12 and gotfuncdesc12.
 301         (parse_s12): Likewise.
 302
 303 2004-01-02  Albert Bartoszko  <albar@nt.kegel.com.pl>
 304
 305         * msp430-dis.c (msp430_doubleoperand): Check for an 'add'
 306         instruction which looks similar to an 'rla' instruction.
 307
 308 For older changes see ChangeLog-0203
 309 \f
 310 Local Variables:
 311 mode: change-log
 312 left-margin: 8
 313 fill-column: 74
 314 version-control: never
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