1 2018-04-16 Alan Modra <amodra@gmail.com>
3 * configure.ac: Remove we32k support.
4 * configure: Regenerate.
6 2018-04-16 Alan Modra <amodra@gmail.com>
8 * Makefile.am: Remove m88k support.
9 * configure.ac: Likewise.
10 * disassemble.c: Likewise.
11 * disassemble.h: Likewise.
13 * Makefile.in: Regenerate.
14 * configure: Regenerate.
15 * po/POTFILES.in: Regenerate.
17 2018-04-16 Alan Modra <amodra@gmail.com>
19 * Makefile.am: Remove i370 support.
20 * configure.ac: Likewise.
21 * disassemble.c: Likewise.
22 * disassemble.h: Likewise.
25 * Makefile.in: Regenerate.
26 * configure: Regenerate.
27 * po/POTFILES.in: Regenerate.
29 2018-04-16 Alan Modra <amodra@gmail.com>
31 * Makefile.am: Remove h8500 support.
32 * configure.ac: Likewise.
33 * disassemble.c: Likewise.
34 * disassemble.h: Likewise.
35 * h8500-dis.c: Delete.
36 * h8500-opc.h: Delete.
37 * Makefile.in: Regenerate.
38 * configure: Regenerate.
39 * po/POTFILES.in: Regenerate.
41 2018-04-16 Alan Modra <amodra@gmail.com>
43 * configure.ac: Remove tahoe support.
44 * configure: Regenerate.
46 2018-04-15 H.J. Lu <hongjiu.lu@intel.com>
48 * i386-dis.c (prefix_table): Replace Em with Edq on tpause and
50 * i386-opc.tbl: Allow 32-bit registers for tpause and umwait in
52 * i386-tbl.h: Regenerated.
54 2018-04-11 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
56 * i386-dis.c (enum): Add PREFIX_MOD_0_0FAE_REG_6,
57 PREFIX_MOD_1_0FAE_REG_6.
59 (OP_E_register): Use va_mode.
60 * i386-dis-evex.h (prefix_table):
61 New instructions (see prefixes above).
62 * i386-gen.c (cpu_flag_init): Add WAITPKG.
63 (cpu_flags): Likewise.
64 * i386-opc.h (enum): Likewise.
65 (i386_cpu_flags): Likewise.
66 * i386-opc.tbl: Add umonitor, umwait, tpause.
67 * i386-init.h: Regenerate.
68 * i386-tbl.h: Likewise.
70 2018-04-11 Alan Modra <amodra@gmail.com>
72 * opcodes/i860-dis.c: Delete.
73 * opcodes/i960-dis.c: Delete.
74 * Makefile.am: Remove i860 and i960 support.
75 * configure.ac: Likewise.
76 * disassemble.c: Likewise.
77 * disassemble.h: Likewise.
78 * Makefile.in: Regenerate.
79 * configure: Regenerate.
80 * po/POTFILES.in: Regenerate.
82 2018-04-04 H.J. Lu <hongjiu.lu@intel.com>
85 * i386-dis.c (get_valid_dis386): Don't set vex.prefix nor vex.w
87 (print_insn): Clear vex instead of vex.evex.
89 2018-04-04 Nick Clifton <nickc@redhat.com>
91 * po/es.po: Updated Spanish translation.
93 2018-03-28 Jan Beulich <jbeulich@suse.com>
95 * i386-gen.c (opcode_modifiers): Delete VecESize.
96 * i386-opc.h (VecESize): Delete.
97 (struct i386_opcode_modifier): Delete vecesize.
98 * i386-opc.tbl: Drop VecESize.
99 * i386-tlb.h: Re-generate.
101 2018-03-28 Jan Beulich <jbeulich@suse.com>
103 * i386-opc.h (NO_BROADCAST, BROADCAST_1TO16, BROADCAST_1TO8,
104 BROADCAST_1TO4, BROADCAST_1TO2): Delete.
105 (struct i386_opcode_modifier): Shrink broadcast field to 1 bit.
106 * i386-opc.tbl: Replace Broadcast=<N> by Broadcast.
107 * i386-tlb.h: Re-generate.
109 2018-03-28 Jan Beulich <jbeulich@suse.com>
111 * i386-opc.tbl (vcvt*d2si, vcvt*d2usi, vcvt*s2si, vcvt*s2usi):
113 * i386-tlb.h: Re-generate.
115 2018-03-28 Jan Beulich <jbeulich@suse.com>
117 * i386-dis.c (prefix_table): Drop Y for cvt*2si.
118 (vex_len_table): Drop Y for vcvt*2si.
119 (putop): Replace plain 'Y' handling by abort().
121 2018-03-28 Nick Clifton <nickc@redhat.com>
124 * aarch64-tbl.h (aarch64_opcode_table): Add entries for LDFF1xx
125 instructions with only a base address register.
126 * aarch64-opc.c (operand_general_constraint_met_p): Add code to
127 handle AARHC64_OPND_SVE_ADDR_R.
128 (aarch64_print_operand): Likewise.
129 * aarch64-asm-2.c: Regenerate.
130 * aarch64_dis-2.c: Regenerate.
131 * aarch64-opc-2.c: Regenerate.
133 2018-03-22 Jan Beulich <jbeulich@suse.com>
135 * i386-opc.tbl: Drop VecESize from register only insn forms and
136 memory forms not allowing broadcast.
137 * i386-tlb.h: Re-generate.
139 2018-03-22 Jan Beulich <jbeulich@suse.com>
141 * i386-opc.tbl (vfrczs*, vphadd*, vphsub*, vpmacs*, vpmadcs*,
142 vprot*, vpsha*, vpshl*, bextr, blc*, bls*, t1mskc, tzmsk, sha1*,
143 sha256*): Drop Disp<N>.
145 2018-03-22 Jan Beulich <jbeulich@suse.com>
147 * i386-dis.c (EbndS, bnd_swap_mode): New.
148 (prefix_table): Use EbndS.
149 (OP_E_register, OP_E_memory): Also handle bnd_swap_mode.
150 * i386-opc.tbl (bndmov): Move misplaced Load.
151 * i386-tlb.h: Re-generate.
153 2018-03-22 Jan Beulich <jbeulich@suse.com>
155 * i386-opc.tbl (vcvtdq2pd, vcvtps2pd, vcvtudq2pd): Use separate
156 templates allowing memory operands and folded ones for register
158 * i386-tlb.h: Re-generate.
160 2018-03-22 Jan Beulich <jbeulich@suse.com>
162 * i386-opc.tbl (vfrczp*, vpcmov, vpermil2p*): Fold 128- and
163 256-bit templates. Drop redundant leftover Disp<N>.
164 * i386-tlb.h: Re-generate.
166 2018-03-14 Kito Cheng <kito.cheng@gmail.com>
168 * riscv-opc.c (riscv_insn_types): New.
170 2018-03-13 Nick Clifton <nickc@redhat.com>
172 * po/pt_BR.po: Updated Brazilian Portuguese translation.
174 2018-03-08 H.J. Lu <hongjiu.lu@intel.com>
176 * i386-opc.tbl: Add Optimize to clr.
177 * i386-tbl.h: Regenerated.
179 2018-03-08 H.J. Lu <hongjiu.lu@intel.com>
181 * i386-gen.c (opcode_modifiers): Remove OldGcc.
182 * i386-opc.h (OldGcc): Removed.
183 (i386_opcode_modifier): Remove oldgcc.
184 * i386-opc.tbl: Remove fsubp, fsubrp, fdivp and fdivrp
185 instructions for old (<= 2.8.1) versions of gcc.
186 * i386-tbl.h: Regenerated.
188 2018-03-08 Jan Beulich <jbeulich@suse.com>
190 * i386-opc.h (EVEXDYN): New.
191 * i386-opc.tbl: Fold various AVX512VL templates.
192 * i386-tlb.h: Re-generate.
194 2018-03-08 Jan Beulich <jbeulich@suse.com>
196 * i386-opc.tbl (vexpandpd, vexpandps, vmovapd, vmovaps,
197 vmovdqa32, vmovdqa64, vmovdqu32, vmovdqu64, vmovupd, vmovups,
198 vpexpandd, vpexpandq): Fold AFX512VF templates.
199 * i386-tlb.h: Re-generate.
201 2018-03-08 Jan Beulich <jbeulich@suse.com>
203 * i386-opc.tbl (vgf2p8affineinvqb, vgf2p8affineqb, vgf2p8mulb):
204 Fold 128- and 256-bit VEX-encoded templates.
205 * i386-tlb.h: Re-generate.
207 2018-03-08 Jan Beulich <jbeulich@suse.com>
209 * i386-opc.tbl (vexpandpd, vexpandps, vmovapd, vmovaps,
210 vmovdqa32, vmovdqa64, vmovdqu32, vmovdqu64, vmovupd, vmovups,
211 vpexpandd, vpexpandq): Fold AVX512F templates.
212 * i386-tlb.h: Re-generate.
214 2018-03-08 Jan Beulich <jbeulich@suse.com>
216 * i386-opc.tbl (llwpcb, slwpcb, lwpval, lwpins): Fold 32- and
217 64-bit templates. Drop Disp<N>.
218 * i386-tlb.h: Re-generate.
220 2018-03-08 Jan Beulich <jbeulich@suse.com>
222 * i386-opc.tbl (vfmadd*, vfmsub*, vfnmadd*, vfnmsub*): Fold 128-
223 and 256-bit templates.
224 * i386-tlb.h: Re-generate.
226 2018-03-08 Jan Beulich <jbeulich@suse.com>
228 * i386-opc.tbl (cmpxchg8b): Add NoRex64.
229 * i386-tlb.h: Re-generate.
231 2018-03-08 Jan Beulich <jbeulich@suse.com>
233 * i386-opc.tbl (cmpxchg16b, fisttp, fisttpll, bndmov, mwaitx):
235 * i386-tlb.h: Re-generate.
237 2018-03-08 Jan Beulich <jbeulich@suse.com>
239 * i386-opc.tbl (ldmxcsr, stmxcsr): Add NoAVX.
240 * i386-tlb.h: Re-generate.
242 2018-03-08 Jan Beulich <jbeulich@suse.com>
244 * i386-gen.c (opcode_modifiers): Delete FloatD.
245 * i386-opc.h (FloatD): Delete.
246 (struct i386_opcode_modifier): Delete floatd.
247 * i386-opc.tbl (fadd, fsub, fsubr, fmul, fdiv, fdivr): Replace
249 * i386-tlb.h: Re-generate.
251 2018-03-08 Jan Beulich <jbeulich@suse.com>
253 * i386-dis.c (float_reg): Adjust DC and DE fsub*/fdiv* patterns.
255 2018-03-08 Jan Beulich <jbeulich@suse.com>
257 * i386-opc.tbl (vmovd): Disallow Qword memory operands.
258 * i386-tlb.h: Re-generate.
260 2018-03-08 Jan Beulich <jbeulich@suse.com>
262 * i386-opc.tbl (vcvtpd2ps): Fold AVX 128- and 256-bit memory
264 * i386-tlb.h: Re-generate.
266 2018-03-07 Alan Modra <amodra@gmail.com>
268 * disassemble.c (disassembler): Use bfd_arch_powerpc entry for
270 * disassemble.h (print_insn_rs6000): Delete.
271 * ppc-dis.c (powerpc_init_dialect): Handle rs6000.
272 (disassemble_init_powerpc): Call powerpc_init_dialect for rs6000.
273 (print_insn_rs6000): Delete.
275 2018-03-03 Alan Modra <amodra@gmail.com>
277 * sysdep.h (opcodes_error_handler): Define.
278 (_bfd_error_handler): Declare.
279 * Makefile.am: Remove stray #.
280 * opc2c.c (main): Remove bogus -l arg handling. Print "DO NOT
282 * aarch64-dis.c, * arc-dis.c, * arm-dis.c, * avr-dis.c,
283 * d30v-dis.c, * h8300-dis.c, * mmix-dis.c, * ppc-dis.c,
284 * riscv-dis.c, * s390-dis.c, * sparc-dis.c, * v850-dis.c: Use
285 opcodes_error_handler to print errors. Standardize error messages.
286 * msp430-decode.opc, * nios2-dis.c, * rl78-decode.opc: Likewise,
287 and include opintl.h.
288 * nds32-asm.c: Likewise, and include sysdep.h and opintl.h.
289 * i386-gen.c: Standardize error messages.
290 * msp430-decode.c, * rl78-decode.c, rx-decode.c: Regenerate.
291 * Makefile.in: Regenerate.
292 * epiphany-asm.c, * epiphany-desc.c, * epiphany-dis.c,
293 * epiphany-ibld.c, * fr30-asm.c, * fr30-desc.c, * fr30-dis.c,
294 * fr30-ibld.c, * frv-asm.c, * frv-desc.c, * frv-dis.c, * frv-ibld.c,
295 * frv-opc.c, * ip2k-asm.c, * ip2k-desc.c, * ip2k-dis.c, * ip2k-ibld.c,
296 * iq2000-asm.c, * iq2000-desc.c, * iq2000-dis.c, * iq2000-ibld.c,
297 * lm32-asm.c, * lm32-desc.c, * lm32-dis.c, * lm32-ibld.c,
298 * m32c-asm.c, * m32c-desc.c, * m32c-dis.c, * m32c-ibld.c,
299 * m32r-asm.c, * m32r-desc.c, * m32r-dis.c, * m32r-ibld.c,
300 * mep-asm.c, * mep-desc.c, * mep-dis.c, * mep-ibld.c, * mt-asm.c,
301 * mt-desc.c, * mt-dis.c, * mt-ibld.c, * or1k-asm.c, * or1k-desc.c,
302 * or1k-dis.c, * or1k-ibld.c, * xc16x-asm.c, * xc16x-desc.c,
303 * xc16x-dis.c, * xc16x-ibld.c, * xstormy16-asm.c, * xstormy16-desc.c,
304 * xstormy16-dis.c, * xstormy16-ibld.c: Regenerate.
306 2018-03-01 H.J. Lu <hongjiu.lu@intel.com>
308 * * i386-opc.tbl: Add "Optimize" to AVX256 and AVX512
309 vpsub[bwdq] instructions.
310 * i386-tbl.h: Regenerated.
312 2018-03-01 Alan Modra <amodra@gmail.com>
314 * configure.ac (ALL_LINGUAS): Sort.
315 * configure: Regenerate.
317 2018-02-27 Thomas Preud'homme <thomas.preudhomme@arm.com>
319 * arm-dis.c (print_insn_coprocessor): Replace uses of ARM_FEATURE_COPY
320 macro by assignements.
322 2018-02-27 H.J. Lu <hongjiu.lu@intel.com>
325 * i386-gen.c (opcode_modifiers): Add Optimize.
326 * i386-opc.h (Optimize): New enum.
327 (i386_opcode_modifier): Add optimize.
328 * i386-opc.tbl: Add "Optimize" to "mov $imm, reg",
329 "sub reg, reg/mem", "test $imm, acc", "test $imm, reg/mem",
330 "and $imm, acc", "and $imm, reg/mem", "xor reg, reg/mem",
331 "movq $imm, reg" and AVX256 and AVX512 versions of vandnps,
332 vandnpd, vpandn, vpandnd, vpandnq, vxorps, vxorpd, vpxor,
334 * i386-tbl.h: Regenerated.
336 2018-02-26 Alan Modra <amodra@gmail.com>
338 * crx-dis.c (getregliststring): Allocate a large enough buffer
339 to silence false positive gcc8 warning.
341 2018-02-22 Shea Levy <shea@shealevy.com>
343 * disassemble.c (ARCH_riscv): Define if ARCH_all.
345 2018-02-22 H.J. Lu <hongjiu.lu@intel.com>
347 * i386-opc.tbl: Add {rex},
348 * i386-tbl.h: Regenerated.
350 2018-02-20 Maciej W. Rozycki <macro@mips.com>
352 * mips16-opc.c (decode_mips16_operand) <'M'>: Remove case.
353 (mips16_opcodes): Replace `M' with `m' for "restore".
355 2018-02-19 Thomas Preud'homme <thomas.preudhomme@arm.com>
357 * arm-dis.c (thumb_opcodes): Fix BXNS mask.
359 2018-02-13 Maciej W. Rozycki <macro@mips.com>
361 * wasm32-dis.c (print_insn_wasm32): Rename `index' local
362 variable to `function_index'.
364 2018-02-13 Nick Clifton <nickc@redhat.com>
367 * metag-dis.c (print_fmmov): Double buffer size to avoid warning
368 about truncation of printing.
370 2018-02-12 Henry Wong <henry@stuffedcow.net>
372 * mips-opc.c (mips_builtin_opcodes): Correct "sigrie" encoding.
374 2018-02-05 Nick Clifton <nickc@redhat.com>
376 * po/pt_BR.po: Updated Brazilian Portuguese translation.
378 2018-01-23 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
380 * i386-dis.c (enum): Add pconfig.
381 * i386-gen.c (cpu_flag_init): Add CPU_PCONFIG_FLAGS.
382 (cpu_flags): Add CpuPCONFIG.
383 * i386-opc.h (enum): Add CpuPCONFIG.
384 (i386_cpu_flags): Add cpupconfig.
385 * i386-opc.tbl: Add PCONFIG instruction.
386 * i386-init.h: Regenerate.
387 * i386-tbl.h: Likewise.
389 2018-01-23 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
391 * i386-dis.c (enum): Add PREFIX_0F09.
392 * i386-gen.c (cpu_flag_init): Add CPU_WBNOINVD_FLAGS.
393 (cpu_flags): Add CpuWBNOINVD.
394 * i386-opc.h (enum): Add CpuWBNOINVD.
395 (i386_cpu_flags): Add cpuwbnoinvd.
396 * i386-opc.tbl: Add WBNOINVD instruction.
397 * i386-init.h: Regenerate.
398 * i386-tbl.h: Likewise.
400 2018-01-17 Jim Wilson <jimw@sifive.com>
402 * riscv-opc.c (riscv_opcodes) <addi>: Use z instead of 0.
404 2018-01-17 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
406 * i386-gen.c (cpu_flag_init): Delete CPU_CET_FLAGS, CpuCET.
407 Add CPU_IBT_FLAGS, CPU_SHSTK_FLAGS, CPY_ANY_IBT_FLAGS,
408 CPU_ANY_SHSTK_FLAGS, CpuIBT, CpuSHSTK.
409 (cpu_flags): Add CpuIBT, CpuSHSTK.
410 * i386-opc.h (enum): Add CpuIBT, CpuSHSTK.
411 (i386_cpu_flags): Add cpuibt, cpushstk.
412 * i386-opc.tbl: Change CpuCET to CpuSHSTK and CpuIBT.
413 * i386-init.h: Regenerate.
414 * i386-tbl.h: Likewise.
416 2018-01-16 Nick Clifton <nickc@redhat.com>
418 * po/pt_BR.po: Updated Brazilian Portugese translation.
419 * po/de.po: Updated German translation.
421 2018-01-15 Jim Wilson <jimw@sifive.com>
423 * riscv-opc.c (match_c_nop): New.
424 (riscv_opcodes) <addi>: Handle an addi that compresses to c.nop.
426 2018-01-15 Nick Clifton <nickc@redhat.com>
428 * po/uk.po: Updated Ukranian translation.
430 2018-01-13 Nick Clifton <nickc@redhat.com>
432 * po/opcodes.pot: Regenerated.
434 2018-01-13 Nick Clifton <nickc@redhat.com>
436 * configure: Regenerate.
438 2018-01-13 Nick Clifton <nickc@redhat.com>
442 2018-01-11 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
444 * i386-opc.tbl: Remove VL variants for 4FMAPS and 4VNNIW insns.
445 * i386-tbl.h: Regenerate.
447 2018-01-10 Jan Beulich <jbeulich@suse.com>
449 * i386-opc.tbl (v4fmaddss, v4fnmaddss): Adjust Disp8MemShift.
450 * i386-tbl.h: Re-generate.
452 2018-01-10 Jan Beulich <jbeulich@suse.com>
454 * i386-opc.tbl (vpcmpeqb, vpcmpleb, vpcmpltb, vpcmpneqb,
455 vpcmpnleb, vpcmpnltb, vpcmpequb, vpcmpleub, vpcmpltub,
456 vpcmpnequb, vpcmpnleub, vpcmpnltub, vpcmpeqw, vpcmplew,
457 vpcmpltw, vpcmpneqw, vpcmpnlew, vpcmpnltw, vpcmpequw, vpcmpleuw,
458 vpcmpltuw, vpcmpnequw, vpcmpnleuw, vpcmpnltuw): Adjust
459 Disp8MemShift of AVX512VL forms.
460 * i386-tbl.h: Re-generate.
462 2018-01-09 Jim Wilson <jimw@sifive.com>
464 * riscv-dis.c (maybe_print_address): If base_reg is zero,
465 then the hi_addr value is zero.
467 2018-01-09 James Greenhalgh <james.greenhalgh@arm.com>
469 * arm-dis.c (arm_opcodes): Add csdb.
470 (thumb32_opcodes): Add csdb.
472 2018-01-09 James Greenhalgh <james.greenhalgh@arm.com>
474 * aarch64-tbl.h (aarch64_opcode_table): Add "csdb".
475 * aarch64-asm-2.c: Regenerate.
476 * aarch64-dis-2.c: Regenerate.
477 * aarch64-opc-2.c: Regenerate.
479 2018-01-08 H.J. Lu <hongjiu.lu@intel.com>
482 * i386-opc.tbl: Properly encode vmovd with Qword memeory operand.
483 Remove AVX512 vmovd with 64-bit operands.
484 * i386-tbl.h: Regenerated.
486 2018-01-05 Jim Wilson <jimw@sifive.com>
488 * riscv-dis.c (print_insn_args) <'s'>: Call maybe_print_address for a
491 2018-01-03 Alan Modra <amodra@gmail.com>
493 Update year range in copyright notice of all files.
495 2018-01-02 Jan Beulich <jbeulich@suse.com>
497 * i386-gen.c (operand_type_init): Restore OPERAND_TYPE_REGYMM
498 and OPERAND_TYPE_REGZMM entries.
500 For older changes see ChangeLog-2017
502 Copyright (C) 2018 Free Software Foundation, Inc.
504 Copying and distribution of this file, with or without modification,
505 are permitted in any medium without royalty provided the copyright
506 notice and this notice are preserved.
512 version-control: never