opcodes/ChangeLog

   1 2012-05-03  Sean Keys  <skeys@ipdatasys.com>
   2
   3         * Makefile.in, configure: regenerate
   4         * disassemble.c (disassembler): Recognize ARCH_XGATE.
   5         * xgate-dis.c (read_memory, print_insn, print_insn_xgate):
   6         New functions.
   7         * configure.in: Recognize xgate.
   8         * xgate-dis.c, xgate-opc.c: New files for support of xgate
   9         * Makefile.am (CFILES, ALL_MACHINES): New files for disassembly
  10         and opcode generation for xgate.
  11
  12 2012-04-30  DJ Delorie  <dj@redhat.com>
  13
  14         * rx-decode.opc (MOV): Do not sign-extend immediates which are
  15         already the maximum bit size.
  16         * rx-decode.c: Regenerate.
  17
  18 2012-04-27  David S. Miller  <davem@davemloft.net>
  19
  20         * sparc-dis.c (v9a_asr_reg_names): Add 'cfr'.
  21         * sparc-opc.c (sparc_opcodes): Add rd/wr cases for %cfr.
  22
  23         * sparc-opc.c (sparc_opcodes): Add 'wr X, %pause' and 'pause'.
  24         * sparc-dis.c (v9a_asr_reg_names): Add 'pause'.
  25
  26         * sparc-opc.c (CBCOND): New define.
  27         (CBCOND_XCC): Likewise.
  28         (cbcond): New helper macro.
  29         (sparc_opcodes): Add compare-and-branch instructions.
  30
  31         * sparc-dis.c (print_insn_sparc): Handle ')'.
  32         * sparc-opc.c (sparc_opcodes): Add crypto instructions.
  33
  34         * sparc-opc.c (sparc_opcodes): Rework table to put HWCAP values
  35         into new struct sparc_opcode 'hwcaps' field instead of 'flags'.
  36
  37 2012-04-12  David S. Miller  <davem@davemloft.net>
  38
  39         * sparc-dis.c (X_DISP10): Define.
  40         (print_insn_sparc): Handle '='.
  41
  42 2012-04-01  Mike Frysinger  <vapier@gentoo.org>
  43
  44         * bfin-dis.c (fmtconst): Replace decimal handling with a single
  45         sprintf call and the '*' field width.
  46
  47 2012-03-23  Maxim Kuvyrkov  <maxim@codesourcery.com>
  48
  49         * mips-dis.c (mips_arch_choices): Add entry for Broadcom XLP.
  50
  51 2012-03-16  Alan Modra  <amodra@gmail.com>
  52
  53         * ppc-dis.c (PPC_OPC_SEGS, PPC_OP_TO_SEG): Delete.
  54         (powerpc_opcd_indices): Bump array size.
  55         (disassemble_init_powerpc): Set powerpc_opcd_indices entries
  56         corresponding to unused opcodes to following entry.
  57         (lookup_powerpc): New function, extracted and optimised from..
  58         (print_insn_powerpc): ..here.
  59
  60 2012-03-15  Alan Modra  <amodra@gmail.com>
  61             James Lemke  <jwlemke@codesourcery.com>
  62
  63         * disassemble.c (disassemble_init_for_target): Handle ppc init.
  64         * ppc-dis.c (private): New var.
  65         (powerpc_init_dialect): Don't return calloc failure, instead use
  66         private.
  67         (PPC_OPCD_SEGS, PPC_OP_TO_SEG): Define.
  68         (powerpc_opcd_indices): New array.
  69         (disassemble_init_powerpc): New function.
  70         (print_insn_big_powerpc): Don't init dialect here.
  71         (print_insn_little_powerpc): Likewise.
  72         (print_insn_powerpc): Start search using powerpc_opcd_indices.
  73
  74 2012-03-10  Edmar Wienskoski  <edmar@freescale.com>
  75
  76         * ppc-dis.c (ppc_opts): Add entries for "e5500" and "e6500".
  77         * ppc-opc.c (insert_ls, TMR, ESYNC, XSYNCLE_MASK): New.
  78         (PPCVEC2, PPCTMR, E6500): New short names.
  79         (powerpc_opcodes): Add vabsdub, vabsduh, vabsduw, dni, mvidsplt,
  80         mviwsplt, icblq., mftmr, mttmr, dcblq., miso, lvexbx, lvexhx,
  81         lvexwx, stvexbx, stvexhx, stvexwx, lvepx, lvepxl, stvepx, stvepxl,
  82         lvtrx, lvtrxl, lvtlx, lvtlxl, stvfrx, stvfrxl, stvflx, stvflxl,
  83         lvswx, lvswxl, stvswx, stvswxl, lvsm mnemonics. Accept LS, ESYNC
  84         optional operands on sync instruction for E6500 target.
  85
  86 2012-03-08  Andreas Krebbel  <Andreas.Krebbel@de.ibm.com>
  87
  88         * s390-opc.txt: Set instruction type of pku to SS_L2RDRD.
  89
  90 2012-02-27  Alan Modra  <amodra@gmail.com>
  91
  92         * mt-dis.c: Regenerate.
  93
  94 2012-02-27  Alan Modra  <amodra@gmail.com>
  95
  96         * v850-opc.c (extract_v8): Rearrange to make it obvious this
  97         is the inverse of corresponding insert function.
  98         (extract_d22, extract_u9, extract_r4): Likewise.
  99         (extract_d9): Correct sign extension.
 100         (extract_d16_15): Don't assume "long" is 32 bits, and don't
 101         rely on implementation defined behaviour for shift right of
 102         signed types.
 103         (extract_d16_16, extract_d17_16, extract_i9): Likewise.
 104         (extract_d23): Likewise, and correct mask.
 105
 106 2012-02-27  Alan Modra  <amodra@gmail.com>
 107
 108         * crx-dis.c (print_arg): Mask constant to 32 bits.
 109         * crx-opc.c (cst4_map): Use int array.
 110
 111 2012-02-27  Alan Modra  <amodra@gmail.com>
 112
 113         * arc-dis.c (BITS): Don't use shifts to mask off bits.
 114         (FIELDD): Sign extend with xor,sub.
 115
 116 2012-02-25  Walter Lee  <walt@tilera.com>
 117
 118         * tilegx-opc.c: Handle TILEGX_OPC_LD4S_TLS and TILEGX_OPC_LD_TLS.
 119         * tilepro-opc.c: Handle TILEPRO_OPC_LW_TLS and
 120         TILEPRO_OPC_LW_TLS_SN.
 121
 122 2012-02-21  H.J. Lu  <hongjiu.lu@intel.com>
 123
 124         * i386-opc.h (HLEPrefixNone): New.
 125         (HLEPrefixLock): Likewise.
 126         (HLEPrefixAny): Likewise.
 127         (HLEPrefixRelease): Likewise.
 128
 129 2012-02-08  H.J. Lu  <hongjiu.lu@intel.com>
 130
 131         * i386-dis.c (HLE_Fixup1): New.
 132         (HLE_Fixup2): Likewise.
 133         (HLE_Fixup3): Likewise.
 134         (Ebh1): Likewise.
 135         (Evh1): Likewise.
 136         (Ebh2): Likewise.
 137         (Evh2): Likewise.
 138         (Ebh3): Likewise.
 139         (Evh3): Likewise.
 140         (MOD_C6_REG_7): Likewise.
 141         (MOD_C7_REG_7): Likewise.
 142         (RM_C6_REG_7): Likewise.
 143         (RM_C7_REG_7): Likewise.
 144         (XACQUIRE_PREFIX): Likewise.
 145         (XRELEASE_PREFIX): Likewise.
 146         (dis386): Use Ebh1/Evh1 on add, adc, and, btc, btr, bts,
 147         cmpxchg, dec, inc, neg, not, or, sbb, sub, xor and xadd. Use
 148         Ebh2/Evh2 on xchg.  Use Ebh3/Evh3 on mov.
 149         (reg_table): Use Ebh1/Evh1 on add, adc, and, dec, inc, neg,
 150         not, or, sbb, sub and xor.  Use Ebh3/Evh3 on mov.  Use
 151         MOD_C6_REG_7 and MOD_C7_REG_7.
 152         (mod_table): Add MOD_C6_REG_7 and MOD_C7_REG_7.
 153         (rm_table): Add RM_C6_REG_7 and RM_C7_REG_7.  Add xend and
 154         xtest.
 155         (prefix_name): Handle XACQUIRE_PREFIX and XRELEASE_PREFIX.
 156         (CMPXCHG8B_Fixup): Handle HLE prefix on cmpxchg8b.
 157
 158         * i386-gen.c (cpu_flag_init): Add CPU_HLE_FLAGS and
 159         CPU_RTM_FLAGS.
 160         (cpu_flags): Add CpuHLE and CpuRTM.
 161         (opcode_modifiers): Add HLEPrefixOk.
 162
 163         * i386-opc.h (CpuHLE): New.
 164         (CpuRTM): Likewise.
 165         (HLEPrefixOk): Likewise.
 166         (i386_cpu_flags): Add cpuhle and cpurtm.
 167         (i386_opcode_modifier): Add hleprefixok.
 168
 169         * i386-opc.tbl: Add HLEPrefixOk=3 to mov.  Add HLEPrefixOk to
 170         add, adc, and, btc, btr, bts, cmpxchg, dec, inc, neg, not, or,
 171         sbb, sub, xor and xadd.  Add HLEPrefixOk=2 to xchg with memory
 172         operand.  Add xacquire, xrelease, xabort, xbegin, xend and
 173         xtest.
 174         * i386-init.h: Regenerated.
 175         * i386-tbl.h: Likewise.
 176
 177 2012-01-24  DJ Delorie  <dj@redhat.com>
 178
 179         * rl78-decode.opc (rl78_decode_opcode): Add NOT1.
 180         * rl78-decode.c: Regenerate.
 181
 182 2012-01-17  James Murray  <jsm@jsm-net.demon.co.uk>
 183
 184         PR binutils/10173
 185         * cr16-dis.c (print_arg): Test symtab_size not num_symbols.
 186
 187 2012-01-17  Andreas Schwab  <schwab@linux-m68k.org>
 188
 189         * m68k-opc.c (m68k_opcodes): Fix entries for pmove with BADx/BACx
 190         register and move them after pmove with PSR/PCSR register.
 191
 192 2012-01-13  H.J. Lu  <hongjiu.lu@intel.com>
 193
 194         * i386-dis.c (mod_table): Add vmfunc.
 195
 196         * i386-gen.c (cpu_flag_init): Add CPU_VMFUNC_FLAGS.
 197         (cpu_flags): CpuVMFUNC.
 198
 199         * i386-opc.h (CpuVMFUNC): New.
 200         (i386_cpu_flags): Add cpuvmfunc.
 201
 202         * i386-opc.tbl: Add vmfunc.
 203         * i386-init.h: Regenerated.
 204         * i386-tbl.h: Likewise.
 205
 206 For older changes see ChangeLog-2011
 207 \f
 208 Local Variables:
 209 mode: change-log
 210 left-margin: 8
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 212 version-control: never
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