1 2012-03-23 Maxim Kuvyrkov <maxim@codesourcery.com>
3 * mips-dis.c (mips_arch_choices): Add entry for Broadcom XLP.
5 2012-03-16 Alan Modra <amodra@gmail.com>
7 * ppc-dis.c (PPC_OPC_SEGS, PPC_OP_TO_SEG): Delete.
8 (powerpc_opcd_indices): Bump array size.
9 (disassemble_init_powerpc): Set powerpc_opcd_indices entries
10 corresponding to unused opcodes to following entry.
11 (lookup_powerpc): New function, extracted and optimised from..
12 (print_insn_powerpc): ..here.
14 2012-03-15 Alan Modra <amodra@gmail.com>
15 James Lemke <jwlemke@codesourcery.com>
17 * disassemble.c (disassemble_init_for_target): Handle ppc init.
18 * ppc-dis.c (private): New var.
19 (powerpc_init_dialect): Don't return calloc failure, instead use
21 (PPC_OPCD_SEGS, PPC_OP_TO_SEG): Define.
22 (powerpc_opcd_indices): New array.
23 (disassemble_init_powerpc): New function.
24 (print_insn_big_powerpc): Don't init dialect here.
25 (print_insn_little_powerpc): Likewise.
26 (print_insn_powerpc): Start search using powerpc_opcd_indices.
28 2012-03-10 Edmar Wienskoski <edmar@freescale.com>
30 * ppc-dis.c (ppc_opts): Add entries for "e5500" and "e6500".
31 * ppc-opc.c (insert_ls, TMR, ESYNC, XSYNCLE_MASK): New.
32 (PPCVEC2, PPCTMR, E6500): New short names.
33 (powerpc_opcodes): Add vabsdub, vabsduh, vabsduw, dni, mvidsplt,
34 mviwsplt, icblq., mftmr, mttmr, dcblq., miso, lvexbx, lvexhx,
35 lvexwx, stvexbx, stvexhx, stvexwx, lvepx, lvepxl, stvepx, stvepxl,
36 lvtrx, lvtrxl, lvtlx, lvtlxl, stvfrx, stvfrxl, stvflx, stvflxl,
37 lvswx, lvswxl, stvswx, stvswxl, lvsm mnemonics. Accept LS, ESYNC
38 optional operands on sync instruction for E6500 target.
40 2012-03-08 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
42 * s390-opc.txt: Set instruction type of pku to SS_L2RDRD.
44 2012-02-27 Alan Modra <amodra@gmail.com>
46 * mt-dis.c: Regenerate.
48 2012-02-27 Alan Modra <amodra@gmail.com>
50 * v850-opc.c (extract_v8): Rearrange to make it obvious this
51 is the inverse of corresponding insert function.
52 (extract_d22, extract_u9, extract_r4): Likewise.
53 (extract_d9): Correct sign extension.
54 (extract_d16_15): Don't assume "long" is 32 bits, and don't
55 rely on implementation defined behaviour for shift right of
57 (extract_d16_16, extract_d17_16, extract_i9): Likewise.
58 (extract_d23): Likewise, and correct mask.
60 2012-02-27 Alan Modra <amodra@gmail.com>
62 * crx-dis.c (print_arg): Mask constant to 32 bits.
63 * crx-opc.c (cst4_map): Use int array.
65 2012-02-27 Alan Modra <amodra@gmail.com>
67 * arc-dis.c (BITS): Don't use shifts to mask off bits.
68 (FIELDD): Sign extend with xor,sub.
70 2012-02-25 Walter Lee <walt@tilera.com>
72 * tilegx-opc.c: Handle TILEGX_OPC_LD4S_TLS and TILEGX_OPC_LD_TLS.
73 * tilepro-opc.c: Handle TILEPRO_OPC_LW_TLS and
74 TILEPRO_OPC_LW_TLS_SN.
76 2012-02-21 H.J. Lu <hongjiu.lu@intel.com>
78 * i386-opc.h (HLEPrefixNone): New.
79 (HLEPrefixLock): Likewise.
80 (HLEPrefixAny): Likewise.
81 (HLEPrefixRelease): Likewise.
83 2012-02-08 H.J. Lu <hongjiu.lu@intel.com>
85 * i386-dis.c (HLE_Fixup1): New.
86 (HLE_Fixup2): Likewise.
87 (HLE_Fixup3): Likewise.
94 (MOD_C6_REG_7): Likewise.
95 (MOD_C7_REG_7): Likewise.
96 (RM_C6_REG_7): Likewise.
97 (RM_C7_REG_7): Likewise.
98 (XACQUIRE_PREFIX): Likewise.
99 (XRELEASE_PREFIX): Likewise.
100 (dis386): Use Ebh1/Evh1 on add, adc, and, btc, btr, bts,
101 cmpxchg, dec, inc, neg, not, or, sbb, sub, xor and xadd. Use
102 Ebh2/Evh2 on xchg. Use Ebh3/Evh3 on mov.
103 (reg_table): Use Ebh1/Evh1 on add, adc, and, dec, inc, neg,
104 not, or, sbb, sub and xor. Use Ebh3/Evh3 on mov. Use
105 MOD_C6_REG_7 and MOD_C7_REG_7.
106 (mod_table): Add MOD_C6_REG_7 and MOD_C7_REG_7.
107 (rm_table): Add RM_C6_REG_7 and RM_C7_REG_7. Add xend and
109 (prefix_name): Handle XACQUIRE_PREFIX and XRELEASE_PREFIX.
110 (CMPXCHG8B_Fixup): Handle HLE prefix on cmpxchg8b.
112 * i386-gen.c (cpu_flag_init): Add CPU_HLE_FLAGS and
114 (cpu_flags): Add CpuHLE and CpuRTM.
115 (opcode_modifiers): Add HLEPrefixOk.
117 * i386-opc.h (CpuHLE): New.
119 (HLEPrefixOk): Likewise.
120 (i386_cpu_flags): Add cpuhle and cpurtm.
121 (i386_opcode_modifier): Add hleprefixok.
123 * i386-opc.tbl: Add HLEPrefixOk=3 to mov. Add HLEPrefixOk to
124 add, adc, and, btc, btr, bts, cmpxchg, dec, inc, neg, not, or,
125 sbb, sub, xor and xadd. Add HLEPrefixOk=2 to xchg with memory
126 operand. Add xacquire, xrelease, xabort, xbegin, xend and
128 * i386-init.h: Regenerated.
129 * i386-tbl.h: Likewise.
131 2012-01-24 DJ Delorie <dj@redhat.com>
133 * rl78-decode.opc (rl78_decode_opcode): Add NOT1.
134 * rl78-decode.c: Regenerate.
136 2012-01-17 James Murray <jsm@jsm-net.demon.co.uk>
139 * cr16-dis.c (print_arg): Test symtab_size not num_symbols.
141 2012-01-17 Andreas Schwab <schwab@linux-m68k.org>
143 * m68k-opc.c (m68k_opcodes): Fix entries for pmove with BADx/BACx
144 register and move them after pmove with PSR/PCSR register.
146 2012-01-13 H.J. Lu <hongjiu.lu@intel.com>
148 * i386-dis.c (mod_table): Add vmfunc.
150 * i386-gen.c (cpu_flag_init): Add CPU_VMFUNC_FLAGS.
151 (cpu_flags): CpuVMFUNC.
153 * i386-opc.h (CpuVMFUNC): New.
154 (i386_cpu_flags): Add cpuvmfunc.
156 * i386-opc.tbl: Add vmfunc.
157 * i386-init.h: Regenerated.
158 * i386-tbl.h: Likewise.
160 For older changes see ChangeLog-2011
166 version-control: never