opcodes/ChangeLog

   1 2016-05-25  H.J. Lu  <hongjiu.lu@intel.com>
   2
   3         * i386-gen.c (cpu_flag_init): Add CpuVREX to CPU_AVX512DQ_FLAGS,
   4         CPU_AVX512BW_FLAGS, CPU_AVX512VL_FLAGS, CPU_AVX512IFMA_FLAGS
   5         and CPU_AVX512VBMI_FLAGS.  Add CpuAVX512DQ, CpuAVX512BW,
   6         CpuAVX512VL, CpuAVX512IFMA and CpuAVX512VBMI to
   7         CPU_ANY_AVX_FLAGS.
   8         * i386-init.h: Regenerated.
   9
  10 2016-05-25  H.J. Lu  <hongjiu.lu@intel.com>
  11
  12         PR gas/20141
  13         * i386-gen.c (cpu_flag_init): Add CpuVREX to CPU_AVX512F_FLAGS,
  14         CPU_AVX512CD_FLAGS, CPU_AVX512ER_FLAGS and CPU_AVX512PF_FLAGS.
  15         * i386-init.h: Regenerated.
  16
  17 2016-05-25  H.J. Lu  <hongjiu.lu@intel.com>
  18
  19         * i386-gen.c (cpu_flag_init): Rename CPU_ANY87_FLAGS to
  20         CPU_ANY_X87_FLAGS.  Add CPU_ANY_MMX_FLAGS.
  21         * i386-init.h: Regenerated.
  22
  23 2016-05-23  Claudiu Zissulescu  <claziss@synopsys.com>
  24
  25         * arc-dis.c (print_flags): Set branch_delay_insns, and insn_type
  26         information.
  27         (print_insn_arc): Set insn_type information.
  28         * arc-opc.c (C_CC): Add F_CLASS_COND.
  29         * arc-tbl.h (bbit0, bbit1): Update subclass to COND.
  30         (beq_s, bge_s, bgt_s, bhi_s, bhs_s): Likewise.
  31         (ble_s, blo_s, bls_s, blt_s, bne_s): Likewise.
  32         (breq, breq_s, brge, brhs, brlo, brlt): Likewise.
  33         (brne, brne_s, jeq_s, jne_s): Likewise.
  34
  35 2016-05-23  Claudiu Zissulescu  <claziss@synopsys.com>
  36
  37         * arc-tbl.h (neg): New instruction variant.
  38
  39 2016-05-23  Cupertino Miranda  <cmiranda@synopsys.com>
  40
  41         * arc-dis.c (find_format, find_format, get_auxreg)
  42         (print_insn_arc): Changed.
  43         * arc-ext.h (INSERT_XOP): Likewise.
  44
  45 2016-05-23  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
  46
  47         * tic54x-dis.c (sprint_mmr): Adjust.
  48         * tic54x-opc.c: Likewise.
  49
  50 2016-05-19  Alan Modra  <amodra@gmail.com>
  51
  52         * ppc-opc.c (NSISIGNOPT): Use insert_nsi and extract_nsi.
  53
  54 2016-05-19  Alan Modra  <amodra@gmail.com>
  55
  56         * ppc-opc.c: Formatting.
  57         (NSISIGNOPT): Define.
  58         (powerpc_opcodes <subis>): Use NSISIGNOPT.
  59
  60 2016-05-18  Maciej W. Rozycki  <macro@imgtec.com>
  61
  62         * mips-dis.c (is_compressed_mode_p): Add `micromips_p' operand,
  63         replacing references to `micromips_ase' throughout.
  64         (_print_insn_mips): Don't use file-level microMIPS annotation to
  65         determine the disassembly mode with the symbol table.
  66
  67 2016-05-13  Peter Bergner <bergner@vnet.ibm.com>
  68
  69         * ppc-opc.c (IMM8): Use PPC_OPERAND_SIGNOPT.
  70
  71 2016-05-11  Andrew Bennett  <andrew.bennett@imgtec.com>
  72
  73         * mips-dis.c (mips_arch_choices): Add ASE_DSPR3 to mips32r6 and
  74         mips64r6.
  75         * mips-opc.c (D34): New macro.
  76         (mips_builtin_opcodes): Define bposge32c for DSPr3.
  77
  78 2016-05-10  Alexander Fomin  <alexander.fomin@intel.com>
  79
  80         * i386-dis.c (prefix_table): Add RDPID instruction.
  81         * i386-gen.c (cpu_flag_init): Add RDPID flag.
  82         (cpu_flags): Add RDPID bitfield.
  83         * i386-opc.h (enum): Add RDPID element.
  84         (i386_cpu_flags): Add RDPID field.
  85         * i386-opc.tbl: Add RDPID instruction.
  86         * i386-init.h: Regenerate.
  87         * i386-tbl.h: Regenerate.
  88
  89 2016-05-10  Thomas Preud'homme  <thomas.preudhomme@arm.com>
  90
  91         * arm-dis.c (get_sym_code_type): Use ARM_GET_SYM_BRANCH_TYPE to get
  92         branch type of a symbol.
  93         (print_insn): Likewise.
  94
  95 2016-05-10  Thomas Preud'homme  <thomas.preudhomme@arm.com>
  96
  97         * arm-dis.c (coprocessor_opcodes): Add entries for VFP ARMv8-M
  98         Mainline Security Extensions instructions.
  99         (thumb_opcodes): Add entries for narrow ARMv8-M Security
 100         Extensions instructions.
 101         (thumb32_opcodes): Add entries for wide ARMv8-M Security Extensions
 102         instructions.
 103         (psr_name): Add new MSP_NS and PSP_NS ARMv8-M Security Extensions
 104         special registers.
 105
 106 2016-05-09  Jose E. Marchesi  <jose.marchesi@oracle.com>
 107
 108         * sparc-opc.c (sparc_opcodes): Fix mnemonic of faligndatai.
 109
 110 2016-05-03  Claudiu Zissulescu  <claziss@synopsys.com>
 111
 112         * arc-ext.c (dump_ARC_extmap): Handle SYNATX_NOP and SYNTAX_1OP.
 113         (arcExtMap_genOpcode): Likewise.
 114         * arc-opc.c (arg_32bit_rc): Define new variable.
 115         (arg_32bit_u6): Likewise.
 116         (arg_32bit_limm): Likewise.
 117
 118 2016-05-03  Szabolcs Nagy  <szabolcs.nagy@arm.com>
 119
 120         * aarch64-gen.c (VERIFIER): Define.
 121         * aarch64-opc.c (VERIFIER): Define.
 122         (verify_ldpsw): Use static linkage.
 123         * aarch64-opc.h (verify_ldpsw): Remove.
 124         * aarch64-tbl.h: Use VERIFIER for verifiers.
 125
 126 2016-04-28  Nick Clifton  <nickc@redhat.com>
 127
 128         PR target/19722
 129         * aarch64-dis.c (aarch64_opcode_decode): Run verifier if present.
 130         * aarch64-opc.c (verify_ldpsw): New function.
 131         * aarch64-opc.h (verify_ldpsw): New prototype.
 132         * aarch64-tbl.h: Add initialiser for verifier field.
 133         (LDPSW): Set verifier to verify_ldpsw.
 134
 135 2016-04-23  H.J. Lu  <hongjiu.lu@intel.com>
 136
 137         PR binutils/19983
 138         PR binutils/19984
 139         * i386-dis.c (print_insn): Return -1 if size of bfd_vma is
 140         smaller than address size.
 141
 142 2016-04-20  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
 143
 144         * alpha-dis.c: Regenerate.
 145         * crx-dis.c: Likewise.
 146         * disassemble.c: Likewise.
 147         * epiphany-opc.c: Likewise.
 148         * fr30-opc.c: Likewise.
 149         * frv-opc.c: Likewise.
 150         * ip2k-opc.c: Likewise.
 151         * iq2000-opc.c: Likewise.
 152         * lm32-opc.c: Likewise.
 153         * lm32-opinst.c: Likewise.
 154         * m32c-opc.c: Likewise.
 155         * m32r-opc.c: Likewise.
 156         * m32r-opinst.c: Likewise.
 157         * mep-opc.c: Likewise.
 158         * mt-opc.c: Likewise.
 159         * or1k-opc.c: Likewise.
 160         * or1k-opinst.c: Likewise.
 161         * tic80-opc.c: Likewise.
 162         * xc16x-opc.c: Likewise.
 163         * xstormy16-opc.c: Likewise.
 164
 165 2016-04-19  Andrew Burgess  <andrew.burgess@embecosm.com>
 166
 167         * arc-nps400-tbl.h: Add addb, subb, adcb, sbcb, andb, xorb, orb,
 168         fxorb, wxorb, shlb, shrb, notb, cntbb, div, mod, divm, qcmp,
 169         calcsd, and calcxd instructions.
 170         * arc-opc.c (insert_nps_bitop_size): Delete.
 171         (extract_nps_bitop_size): Delete.
 172         (MAKE_SRC_POS_INSERT_EXTRACT_FUNCS): Define, and use.
 173         (extract_nps_qcmp_m3): Define.
 174         (extract_nps_qcmp_m2): Define.
 175         (extract_nps_qcmp_m1): Define.
 176         (arc_flag_operands): Add F_NPS_SX, F_NPS_AR, F_NPS_AL.
 177         (arc_flag_classes): Add C_NPS_SX, C_NPS_AR_AL
 178         (arc_operands): Add NPS_SRC2_POS, NPS_SRC1_POS, NPS_ADDB_SIZE,
 179         NPS_ANDB_SIZE, NPS_FXORB_SIZ, NPS_WXORB_SIZ, NPS_R_XLDST,
 180         NPS_DIV_UIMM4, NPS_QCMP_SIZE, NPS_QCMP_M1, NPS_QCMP_M2, and
 181         NPS_QCMP_M3.
 182
 183 2016-04-19  Andrew Burgess  <andrew.burgess@embecosm.com>
 184
 185         * arc-nps400-tbl.h: Add dctcp, dcip, dcet, and dcacl instructions.
 186
 187 2016-04-15  H.J. Lu  <hongjiu.lu@intel.com>
 188
 189         * Makefile.in: Regenerated with automake 1.11.6.
 190         * aclocal.m4: Likewise.
 191
 192 2016-04-14  Andrew Burgess  <andrew.burgess@embecosm.com>
 193
 194         * arc-nps400-tbl.h: Add xldb, xldw, xld, xstb, xstw, and xst
 195         instructions.
 196         * arc-opc.c (insert_nps_cmem_uimm16): New function.
 197         (extract_nps_cmem_uimm16): New function.
 198         (arc_operands): Add NPS_XLDST_UIMM16 operand.
 199
 200 2016-04-14  Andrew Burgess  <andrew.burgess@embecosm.com>
 201
 202         * arc-dis.c (arc_insn_length): New function.
 203         (print_insn_arc): Use arc_insn_length, change insnLen to unsigned.
 204         (find_format): Change insnLen parameter to unsigned.
 205
 206 2016-04-13  Nick Clifton  <nickc@redhat.com>
 207
 208         PR target/19937
 209         * v850-opc.c (v850_opcodes): Correct masks for long versions of
 210         the LD.B and LD.BU instructions.
 211
 212 2016-04-12  Claudiu Zissulescu  <claziss@synopsys.com>
 213
 214         * arc-dis.c (find_format): Check for extension flags.
 215         (print_flags): New function.
 216         (print_insn_arc): Update for .extCondCode, .extCoreRegister and
 217         .extAuxRegister.
 218         * arc-ext.c (arcExtMap_coreRegName): Use
 219         LAST_EXTENSION_CORE_REGISTER.
 220         (arcExtMap_coreReadWrite): Likewise.
 221         (dump_ARC_extmap): Update printing.
 222         * arc-opc.c (arc_flag_classes): Add F_CLASS_EXTEND flag.
 223         (arc_aux_regs): Add cpu field.
 224         * arc-regs.h: Add cpu field, lower case name aux registers.
 225
 226 2016-04-12  Claudiu Zissulescu  <claziss@synopsys.com>
 227
 228         * arc-tbl.h: Add rtsc, sleep with no arguments.
 229
 230 2016-04-12  Claudiu Zissulescu  <claziss@synopsys.com>
 231
 232         * arc-opc.c (flags_none, flags_f, flags_cc, flags_ccf):
 233         Initialize.
 234         (arg_none, arg_32bit_rarbrc, arg_32bit_zarbrc, arg_32bit_rbrbrc)
 235         (arg_32bit_rarbu6, arg_32bit_zarbu6, arg_32bit_rbrbu6)
 236         (arg_32bit_rbrbs12, arg_32bit_ralimmrc, arg_32bit_rarblimm)
 237         (arg_32bit_zalimmrc, arg_32bit_zarblimm, arg_32bit_rbrblimm)
 238         (arg_32bit_ralimmu6, arg_32bit_zalimmu6, arg_32bit_zalimms12)
 239         (arg_32bit_ralimmlimm, arg_32bit_zalimmlimm, arg_32bit_rbrc)
 240         (arg_32bit_zarc, arg_32bit_rbu6, arg_32bit_zau6, arg_32bit_rblimm)
 241         (arg_32bit_zalimm, arg_32bit_limmrc, arg_32bit_limmu6)
 242         (arg_32bit_limms12, arg_32bit_limmlimm): Likewise.
 243         (arc_opcode arc_opcodes): Null terminate the array.
 244         (arc_num_opcodes): Remove.
 245         * arc-ext.h (INSERT_XOP): Define.
 246         (extInstruction_t): Likewise.
 247         (arcExtMap_instName): Delete.
 248         (arcExtMap_insn): New function.
 249         (arcExtMap_genOpcode): Likewise.
 250         * arc-ext.c (ExtInstruction): Remove.
 251         (create_map): Zero initialize instruction fields.
 252         (arcExtMap_instName): Remove.
 253         (arcExtMap_insn): New function.
 254         (dump_ARC_extmap): More info while debuging.
 255         (arcExtMap_genOpcode): New function.
 256         * arc-dis.c (find_format): New function.
 257         (print_insn_arc): Use find_format.
 258         (arc_get_disassembler): Enable dump_ARC_extmap only when
 259         debugging.
 260
 261 2016-04-11  Maciej W. Rozycki  <macro@imgtec.com>
 262
 263         * mips-dis.c (print_mips16_insn_arg): Mask unused extended
 264         instruction bits out.
 265
 266 2016-04-07  Andrew Burgess  <andrew.burgess@embecosm.com>
 267
 268         * arc-nps400-tbl.h: Add schd, sync, and hwschd instructions.
 269         * arc-opc.c (arc_flag_operands): Add new flags.
 270         (arc_flag_classes): Add new classes.
 271
 272 2016-04-07  Andrew Burgess  <andrew.burgess@embecosm.com>
 273
 274         * arc-opc.c (arc_opcodes): Extend comment to discus table layout.
 275
 276 2016-04-05  Andrew Burgess  <andrew.burgess@embecosm.com>
 277
 278         * arc-nps400-tbl.h: Add movbi, decode1, fbset, fbclear, encode0,
 279         encode1, rflt, crc16, and crc32 instructions.
 280         * arc-opc.c (arc_flag_operands): Add F_NPS_R.
 281         (arc_flag_classes): Add C_NPS_R.
 282         (insert_nps_bitop_size_2b): New function.
 283         (extract_nps_bitop_size_2b): Likewise.
 284         (insert_nps_bitop_uimm8): Likewise.
 285         (extract_nps_bitop_uimm8): Likewise.
 286         (arc_operands): Add new operand entries.
 287
 288 2016-04-05  Claudiu Zissulescu  <claziss@synopsys.com>
 289
 290         * arc-regs.h: Add a new subclass field.  Add double assist
 291         accumulator register values.
 292         * arc-tbl.h: Use DPA subclass to mark the double assist
 293         instructions.  Use DPX/SPX subclas to mark the FPX instructions.
 294         * arc-opc.c (RSP): Define instead of SP.
 295         (arc_aux_regs): Add the subclass field.
 296
 297 2016-04-05  Jiong Wang  <jiong.wang@arm.com>
 298
 299         * arm-dis.c: Support FP16 vmul, vmla, vmls (by scalar).
 300
 301 2016-03-31  Andrew Burgess  <andrew.burgess@embecosm.com>
 302
 303         * arc-opc.c (arc_operands): Fix operand flags for NPS_R_DST, and
 304         NPS_R_SRC1.
 305
 306 2016-03-30  Andrew Burgess  <andrew.burgess@embecosm.com>
 307
 308         * arc-nps400-tbl.h: Add a header comment, and fix some whitespace
 309         issues.  No functional changes.
 310
 311 2016-03-30  Claudiu Zissulescu  <claziss@synopsys.com>
 312
 313         * arc-regs.h (IC_RAM_ADDRESS, IC_TAG, IC_WP, IC_DATA, CONTROL0)
 314         (AX2, AY2, MX2, MY2, AY0, AY1, DC_RAM_ADDR, DC_TAG, CONTROL1)
 315         (RTT): Remove duplicate.
 316         (LCDINSTR, LCDDATA, LCDSTAT, CC_*, PCT_COUNT*, PCT_SNAP*)
 317         (PCT_CONFIG*): Remove.
 318         (D1L, D1H, D2H, D2L): Define.
 319
 320 2016-03-29  Claudiu Zissulescu  <claziss@synopsys.com>
 321
 322         * arc-ext-tbl.h (dsp_fp_i2flt): Fix typo.
 323
 324 2016-03-29  Claudiu Zissulescu  <claziss@synopsys.com>
 325
 326         * arc-tbl.h (invld07): Remove.
 327         * arc-ext-tbl.h: New file.
 328         * arc-dis.c (FIELDA, FIELDB, FIELDC): Remove.
 329         * arc-opc.c (arc_opcodes): Add ext-tbl include.
 330
 331 2016-03-24  Jan Kratochvil  <jan.kratochvil@redhat.com>
 332
 333         Fix -Wstack-usage warnings.
 334         * aarch64-dis.c (print_operands): Substitute size.
 335         * aarch64-opc.c (print_register_offset_address): Substitute tblen.
 336
 337 2016-03-22  Jose E. Marchesi  <jose.marchesi@oracle.com>
 338
 339         * sparc-opc.c (sparc_opcodes): Reorder entries for `rd' in order
 340         to get a proper diagnostic when an invalid ASR register is used.
 341
 342 2016-03-22  Nick Clifton  <nickc@redhat.com>
 343
 344         * configure: Regenerate.
 345
 346 2016-03-21  Andrew Burgess  <andrew.burgess@embecosm.com>
 347
 348         * arc-nps400-tbl.h: New file.
 349         * arc-opc.c: Add top level comment.
 350         (insert_nps_3bit_dst): New function.
 351         (extract_nps_3bit_dst): New function.
 352         (insert_nps_3bit_src2): New function.
 353         (extract_nps_3bit_src2): New function.
 354         (insert_nps_bitop_size): New function.
 355         (extract_nps_bitop_size): New function.
 356         (arc_flag_operands): Add nps400 entries.
 357         (arc_flag_classes): Add nps400 entries.
 358         (arc_operands): Add nps400 entries.
 359         (arc_opcodes): Add nps400 include.
 360
 361 2016-03-21  Andrew Burgess  <andrew.burgess@embecosm.com>
 362
 363         * arc-opc.c (arc_flag_classes): Convert all flag classes to use
 364         the new class enum values.
 365
 366 2016-03-21  Andrew Burgess  <andrew.burgess@embecosm.com>
 367
 368         * arc-dis.c (print_insn_arc): Handle nps400.
 369
 370 2016-03-21  Andrew Burgess  <andrew.burgess@embecosm.com>
 371
 372         * arc-opc.c (BASE): Delete.
 373
 374 2016-03-18  Nick Clifton  <nickc@redhat.com>
 375
 376         PR target/19721
 377         * aarch64-tbl.h (aarch64_opcode_table): Fix type of second operand
 378         of MOV insn that aliases an ORR insn.
 379
 380 2016-03-16  Jiong Wang  <jiong.wang@arm.com>
 381
 382         * arm-dis.c (neon_opcodes): Support new FP16 instructions.
 383
 384 2016-03-07  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
 385
 386         * mcore-opc.h: Add const qualifiers.
 387         * microblaze-opc.h (struct op_code_struct): Likewise.
 388         * sh-opc.h: Likewise.
 389         * tic4x-dis.c (tic4x_print_indirect): Likewise.
 390         (tic4x_print_op): Likewise.
 391
 392 2016-03-02  Alan Modra  <amodra@gmail.com>
 393
 394         * or1k-desc.h: Regenerate.
 395         * fr30-ibld.c: Regenerate.
 396         * rl78-decode.c: Regenerate.
 397
 398 2016-03-01  Nick Clifton  <nickc@redhat.com>
 399
 400         PR target/19747
 401         * rl78-dis.c (print_insn_rl78_common): Fix typo.
 402
 403 2016-02-24  Renlin Li  <renlin.li@arm.com>
 404
 405         * arm-dis.c (coprocessor_opcodes): Add fp16 instruction entries.
 406         (print_insn_coprocessor): Support fp16 instructions.
 407
 408 2016-02-24  Renlin Li  <renlin.li@arm.com>
 409
 410         * arm-dis.c (print_insn_coprocessor): Fix mask for vsel, vmaxnm,
 411         vminnm, vrint(mpna).
 412
 413 2016-02-24  Renlin Li  <renlin.li@arm.com>
 414
 415         * arm-dis.c (print_insn_coprocessor): Check co-processor number for
 416         cpd/cpd2, mcr/mcr2, mrc/mrc2, ldc/ldc2, stc/stc2.
 417
 418 2016-02-15  H.J. Lu  <hongjiu.lu@intel.com>
 419
 420         * i386-dis.c (print_insn): Parenthesize expression to prevent
 421         truncated addresses.
 422         (OP_J): Likewise.
 423
 424 2016-02-10  Claudiu Zissulescu  <claziss@synopsys.com>
 425             Janek van Oirschot  <jvanoirs@synopsys.com>
 426
 427         * arc-opc.c (arc_relax_opcodes, arc_num_relax_opcodes): New
 428         variable.
 429
 430 2016-02-04  Nick Clifton  <nickc@redhat.com>
 431
 432         PR target/19561
 433         * msp430-dis.c (print_insn_msp430): Add a special case for
 434         decoding an RRC instruction with the ZC bit set in the extension
 435         word.
 436
 437 2016-02-02  Andrew Burgess  <andrew.burgess@embecosm.com>
 438
 439         * cgen-ibld.in (insert_normal): Rework calculation of shift.
 440         * epiphany-ibld.c: Regenerate.
 441         * fr30-ibld.c: Regenerate.
 442         * frv-ibld.c: Regenerate.
 443         * ip2k-ibld.c: Regenerate.
 444         * iq2000-ibld.c: Regenerate.
 445         * lm32-ibld.c: Regenerate.
 446         * m32c-ibld.c: Regenerate.
 447         * m32r-ibld.c: Regenerate.
 448         * mep-ibld.c: Regenerate.
 449         * mt-ibld.c: Regenerate.
 450         * or1k-ibld.c: Regenerate.
 451         * xc16x-ibld.c: Regenerate.
 452         * xstormy16-ibld.c: Regenerate.
 453
 454 2016-02-02  Andrew Burgess  <andrew.burgess@embecosm.com>
 455
 456         * epiphany-dis.c: Regenerated from latest cpu files.
 457
 458 2016-02-01  Michael McConville  <mmcco@mykolab.com>
 459
 460         * cgen-dis.c (count_decodable_bits): Use unsigned value for mask
 461         test bit.
 462
 463 2016-01-25  Renlin Li  <renlin.li@arm.com>
 464
 465         * arm-dis.c (mapping_symbol_for_insn): New function.
 466         (find_ifthen_state): Call mapping_symbol_for_insn().
 467
 468 2016-01-20  Matthew Wahab  <matthew.wahab@arm.com>
 469
 470         * aarch64-opc.c (operand_general_constraint_met_p): Check validity
 471         of MSR UAO immediate operand.
 472
 473 2016-01-18  Maciej W. Rozycki  <macro@imgtec.com>
 474
 475         * mips-dis.c (print_insn_micromips): Remove 48-bit microMIPS
 476         instruction support.
 477
 478 2016-01-17  Alan Modra  <amodra@gmail.com>
 479
 480         * configure: Regenerate.
 481
 482 2016-01-14  Nick Clifton  <nickc@redhat.com>
 483
 484         * rl78-decode.opc (rl78_decode_opcode): Add 's' operand to movw
 485         instructions that can support stack pointer operations.
 486         * rl78-decode.c: Regenerate.
 487         * rl78-dis.c: Fix display of stack pointer in MOVW based
 488         instructions.
 489
 490 2016-01-14  Matthew Wahab  <matthew.wahab@arm.com>
 491
 492         * aarch64-opc.c (aarch64_sys_reg_supported_p): Merge conditionals
 493         testing for RAS support.  Add checks for erxfr_el1, erxctlr_el1,
 494         erxtatus_el1 and erxaddr_el1.
 495
 496 2016-01-12  Matthew Wahab  <matthew.wahab@arm.com>
 497
 498         * arm-dis.c (arm_opcodes): Add "esb".
 499         (thumb_opcodes): Likewise.
 500
 501 2016-01-11  Peter Bergner <bergner@vnet.ibm.com>
 502
 503         * ppc-opc.c <xscmpnedp>: Delete.
 504         <xvcmpnedp>: Likewise.
 505         <xvcmpnedp.>: Likewise.
 506         <xvcmpnesp>: Likewise.
 507         <xvcmpnesp.>: Likewise.
 508
 509 2016-01-08  Andreas Schwab  <schwab@linux-m68k.org>
 510
 511         PR gas/13050
 512         * m68k-opc.c (moveb, movew): For ISA_B/C only allow #,d(An) in
 513         addition to ISA_A.
 514
 515 2016-01-01  Alan Modra  <amodra@gmail.com>
 516
 517         Update year range in copyright notice of all files.
 518
 519 For older changes see ChangeLog-2015
 520 \f
 521 Copyright (C) 2016 Free Software Foundation, Inc.
 522
 523 Copying and distribution of this file, with or without modification,
 524 are permitted in any medium without royalty provided the copyright
 525 notice and this notice are preserved.
 526
 527 Local Variables:
 528 mode: change-log
 529 left-margin: 8
 530 fill-column: 74
 531 version-control: never
 532 End: