Fix formatting of most recent entry.
[deliverable/binutils-gdb.git] / opcodes / ChangeLog
1 2008-02-11 Jan Beulich <jbeulich@novell.com>
2
3 * i386-opc.tbl: Remove Disp32S from CpuNo64 opcodes. Remove
4 Disp16 from Cpu64 non-jump opcodes (including loop and j?cxz).
5 * i386-tbl.h: Re-generate.
6
7 2008-02-04 H.J. Lu <hongjiu.lu@intel.com>
8
9 PR 5715
10 * configure: Regenerated.
11
12 2008-02-04 Adam Nemet <anemet@caviumnetworks.com>
13
14 * mips-dis.c: Update copyright.
15 (mips_arch_choices): Add Octeon.
16 * mips-opc.c: Update copyright.
17 (IOCT): New macro.
18 (mips_builtin_opcodes): Add Octeon instruction synciobdma.
19
20 2008-01-29 Alan Modra <amodra@bigpond.net.au>
21
22 * ppc-opc.c: Support optional L form mtmsr.
23
24 2008-01-24 H.J. Lu <hongjiu.lu@intel.com>
25
26 * i386-dis.c (OP_E_extended): Handle r12 like rsp.
27
28 2008-01-23 H.J. Lu <hongjiu.lu@intel.com>
29
30 * i386-gen.c (cpu_flag_init): Add CpuLM to CPU_GENERIC64_FLAGS.
31 * i386-init.h: Regenerated.
32
33 2008-01-23 Tristan Gingold <gingold@adacore.com>
34
35 * ia64-dis.c (print_insn_ia64): Display symbolic name of ar.fcr,
36 ar.eflag, ar.csd, ar.ssd, ar.cflg, ar.fsr, ar.fir and ar.fdr.
37
38 2008-01-22 H.J. Lu <hongjiu.lu@intel.com>
39
40 * i386-gen.c (cpu_flag_init): Remove CpuMMX2.
41 (cpu_flags): Likewise.
42
43 * i386-opc.h (CpuMMX2): Removed.
44 (CpuSSE): Updated.
45
46 * i386-opc.tbl: Replace CpuMMX2 with CpuSSE|Cpu3dnowA.
47 * i386-init.h: Regenerated.
48 * i386-tbl.h: Likewise.
49
50 2008-01-22 H.J. Lu <hongjiu.lu@intel.com>
51
52 * i386-gen.c (cpu_flag_init): Add CPU_VMX_FLAGS and
53 CPU_SMX_FLAGS.
54 * i386-init.h: Regenerated.
55
56 2008-01-15 H.J. Lu <hongjiu.lu@intel.com>
57
58 * i386-opc.tbl: Use Qword on movddup.
59 * i386-tbl.h: Regenerated.
60
61 2008-01-15 H.J. Lu <hongjiu.lu@intel.com>
62
63 * i386-opc.tbl: Put back 16bit movsx/movzx for AT&T syntax.
64 * i386-tbl.h: Regenerated.
65
66 2008-01-15 H.J. Lu <hongjiu.lu@intel.com>
67
68 * i386-dis.c (Mx): New.
69 (PREFIX_0FC3): Likewise.
70 (PREFIX_0FC7_REG_6): Updated.
71 (dis386_twobyte): Use PREFIX_0FC3.
72 (prefix_table): Add PREFIX_0FC3. Use Mq on movntq and movntsd.
73 Use Mx on movntps, movntpd, movntdq and movntdqa. Use Md on
74 movntss.
75
76 2008-01-14 H.J. Lu <hongjiu.lu@intel.com>
77
78 * i386-gen.c (opcode_modifiers): Add IntelSyntax.
79 (operand_types): Add Mem.
80
81 * i386-opc.h (IntelSyntax): New.
82 * i386-opc.h (Mem): New.
83 (Byte): Updated.
84 (Opcode_Modifier_Max): Updated.
85 (i386_opcode_modifier): Add intelsyntax.
86 (i386_operand_type): Add mem.
87
88 * i386-opc.tbl: Remove Reg16 from movnti. Add sizes to more
89 instructions.
90
91 * i386-reg.tbl: Add size for accumulator.
92
93 * i386-init.h: Regenerated.
94 * i386-tbl.h: Likewise.
95
96 2008-01-13 H.J. Lu <hongjiu.lu@intel.com>
97
98 * i386-opc.h (Byte): Fix a typo.
99
100 2008-01-12 H.J. Lu <hongjiu.lu@intel.com>
101
102 PR gas/5534
103 * i386-gen.c (operand_type_init): Add Dword to
104 OPERAND_TYPE_ACC32. Add Qword to OPERAND_TYPE_ACC64.
105 (opcode_modifiers): Remove CheckSize, Byte, Word, Dword,
106 Qword and Xmmword.
107 (operand_types): Add Byte, Word, Dword, Fword, Qword, Tbyte,
108 Xmmword, Unspecified and Anysize.
109 (set_bitfield): Make Mmword an alias of Qword. Make Oword
110 an alias of Xmmword.
111
112 * i386-opc.h (CheckSize): Removed.
113 (Byte): Updated.
114 (Word): Likewise.
115 (Dword): Likewise.
116 (Qword): Likewise.
117 (Xmmword): Likewise.
118 (FWait): Updated.
119 (OTMax): Likewise.
120 (i386_opcode_modifier): Remove checksize, byte, word, dword,
121 qword and xmmword.
122 (Fword): New.
123 (TBYTE): Likewise.
124 (Unspecified): Likewise.
125 (Anysize): Likewise.
126 (i386_operand_type): Add byte, word, dword, fword, qword,
127 tbyte xmmword, unspecified and anysize.
128
129 * i386-opc.tbl: Updated to use Byte, Word, Dword, Fword, Qword,
130 Tbyte, Xmmword, Unspecified and Anysize.
131
132 * i386-reg.tbl: Add size for accumulator.
133
134 * i386-init.h: Regenerated.
135 * i386-tbl.h: Likewise.
136
137 2008-01-10 H.J. Lu <hongjiu.lu@intel.com>
138
139 * i386-dis.c (REG_0F0E): Renamed to REG_0F0D.
140 (REG_0F18): Updated.
141 (reg_table): Updated.
142 (dis386_twobyte): Updated. Use "nopQ" on 0x19 to 0x1e.
143 (twobyte_has_modrm): Set 1 for 0x19 to 0x1e.
144
145 2008-01-08 H.J. Lu <hongjiu.lu@intel.com>
146
147 * i386-gen.c (set_bitfield): Use fail () on error.
148
149 2008-01-08 H.J. Lu <hongjiu.lu@intel.com>
150
151 * i386-gen.c (lineno): New.
152 (filename): Likewise.
153 (set_bitfield): Report filename and line numer on error.
154 (process_i386_opcodes): Set filename and update lineno.
155 (process_i386_registers): Likewise.
156
157 2008-01-05 H.J. Lu <hongjiu.lu@intel.com>
158
159 * i386-gen.c (opcode_modifiers): Rename IntelMnemonic to
160 ATTSyntax.
161
162 * i386-opc.h (IntelMnemonic): Renamed to ..
163 (ATTSyntax): This
164 (Opcode_Modifier_Max): Updated.
165 (i386_opcode_modifier): Remove intelmnemonic. Add attsyntax
166 and intelsyntax.
167
168 * i386-opc.tbl: Remove IntelMnemonic and update with ATTSyntax
169 on fsub, fubp, fsubr, fsubrp, div, fdivp, fdivr and fdivrp.
170 * i386-tbl.h: Regenerated.
171
172 2008-01-04 H.J. Lu <hongjiu.lu@intel.com>
173
174 * i386-gen.c: Update copyright to 2008.
175 * i386-opc.h: Likewise.
176 * i386-opc.tbl: Likewise.
177
178 * i386-init.h: Regenerated.
179 * i386-tbl.h: Likewise.
180
181 2008-01-04 H.J. Lu <hongjiu.lu@intel.com>
182
183 * i386-opc.tbl: Add NoRex64 to extractps, movmskpd, movmskps,
184 pextrb, pextrw, pinsrb, pinsrw and pmovmskb.
185 * i386-tbl.h: Regenerated.
186
187 2008-01-03 H.J. Lu <hongjiu.lu@intel.com>
188
189 * i386-gen.c (cpu_flag_init): Remove CpuSSE4_1_Or_5 and
190 CpuSSE4_2_Or_ABM.
191 (cpu_flags): Likewise.
192
193 * i386-opc.h (CpuSSE4_1_Or_5): Removed.
194 (CpuSSE4_2_Or_ABM): Likewise.
195 (CpuLM): Updated.
196 (i386_cpu_flags): Remove cpusse4_1_or_5 and cpusse4_2_or_abm.
197
198 * i386-opc.tbl: Replace CpuSSE4_1_Or_5, CpuSSE4_2_Or_ABM and
199 Cpu686|CpuPadLock with CpuSSE4_1|CpuSSE5, CpuABM|CpuSSE4_2
200 and CpuPadLock, respectively.
201 * i386-init.h: Regenerated.
202 * i386-tbl.h: Likewise.
203
204 2008-01-03 H.J. Lu <hongjiu.lu@intel.com>
205
206 * i386-gen.c (opcode_modifiers): Remove No_xSuf.
207
208 * i386-opc.h (No_xSuf): Removed.
209 (CheckSize): Updated.
210
211 * i386-tbl.h: Regenerated.
212
213 2008-01-02 H.J. Lu <hongjiu.lu@intel.com>
214
215 * i386-gen.c (cpu_flag_init): Add CpuSSE4_2_Or_ABM to
216 CPU_AMDFAM10_FLAGS, CPU_SSE4_2_FLAGS, CpuABM and
217 CPU_SSE5_FLAGS.
218 (cpu_flags): Add CpuSSE4_2_Or_ABM.
219
220 * i386-opc.h (CpuSSE4_2_Or_ABM): New.
221 (CpuLM): Updated.
222 (i386_cpu_flags): Add cpusse4_2_or_abm.
223
224 * i386-opc.tbl: Use CpuSSE4_2_Or_ABM instead of
225 CpuABM|CpuSSE4_2 on popcnt.
226 * i386-init.h: Regenerated.
227 * i386-tbl.h: Likewise.
228
229 2008-01-02 H.J. Lu <hongjiu.lu@intel.com>
230
231 * i386-opc.h: Update comments.
232
233 2008-01-02 H.J. Lu <hongjiu.lu@intel.com>
234
235 * i386-gen.c (opcode_modifiers): Use Qword instead of QWord.
236 * i386-opc.h: Likewise.
237 * i386-opc.tbl: Likewise.
238
239 2008-01-02 H.J. Lu <hongjiu.lu@intel.com>
240
241 PR gas/5534
242 * i386-gen.c (opcode_modifiers): Add No_xSuf, CheckSize,
243 Byte, Word, Dword, QWord and Xmmword.
244
245 * i386-opc.h (No_xSuf): New.
246 (CheckSize): Likewise.
247 (Byte): Likewise.
248 (Word): Likewise.
249 (Dword): Likewise.
250 (QWord): Likewise.
251 (Xmmword): Likewise.
252 (FWait): Updated.
253 (i386_opcode_modifier): Add No_xSuf, CheckSize, Byte, Word,
254 Dword, QWord and Xmmword.
255
256 * i386-opc.tbl: Add CheckSize|QWord to movq if IgnoreSize is
257 used.
258 * i386-tbl.h: Regenerated.
259
260 2008-01-02 Mark Kettenis <kettenis@gnu.org>
261
262 * m88k-dis.c (instructions): Fix fcvt.* instructions.
263 From Miod Vallat.
264
265 For older changes see ChangeLog-2007
266 \f
267 Local Variables:
268 mode: change-log
269 left-margin: 8
270 fill-column: 74
271 version-control: never
272 End:
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