b3b4d6fbdb0625ba8d7a3105310c0f95977d68f7
[deliverable/binutils-gdb.git] / opcodes / ChangeLog
1 2016-04-15 H.J. Lu <hongjiu.lu@intel.com>
2
3 * Makefile.in: Regenerated with automake 1.11.6.
4 * aclocal.m4: Likewise.
5
6 2016-04-14 Andrew Burgess <andrew.burgess@embecosm.com>
7
8 * arc-nps400-tbl.h: Add xldb, xldw, xld, xstb, xstw, and xst
9 instructions.
10 * arc-opc.c (insert_nps_cmem_uimm16): New function.
11 (extract_nps_cmem_uimm16): New function.
12 (arc_operands): Add NPS_XLDST_UIMM16 operand.
13
14 2016-04-14 Andrew Burgess <andrew.burgess@embecosm.com>
15
16 * arc-dis.c (arc_insn_length): New function.
17 (print_insn_arc): Use arc_insn_length, change insnLen to unsigned.
18 (find_format): Change insnLen parameter to unsigned.
19
20 2016-04-13 Nick Clifton <nickc@redhat.com>
21
22 PR target/19937
23 * v850-opc.c (v850_opcodes): Correct masks for long versions of
24 the LD.B and LD.BU instructions.
25
26 2016-04-12 Claudiu Zissulescu <claziss@synopsys.com>
27
28 * arc-dis.c (find_format): Check for extension flags.
29 (print_flags): New function.
30 (print_insn_arc): Update for .extCondCode, .extCoreRegister and
31 .extAuxRegister.
32 * arc-ext.c (arcExtMap_coreRegName): Use
33 LAST_EXTENSION_CORE_REGISTER.
34 (arcExtMap_coreReadWrite): Likewise.
35 (dump_ARC_extmap): Update printing.
36 * arc-opc.c (arc_flag_classes): Add F_CLASS_EXTEND flag.
37 (arc_aux_regs): Add cpu field.
38 * arc-regs.h: Add cpu field, lower case name aux registers.
39
40 2016-04-12 Claudiu Zissulescu <claziss@synopsys.com>
41
42 * arc-tbl.h: Add rtsc, sleep with no arguments.
43
44 2016-04-12 Claudiu Zissulescu <claziss@synopsys.com>
45
46 * arc-opc.c (flags_none, flags_f, flags_cc, flags_ccf):
47 Initialize.
48 (arg_none, arg_32bit_rarbrc, arg_32bit_zarbrc, arg_32bit_rbrbrc)
49 (arg_32bit_rarbu6, arg_32bit_zarbu6, arg_32bit_rbrbu6)
50 (arg_32bit_rbrbs12, arg_32bit_ralimmrc, arg_32bit_rarblimm)
51 (arg_32bit_zalimmrc, arg_32bit_zarblimm, arg_32bit_rbrblimm)
52 (arg_32bit_ralimmu6, arg_32bit_zalimmu6, arg_32bit_zalimms12)
53 (arg_32bit_ralimmlimm, arg_32bit_zalimmlimm, arg_32bit_rbrc)
54 (arg_32bit_zarc, arg_32bit_rbu6, arg_32bit_zau6, arg_32bit_rblimm)
55 (arg_32bit_zalimm, arg_32bit_limmrc, arg_32bit_limmu6)
56 (arg_32bit_limms12, arg_32bit_limmlimm): Likewise.
57 (arc_opcode arc_opcodes): Null terminate the array.
58 (arc_num_opcodes): Remove.
59 * arc-ext.h (INSERT_XOP): Define.
60 (extInstruction_t): Likewise.
61 (arcExtMap_instName): Delete.
62 (arcExtMap_insn): New function.
63 (arcExtMap_genOpcode): Likewise.
64 * arc-ext.c (ExtInstruction): Remove.
65 (create_map): Zero initialize instruction fields.
66 (arcExtMap_instName): Remove.
67 (arcExtMap_insn): New function.
68 (dump_ARC_extmap): More info while debuging.
69 (arcExtMap_genOpcode): New function.
70 * arc-dis.c (find_format): New function.
71 (print_insn_arc): Use find_format.
72 (arc_get_disassembler): Enable dump_ARC_extmap only when
73 debugging.
74
75 2016-04-11 Maciej W. Rozycki <macro@imgtec.com>
76
77 * mips-dis.c (print_mips16_insn_arg): Mask unused extended
78 instruction bits out.
79
80 2016-04-07 Andrew Burgess <andrew.burgess@embecosm.com>
81
82 * arc-nps400-tbl.h: Add schd, sync, and hwschd instructions.
83 * arc-opc.c (arc_flag_operands): Add new flags.
84 (arc_flag_classes): Add new classes.
85
86 2016-04-07 Andrew Burgess <andrew.burgess@embecosm.com>
87
88 * arc-opc.c (arc_opcodes): Extend comment to discus table layout.
89
90 2016-04-05 Andrew Burgess <andrew.burgess@embecosm.com>
91
92 * arc-nps400-tbl.h: Add movbi, decode1, fbset, fbclear, encode0,
93 encode1, rflt, crc16, and crc32 instructions.
94 * arc-opc.c (arc_flag_operands): Add F_NPS_R.
95 (arc_flag_classes): Add C_NPS_R.
96 (insert_nps_bitop_size_2b): New function.
97 (extract_nps_bitop_size_2b): Likewise.
98 (insert_nps_bitop_uimm8): Likewise.
99 (extract_nps_bitop_uimm8): Likewise.
100 (arc_operands): Add new operand entries.
101
102 2016-04-05 Claudiu Zissulescu <claziss@synopsys.com>
103
104 * arc-regs.h: Add a new subclass field. Add double assist
105 accumulator register values.
106 * arc-tbl.h: Use DPA subclass to mark the double assist
107 instructions. Use DPX/SPX subclas to mark the FPX instructions.
108 * arc-opc.c (RSP): Define instead of SP.
109 (arc_aux_regs): Add the subclass field.
110
111 2016-04-05 Jiong Wang <jiong.wang@arm.com>
112
113 * arm-dis.c: Support FP16 vmul, vmla, vmls (by scalar).
114
115 2016-03-31 Andrew Burgess <andrew.burgess@embecosm.com>
116
117 * arc-opc.c (arc_operands): Fix operand flags for NPS_R_DST, and
118 NPS_R_SRC1.
119
120 2016-03-30 Andrew Burgess <andrew.burgess@embecosm.com>
121
122 * arc-nps400-tbl.h: Add a header comment, and fix some whitespace
123 issues. No functional changes.
124
125 2016-03-30 Claudiu Zissulescu <claziss@synopsys.com>
126
127 * arc-regs.h (IC_RAM_ADDRESS, IC_TAG, IC_WP, IC_DATA, CONTROL0)
128 (AX2, AY2, MX2, MY2, AY0, AY1, DC_RAM_ADDR, DC_TAG, CONTROL1)
129 (RTT): Remove duplicate.
130 (LCDINSTR, LCDDATA, LCDSTAT, CC_*, PCT_COUNT*, PCT_SNAP*)
131 (PCT_CONFIG*): Remove.
132 (D1L, D1H, D2H, D2L): Define.
133
134 2016-03-29 Claudiu Zissulescu <claziss@synopsys.com>
135
136 * arc-ext-tbl.h (dsp_fp_i2flt): Fix typo.
137
138 2016-03-29 Claudiu Zissulescu <claziss@synopsys.com>
139
140 * arc-tbl.h (invld07): Remove.
141 * arc-ext-tbl.h: New file.
142 * arc-dis.c (FIELDA, FIELDB, FIELDC): Remove.
143 * arc-opc.c (arc_opcodes): Add ext-tbl include.
144
145 2016-03-24 Jan Kratochvil <jan.kratochvil@redhat.com>
146
147 Fix -Wstack-usage warnings.
148 * aarch64-dis.c (print_operands): Substitute size.
149 * aarch64-opc.c (print_register_offset_address): Substitute tblen.
150
151 2016-03-22 Jose E. Marchesi <jose.marchesi@oracle.com>
152
153 * sparc-opc.c (sparc_opcodes): Reorder entries for `rd' in order
154 to get a proper diagnostic when an invalid ASR register is used.
155
156 2016-03-22 Nick Clifton <nickc@redhat.com>
157
158 * configure: Regenerate.
159
160 2016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
161
162 * arc-nps400-tbl.h: New file.
163 * arc-opc.c: Add top level comment.
164 (insert_nps_3bit_dst): New function.
165 (extract_nps_3bit_dst): New function.
166 (insert_nps_3bit_src2): New function.
167 (extract_nps_3bit_src2): New function.
168 (insert_nps_bitop_size): New function.
169 (extract_nps_bitop_size): New function.
170 (arc_flag_operands): Add nps400 entries.
171 (arc_flag_classes): Add nps400 entries.
172 (arc_operands): Add nps400 entries.
173 (arc_opcodes): Add nps400 include.
174
175 2016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
176
177 * arc-opc.c (arc_flag_classes): Convert all flag classes to use
178 the new class enum values.
179
180 2016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
181
182 * arc-dis.c (print_insn_arc): Handle nps400.
183
184 2016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
185
186 * arc-opc.c (BASE): Delete.
187
188 2016-03-18 Nick Clifton <nickc@redhat.com>
189
190 PR target/19721
191 * aarch64-tbl.h (aarch64_opcode_table): Fix type of second operand
192 of MOV insn that aliases an ORR insn.
193
194 2016-03-16 Jiong Wang <jiong.wang@arm.com>
195
196 * arm-dis.c (neon_opcodes): Support new FP16 instructions.
197
198 2016-03-07 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
199
200 * mcore-opc.h: Add const qualifiers.
201 * microblaze-opc.h (struct op_code_struct): Likewise.
202 * sh-opc.h: Likewise.
203 * tic4x-dis.c (tic4x_print_indirect): Likewise.
204 (tic4x_print_op): Likewise.
205
206 2016-03-02 Alan Modra <amodra@gmail.com>
207
208 * or1k-desc.h: Regenerate.
209 * fr30-ibld.c: Regenerate.
210 * rl78-decode.c: Regenerate.
211
212 2016-03-01 Nick Clifton <nickc@redhat.com>
213
214 PR target/19747
215 * rl78-dis.c (print_insn_rl78_common): Fix typo.
216
217 2016-02-24 Renlin Li <renlin.li@arm.com>
218
219 * arm-dis.c (coprocessor_opcodes): Add fp16 instruction entries.
220 (print_insn_coprocessor): Support fp16 instructions.
221
222 2016-02-24 Renlin Li <renlin.li@arm.com>
223
224 * arm-dis.c (print_insn_coprocessor): Fix mask for vsel, vmaxnm,
225 vminnm, vrint(mpna).
226
227 2016-02-24 Renlin Li <renlin.li@arm.com>
228
229 * arm-dis.c (print_insn_coprocessor): Check co-processor number for
230 cpd/cpd2, mcr/mcr2, mrc/mrc2, ldc/ldc2, stc/stc2.
231
232 2016-02-15 H.J. Lu <hongjiu.lu@intel.com>
233
234 * i386-dis.c (print_insn): Parenthesize expression to prevent
235 truncated addresses.
236 (OP_J): Likewise.
237
238 2016-02-10 Claudiu Zissulescu <claziss@synopsys.com>
239 Janek van Oirschot <jvanoirs@synopsys.com>
240
241 * arc-opc.c (arc_relax_opcodes, arc_num_relax_opcodes): New
242 variable.
243
244 2016-02-04 Nick Clifton <nickc@redhat.com>
245
246 PR target/19561
247 * msp430-dis.c (print_insn_msp430): Add a special case for
248 decoding an RRC instruction with the ZC bit set in the extension
249 word.
250
251 2016-02-02 Andrew Burgess <andrew.burgess@embecosm.com>
252
253 * cgen-ibld.in (insert_normal): Rework calculation of shift.
254 * epiphany-ibld.c: Regenerate.
255 * fr30-ibld.c: Regenerate.
256 * frv-ibld.c: Regenerate.
257 * ip2k-ibld.c: Regenerate.
258 * iq2000-ibld.c: Regenerate.
259 * lm32-ibld.c: Regenerate.
260 * m32c-ibld.c: Regenerate.
261 * m32r-ibld.c: Regenerate.
262 * mep-ibld.c: Regenerate.
263 * mt-ibld.c: Regenerate.
264 * or1k-ibld.c: Regenerate.
265 * xc16x-ibld.c: Regenerate.
266 * xstormy16-ibld.c: Regenerate.
267
268 2016-02-02 Andrew Burgess <andrew.burgess@embecosm.com>
269
270 * epiphany-dis.c: Regenerated from latest cpu files.
271
272 2016-02-01 Michael McConville <mmcco@mykolab.com>
273
274 * cgen-dis.c (count_decodable_bits): Use unsigned value for mask
275 test bit.
276
277 2016-01-25 Renlin Li <renlin.li@arm.com>
278
279 * arm-dis.c (mapping_symbol_for_insn): New function.
280 (find_ifthen_state): Call mapping_symbol_for_insn().
281
282 2016-01-20 Matthew Wahab <matthew.wahab@arm.com>
283
284 * aarch64-opc.c (operand_general_constraint_met_p): Check validity
285 of MSR UAO immediate operand.
286
287 2016-01-18 Maciej W. Rozycki <macro@imgtec.com>
288
289 * mips-dis.c (print_insn_micromips): Remove 48-bit microMIPS
290 instruction support.
291
292 2016-01-17 Alan Modra <amodra@gmail.com>
293
294 * configure: Regenerate.
295
296 2016-01-14 Nick Clifton <nickc@redhat.com>
297
298 * rl78-decode.opc (rl78_decode_opcode): Add 's' operand to movw
299 instructions that can support stack pointer operations.
300 * rl78-decode.c: Regenerate.
301 * rl78-dis.c: Fix display of stack pointer in MOVW based
302 instructions.
303
304 2016-01-14 Matthew Wahab <matthew.wahab@arm.com>
305
306 * aarch64-opc.c (aarch64_sys_reg_supported_p): Merge conditionals
307 testing for RAS support. Add checks for erxfr_el1, erxctlr_el1,
308 erxtatus_el1 and erxaddr_el1.
309
310 2016-01-12 Matthew Wahab <matthew.wahab@arm.com>
311
312 * arm-dis.c (arm_opcodes): Add "esb".
313 (thumb_opcodes): Likewise.
314
315 2016-01-11 Peter Bergner <bergner@vnet.ibm.com>
316
317 * ppc-opc.c <xscmpnedp>: Delete.
318 <xvcmpnedp>: Likewise.
319 <xvcmpnedp.>: Likewise.
320 <xvcmpnesp>: Likewise.
321 <xvcmpnesp.>: Likewise.
322
323 2016-01-08 Andreas Schwab <schwab@linux-m68k.org>
324
325 PR gas/13050
326 * m68k-opc.c (moveb, movew): For ISA_B/C only allow #,d(An) in
327 addition to ISA_A.
328
329 2016-01-01 Alan Modra <amodra@gmail.com>
330
331 Update year range in copyright notice of all files.
332
333 For older changes see ChangeLog-2015
334 \f
335 Copyright (C) 2016 Free Software Foundation, Inc.
336
337 Copying and distribution of this file, with or without modification,
338 are permitted in any medium without royalty provided the copyright
339 notice and this notice are preserved.
340
341 Local Variables:
342 mode: change-log
343 left-margin: 8
344 fill-column: 74
345 version-control: never
346 End:
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