d4a2b41ab055242966e9d41fd8acae6939f4e92c
[deliverable/binutils-gdb.git] / opcodes / ChangeLog
1 2005-12-08 Jan Beulich <jbeulich@novell.com>
2
3 * i386-dis.c (MAXLEN): Reduce to architectural limit.
4 (fetch_data): Check for sufficient buffer size.
5
6 2005-12-08 Jan Beulich <jbeulich@novell.com>
7
8 * i386-dis.c (OP_ST): Remove prefix in Intel mode.
9
10 2005-12-08 Daniel Jacobowitz <dan@codesourcery.com>
11
12 * i386-dis.c (dofloat): Handle %rip-relative floating point addressing.
13
14 2005-12-07 Hans-Peter Nilsson <hp@axis.com>
15
16 * cris-opc.c (cris_opcodes) <"move" "s,P">: Define using
17 MOVE_M_TO_PREG_OPCODE and MOVE_M_TO_PREG_ZBITS instead of constants.
18
19 2005-12-06 H.J. Lu <hongjiu.lu@intel.com>
20
21 PR gas/1874
22 * i386-dis.c (address_mode): New enum type.
23 (address_mode): New variable.
24 (mode_64bit): Removed.
25 (ckprefix): Updated to check address_mode instead of mode_64bit.
26 (prefix_name): Likewise.
27 (print_insn): Likewise.
28 (putop): Likewise.
29 (print_operand_value): Likewise.
30 (intel_operand_size): Likewise.
31 (OP_E): Likewise.
32 (OP_G): Likewise.
33 (set_op): Likewise.
34 (OP_REG): Likewise.
35 (OP_I): Likewise.
36 (OP_I64): Likewise.
37 (OP_OFF): Likewise.
38 (OP_OFF64): Likewise.
39 (ptr_reg): Likewise.
40 (OP_C): Likewise.
41 (SVME_Fixup): Likewise.
42 (print_insn): Set address_mode.
43 (PNI_Fixup): Add 64bit and address size override support for
44 monitor and mwait.
45
46 2005-12-06 Hans-Peter Nilsson <hp@axis.com>
47
48 * cris-dis.c (bytes_to_skip): Handle new parameter prefix_matchedp.
49 (print_with_operands): Check for prefix when [PC+] is seen.
50
51 2005-12-02 Dave Brolley <brolley@redhat.com>
52
53 * configure.in (cgen_files): Add cgen-bitset.lo.
54 (ta): Add cgen-bitset.lo when arch==bfd_cris_arch.
55 * Makefile.am (CFILES): Add cgen-bitset.c.
56 (ALL_MACHINES): Add cgen-bitset.lo.
57 (cgen-bitset.lo): New target.
58 * cgen-opc.c (cgen_bitset_create, cgen_bitset_init, cgen_bitset_clear)
59 (cgen_bitset_add, cgen_bitset_set, cgen_bitset_contains)
60 (cgen_bitset_compare, cgen_bitset_intersect_p, cgen_bitset_copy)
61 (cgen_bitset_union): Moved from here ...
62 * cgen-bitset.c: ... to here. New file.
63 * Makefile.in: Regenerated.
64 * configure: Regenerated.
65
66 2005-11-22 James E Wilson <wilson@specifix.com>
67
68 * ia64-gen.c (_opcode_int64_low, _opcode_int64_high,
69 opcode_fprintf_vma): New.
70 (print_main_table): New opcode_fprintf_vma instead of fprintf_vma.
71
72 2005-11-16 Alan Modra <amodra@bigpond.net.au>
73
74 * ppc-opc.c (powerpc_opcodes): Add frin,friz,frip,frim. Correct
75 frsqrtes.
76
77 2005-11-14 David Ung <davidu@mips.com>
78
79 * mips16-opc.c: Add MIPS16e save/restore opcodes.
80 * mips-dis.c (print_mips16_insn_arg): Handle printing of 'm'/'M'
81 codes for save/restore.
82
83 2005-11-10 Andreas Schwab <schwab@suse.de>
84
85 * m68k-dis.c (print_insn_m68k): Only match FPU insns with
86 coprocessor ID 1.
87
88 2005-11-08 H.J. Lu <hongjiu.lu@intel.com>
89
90 * m32c-desc.c: Regenerated.
91
92 2005-11-08 Nathan Sidwell <nathan@codesourcery.com>
93
94 Add ms2.
95 * ms1-asm.c, ms1-desc.c, ms1-desc.h, ms1-dis.c, ms1-ibld.c,
96 ms1-opc.c, ms1-opc.h: Regenerated.
97
98 2005-11-07 Steve Ellcey <sje@cup.hp.com>
99
100 * configure: Regenerate after modifying bfd/warning.m4.
101
102 2005-11-07 Alan Modra <amodra@bigpond.net.au>
103
104 * i386-dis.c (ckprefix): Handle rex on fwait. Don't print
105 ignored rex prefixes here.
106 (print_insn): Instead, handle them similarly to fwait followed
107 by non-fp insns.
108
109 2005-11-02 H.J. Lu <hongjiu.lu@intel.com>
110
111 * iq2000-desc.c: Regenerated.
112 * iq2000-desc.h: Likewise.
113 * iq2000-dis.c: Likewise.
114 * iq2000-opc.c: Likewise.
115
116 2005-11-02 Paul Brook <paul@codesourcery.com>
117
118 * arm-dis.c (print_insn_thumb32): Word align blx target address.
119
120 2005-10-31 Alan Modra <amodra@bigpond.net.au>
121
122 * arm-dis.c (print_insn): Warning fix.
123
124 2005-10-30 H.J. Lu <hongjiu.lu@intel.com>
125
126 * Makefile.am: Run "make dep-am".
127 * Makefile.in: Regenerated.
128
129 * dep-in.sed: Replace " ./" with " ".
130
131 2005-10-28 Dave Brolley <brolley@redhat.com>
132
133 * All CGEN-generated sources: Regenerate.
134
135 Contribute the following changes:
136 2005-09-19 Dave Brolley <brolley@redhat.com>
137
138 * disassemble.c (disassemble_init_for_target): Add 'break' to case for
139 bfd_arch_tic4x. Use cgen_bitset_create and cgen_bitset_set for
140 bfd_arch_m32c case.
141
142 2005-02-16 Dave Brolley <brolley@redhat.com>
143
144 * cgen-dis.in: Rename CGEN_ISA_MASK to CGEN_BITSET. Rename
145 cgen_isa_mask_* to cgen_bitset_*.
146 * cgen-opc.c: Likewise.
147
148 2003-11-28 Richard Sandiford <rsandifo@redhat.com>
149
150 * cgen-dis.in (print_insn_@arch@): Fix comparison with cached isas.
151 * *-dis.c: Regenerate.
152
153 2003-06-05 DJ Delorie <dj@redhat.com>
154
155 * cgen-dis.in (print_insn_@arch@): Copy prev_isas, don't assign
156 it, as it may point to a reused buffer. Set prev_isas when we
157 change cpus.
158
159 2002-12-13 Dave Brolley <brolley@redhat.com>
160
161 * cgen-opc.c (cgen_isa_mask_create): New support function for
162 CGEN_ISA_MASK.
163 (cgen_isa_mask_init): Ditto.
164 (cgen_isa_mask_clear): Ditto.
165 (cgen_isa_mask_add): Ditto.
166 (cgen_isa_mask_set): Ditto.
167 (cgen_isa_supported): Ditto.
168 (cgen_isa_mask_compare): Ditto.
169 (cgen_isa_mask_intersection): Ditto.
170 (cgen_isa_mask_copy): Ditto.
171 (cgen_isa_mask_combine): Ditto.
172 * cgen-dis.in (libiberty.h): #include it.
173 (isas): Renamed from 'isa' and now (CGEN_ISA_MASK *).
174 (print_insn_@arch@): Use CGEN_ISA_MASK and support functions.
175 * Makefile.am (CGENDEPS): Add utils-cgen.scm and attrs.scm.
176 * Makefile.in: Regenerated.
177
178 2005-10-27 DJ Delorie <dj@redhat.com>
179
180 * m32c-asm.c: Regenerate.
181 * m32c-desc.c: Regenerate.
182 * m32c-desc.h: Regenerate.
183 * m32c-dis.c: Regenerate.
184 * m32c-ibld.c: Regenerate.
185 * m32c-opc.c: Regenerate.
186 * m32c-opc.h: Regenerate.
187
188 2005-10-26 DJ Delorie <dj@redhat.com>
189
190 * m32c-asm.c: Regenerate.
191 * m32c-desc.c: Regenerate.
192 * m32c-desc.h: Regenerate.
193 * m32c-dis.c: Regenerate.
194 * m32c-ibld.c: Regenerate.
195 * m32c-opc.c: Regenerate.
196 * m32c-opc.h: Regenerate.
197
198 2005-10-26 Paul Brook <paul@codesourcery.com>
199
200 * arm-dis.c (arm_opcodes): Correct "sel" entry.
201
202 2005-10-26 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
203
204 * m32r-asm.c: Regenerate.
205
206 2005-10-25 DJ Delorie <dj@redhat.com>
207
208 * m32c-asm.c: Regenerate.
209 * m32c-desc.c: Regenerate.
210 * m32c-desc.h: Regenerate.
211 * m32c-dis.c: Regenerate.
212 * m32c-ibld.c: Regenerate.
213 * m32c-opc.c: Regenerate.
214 * m32c-opc.h: Regenerate.
215
216 2005-10-25 Arnold Metselaar <arnold.metselaar@planet.nl>
217
218 * configure.in: Add target architecture bfd_arch_z80.
219 * configure: Regenerated.
220 * disassemble.c (disassembler)<ARCH_z80>: Add case
221 bfd_arch_z80.
222 * z80-dis.c: New file.
223
224 2005-10-25 Alan Modra <amodra@bigpond.net.au>
225
226 * po/POTFILES.in: Regenerate.
227 * po/opcodes.pot: Regenerate.
228
229 2005-10-24 Jan Beulich <jbeulich@novell.com>
230
231 * ia64-asmtab.c: Regenerate.
232
233 2005-10-21 DJ Delorie <dj@redhat.com>
234
235 * m32c-asm.c: Regenerate.
236 * m32c-desc.c: Regenerate.
237 * m32c-desc.h: Regenerate.
238 * m32c-dis.c: Regenerate.
239 * m32c-ibld.c: Regenerate.
240 * m32c-opc.c: Regenerate.
241 * m32c-opc.h: Regenerate.
242
243 2005-10-21 Nick Clifton <nickc@redhat.com>
244
245 * bfin-dis.c: Tidy up code, removing redundant constructs.
246
247 2005-10-19 Martin Schwidefsky <schwidefsky@de.ibm.com>
248
249 * s390-opc.txt: Add unnormalized hfp multiply and multiply-and-add
250 instructions.
251
252 2005-10-18 Nick Clifton <nickc@redhat.com>
253
254 * m32r-asm.c: Regenerate after updating m32r.opc.
255
256 2005-10-18 Jie Zhang <jie.zhang@analog.com>
257
258 * bfin-dis.c (print_insn_bfin): Do proper endian transform when
259 reading instruction from memory.
260
261 2005-10-18 Nick Clifton <nickc@redhat.com>
262
263 * m32r-asm.c: Regenerate after updating m32r.opc.
264
265 2005-10-14 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
266
267 * m32r-asm.c: Regenerate after updating m32r.opc.
268
269 2005-10-08 James Lemke <jim@wasabisystems.com>
270
271 * arm-dis.c (coprocessor_opcodes): Fix mask for various Maverick CDP
272 operations.
273
274 2005-10-06 Daniel Jacobowitz <dan@codesourcery.com>
275
276 * ppc-dis.c (struct dis_private): Remove.
277 (powerpc_dialect): Avoid aliasing warnings.
278 (print_insn_big_powerpc, print_insn_little_powerpc): Likewise.
279
280 2005-09-30 Nick Clifton <nickc@redhat.com>
281
282 * po/ga.po: New Irish translation.
283 * configure.in (ALL_LINGUAS): Add "ga".
284 * configure: Regenerate.
285
286 2005-09-30 H.J. Lu <hongjiu.lu@intel.com>
287
288 * Makefile.am: Run "make dep-am".
289 * Makefile.in: Regenerated.
290 * aclocal.m4: Likewise.
291 * configure: Likewise.
292
293 2005-09-30 Catherine Moore <clm@cm00re.com>
294
295 * Makefile.am: Bfin support.
296 * Makefile.in: Regenerated.
297 * aclocal.m4: Regenerated.
298 * bfin-dis.c: New file.
299 * configure.in: Bfin support.
300 * configure: Regenerated.
301 * disassemble.c (ARCH_bfin): Define.
302 (disassembler): Add case for bfd_arch_bfin.
303
304 2005-09-28 Jan Beulich <jbeulich@novell.com>
305
306 * i386-dis.c (stack_v_mode): Renamed from branch_v_mode.
307 (indirEv): Use it.
308 (stackEv): New.
309 (Ob64, Ov64): Rename to Ob, Ov. Delete unused original definitions.
310 (dis386): Document and use new 'V' meta character. Use it for
311 single-byte push/pop opcode forms. Use stackEv for mod-r/m push/pop
312 opcode forms. Correct typo in 'pop ss'. Replace Ob64/Ov64 by Ob/Ov.
313 (putop): 'q' suffix for 'T' and 'U' meta depends on DFLAG. Mark
314 data prefix as used whenever DFLAG was examined. Handle 'V'.
315 (intel_operand_size): Use stack_v_mode.
316 (OP_E): Use stack_v_mode, but handle only the special case of
317 64-bit mode without operand size override here; fall through to
318 v_mode case otherwise.
319 (OP_REG): Special case rAX_reg ... rDI_reg only when 64-bit mode
320 and no operand size override is present.
321 (OP_J): Use get32s for obtaining the displacement also when rex64
322 is present.
323
324 2005-09-08 Paul Brook <paul@codesourcery.com>
325
326 * arm-dis.c (arm_opcodes, thumb32_opcodes): Rename smi to smc.
327
328 2005-09-06 Chao-ying Fu <fu@mips.com>
329
330 * mips-opc.c (MT32): New define.
331 (mips_builtin_opcodes): Move "bc0f", "bc0fl", "bc0t", "bc0tl" to the
332 bottom to avoid opcode collision with "mftr" and "mttr".
333 Add MT instructions.
334 * mips-dis.c (mips_arch_choices): Enable INSN_MT for mips32r2.
335 (print_insn_args): Add supports for +t, +T, !, $, *, &, g operand
336 formats.
337
338 2005-09-02 Paul Brook <paul@codesourcery.com>
339
340 * arm-dis.c (coprocessor_opcodes): Add null terminator.
341
342 2005-09-02 Paul Brook <paul@codesourcery.com>
343
344 * arm-dis.c (coprocessor_opcodes): New.
345 (arm_opcodes, thumb32_opcodes): Remove coprocessor insns.
346 (print_insn_coprocessor): New function.
347 (print_insn_arm): Use print_insn_coprocessor. Remove coprocessor
348 format characters.
349 (print_insn_thumb32): Use print_insn_coprocessor.
350
351 2005-08-30 Paul Brook <paul@codesourcery.com>
352
353 * arm-dis.c (thumb_opcodes): Disassemble sub(3) as subs.
354
355 2005-08-26 Jan Beulich <jbeulich@novell.com>
356
357 * i386-dis.c (intel_operand_size): New, broken out from OP_E for
358 re-use.
359 (OP_E): Call intel_operand_size, move call site out of mode
360 dependent code.
361 (OP_OFF): Call intel_operand_size if suffix_always. Remove
362 ATTRIBUTE_UNUSED from parameters.
363 (OP_OFF64): Likewise.
364 (OP_ESreg): Call intel_operand_size.
365 (OP_DSreg): Likewise.
366 (OP_DIR): Use colon rather than semicolon as separator of far
367 jump/call operands.
368
369 2005-08-25 Chao-ying Fu <fu@mips.com>
370
371 * mips-opc.c (WR_a, RD_a, MOD_a, DSP_VOLA, D32): New define.
372 (mips_builtin_opcodes): Add DSP instructions.
373 * mips-dis.c (mips_arch_choices): Enable INSN_DSP for mips32, mips32r2,
374 mips64, mips64r2.
375 (print_insn_args): Add supports for 3, 4, 5, 6, 7, 8, 9, 0, :, ', @
376 operand formats.
377
378 2005-08-23 David Ung <davidu@mips.com>
379
380 * mips16-opc.c (mips16_opcodes): Add the MIPS16e jalrc/jrc
381 instructions to the table.
382
383 2005-08-18 Alan Modra <amodra@bigpond.net.au>
384
385 * a29k-dis.c: Delete.
386 * Makefile.am: Remove a29k support.
387 * configure.in: Likewise.
388 * disassemble.c: Likewise.
389 * Makefile.in: Regenerate.
390 * configure: Regenerate.
391 * po/POTFILES.in: Regenerate.
392
393 2005-08-15 Daniel Jacobowitz <dan@codesourcery.com>
394
395 * ppc-dis.c (powerpc_dialect): Handle e300.
396 (print_ppc_disassembler_options): Likewise.
397 * ppc-opc.c (PPCE300): Define.
398 (powerpc_opcodes): Mark icbt as available for the e300.
399
400 2005-08-13 John David Anglin <dave.anglin@nrc-cnrc.gc.ca>
401
402 * hppa-dis.c (print_insn_hppa): Don't print '%' before register names.
403 Use "rp" instead of "%r2" in "b,l" insns.
404
405 2005-08-12 Martin Schwidefsky <schwidefsky@de.ibm.com>
406
407 * s390-dis.c (print_insn_s390): Print unsigned operands with %u.
408 * s390-mkopc.c (s390_opcode_cpu_val): Add support for cpu type z9-109.
409 (main): Likewise.
410 * s390-opc.c (I32_16, U32_16, M_16): Add defines 32 bit immediates
411 and 4 bit optional masks.
412 (INSTR_RIL_RI, INSTR_RIL_RU, INSTR_RRF_M0RR, INSTR_RSE_CCRD,
413 INSTR_RSY_CCRD, INSTR_SSF_RRDRD): Add new instruction formats.
414 (MASK_RIL_RI, MASK_RIL_RU, MASK_RRF_M0RR, MASK_RSE_CCRD,
415 MASK_RSY_CCRD, MASK_SSF_RRDRD): Likewise.
416 (s390_opformats): Likewise.
417 * s390-opc.txt: Add new instructions for cpu type z9-109.
418
419 2005-08-05 John David Anglin <dave.anglin@nrc-crnc.gc.ca>
420
421 * hppa-dis.c (print_insn_hppa): Prefix 21-bit values with "L%".
422
423 2005-07-29 Paul Brook <paul@codesourcery.com>
424
425 * arm-dis.c: Fix disassebly of thumb2 writeback addressing modes.
426
427 2005-07-29 Paul Brook <paul@codesourcery.com>
428
429 * arm-dis.c (thumb32_opc): Fix addressing mode for tbh.
430 (print_insn_thumb32): Fix decoding of thumb2 'I' operands.
431
432 2005-07-25 DJ Delorie <dj@redhat.com>
433
434 * m32c-asm.c Regenerate.
435 * m32c-dis.c Regenerate.
436
437 2005-07-20 DJ Delorie <dj@redhat.com>
438
439 * disassemble.c (disassemble_init_for_target): M32C ISAs are
440 enums, so convert them to bit masks, which attributes are.
441
442 2005-07-18 Nick Clifton <nickc@redhat.com>
443
444 * configure.in: Restore alpha ordering to list of arches.
445 * configure: Regenerate.
446 * disassemble.c: Restore alpha ordering to list of arches.
447
448 2005-07-18 Nick Clifton <nickc@redhat.com>
449
450 * m32c-asm.c: Regenerate.
451 * m32c-desc.c: Regenerate.
452 * m32c-desc.h: Regenerate.
453 * m32c-dis.c: Regenerate.
454 * m32c-ibld.h: Regenerate.
455 * m32c-opc.c: Regenerate.
456 * m32c-opc.h: Regenerate.
457
458 2005-07-18 H.J. Lu <hongjiu.lu@intel.com>
459
460 * i386-dis.c (PNI_Fixup): Update comment.
461 (VMX_Fixup): Properly handle the suffix check.
462
463 2005-07-16 John David Anglin <dave.anglin@nrc-cnrc.gc.ca>
464
465 * hppa-dis.c (print_insn_hppa): Add space after 'w' in wide-mode
466 mfctl disassembly.
467
468 2005-07-16 Alan Modra <amodra@bigpond.net.au>
469
470 * Makefile.am: Run "make dep-am".
471 (stamp-m32c): Fix cpu dependencies.
472 * Makefile.in: Regenerate.
473 * ip2k-dis.c: Regenerate.
474
475 2007-07-15 H.J. Lu <hongjiu.lu@intel.com>
476
477 * i386-dis.c (OP_VMX): New. Handle Intel VMX Instructions.
478 (VMX_Fixup): New. Fix up Intel VMX Instructions.
479 (Em): New.
480 (Gm): New.
481 (VM): New.
482 (dis386_twobyte): Updated entries 0x78 and 0x79.
483 (twobyte_has_modrm): Likewise.
484 (grps): Use OP_VMX in the "sgdtIQ" entry. Updated GRP9.
485 (OP_G): Handle m_mode.
486
487 2005-07-14 Jim Blandy <jimb@redhat.com>
488
489 Add support for the Renesas M32C and M16C.
490 * m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c: New.
491 * m32c-desc.h, m32c-opc.h: New.
492 * Makefile.am (HFILES): List m32c-desc.h and m32c-opc.h.
493 (CFILES): List m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c,
494 m32c-opc.c.
495 (ALL_MACHINES): List m32c-asm.lo, m32c-desc.lo, m32c-dis.lo,
496 m32c-ibld.lo, m32c-opc.lo.
497 (CLEANFILES): List stamp-m32c.
498 (M32C_DEPS): List stamp-m32c, if CGEN_MAINT.
499 (CGEN_CPUS): Add m32c.
500 (m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c)
501 (m32c-desc.h, m32c-opc.h): Depend on M32C_DEPS.
502 (m32c_opc_h): New variable.
503 (stamp-m32c, m32c-asm.lo, m32c-desc.lo, m32c-dis.lo, m32c-ibld.lo)
504 (m32c-opc.lo): New rules.
505 * Makefile.in: Regenerated.
506 * configure.in: Add case for bfd_m32c_arch.
507 * configure: Regenerated.
508 * disassemble.c (ARCH_m32c): New.
509 [ARCH_m32c]: #include "m32c-desc.h".
510 (disassembler) [ARCH_m32c]: Add case for bfd_arch_m32c.
511 (disassemble_init_for_target) [ARCH_m32c]: Same.
512
513 * cgen-ops.h, cgen-types.h: New files.
514 * Makefile.am (HFILES): List them.
515 * Makefile.in: Regenerated.
516
517 2005-07-07 Kaveh R. Ghazi <ghazi@caip.rutgers.edu>
518
519 * arc-dis.c, arm-dis.c, cris-dis.c, crx-dis.c, d10v-dis.c,
520 d30v-dis.c, fr30-dis.c, h8300-dis.c, h8500-dis.c, i860-dis.c,
521 ia64-dis.c, ip2k-dis.c, m10200-dis.c, m10300-dis.c,
522 m88k-dis.c, mcore-dis.c, mips-dis.c, ms1-dis.c, or32-dis.c,
523 ppc-dis.c, sh64-dis.c, sparc-dis.c, tic4x-dis.c, tic80-dis.c,
524 v850-dis.c: Fix format bugs.
525 * ia64-gen.c (fail, warn): Add format attribute.
526 * or32-opc.c (debug): Likewise.
527
528 2005-07-07 Khem Raj <kraj@mvista.com>
529
530 * arm-dis.c (opcode32 arm_opcodes): Fix ARM VFP fadds instruction
531 disassembly pattern.
532
533 2005-07-06 Alan Modra <amodra@bigpond.net.au>
534
535 * Makefile.am (stamp-m32r): Fix path to cpu files.
536 (stamp-m32r, stamp-iq2000): Likewise.
537 * Makefile.in: Regenerate.
538 * m32r-asm.c: Regenerate.
539 * po/POTFILES.in: Remove arm-opc.h. Add ms1-asm.c, ms1-desc.c,
540 ms1-desc.h, ms1-dis.c, ms1-ibld.c, ms1-opc.c, ms1-opc.h.
541
542 2005-07-05 Nick Clifton <nickc@redhat.com>
543
544 * iq2000-asm.c: Regenerate.
545 * ms1-asm.c: Regenerate.
546
547 2005-07-05 Jan Beulich <jbeulich@novell.com>
548
549 * i386-dis.c (SVME_Fixup): New.
550 (grps): Use it for the lidt entry.
551 (PNI_Fixup): Call OP_M rather than OP_E.
552 (INVLPG_Fixup): Likewise.
553
554 2005-07-04 H.J. Lu <hongjiu.lu@intel.com>
555
556 * tic30-dis.c (cnvt_tmsfloat_ieee): Use HUGE_VALF if defined.
557
558 2005-07-01 Nick Clifton <nickc@redhat.com>
559
560 * a29k-dis.c: Update to ISO C90 style function declarations and
561 fix formatting.
562 * alpha-opc.c: Likewise.
563 * arc-dis.c: Likewise.
564 * arc-opc.c: Likewise.
565 * avr-dis.c: Likewise.
566 * cgen-asm.in: Likewise.
567 * cgen-dis.in: Likewise.
568 * cgen-ibld.in: Likewise.
569 * cgen-opc.c: Likewise.
570 * cris-dis.c: Likewise.
571 * d10v-dis.c: Likewise.
572 * d30v-dis.c: Likewise.
573 * d30v-opc.c: Likewise.
574 * dis-buf.c: Likewise.
575 * dlx-dis.c: Likewise.
576 * h8300-dis.c: Likewise.
577 * h8500-dis.c: Likewise.
578 * hppa-dis.c: Likewise.
579 * i370-dis.c: Likewise.
580 * i370-opc.c: Likewise.
581 * m10200-dis.c: Likewise.
582 * m10300-dis.c: Likewise.
583 * m68k-dis.c: Likewise.
584 * m88k-dis.c: Likewise.
585 * mips-dis.c: Likewise.
586 * mmix-dis.c: Likewise.
587 * msp430-dis.c: Likewise.
588 * ns32k-dis.c: Likewise.
589 * or32-dis.c: Likewise.
590 * or32-opc.c: Likewise.
591 * pdp11-dis.c: Likewise.
592 * pj-dis.c: Likewise.
593 * s390-dis.c: Likewise.
594 * sh-dis.c: Likewise.
595 * sh64-dis.c: Likewise.
596 * sparc-dis.c: Likewise.
597 * sparc-opc.c: Likewise.
598 * sysdep.h: Likewise.
599 * tic30-dis.c: Likewise.
600 * tic4x-dis.c: Likewise.
601 * tic80-dis.c: Likewise.
602 * v850-dis.c: Likewise.
603 * v850-opc.c: Likewise.
604 * vax-dis.c: Likewise.
605 * w65-dis.c: Likewise.
606 * z8kgen.c: Likewise.
607
608 * fr30-*: Regenerate.
609 * frv-*: Regenerate.
610 * ip2k-*: Regenerate.
611 * iq2000-*: Regenerate.
612 * m32r-*: Regenerate.
613 * ms1-*: Regenerate.
614 * openrisc-*: Regenerate.
615 * xstormy16-*: Regenerate.
616
617 2005-06-23 Ben Elliston <bje@gnu.org>
618
619 * m68k-dis.c: Use ISC C90.
620 * m68k-opc.c: Formatting fixes.
621
622 2005-06-16 David Ung <davidu@mips.com>
623
624 * mips16-opc.c (mips16_opcodes): Add the following MIPS16e
625 instructions to the table; seb/seh/sew/zeb/zeh/zew.
626
627 2005-06-15 Dave Brolley <brolley@redhat.com>
628
629 Contribute Morpho ms1 on behalf of Red Hat
630 * ms1-asm.c, ms1-desc.c, ms1-dis.c, ms1-ibld.c, ms1-opc.c,
631 ms1-opc.h: New files, Morpho ms1 target.
632
633 2004-05-14 Stan Cox <scox@redhat.com>
634
635 * disassemble.c (ARCH_ms1): Define.
636 (disassembler): Handle bfd_arch_ms1
637
638 2004-05-13 Michael Snyder <msnyder@redhat.com>
639
640 * Makefile.am, Makefile.in: Add ms1 target.
641 * configure.in: Ditto.
642
643 2005-06-08 Zack Weinberg <zack@codesourcery.com>
644
645 * arm-opc.h: Delete; fold contents into ...
646 * arm-dis.c: ... here. Move includes of internal COFF headers
647 next to includes of internal ELF headers.
648 (streq, WORD_ADDRESS, BDISP, BDISP23): Delete, unused.
649 (struct arm_opcode): Rename struct opcode32. Make 'assembler' const.
650 (struct thumb_opcode): Rename struct opcode16. Make 'assembler' const.
651 (arm_conditional, arm_fp_const, arm_shift, arm_regname, regnames)
652 (iwmmxt_wwnames, iwmmxt_wwssnames):
653 Make const.
654 (regnames): Remove iWMMXt coprocessor register sets.
655 (iwmmxt_regnames, iwmmxt_cregnames): New statics.
656 (get_arm_regnames): Adjust fourth argument to match above changes.
657 (set_iwmmxt_regnames): Delete.
658 (print_insn_arm): Constify 'c'. Use ISO syntax for function
659 pointer calls. Expand sole use of BDISP. Use iwmmxt_regnames
660 and iwmmxt_cregnames, not set_iwmmxt_regnames.
661 (print_insn_thumb16, print_insn_thumb32): Constify 'c'. Use
662 ISO syntax for function pointer calls.
663
664 2005-06-07 Zack Weinberg <zack@codesourcery.com>
665
666 * arm-dis.c: Split up the comments describing the format codes, so
667 that the ARM and 16-bit Thumb opcode tables each have comments
668 preceding them that describe all the codes, and only the codes,
669 valid in those tables. (32-bit Thumb table is already like this.)
670 Reorder the lists in all three comments to match the order in
671 which the codes are implemented.
672 Remove all forward declarations of static functions. Convert all
673 function definitions to ISO C format.
674 (print_insn_arm, print_insn_thumb16, print_insn_thumb32):
675 Return nothing.
676 (print_insn_thumb16): Remove unused case 'I'.
677 (print_insn): Update for changed calling convention of subroutines.
678
679 2005-05-25 Jan Beulich <jbeulich@novell.com>
680
681 * i386-dis.c (OP_E): In Intel mode, display 32-bit displacements in
682 hex (but retain it being displayed as signed). Remove redundant
683 checks. Add handling of displacements for 16-bit addressing in Intel
684 mode.
685
686 2005-05-25 Jan Beulich <jbeulich@novell.com>
687
688 * i386-dis.c (prefix_name): Remove pointless mode_64bit check.
689 (OP_E): Remove redundant REX_EXTZ handling. Remove pointless
690 masking of 'rm' in 16-bit memory address handling.
691
692 2005-05-19 Anton Blanchard <anton@samba.org>
693
694 * ppc-dis.c (powerpc_dialect): Handle "-Mpower5".
695 (print_ppc_disassembler_options): Document it.
696 * ppc-opc.c (SVC_LEV): Define.
697 (LEV): Allow optional operand.
698 (POWER5): Define.
699 (powerpc_opcodes): Extend "sc". Adjust "svc" and "svcl". Add
700 "hrfid", "popcntb", "fsqrtes", "fsqrtes.", "fre" and "fre.".
701
702 2005-05-19 Kelley Cook <kcook@gcc.gnu.org>
703
704 * Makefile.in: Regenerate.
705
706 2005-05-17 Zack Weinberg <zack@codesourcery.com>
707
708 * arm-dis.c (thumb_opcodes): Add disassembly for V6T2 16-bit
709 instructions. Adjust disassembly of some opcodes to match
710 unified syntax.
711 (thumb32_opcodes): New table.
712 (print_insn_thumb): Rename print_insn_thumb16; don't handle
713 two-halfword branches here.
714 (print_insn_thumb32): New function.
715 (print_insn): Choose among print_insn_arm, print_insn_thumb16,
716 and print_insn_thumb32. Be consistent about order of
717 halfwords when printing 32-bit instructions.
718
719 2005-05-07 H.J. Lu <hongjiu.lu@intel.com>
720
721 PR 843
722 * i386-dis.c (branch_v_mode): New.
723 (indirEv): Use branch_v_mode instead of v_mode.
724 (OP_E): Handle branch_v_mode.
725
726 2005-05-07 H.J. Lu <hongjiu.lu@intel.com>
727
728 * d10v-dis.c (dis_2_short): Support 64bit host.
729
730 2005-05-07 Nick Clifton <nickc@redhat.com>
731
732 * po/nl.po: Updated translation.
733
734 2005-05-07 Nick Clifton <nickc@redhat.com>
735
736 * Update the address and phone number of the FSF organization in
737 the GPL notices in the following files:
738 a29k-dis.c, aclocal.m4, alpha-dis.c, alpha-opc.c, arc-dis.c,
739 arc-dis.h, arc-ext.c, arc-ext.h, arc-opc.c, arm-dis.c, arm-opc.h,
740 avr-dis.c, cgen-asm.c, cgen-asm.in, cgen-dis.c, cgen-dis.in,
741 cgen-ibld.in, cgen-opc.c, cgen.sh, cris-dis.c, cris-opc.c,
742 crx-dis.c, crx-opc.c, d10v-dis.c, d10v-opc.c, d30v-dis.c,
743 d30v-opc.c, dis-buf.c, dis-init.c, disassemble.c, dlx-dis.c,
744 fr30-asm.c, fr30-desc.c, fr30-desc.h, fr30-dis.c, fr30-ibld.c,
745 fr30-opc.c, fr30-opc.h, frv-asm.c, frv-desc.c, frv-desc.h,
746 frv-dis.c, frv-ibld.c, frv-opc.c, frv-opc.h, h8300-dis.c,
747 h8500-dis.c, h8500-opc.h, hppa-dis.c, i370-dis.c, i370-opc.c,
748 i386-dis.c, i860-dis.c, i960-dis.c, ia64-asmtab.h, ia64-dis.c,
749 ia64-gen.c, ia64-opc-a.c, ia64-opc-b.c, ia64-opc-d.c,
750 ia64-opc-f.c, ia64-opc-i.c, ia64-opc-m.c, ia64-opc-x.c,
751 ia64-opc.c, ia64-opc.h, ip2k-asm.c, ip2k-desc.c, ip2k-desc.h,
752 ip2k-dis.c, ip2k-ibld.c, ip2k-opc.c, ip2k-opc.h, iq2000-asm.c,
753 iq2000-desc.c, iq2000-desc.h, iq2000-dis.c, iq2000-ibld.c,
754 iq2000-opc.c, iq2000-opc.h, m10200-dis.c, m10200-opc.c,
755 m10300-dis.c, m10300-opc.c, m32r-asm.c, m32r-desc.c, m32r-desc.h,
756 m32r-dis.c, m32r-ibld.c, m32r-opc.c, m32r-opc.h, m32r-opinst.c,
757 m68hc11-dis.c, m68hc11-opc.c, m68k-dis.c, m68k-opc.c, m88k-dis.c,
758 maxq-dis.c, mcore-dis.c, mcore-opc.h, mips-dis.c, mips-opc.c,
759 mips16-opc.c, mmix-dis.c, mmix-opc.c, msp430-dis.c, ns32k-dis.c,
760 openrisc-asm.c, openrisc-desc.c, openrisc-desc.h, openrisc-dis.c,
761 openrisc-ibld.c, openrisc-opc.c, openrisc-opc.h, opintl.h,
762 or32-dis.c, or32-opc.c, pdp11-dis.c, pdp11-opc.c, pj-dis.c,
763 pj-opc.c, ppc-dis.c, ppc-opc.c, s390-dis.c, s390-mkopc.c,
764 s390-opc.c, sh-dis.c, sh-opc.h, sh64-dis.c, sh64-opc.c,
765 sh64-opc.h, sparc-dis.c, sparc-opc.c, sysdep.h, tic30-dis.c,
766 tic4x-dis.c, tic54x-dis.c, tic54x-opc.c, tic80-dis.c, tic80-opc.c,
767 v850-dis.c, v850-opc.c, vax-dis.c, w65-dis.c, w65-opc.h,
768 xstormy16-asm.c, xstormy16-desc.c, xstormy16-desc.h,
769 xstormy16-dis.c, xstormy16-ibld.c, xstormy16-opc.c,
770 xstormy16-opc.h, xtensa-dis.c, z8k-dis.c, z8kgen.c
771
772 2005-05-05 James E Wilson <wilson@specifixinc.com>
773
774 * ia64-opc.c: Include sysdep.h before libiberty.h.
775
776 2005-05-05 Nick Clifton <nickc@redhat.com>
777
778 * configure.in (ALL_LINGUAS): Add vi.
779 * configure: Regenerate.
780 * po/vi.po: New.
781
782 2005-04-26 Jerome Guitton <guitton@gnat.com>
783
784 * configure.in: Fix the check for basename declaration.
785 * configure: Regenerate.
786
787 2005-04-19 Alan Modra <amodra@bigpond.net.au>
788
789 * ppc-opc.c (RTO): Define.
790 (powerpc_opcodes <tlbsx, tlbsx., tlbre>): Combine PPC403 and BOOKE
791 entries to suit PPC440.
792
793 2005-04-18 Mark Kettenis <kettenis@gnu.org>
794
795 * i386-dis.c: Insert hyphens into selected VIA PadLock extensions.
796 Add xcrypt-ctr.
797
798 2005-04-14 Nick Clifton <nickc@redhat.com>
799
800 * po/fi.po: New translation: Finnish.
801 * configure.in (ALL_LINGUAS): Add fi.
802 * configure: Regenerate.
803
804 2005-04-14 Alan Modra <amodra@bigpond.net.au>
805
806 * Makefile.am (NO_WERROR): Define.
807 * configure.in: Invoke AM_BINUTILS_WARNINGS.
808 * Makefile.in: Regenerate.
809 * aclocal.m4: Regenerate.
810 * configure: Regenerate.
811
812 2005-04-04 Nick Clifton <nickc@redhat.com>
813
814 * fr30-asm.c: Regenerate.
815 * frv-asm.c: Regenerate.
816 * iq2000-asm.c: Regenerate.
817 * m32r-asm.c: Regenerate.
818 * openrisc-asm.c: Regenerate.
819
820 2005-04-01 Jan Beulich <jbeulich@novell.com>
821
822 * i386-dis.c (PNI_Fixup): Neither mwait nor monitor have any
823 visible operands in Intel mode. The first operand of monitor is
824 %rax in 64-bit mode.
825
826 2005-04-01 Jan Beulich <jbeulich@novell.com>
827
828 * i386-dis.c (INVLPG_Fixup): Decode rdtscp; change code to allow for
829 easier future additions.
830
831 2005-03-31 Jerome Guitton <guitton@gnat.com>
832
833 * configure.in: Check for basename.
834 * configure: Regenerate.
835 * config.in: Ditto.
836
837 2005-03-29 H.J. Lu <hongjiu.lu@intel.com>
838
839 * i386-dis.c (SEG_Fixup): New.
840 (Sv): New.
841 (dis386): Use "Sv" for 0x8c and 0x8e.
842
843 2005-03-21 Jan-Benedict Glaw <jbglaw@lug-owl.de>
844 Nick Clifton <nickc@redhat.com>
845
846 * vax-dis.c: (entry_addr): New varible: An array of user supplied
847 function entry mask addresses.
848 (entry_addr_occupied_slots): New variable: The number of occupied
849 elements in entry_addr.
850 (entry_addr_total_slots): New variable: The total number of
851 elements in entry_addr.
852 (parse_disassembler_options): New function. Fills in the entry_addr
853 array.
854 (free_entry_array): New function. Release the memory used by the
855 entry addr array. Suppressed because there is no way to call it.
856 (is_function_entry): Check if a given address is a function's
857 start address by looking at supplied entry mask addresses and
858 symbol information, if available.
859 (print_insn_vax): Use parse_disassembler_options and is_function_entry.
860
861 2005-03-23 H.J. Lu <hongjiu.lu@intel.com>
862
863 * cris-dis.c (print_with_operands): Use ~31L for long instead
864 of ~31.
865
866 2005-03-20 H.J. Lu <hongjiu.lu@intel.com>
867
868 * mmix-opc.c (O): Revert the last change.
869 (Z): Likewise.
870
871 2005-03-19 H.J. Lu <hongjiu.lu@intel.com>
872
873 * mmix-opc.c (O): Use 24UL instead of 24 for unsigned long.
874 (Z): Likewise.
875
876 2005-03-19 Hans-Peter Nilsson <hp@bitrange.com>
877
878 * mmix-opc.c (O, Z): Force expression as unsigned long.
879
880 2005-03-18 Nick Clifton <nickc@redhat.com>
881
882 * ip2k-asm.c: Regenerate.
883 * op/opcodes.pot: Regenerate.
884
885 2005-03-16 Nick Clifton <nickc@redhat.com>
886 Ben Elliston <bje@au.ibm.com>
887
888 * configure.in (werror): New switch: Add -Werror to the
889 compiler command line. Enabled by default. Disable via
890 --disable-werror.
891 * configure: Regenerate.
892
893 2005-03-16 Alan Modra <amodra@bigpond.net.au>
894
895 * ppc-dis.c (powerpc_dialect): Don't set PPC_OPCODE_ALTIVEC when
896 BOOKE.
897
898 2005-03-15 Alan Modra <amodra@bigpond.net.au>
899
900 * po/es.po: Commit new Spanish translation.
901
902 * po/fr.po: Commit new French translation.
903
904 2005-03-14 Jan-Benedict Glaw <jbglaw@lug-owl.de>
905
906 * vax-dis.c: Fix spelling error
907 (print_insn_vax): Use ".word 0x0012 # Entry mask: r1 r2 >" instead
908 of just "Entry mask: < r1 ... >"
909
910 2005-03-12 Zack Weinberg <zack@codesourcery.com>
911
912 * arm-dis.c (arm_opcodes): Document %E and %V.
913 Add entries for v6T2 ARM instructions:
914 bfc bfi mls strht ldrht ldrsht ldrsbt movw movt rbit ubfx sbfx.
915 (print_insn_arm): Add support for %E and %V.
916 (thumb_opcodes): Add ARMv6K instructions nop, sev, wfe, wfi, yield.
917
918 2005-03-10 Jeff Baker <jbaker@qnx.com>
919 Alan Modra <amodra@bigpond.net.au>
920
921 * ppc-opc.c (insert_sprg, extract_sprg): New Functions.
922 (powerpc_operands <SPRG>): Call the above. Bit field is 5 bits.
923 (SPRG_MASK): Delete.
924 (XSPRG_MASK): Mask off extra bits now part of sprg field.
925 (powerpc_opcodes): Asjust mfsprg and mtsprg to suit new mask. Move
926 mfsprg4..7 after msprg and consolidate.
927
928 2005-03-09 Jan-Benedict Glaw <jbglaw@lug-owl.de>
929
930 * vax-dis.c (entry_mask_bit): New array.
931 (print_insn_vax): Decode function entry mask.
932
933 2005-03-07 Aldy Hernandez <aldyh@redhat.com>
934
935 * ppc-opc.c (powerpc_opcodes): Fix encoding of efscfd.
936
937 2005-03-05 Alan Modra <amodra@bigpond.net.au>
938
939 * po/opcodes.pot: Regenerate.
940
941 2005-03-03 Ramana Radhakrishnan <ramana.radhakrishnan@codito.com>
942
943 * arc-dis.c (a4_decoding_class): New enum.
944 (dsmOneArcInst): Use the enum values for the decoding class.
945 Remove redundant case in the switch for decodingClass value 11.
946
947 2005-03-02 Jan Beulich <jbeulich@novell.com>
948
949 * i386-dis.c (print_insn): Suppress lock prefix printing for cr8...15
950 accesses.
951 (OP_C): Consider lock prefix in non-64-bit modes.
952
953 2005-02-24 Alan Modra <amodra@bigpond.net.au>
954
955 * cris-dis.c (format_hex): Remove ineffective warning fix.
956 * crx-dis.c (make_instruction): Warning fix.
957 * frv-asm.c: Regenerate.
958
959 2005-02-23 Nick Clifton <nickc@redhat.com>
960
961 * cgen-dis.in: Use bfd_byte for buffers that are passed to
962 read_memory.
963
964 * ia64-opc.c (locate_opcode_ent): Initialise opval array.
965
966 * crx-dis.c (make_instruction): Move argument structure into inner
967 scope and ensure that all of its fields are initialised before
968 they are used.
969
970 * fr30-asm.c: Regenerate.
971 * fr30-dis.c: Regenerate.
972 * frv-asm.c: Regenerate.
973 * frv-dis.c: Regenerate.
974 * ip2k-asm.c: Regenerate.
975 * ip2k-dis.c: Regenerate.
976 * iq2000-asm.c: Regenerate.
977 * iq2000-dis.c: Regenerate.
978 * m32r-asm.c: Regenerate.
979 * m32r-dis.c: Regenerate.
980 * openrisc-asm.c: Regenerate.
981 * openrisc-dis.c: Regenerate.
982 * xstormy16-asm.c: Regenerate.
983 * xstormy16-dis.c: Regenerate.
984
985 2005-02-22 Alan Modra <amodra@bigpond.net.au>
986
987 * arc-ext.c: Warning fixes.
988 * arc-ext.h: Likewise.
989 * cgen-opc.c: Likewise.
990 * ia64-gen.c: Likewise.
991 * maxq-dis.c: Likewise.
992 * ns32k-dis.c: Likewise.
993 * w65-dis.c: Likewise.
994 * ia64-asmtab.c: Regenerate.
995
996 2005-02-22 Alan Modra <amodra@bigpond.net.au>
997
998 * fr30-desc.c: Regenerate.
999 * fr30-desc.h: Regenerate.
1000 * fr30-opc.c: Regenerate.
1001 * fr30-opc.h: Regenerate.
1002 * frv-desc.c: Regenerate.
1003 * frv-desc.h: Regenerate.
1004 * frv-opc.c: Regenerate.
1005 * frv-opc.h: Regenerate.
1006 * ip2k-desc.c: Regenerate.
1007 * ip2k-desc.h: Regenerate.
1008 * ip2k-opc.c: Regenerate.
1009 * ip2k-opc.h: Regenerate.
1010 * iq2000-desc.c: Regenerate.
1011 * iq2000-desc.h: Regenerate.
1012 * iq2000-opc.c: Regenerate.
1013 * iq2000-opc.h: Regenerate.
1014 * m32r-desc.c: Regenerate.
1015 * m32r-desc.h: Regenerate.
1016 * m32r-opc.c: Regenerate.
1017 * m32r-opc.h: Regenerate.
1018 * m32r-opinst.c: Regenerate.
1019 * openrisc-desc.c: Regenerate.
1020 * openrisc-desc.h: Regenerate.
1021 * openrisc-opc.c: Regenerate.
1022 * openrisc-opc.h: Regenerate.
1023 * xstormy16-desc.c: Regenerate.
1024 * xstormy16-desc.h: Regenerate.
1025 * xstormy16-opc.c: Regenerate.
1026 * xstormy16-opc.h: Regenerate.
1027
1028 2005-02-21 Alan Modra <amodra@bigpond.net.au>
1029
1030 * Makefile.am: Run "make dep-am"
1031 * Makefile.in: Regenerate.
1032
1033 2005-02-15 Nick Clifton <nickc@redhat.com>
1034
1035 * cgen-dis.in (print_address): Add an ATTRIBUTE_UNUSED to prevent
1036 compile time warnings.
1037 (print_keyword): Likewise.
1038 (default_print_insn): Likewise.
1039
1040 * fr30-desc.c: Regenerated.
1041 * fr30-desc.h: Regenerated.
1042 * fr30-dis.c: Regenerated.
1043 * fr30-opc.c: Regenerated.
1044 * fr30-opc.h: Regenerated.
1045 * frv-desc.c: Regenerated.
1046 * frv-dis.c: Regenerated.
1047 * frv-opc.c: Regenerated.
1048 * ip2k-asm.c: Regenerated.
1049 * ip2k-desc.c: Regenerated.
1050 * ip2k-desc.h: Regenerated.
1051 * ip2k-dis.c: Regenerated.
1052 * ip2k-opc.c: Regenerated.
1053 * ip2k-opc.h: Regenerated.
1054 * iq2000-desc.c: Regenerated.
1055 * iq2000-dis.c: Regenerated.
1056 * iq2000-opc.c: Regenerated.
1057 * m32r-asm.c: Regenerated.
1058 * m32r-desc.c: Regenerated.
1059 * m32r-desc.h: Regenerated.
1060 * m32r-dis.c: Regenerated.
1061 * m32r-opc.c: Regenerated.
1062 * m32r-opc.h: Regenerated.
1063 * m32r-opinst.c: Regenerated.
1064 * openrisc-desc.c: Regenerated.
1065 * openrisc-desc.h: Regenerated.
1066 * openrisc-dis.c: Regenerated.
1067 * openrisc-opc.c: Regenerated.
1068 * openrisc-opc.h: Regenerated.
1069 * xstormy16-desc.c: Regenerated.
1070 * xstormy16-desc.h: Regenerated.
1071 * xstormy16-dis.c: Regenerated.
1072 * xstormy16-opc.c: Regenerated.
1073 * xstormy16-opc.h: Regenerated.
1074
1075 2005-02-14 H.J. Lu <hongjiu.lu@intel.com>
1076
1077 * dis-buf.c (perror_memory): Use sprintf_vma to print out
1078 address.
1079
1080 2005-02-11 Nick Clifton <nickc@redhat.com>
1081
1082 * iq2000-asm.c: Regenerate.
1083
1084 * frv-dis.c: Regenerate.
1085
1086 2005-02-07 Jim Blandy <jimb@redhat.com>
1087
1088 * Makefile.am (CGEN): Load guile.scm before calling the main
1089 application script.
1090 * Makefile.in: Regenerated.
1091 * cgen.sh: Be prepared for the 'cgen' argument to contain spaces.
1092 Simply pass the cgen-opc.scm path to ${cgen} as its first
1093 argument; ${cgen} itself now contains the '-s', or whatever is
1094 appropriate for the Scheme being used.
1095
1096 2005-01-31 Andrew Cagney <cagney@gnu.org>
1097
1098 * configure: Regenerate to track ../gettext.m4.
1099
1100 2005-01-31 Jan Beulich <jbeulich@novell.com>
1101
1102 * ia64-gen.c (NELEMS): Define.
1103 (shrink): Generate alias with missing second predicate register when
1104 opcode has two outputs and these are both predicates.
1105 * ia64-opc-i.c (FULL17): Define.
1106 (ia64_opcodes_i): Add mov-to-pr alias without second input. Use FULL17
1107 here to generate output template.
1108 (TBITCM, TNATCM): Undefine after use.
1109 * ia64-opc-m.c (ia64_opcodes_i): Add alloc alias without ar.pfs as
1110 first input. Add ld16 aliases without ar.csd as second output. Add
1111 st16 aliases without ar.csd as second input. Add cmpxchg aliases
1112 without ar.ccv as third input. Add cmp8xchg16 aliases without ar.csd/
1113 ar.ccv as third/fourth inputs. Consolidate through...
1114 (CMPXCHG_acq, CMPXCHG_rel, CMPXCHG_1, CMPXCHG_2, CMPXCHG_4, CMPXCHG_8,
1115 CMPXCHGn, CMP8XCHG16, CMPXCHG_ALL): Define.
1116 * ia64-asmtab.c: Regenerate.
1117
1118 2005-01-27 Andrew Cagney <cagney@gnu.org>
1119
1120 * configure: Regenerate to track ../gettext.m4 change.
1121
1122 2005-01-25 Alexandre Oliva <aoliva@redhat.com>
1123
1124 2004-11-10 Alexandre Oliva <aoliva@redhat.com>
1125 * frv-asm.c: Rebuilt.
1126 * frv-desc.c: Rebuilt.
1127 * frv-desc.h: Rebuilt.
1128 * frv-dis.c: Rebuilt.
1129 * frv-ibld.c: Rebuilt.
1130 * frv-opc.c: Rebuilt.
1131 * frv-opc.h: Rebuilt.
1132
1133 2005-01-24 Andrew Cagney <cagney@gnu.org>
1134
1135 * configure: Regenerate, ../gettext.m4 was updated.
1136
1137 2005-01-21 Fred Fish <fnf@specifixinc.com>
1138
1139 * mips-opc.c: Change INSN_ALIAS to INSN2_ALIAS.
1140 Change INSN_WRITE_MDMX_ACC to INSN2_WRITE_MDMX_ACC.
1141 Change INSN_READ_MDMX_ACC to INSN2_READ_MDMX_ACC.
1142 * mips-dis.c: Ditto.
1143
1144 2005-01-20 Alan Modra <amodra@bigpond.net.au>
1145
1146 * ppc-opc.c (powerpc_opcodes): Add optional 'l' arg to tlbiel.
1147
1148 2005-01-19 Fred Fish <fnf@specifixinc.com>
1149
1150 * mips-dis.c (no_aliases): New disassembly option flag.
1151 (set_default_mips_dis_options): Init no_aliases to zero.
1152 (parse_mips_dis_option): Handle no-aliases option.
1153 (print_insn_mips): Ignore table entries that are aliases
1154 if no_aliases is set.
1155 (print_insn_mips16): Ditto.
1156 * mips-opc.c (mips_builtin_opcodes): Add initializer column for
1157 new pinfo2 member and add INSN_ALIAS initializers as needed. Also
1158 move WR_MACC and RD_MACC initializers from pinfo to pinfo2.
1159 * mips16-opc.c (mips16_opcodes): Ditto.
1160
1161 2005-01-17 Andrew Stubbs <andrew.stubbs@st.com>
1162
1163 * sh-opc.h (arch_sh2a_or_sh3e,arch_sh2a_or_sh4): Correct definition.
1164 (inheritance diagram): Add missing edge.
1165 (arch_sh1_up): Rename arch_sh_up to match external name to make life
1166 easier for the testsuite.
1167 (arch_sh4_nofp_up): Likewise, rename arch_sh4_nofpu_up.
1168 (arch_sh4a_nofp_up): Likewise, rename arch_sh4a_nofpu_up.
1169 (arch_sh2a_nofpu_or_sh4_nommu_nofpu_up): Add missing
1170 arch_sh2a_or_sh4_up child.
1171 (sh_table): Do renaming as above.
1172 Correct comment for ldc.l for gas testsuite to read.
1173 Remove rogue mul.l from sh1 (duplicate of the one for sh2).
1174 Correct comments for movy.w and movy.l for gas testsuite to read.
1175 Correct comments for fmov.d and fmov.s for gas testsuite to read.
1176
1177 2005-01-12 H.J. Lu <hongjiu.lu@intel.com>
1178
1179 * i386-dis.c (OP_E): Don't ignore scale in SIB for 64 bit mode.
1180
1181 2005-01-12 H.J. Lu <hongjiu.lu@intel.com>
1182
1183 * i386-dis.c (OP_E): Ignore scale when index == 0x4 in SIB.
1184
1185 2005-01-10 Andreas Schwab <schwab@suse.de>
1186
1187 * disassemble.c (disassemble_init_for_target) <case
1188 bfd_arch_ia64>: Set skip_zeroes to 16.
1189 <case bfd_arch_tic4x>: Set skip_zeroes to 32.
1190
1191 2004-12-23 Tomer Levi <Tomer.Levi@nsc.com>
1192
1193 * crx-opc.c: Mark 'bcop' instruction as RELAXABLE.
1194
1195 2004-12-14 Svein E. Seldal <Svein.Seldal@solidas.com>
1196
1197 * avr-dis.c: Prettyprint. Added printing of symbol names in all
1198 memory references. Convert avr_operand() to C90 formatting.
1199
1200 2004-12-05 Tomer Levi <Tomer.Levi@nsc.com>
1201
1202 * crx-dis.c (print_arg): Use 'info->print_address_func' for address printing.
1203
1204 2004-11-29 Tomer Levi <Tomer.Levi@nsc.com>
1205
1206 * crx-opc.c (crx_optab): Mark all rbase_disps* operands as signed.
1207 (no_op_insn): Initialize array with instructions that have no
1208 operands.
1209 * crx-dis.c (make_instruction): Get rid of COP_BRANCH_INS operand swapping.
1210
1211 2004-11-29 Richard Earnshaw <rearnsha@arm.com>
1212
1213 * arm-dis.c: Correct top-level comment.
1214
1215 2004-11-27 Richard Earnshaw <rearnsha@arm.com>
1216
1217 * arm-opc.h (arm_opcode, thumb_opcode): Add extra field for the
1218 architecuture defining the insn.
1219 (arm_opcodes, thumb_opcodes): Delete. Move to ...
1220 * arm-dis.c (arm_opcodes, thumb_opcodes): Here. Add architecutre
1221 field.
1222 Also include opcode/arm.h.
1223 * Makefile.am (arm-dis.lo): Update dependency list.
1224 * Makefile.in: Regenerate.
1225
1226 2004-11-22 Ravi Ramaseshan <ravi.ramaseshan@codito.com>
1227
1228 * opcode/arc-opc.c (insert_base): Modify ls_operand[LS_OFFSET] to
1229 reflect the change to the short immediate syntax.
1230
1231 2004-11-19 Alan Modra <amodra@bigpond.net.au>
1232
1233 * or32-opc.c (debug): Warning fix.
1234 * po/POTFILES.in: Regenerate.
1235
1236 * maxq-dis.c: Formatting.
1237 (print_insn): Warning fix.
1238
1239 2004-11-17 Daniel Jacobowitz <dan@codesourcery.com>
1240
1241 * arm-dis.c (WORD_ADDRESS): Define.
1242 (print_insn): Use it. Correct big-endian end-of-section handling.
1243
1244 2004-11-08 Inderpreet Singh <inderpreetb@nioda.hcltech.com>
1245 Vineet Sharma <vineets@noida.hcltech.com>
1246
1247 * maxq-dis.c: New file.
1248 * disassemble.c (ARCH_maxq): Define.
1249 (disassembler): Add 'print_insn_maxq_little' for handling maxq
1250 instructions..
1251 * configure.in: Add case for bfd_maxq_arch.
1252 * configure: Regenerate.
1253 * Makefile.am: Add support for maxq-dis.c
1254 * Makefile.in: Regenerate.
1255 * aclocal.m4: Regenerate.
1256
1257 2004-11-05 Tomer Levi <Tomer.Levi@nsc.com>
1258
1259 * crx-opc.c (crx_optab): Rename 'arg_icr' to 'arg_idxr' for Index register
1260 mode.
1261 * crx-dis.c: Likewise.
1262
1263 2004-11-04 Hans-Peter Nilsson <hp@axis.com>
1264
1265 Generally, handle CRISv32.
1266 * cris-dis.c (TRACE_CASE): Define as (disdata->trace_case).
1267 (struct cris_disasm_data): New type.
1268 (format_reg, format_hex, cris_constraint, print_flags)
1269 (get_opcode_entry): Add struct cris_disasm_data * parameter. All
1270 callers changed.
1271 (format_sup_reg, print_insn_crisv32_with_register_prefix)
1272 (print_insn_crisv32_without_register_prefix)
1273 (print_insn_crisv10_v32_with_register_prefix)
1274 (print_insn_crisv10_v32_without_register_prefix)
1275 (cris_parse_disassembler_options): New functions.
1276 (bytes_to_skip, cris_spec_reg): Add enum cris_disass_family
1277 parameter. All callers changed.
1278 (get_opcode_entry): Call malloc, not xmalloc. Return NULL on
1279 failure.
1280 (cris_constraint) <case 'Y', 'U'>: New cases.
1281 (bytes_to_skip): Handle 'Y' and 'N' as 's'. Skip size is 4 bytes
1282 for constraint 'n'.
1283 (print_with_operands) <case 'Y'>: New case.
1284 (print_with_operands) <case 'T', 'A', '[', ']', 'd', 'n', 'u'>
1285 <case 'N', 'Y', 'Q'>: New cases.
1286 (print_insn_cris_generic): Emit "bcc ." for zero and CRISv32.
1287 (print_insn_cris_with_register_prefix)
1288 (print_insn_cris_without_register_prefix): Call
1289 cris_parse_disassembler_options.
1290 * cris-opc.c (cris_spec_regs): Mention that this table isn't used
1291 for CRISv32 and the size of immediate operands. New v32-only
1292 entries for bz, pid, srs, wz, exs, eda, dz, ebp, erp, nrp, ccs and
1293 spc. Add v32-only 4-byte entries for p2, p3, p5 and p6. Change
1294 ccr, ibr, irp to be v0..v10. Change bar, dccr to be v8..v10.
1295 Change brp to be v3..v10.
1296 (cris_support_regs): New vector.
1297 (cris_opcodes): Update head comment. New format characters '[',
1298 ']', space, 'A', 'd', 'N', 'n', 'Q', 'T', 'u', 'U', 'Y'.
1299 Add new opcodes for v32 and adjust existing opcodes to accommodate
1300 differences to earlier variants.
1301 (cris_cond15s): New vector.
1302
1303 2004-11-04 Jan Beulich <jbeulich@novell.com>
1304
1305 * i386-dis.c (Eq, Edqw, indirEp, Gdq, I1): Define.
1306 (indirEb): Remove.
1307 (Mp): Use f_mode rather than none at all.
1308 (t_mode, dq_mode, dqw_mode, f_mode, const_1_mode): Define. t_mode
1309 replaces what previously was x_mode; x_mode now means 128-bit SSE
1310 operands.
1311 (dis386): Make far jumps and calls have an 'l' prefix only in AT&T
1312 mode. movmskpX's, pextrw's, and pmovmskb's first operands are Gdq.
1313 pinsrw's second operand is Edqw.
1314 (grps): 1-bit shifts' and rotates' second operands are I1. cmpxchg8b's
1315 operand is Eq. movntq's and movntdq's first operands are EM. s[gi]dt,
1316 fldenv, frstor, fsave, fstenv all should also have suffixes in Intel
1317 mode when an operand size override is present or always suffixing.
1318 More instructions will need to be added to this group.
1319 (putop): Handle new macro chars 'C' (short/long suffix selector),
1320 'I' (Intel mode override for following macro char), and 'J' (for
1321 adding the 'l' prefix to far branches in AT&T mode). When an
1322 alternative was specified in the template, honor macro character when
1323 specified for Intel mode.
1324 (OP_E): Handle new *_mode values. Correct pointer specifications for
1325 memory operands. Consolidate output of index register.
1326 (OP_G): Handle new *_mode values.
1327 (OP_I): Handle const_1_mode.
1328 (OP_ESreg, OP_DSreg): Generate pointer specifications. Indicate
1329 respective opcode prefix bits have been consumed.
1330 (OP_EM, OP_EX): Provide some default handling for generating pointer
1331 specifications.
1332
1333 2004-10-28 Tomer Levi <Tomer.Levi@nsc.com>
1334
1335 * crx-opc.c (REV_COP_INST): New macro, reverse operand order of
1336 COP_INST macro.
1337
1338 2004-10-27 Tomer Levi <Tomer.Levi@nsc.com>
1339
1340 * crx-dis.c (enum REG_ARG_TYPE): New, replacing COP_ARG_TYPE.
1341 (getregliststring): Support HI/LO and user registers.
1342 * crx-opc.c (crx_instruction): Update data structure according to the
1343 rearrangement done in CRX opcode header file.
1344 (crx_regtab): Likewise.
1345 (crx_optab): Likewise.
1346 (crx_instruction): Reorder load/stor instructions, remove unsupported
1347 formats.
1348 support new Co-Processor instruction 'cpi'.
1349
1350 2004-10-27 Nick Clifton <nickc@redhat.com>
1351
1352 * opcodes/iq2000-asm.c: Regenerate.
1353 * opcodes/iq2000-desc.c: Regenerate.
1354 * opcodes/iq2000-desc.h: Regenerate.
1355 * opcodes/iq2000-dis.c: Regenerate.
1356 * opcodes/iq2000-ibld.c: Regenerate.
1357 * opcodes/iq2000-opc.c: Regenerate.
1358 * opcodes/iq2000-opc.h: Regenerate.
1359
1360 2004-10-21 Tomer Levi <Tomer.Levi@nsc.com>
1361
1362 * crx-opc.c (crx_instruction): Replace i3, i4, i5 with us3,
1363 us4, us5 (respectively).
1364 Remove unsupported 'popa' instruction.
1365 Reverse operands order in store co-processor instructions.
1366
1367 2004-10-15 Alan Modra <amodra@bigpond.net.au>
1368
1369 * Makefile.am: Run "make dep-am"
1370 * Makefile.in: Regenerate.
1371
1372 2004-10-12 Bob Wilson <bob.wilson@acm.org>
1373
1374 * xtensa-dis.c: Use ISO C90 formatting.
1375
1376 2004-10-09 Alan Modra <amodra@bigpond.net.au>
1377
1378 * ppc-opc.c: Revert 2004-09-09 change.
1379
1380 2004-10-07 Bob Wilson <bob.wilson@acm.org>
1381
1382 * xtensa-dis.c (state_names): Delete.
1383 (fetch_data): Use xtensa_isa_maxlength.
1384 (print_xtensa_operand): Replace operand parameter with opcode/operand
1385 pair. Remove print_sr_name parameter. Use new xtensa-isa.h functions.
1386 (print_insn_xtensa): Use new xtensa-isa.h functions. Handle multislot
1387 instruction bundles. Use xmalloc instead of malloc.
1388
1389 2004-10-07 David Gibson <david@gibson.dropbear.id.au>
1390
1391 * ppc-opc.c: Replace literal "0"s with NULLs in pointer
1392 initializers.
1393
1394 2004-10-07 Tomer Levi <Tomer.Levi@nsc.com>
1395
1396 * crx-opc.c (crx_instruction): Support Co-processor insns.
1397 * crx-dis.c (COP_ARG_TYPE): New enum for CO-Processor arguments.
1398 (getregliststring): Change function to use the above enum.
1399 (print_arg): Handle CO-Processor insns.
1400 (crx_cinvs): Add 'b' option to invalidate the branch-target
1401 cache.
1402
1403 2004-10-06 Aldy Hernandez <aldyh@redhat.com>
1404
1405 * ppc-opc.c (powerpc_opcodes): Add efscfd, efdabs, efdnabs,
1406 efdneg, efdadd, efdsub, efdmul, efddiv, efdcmpgt, efdcmplt,
1407 efdcmpeq, efdtstgt, efdtstlt, efdtsteq, efdcfsi, efdcfsid,
1408 efdcfui, efdcfuid, efdcfsf, efdcfuf, efdctsi, efdctsidz, efdctsiz,
1409 efdctui, efdctuidz, efdctuiz, efdctsf, efdctuf, efdctuf, efdcfs.
1410
1411 2004-10-01 Bill Farmer <Bill@the-farmers.freeserve.co.uk>
1412
1413 * pdp11-dis.c (print_insn_pdp11): Subtract the SOB's displacement
1414 rather than add it.
1415
1416 2004-09-30 Paul Brook <paul@codesourcery.com>
1417
1418 * arm-dis.c (print_insn_arm): Handle 'e' for SMI instruction.
1419 * arm-opc.h: Document %e. Add ARMv6ZK instructions.
1420
1421 2004-09-17 H.J. Lu <hongjiu.lu@intel.com>
1422
1423 * Makefile.am (AUTOMAKE_OPTIONS): Require 1.9.
1424 (CONFIG_STATUS_DEPENDENCIES): New.
1425 (Makefile): Removed.
1426 (config.status): Likewise.
1427 * Makefile.in: Regenerated.
1428
1429 2004-09-17 Alan Modra <amodra@bigpond.net.au>
1430
1431 * Makefile.am: Run "make dep-am".
1432 * Makefile.in: Regenerate.
1433 * aclocal.m4: Regenerate.
1434 * configure: Regenerate.
1435 * po/POTFILES.in: Regenerate.
1436 * po/opcodes.pot: Regenerate.
1437
1438 2004-09-11 Andreas Schwab <schwab@suse.de>
1439
1440 * configure: Rebuild.
1441
1442 2004-09-09 Segher Boessenkool <segher@kernel.crashing.org>
1443
1444 * ppc-opc.c (L): Make this field not optional.
1445
1446 2004-09-03 Tomer Levi <Tomer.Levi@nsc.com>
1447
1448 * opc-crx.c: Rename 'popma' to 'popa', remove 'pushma'.
1449 Fix parameter to 'm[t|f]csr' insns.
1450
1451 2004-08-30 Nathanael Nerode <neroden@gcc.gnu.org>
1452
1453 * configure.in: Autoupdate to autoconf 2.59.
1454 * aclocal.m4: Rebuild with aclocal 1.4p6.
1455 * configure: Rebuild with autoconf 2.59.
1456 * Makefile.in: Rebuild with automake 1.4p6 (picking up
1457 bfd changes for autoconf 2.59 on the way).
1458 * config.in: Rebuild with autoheader 2.59.
1459
1460 2004-08-27 Richard Sandiford <rsandifo@redhat.com>
1461
1462 * frv-desc.[ch], frv-opc.[ch]: Regenerated.
1463
1464 2004-07-30 Michal Ludvig <mludvig@suse.cz>
1465
1466 * i386-dis.c (GRPPADLCK): Renamed to GRPPADLCK1
1467 (GRPPADLCK2): New define.
1468 (twobyte_has_modrm): True for 0xA6.
1469 (grps): GRPPADLCK2 for opcode 0xA6.
1470
1471 2004-07-29 Alexandre Oliva <aoliva@redhat.com>
1472
1473 Introduce SH2a support.
1474 * sh-opc.h (arch_sh2a_base): Renumber.
1475 (arch_sh2a_nofpu_base): Remove.
1476 (arch_sh_base_mask): Adjust.
1477 (arch_opann_mask): New.
1478 (arch_sh2a, arch_sh2a_nofpu): Adjust.
1479 (arch_sh2a_up, arch_sh2a_nofpu_up): Likewise.
1480 (sh_table): Adjust whitespace.
1481 2004-02-24 Corinna Vinschen <vinschen@redhat.com>
1482 * sh-opc.h (arch_sh2a_nofpu_up): New. Use instead of arch_sh2a_up in
1483 instruction list throughout.
1484 (arch_sh2a_up): Redefine to include fpu instruction set. Use instead
1485 of arch_sh2a in instruction list throughout.
1486 (arch_sh2e_up): Accomodate above changes.
1487 (arch_sh2_up): Ditto.
1488 2004-02-20 Corinna Vinschen <vinschen@redhat.com>
1489 * sh-opc.h: Add arch_sh2a_nofpu to arch_sh2_up.
1490 2004-02-18 Corinna Vinschen <vinschen@redhat.com>
1491 * sh-dis.c (print_insn_sh): Add bfd_mach_sh2a_nofpu handling.
1492 * sh-opc.h (arch_sh2a_nofpu): New.
1493 (arch_sh2a_up): New, defines sh2a and sh2a_nofpu.
1494 (sh_table): Change all arch_sh2a to arch_sh2a_up unless FPU
1495 instruction.
1496 2004-01-20 DJ Delorie <dj@redhat.com>
1497 * sh-dis.c (print_insn_sh): SH2A does not have 'X' fp regs.
1498 2003-12-29 DJ Delorie <dj@redhat.com>
1499 * sh-opc.c (sh_nibble_type, sh_arg_type, arch_2a, arch_2e_up,
1500 sh_opcode_info, sh_table): Add sh2a support.
1501 (arch_op32): New, to tag 32-bit opcodes.
1502 * sh-dis.c (print_insn_sh): Support sh2a opcodes.
1503 2003-12-02 Michael Snyder <msnyder@redhat.com>
1504 * sh-opc.h (arch_sh2a): Add.
1505 * sh-dis.c (arch_sh2a): Handle.
1506 * sh-opc.h (arch_sh2_up): Fix up to include arch_sh2a.
1507
1508 2004-07-27 Tomer Levi <Tomer.Levi@nsc.com>
1509
1510 * crx-opc.c: Add popx,pushx insns. Indent code, fix comments.
1511
1512 2004-07-22 Nick Clifton <nickc@redhat.com>
1513
1514 PR/280
1515 * h8300-dis.c (bfd_h8_disassemble): Do not dump raw bytes for the
1516 insns - this is done by objdump itself.
1517 * h8500-dis.c (print_insn_h8500): Likewise.
1518
1519 2004-07-21 Jan Beulich <jbeulich@novell.com>
1520
1521 * i386-dis.c (OP_E): Show rip-relative addressing in 64-bit mode
1522 regardless of address size prefix in effect.
1523 (ptr_reg): Size or address registers does not depend on rex64, but
1524 on the presence of an address size override.
1525 (OP_MMX): Use rex.x only for xmm registers.
1526 (OP_EM): Use rex.z only for xmm registers.
1527
1528 2004-07-20 Maciej W. Rozycki <macro@linux-mips.org>
1529
1530 * mips-opc.c (mips_builtin_opcodes): Move coprocessor 2
1531 move/branch operations to the bottom so that VR5400 multimedia
1532 instructions take precedence in disassembly.
1533
1534 2004-07-20 Maciej W. Rozycki <macro@linux-mips.org>
1535
1536 * mips-opc.c (mips_builtin_opcodes): Remove the MIPS32
1537 ISA-specific "break" encoding.
1538
1539 2004-07-13 Elvis Chiang <elvisfb@gmail.com>
1540
1541 * arm-opc.h: Fix typo in comment.
1542
1543 2004-07-11 Andreas Schwab <schwab@suse.de>
1544
1545 * m68k-dis.c (m68k_valid_ea): Fix typos in last change.
1546
1547 2004-07-09 Andreas Schwab <schwab@suse.de>
1548
1549 * m68k-dis.c (m68k_valid_ea): Check validity of all codes.
1550
1551 2004-07-07 Tomer Levi <Tomer.Levi@nsc.com>
1552
1553 * Makefile.am (CFILES): Add crx-dis.c, crx-opc.c.
1554 (ALL_MACHINES): Add crx-dis.lo, crx-opc.lo.
1555 (crx-dis.lo): New target.
1556 (crx-opc.lo): Likewise.
1557 * Makefile.in: Regenerate.
1558 * configure.in: Handle bfd_crx_arch.
1559 * configure: Regenerate.
1560 * crx-dis.c: New file.
1561 * crx-opc.c: New file.
1562 * disassemble.c (ARCH_crx): Define.
1563 (disassembler): Handle ARCH_crx.
1564
1565 2004-06-29 James E Wilson <wilson@specifixinc.com>
1566
1567 * ia64-opc-a.c (ia64_opcodes_a): Delete mov immediate pseudo for adds.
1568 * ia64-asmtab.c: Regnerate.
1569
1570 2004-06-28 Alan Modra <amodra@bigpond.net.au>
1571
1572 * ppc-opc.c (insert_fxm): Handle mfocrf and mtocrf.
1573 (extract_fxm): Don't test dialect.
1574 (XFXFXM_MASK): Include the power4 bit.
1575 (XFXM): Add p4 param.
1576 (powerpc_opcodes): Add mfocrf and mtocrf. Adjust mtcr.
1577
1578 2004-06-27 Alexandre Oliva <aoliva@redhat.com>
1579
1580 2003-07-21 Richard Sandiford <rsandifo@redhat.com>
1581 * disassemble.c (disassembler): Handle bfd_mach_h8300sxn.
1582
1583 2004-06-26 Alan Modra <amodra@bigpond.net.au>
1584
1585 * ppc-opc.c (BH, XLBH_MASK): Define.
1586 (powerpc_opcodes): Allow BH field on bclr, bclrl, bcctr, bcctrl.
1587
1588 2004-06-24 Alan Modra <amodra@bigpond.net.au>
1589
1590 * i386-dis.c (x_mode): Comment.
1591 (two_source_ops): File scope.
1592 (float_mem): Correct fisttpll and fistpll.
1593 (float_mem_mode): New table.
1594 (dofloat): Use it.
1595 (OP_E): Correct intel mode PTR output.
1596 (ptr_reg): Use open_char and close_char.
1597 (PNI_Fixup): Handle possible suffix on sidt. Use op1out etc. for
1598 operands. Set two_source_ops.
1599
1600 2004-06-15 Alan Modra <amodra@bigpond.net.au>
1601
1602 * arc-ext.c (build_ARC_extmap): Use bfd_get_section_size
1603 instead of _raw_size.
1604
1605 2004-06-08 Jakub Jelinek <jakub@redhat.com>
1606
1607 * ia64-gen.c (in_iclass): Handle more postinc st
1608 and ld variants.
1609 * ia64-asmtab.c: Rebuilt.
1610
1611 2004-06-01 Martin Schwidefsky <schwidefsky@de.ibm.com>
1612
1613 * s390-opc.txt: Correct architecture mask for some opcodes.
1614 lrv, lrvh, strv, ml, dl, alc, slb rll and mvclu are available
1615 in the esa mode as well.
1616
1617 2004-05-28 Andrew Stubbs <andrew.stubbs@superh.com>
1618
1619 * sh-dis.c (target_arch): Make unsigned.
1620 (print_insn_sh): Replace (most of) switch with a call to
1621 sh_get_arch_from_bfd_mach(). Also use new architecture flags system.
1622 * sh-opc.h: Redefine architecture flags values.
1623 Add sh3-nommu architecture.
1624 Reorganise <arch>_up macros so they make more visual sense.
1625 (SH_MERGE_ARCH_SET): Define new macro.
1626 (SH_VALID_BASE_ARCH_SET): Likewise.
1627 (SH_VALID_MMU_ARCH_SET): Likewise.
1628 (SH_VALID_CO_ARCH_SET): Likewise.
1629 (SH_VALID_ARCH_SET): Likewise.
1630 (SH_MERGE_ARCH_SET_VALID): Likewise.
1631 (SH_ARCH_SET_HAS_FPU): Likewise.
1632 (SH_ARCH_SET_HAS_DSP): Likewise.
1633 (SH_ARCH_UNKNOWN_ARCH): Likewise.
1634 (sh_get_arch_from_bfd_mach): Add prototype.
1635 (sh_get_arch_up_from_bfd_mach): Likewise.
1636 (sh_get_bfd_mach_from_arch_set): Likewise.
1637 (sh_merge_bfd_arc): Likewise.
1638
1639 2004-05-24 Peter Barada <peter@the-baradas.com>
1640
1641 * m68k-dis.c(print_insn_m68k): Strip body of diassembly out
1642 into new match_insn_m68k function. Loop over canidate
1643 matches and select first that completely matches.
1644 * m68k-dis.c(print_insn_arg): Fix 'g' case to only extract 1 bit.
1645 * m68k-dis.c(print_insn_arg): Call new function m68k_valid_ea
1646 to verify addressing for MAC/EMAC.
1647 * m68k-dis.c(print_insn_arg): Use reg_half_names for MAC/EMAC
1648 reigster halves since 'fpu' and 'spl' look misleading.
1649 * m68k-dis.c(fetch_arg): Fix 'G', 'H', 'I', 'f', 'M', 'N' cases.
1650 * m68k-opc.c: Rearragne mac/emac cases to use longest for
1651 first, tighten up match masks.
1652 * m68k-opc.c: Add 'size' field to struct m68k_opcode. Produce
1653 'size' from special case code in print_insn_m68k to
1654 determine decode size of insns.
1655
1656 2004-05-19 Alan Modra <amodra@bigpond.net.au>
1657
1658 * ppc-opc.c (insert_fxm): Enable two operand mfcr when -many as
1659 well as when -mpower4.
1660
1661 2004-05-13 Nick Clifton <nickc@redhat.com>
1662
1663 * po/fr.po: Updated French translation.
1664
1665 2004-05-05 Peter Barada <peter@the-baradas.com>
1666
1667 * m68k-dis.c(print_insn_m68k): Add new chips, use core
1668 variants in arch_mask. Only set m68881/68851 for 68k chips.
1669 * m68k-op.c: Switch from ColdFire chips to core variants.
1670
1671 2004-05-05 Alan Modra <amodra@bigpond.net.au>
1672
1673 PR 147.
1674 * ppc-opc.c (PPCVEC): Remove PPC_OPCODE_PPC.
1675
1676 2004-04-29 Ben Elliston <bje@au.ibm.com>
1677
1678 * ppc-opc.c (XCMPL): Renmame to XOPL. Update users.
1679 (powerpc_opcodes): Add "dbczl" instruction for PPC970.
1680
1681 2004-04-22 Kaz Kojima <kkojima@rr.iij4u.or.jp>
1682
1683 * sh-dis.c (print_insn_sh): Print the value in constant pool
1684 as a symbol if it looks like a symbol.
1685
1686 2004-04-22 Peter Barada <peter@the-baradas.com>
1687
1688 * m68k-dis.c(print_insn_m68k): Set mfcmac/mcfemac on
1689 appropriate ColdFire architectures.
1690 (print_insn_m68k): Handle EMAC, MAC/EMAC scalefactor, and MAC/EMAC
1691 mask addressing.
1692 Add EMAC instructions, fix MAC instructions. Remove
1693 macmw/macml/msacmw/msacml instructions since mask addressing now
1694 supported.
1695
1696 2004-04-20 Jakub Jelinek <jakub@redhat.com>
1697
1698 * sparc-opc.c (fmoviccx, fmovfccx, fmovccx): Define.
1699 (fmovicc, fmovfcc, fmovcc): Remove fpsize argument, change opcode to
1700 suffix. Use fmov*x macros, create all 3 fpsize variants in one
1701 macro. Adjust all users.
1702
1703 2004-04-15 Anil Paranjpe <anilp1@kpitcummins.com>
1704
1705 * h8300-dis.c (bfd_h8_disassemble) : Treat "adds" & "subs"
1706 separately.
1707
1708 2004-03-30 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
1709
1710 * m32r-asm.c: Regenerate.
1711
1712 2004-03-29 Stan Shebs <shebs@apple.com>
1713
1714 * mpw-config.in, mpw-make.sed: Remove MPW support files, no longer
1715 used.
1716
1717 2004-03-19 Alan Modra <amodra@bigpond.net.au>
1718
1719 * aclocal.m4: Regenerate.
1720 * config.in: Regenerate.
1721 * configure: Regenerate.
1722 * po/POTFILES.in: Regenerate.
1723 * po/opcodes.pot: Regenerate.
1724
1725 2004-03-16 Alan Modra <amodra@bigpond.net.au>
1726
1727 * ppc-dis.c (print_insn_powerpc): Don't print tabs. Handle
1728 PPC_OPERANDS_GPR_0.
1729 * ppc-opc.c (RA0): Define.
1730 (RAQ, RAL, RAM, RAS, RSQ, RTQ, RSO): Use PPC_OPERAND_GPR_0.
1731 (RAOPT): Rename from RAO. Update all uses.
1732 (powerpc_opcodes): Use RA0 as appropriate.
1733
1734 2004-03-15 Aldy Hernandez <aldyh@redhat.com>
1735
1736 * ppc-opc.c (powerpc_opcodes): Add BOOKE versions of mfsprg.
1737
1738 2004-03-15 Alan Modra <amodra@bigpond.net.au>
1739
1740 * sparc-dis.c (print_insn_sparc): Update getword prototype.
1741
1742 2004-03-12 Michal Ludvig <mludvig@suse.cz>
1743
1744 * i386-dis.c (GRPPLOCK): Delete.
1745 (grps): Delete GRPPLOCK entry.
1746
1747 2004-03-12 Alan Modra <amodra@bigpond.net.au>
1748
1749 * i386-dis.c (OP_M, OP_0f0e, OP_0fae, NOP_Fixup): New functions.
1750 (M, Mp): Use OP_M.
1751 (None, PADLOCK_SPECIAL, PADLOCK_0): Delete.
1752 (GRPPADLCK): Define.
1753 (dis386): Use NOP_Fixup on "nop".
1754 (dis386_twobyte): Use GRPPADLCK on opcode 0xa7.
1755 (twobyte_has_modrm): Set for 0xa7.
1756 (padlock_table): Delete. Move to..
1757 (grps): ..here, using OP_0f07. Use OP_Ofae on lfence, mfence
1758 and clflush.
1759 (print_insn): Revert PADLOCK_SPECIAL code.
1760 (OP_E): Delete sfence, lfence, mfence checks.
1761
1762 2004-03-12 Jakub Jelinek <jakub@redhat.com>
1763
1764 * i386-dis.c (grps): Use INVLPG_Fixup instead of OP_E for invlpg.
1765 (INVLPG_Fixup): New function.
1766 (PNI_Fixup): Remove ATTRIBUTE_UNUSED from sizeflag.
1767
1768 2004-03-12 Michal Ludvig <mludvig@suse.cz>
1769
1770 * i386-dis.c (PADLOCK_SPECIAL, PADLOCK_0): New defines.
1771 (dis386_twobyte): Opcode 0xa7 is PADLOCK_0.
1772 (padlock_table): New struct with PadLock instructions.
1773 (print_insn): Handle PADLOCK_SPECIAL.
1774
1775 2004-03-12 Alan Modra <amodra@bigpond.net.au>
1776
1777 * i386-dis.c (grps): Use clflush by default for 0x0fae/7.
1778 (OP_E): Twiddle clflush to sfence here.
1779
1780 2004-03-08 Nick Clifton <nickc@redhat.com>
1781
1782 * po/de.po: Updated German translation.
1783
1784 2003-03-03 Andrew Stubbs <andrew.stubbs@superh.com>
1785
1786 * sh-dis.c (print_insn_sh): Don't disassemble fp instructions in
1787 nofpu mode. Add BFD type bfd_mach_sh4_nommu_nofpu.
1788 * sh-opc.h: Add sh4_nommu_nofpu architecture and adjust instructions
1789 accordingly.
1790
1791 2004-03-01 Richard Sandiford <rsandifo@redhat.com>
1792
1793 * frv-asm.c: Regenerate.
1794 * frv-desc.c: Regenerate.
1795 * frv-desc.h: Regenerate.
1796 * frv-dis.c: Regenerate.
1797 * frv-ibld.c: Regenerate.
1798 * frv-opc.c: Regenerate.
1799 * frv-opc.h: Regenerate.
1800
1801 2004-03-01 Richard Sandiford <rsandifo@redhat.com>
1802
1803 * frv-desc.c, frv-opc.c: Regenerate.
1804
1805 2004-03-01 Richard Sandiford <rsandifo@redhat.com>
1806
1807 * frv-desc.c, frv-opc.c, frv-opc.h: Regenerate.
1808
1809 2004-02-26 Andrew Stubbs <andrew.stubbs@superh.com>
1810
1811 * sh-opc.h: Move fsca and fsrra instructions from sh4a to sh4.
1812 Also correct mistake in the comment.
1813
1814 2004-02-26 Andrew Stubbs <andrew.stubbs@superh.com>
1815
1816 * sh-dis.c (print_insn_sh): Add REG_N_D nibble type to
1817 ensure that double registers have even numbers.
1818 Add REG_N_B01 for nn01 (binary 01) nibble to ensure
1819 that reserved instruction 0xfffd does not decode the same
1820 as 0xfdfd (ftrv).
1821 * sh-opc.h: Add REG_N_D nibble type and use it whereever
1822 REG_N refers to a double register.
1823 Add REG_N_B01 nibble type and use it instead of REG_NM
1824 in ftrv.
1825 Adjust the bit patterns in a few comments.
1826
1827 2004-02-25 Aldy Hernandez <aldyh@redhat.com>
1828
1829 * ppc-opc.c (powerpc_opcodes): Change mask for dcbt and dcbtst.
1830
1831 2004-02-20 Aldy Hernandez <aldyh@redhat.com>
1832
1833 * ppc-opc.c (powerpc_opcodes): Move mfmcsrr0 before mfdc_dat.
1834
1835 2004-02-20 Aldy Hernandez <aldyh@redhat.com>
1836
1837 * ppc-opc.c (powerpc_opcodes): Add m*ivor35.
1838
1839 2004-02-20 Aldy Hernandez <aldyh@redhat.com>
1840
1841 * ppc-opc.c (powerpc_opcodes): Add mfivor32, mfivor33, mfivor34,
1842 mtivor32, mtivor33, mtivor34.
1843
1844 2004-02-19 Aldy Hernandez <aldyh@redhat.com>
1845
1846 * ppc-opc.c (powerpc_opcodes): Add mfmcar.
1847
1848 2004-02-10 Petko Manolov <petkan@nucleusys.com>
1849
1850 * arm-opc.h Maverick accumulator register opcode fixes.
1851
1852 2004-02-13 Ben Elliston <bje@wasabisystems.com>
1853
1854 * m32r-dis.c: Regenerate.
1855
1856 2004-01-27 Michael Snyder <msnyder@redhat.com>
1857
1858 * sh-opc.h (sh_table): "fsrra", not "fssra".
1859
1860 2004-01-23 Andrew Over <andrew.over@cs.anu.edu.au>
1861
1862 * sparc-opc.c (fdtox, fstox, fqtox, fxtod, fxtos, fxtoq): Tighten
1863 contraints.
1864
1865 2004-01-19 Andrew Over <andrew.over@cs.anu.edu.au>
1866
1867 * sparc-opc.c (sparc_opcodes) <f[dsq]tox, fxto[dsq]>: Fix args.
1868
1869 2004-01-19 Alan Modra <amodra@bigpond.net.au>
1870
1871 * i386-dis.c (OP_E): Print scale factor on intel mode sib when not
1872 1. Don't print scale factor on AT&T mode when index missing.
1873
1874 2004-01-16 Alexandre Oliva <aoliva@redhat.com>
1875
1876 * m10300-opc.c (mov): 8- and 24-bit immediates are zero-extended
1877 when loaded into XR registers.
1878
1879 2004-01-14 Richard Sandiford <rsandifo@redhat.com>
1880
1881 * frv-desc.h: Regenerate.
1882 * frv-desc.c: Regenerate.
1883 * frv-opc.c: Regenerate.
1884
1885 2004-01-13 Michael Snyder <msnyder@redhat.com>
1886
1887 * sh-dis.c (print_insn_sh): Allocate 4 bytes for insn.
1888
1889 2004-01-09 Paul Brook <paul@codesourcery.com>
1890
1891 * arm-opc.h (arm_opcodes): Move generic mcrr after known
1892 specific opcodes.
1893
1894 2004-01-07 Daniel Jacobowitz <drow@mvista.com>
1895
1896 * Makefile.am (libopcodes_la_DEPENDENCIES)
1897 (libopcodes_la_LIBADD): Revert 2003-05-17 change. Add explanatory
1898 comment about the problem.
1899 * Makefile.in: Regenerate.
1900
1901 2004-01-06 Alexandre Oliva <aoliva@redhat.com>
1902
1903 2003-12-19 Alexandre Oliva <aoliva@redhat.com>
1904 * frv-asm.c (parse_ulo16, parse_uhi16, parse_d12): Fix some
1905 cut&paste errors in shifting/truncating numerical operands.
1906 2003-08-04 Alexandre Oliva <aoliva@redhat.com>
1907 * frv-asm.c (parse_ulo16): Parse gotofflo and gotofffuncdesclo.
1908 (parse_uslo16): Likewise.
1909 (parse_uhi16): Parse gotoffhi and gotofffuncdeschi.
1910 (parse_d12): Parse gotoff12 and gotofffuncdesc12.
1911 (parse_s12): Likewise.
1912 2003-08-04 Alexandre Oliva <aoliva@redhat.com>
1913 * frv-asm.c (parse_ulo16): Parse gotlo and gotfuncdesclo.
1914 (parse_uslo16): Likewise.
1915 (parse_uhi16): Parse gothi and gotfuncdeschi.
1916 (parse_d12): Parse got12 and gotfuncdesc12.
1917 (parse_s12): Likewise.
1918
1919 2004-01-02 Albert Bartoszko <albar@nt.kegel.com.pl>
1920
1921 * msp430-dis.c (msp430_doubleoperand): Check for an 'add'
1922 instruction which looks similar to an 'rla' instruction.
1923
1924 For older changes see ChangeLog-0203
1925 \f
1926 Local Variables:
1927 mode: change-log
1928 left-margin: 8
1929 fill-column: 74
1930 version-control: never
1931 End:
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