Remove unnecessary header from m68k-dis.c
[deliverable/binutils-gdb.git] / opcodes / ChangeLog
1 2014-05-20 Alan Modra <amodra@gmail.com>
2
3 * m68k-dis.c: Don't include setjmp.h.
4
5 2014-05-09 H.J. Lu <hongjiu.lu@intel.com>
6
7 * i386-dis.c (ADDR16_PREFIX): Removed.
8 (ADDR32_PREFIX): Likewise.
9 (DATA16_PREFIX): Likewise.
10 (DATA32_PREFIX): Likewise.
11 (prefix_name): Updated.
12 (print_insn): Simplify data and address size prefixes processing.
13
14 2014-05-08 Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
15
16 * or1k-desc.c: Regenerated.
17 * or1k-desc.h: Likewise.
18 * or1k-opc.c: Likewise.
19 * or1k-opc.h: Likewise.
20 * or1k-opinst.c: Likewise.
21
22 2014-05-07 Andrew Bennett <andrew.bennett@imgtec.com>
23
24 * mips-opc.c (mips_builtin_opcodes): Add MIPS32r5 eretnc instruction.
25 (I34): New define.
26 (I36): New define.
27 (I66): New define.
28 (I68): New define.
29 * mips-dis.c (mips_arch_choices): Add mips32r3, mips32r5, mips64r3 and
30 mips64r5.
31 (parse_mips_dis_option): Update MSA and virtualization support to
32 allow mips64r3 and mips64r5.
33
34 2014-05-07 Andrew Bennett <andrew.bennett@imgtec.com>
35
36 * mips-opc.c (G3): Remove I4.
37
38 2014-05-05 H.J. Lu <hongjiu.lu@intel.com>
39
40 PR binutils/16893
41 * i386-dis.c (twobyte_has_mandatory_prefix): New variable.
42 (end_codep): Likewise.
43 (mandatory_prefix): Likewise.
44 (active_seg_prefix): Likewise.
45 (ckprefix): Set active_seg_prefix to the active segment register
46 prefix.
47 (seg_prefix): Removed.
48 (get_valid_dis386): Use the last of PREFIX_REPNZ and PREFIX_REPZ
49 for prefix index. Ignore the index if it is invalid and the
50 mandatory prefix isn't required.
51 (print_insn): Set mandatory_prefix if the PREFIX_XXX prefix is
52 mandatory. Don't set PREFIX_REPZ/PREFIX_REPNZ/PREFIX_LOCK bits
53 in used_prefixes here. Don't print unused prefixes. Check
54 active_seg_prefix for the active segment register prefix.
55 Restore the DFLAG bit in sizeflag if the data size prefix is
56 unused. Check the unused mandatory PREFIX_XXX prefixes
57 (append_seg): Only print the segment register which gets used.
58 (OP_E_memory): Check active_seg_prefix for the segment register
59 prefix.
60 (OP_OFF): Likewise.
61 (OP_OFF64): Likewise.
62 (OP_DSreg): Set active_seg_prefix to PREFIX_DS if it is unset.
63
64 2014-05-02 H.J. Lu <hongjiu.lu@intel.com>
65
66 PR binutils/16886
67 * config.in: Regenerated.
68 * configure: Likewise.
69 * configure.in: Check if sigsetjmp is available.
70 * h8500-dis.c (private): Replace jmp_buf with OPCODES_SIGJMP_BUF.
71 (fetch_data): Replace longjmp with OPCODES_SIGLONGJMP.
72 (print_insn_h8500): Replace setjmp with OPCODES_SIGSETJMP.
73 * i386-dis.c (dis_private): Replace jmp_buf with OPCODES_SIGJMP_BUF.
74 (fetch_data): Replace longjmp with OPCODES_SIGLONGJMP.
75 (print_insn): Replace setjmp with OPCODES_SIGSETJMP.
76 * ns32k-dis.c (private): Replace jmp_buf with OPCODES_SIGJMP_BUF.
77 (fetch_data): Replace longjmp with OPCODES_SIGLONGJMP.
78 (print_insn_ns32k): Replace setjmp with OPCODES_SIGSETJMP.
79 * sysdep.h (OPCODES_SIGJMP_BUF): New macro.
80 (OPCODES_SIGSETJMP): Likewise.
81 (OPCODES_SIGLONGJMP): Likewise.
82 * vax-dis.c (private): Replace jmp_buf with OPCODES_SIGJMP_BUF.
83 (fetch_data): Replace longjmp with OPCODES_SIGLONGJMP.
84 (print_insn_vax): Replace setjmp with OPCODES_SIGSETJMP.
85 * xtensa-dis.c (dis_private): Replace jmp_buf with
86 OPCODES_SIGJMP_BUF.
87 (fetch_data): Replace longjmp with OPCODES_SIGLONGJMP.
88 (print_insn_xtensa): Replace setjmp with OPCODES_SIGSETJMP.
89 * z8k-dis.c(instr_data_s): Replace jmp_buf with OPCODES_SIGJMP_BUF.
90 (fetch_data): Replace longjmp with OPCODES_SIGLONGJMP.
91 (print_insn_z8k): Replace setjmp with OPCODES_SIGSETJMP.
92
93 2014-05-01 H.J. Lu <hongjiu.lu@intel.com>
94
95 PR binutils/16891
96 * i386-dis.c (print_insn): Handle prefixes before fwait.
97
98 2014-04-26 Alan Modra <amodra@gmail.com>
99
100 * po/POTFILES.in: Regenerate.
101
102 2014-04-23 Andrew Bennett <andrew.bennett@imgtec.com>
103
104 * mips-dis.c (mips_arch_choices): Update mips32r2 and mips64r2
105 to allow the MIPS XPA ASE.
106 (parse_mips_dis_option): Process the -Mxpa option.
107 * mips-opc.c (XPA): New define.
108 (mips_builtin_opcodes): Add MIPS XPA instructions and move the
109 locations of the ctc0 and cfc0 instructions.
110
111 2014-04-22 Christian Svensson <blue@cmd.nu>
112
113 * Makefile.am: Remove openrisc and or32 support. Add support for or1k.
114 * configure.in: Likewise.
115 * disassemble.c: Likewise.
116 * or1k-asm.c: New file.
117 * or1k-desc.c: New file.
118 * or1k-desc.h: New file.
119 * or1k-dis.c: New file.
120 * or1k-ibld.c: New file.
121 * or1k-opc.c: New file.
122 * or1k-opc.h: New file.
123 * or1k-opinst.c: New file.
124 * Makefile.in: Regenerate.
125 * configure: Regenerate.
126 * openrisc-asm.c: Delete.
127 * openrisc-desc.c: Delete.
128 * openrisc-desc.h: Delete.
129 * openrisc-dis.c: Delete.
130 * openrisc-ibld.c: Delete.
131 * openrisc-opc.c: Delete.
132 * openrisc-opc.h: Delete.
133 * or32-dis.c: Delete.
134 * or32-opc.c: Delete.
135
136 2014-04-04 Ilya Tocar <ilya.tocar@intel.com>
137
138 * i386-dis.c (rm_table): Add encls, enclu.
139 * i386-gen.c (cpu_flag_init): Add CPU_SE1_FLAGS,
140 (cpu_flags): Add CpuSE1.
141 * i386-opc.h (enum): Add CpuSE1.
142 (i386_cpu_flags): Add cpuse1.
143 * i386-opc.tbl: Add encls, enclu.
144 * i386-init.h: Regenerated.
145 * i386-tbl.h: Likewise.
146
147 2014-04-02 Anthony Green <green@moxielogic.com>
148
149 * moxie-opc.c (moxie_form1_opc_info): Add sign-extension
150 instructions, sex.b and sex.s.
151
152 2014-03-26 Jiong Wang <jiong.wang@arm.com>
153
154 * aarch64-dis.c (aarch64_ext_ldst_elemlist): Check H/S undefined
155 instructions.
156
157 2014-03-20 Ilya Tocar <ilya.tocar@intel.com>
158
159 * i386-opc.tbl: Change memory size for vgatherpf0qps, vgatherpf1qps,
160 vscatterpf0qps, vscatterpf1qps, vgatherqps, vpgatherqd, vpscatterqd,
161 vscatterqps.
162 * i386-tbl.h: Regenerate.
163
164 2014-03-19 Jose E. Marchesi <jose.marchesi@oracle.com>
165
166 * sparc-dis.c (v9_hpriv_reg_names): Names for %hstick_offset and
167 %hstick_enable added.
168
169 2014-03-19 Nick Clifton <nickc@redhat.com>
170
171 * rx-decode.opc (bwl): Allow for bogus instructions with a size
172 field of 3.
173 (sbwl, ubwl, SCALE): Likewise.
174 * rx-decode.c: Regenerate.
175
176 2014-03-12 Alan Modra <amodra@gmail.com>
177
178 * Makefile.in: Regenerate.
179
180 2014-03-05 Alan Modra <amodra@gmail.com>
181
182 Update copyright years.
183
184 2014-03-04 Heiher <r@hev.cc>
185
186 * mips-dis.c (mips_arch_choices): Usee ISA_MIPS64R2 for Loongson-3A.
187
188 2014-03-04 Richard Sandiford <rdsandiford@googlemail.com>
189
190 * mips-opc.c (mips_builtin_opcodes): Move the udi* instructions
191 so that they come after the Loongson extensions.
192
193 2014-03-03 Alan Modra <amodra@gmail.com>
194
195 * i386-gen.c (process_copyright): Emit copyright notice on one line.
196
197 2014-02-28 Alan Modra <amodra@gmail.com>
198
199 * msp430-decode.c: Regenerate.
200
201 2014-02-27 Jiong Wang <jiong.wang@arm.com>
202
203 * aarch64-tbl.h (aarch64_opcode_table): Replace IMM0 with
204 FPIMM0 for fcmeq, fcmgt, fcmge, fcmlt and fcmle.
205
206 2014-02-27 Yufeng Zhang <yufeng.zhang@arm.com>
207
208 * aarch64-opc.c (print_register_offset_address): Call
209 get_int_reg_name to prepare the register name.
210
211 2014-02-25 Ilya Tocar <ilya.tocar@intel.com>
212
213 * i386-opc.tbl: Remove wrong variant of vcvtps2ph
214 * i386-tbl.h: Regenerate.
215
216 2014-02-20 Ilya Tocar <ilya.tocar@intel.com>
217
218 * i386-gen.c (cpu_flag_init): Add CPU_PREFETCHWT1_FLAGS/
219 (cpu_flags): Add CpuPREFETCHWT1.
220 * i386-init.h: Regenerate.
221 * i386-opc.h (CpuPREFETCHWT1): New.
222 (i386_cpu_flags): Add cpuprefetchwt1.
223 * i386-opc.tbl: Cahnge CPU of prefetchwt1 from CpuAVX512PF to CpuPREFETCHWT1.
224 * i386-tbl.h: Regenerate.
225
226 2014-02-20 Ilya Tocar <ilya.tocar@intel.com>
227
228 * i386-opc.tbl: Change CPU of vptestnmq, vptestnmd from CpuAVX512CD,
229 to CpuAVX512F.
230 * i386-tbl.h: Regenerate.
231
232 2014-02-19 H.J. Lu <hongjiu.lu@intel.com>
233
234 * i386-gen.c (output_cpu_flags): Don't output trailing space.
235 (output_opcode_modifier): Likewise.
236 (output_operand_type): Likewise.
237 * i386-init.h: Regenerated.
238 * i386-tbl.h: Likewise.
239
240 2014-02-12 Ilya Tocar <ilya.tocar@intel.com>
241
242 * i386-dis.c (MOD enum): Add MOD_0FC7_REG_3, MOD_0FC7_REG_4,
243 MOD_0FC7_REG_5.
244 (PREFIX enum): Add PREFIX_0FAE_REG_7.
245 (reg_table): Add MOD_0FC7_REG_3, MOD_0FC7_REG_4 MOD_0FC7_REG_5.
246 (prefix_table): Add clflusopt.
247 (mod_table): Add xrstors, xsavec, xsaves.
248 * i386-gen.c (cpu_flag_init): Add CPU_CLFLUSHOPT_FLAGS,
249 CPU_XSAVES_FLAGS, CPU_XSAVEC_FLAGS.
250 (cpu_flags): Add CpuClflushOpt, CpuXSAVES, CpuXSAVEC.
251 * i386-init.h: Regenerate.
252 * i386-opc.tbl: Add clflushopt, xrstors, xrstors64, xsaves,
253 xsaves64, xsavec, xsavec64.
254 * i386-tbl.h: Regenerate.
255
256 2014-02-10 Alan Modra <amodra@gmail.com>
257
258 * po/POTFILES.in: Regenerate.
259 * po/opcodes.pot: Regenerate.
260
261 2014-01-30 Michael Zolotukhin <michael.v.zolotukhin@gmail.com>
262 Jan Beulich <jbeulich@suse.com>
263
264 PR binutils/16490
265 * i386-dis.c (OP_E_memory): Fix shift computation for
266 vex_vsib_q_w_dq_mode.
267
268 2014-01-09 Bradley Nelson <bradnelson@google.com>
269 Roland McGrath <mcgrathr@google.com>
270
271 * i386-dis.c (print_insn): Do not touch all_prefixes[-1] when
272 last_rex_prefix is -1.
273
274 2014-01-08 H.J. Lu <hongjiu.lu@intel.com>
275
276 * i386-gen.c (process_copyright): Update copyright year to 2014.
277
278 2014-01-03 Maciej W. Rozycki <macro@codesourcery.com>
279
280 * nds32-asm.c (parse_operand): Fix out-of-range integer constant.
281
282 For older changes see ChangeLog-2013
283 \f
284 Copyright (C) 2014 Free Software Foundation, Inc.
285
286 Copying and distribution of this file, with or without modification,
287 are permitted in any medium without royalty provided the copyright
288 notice and this notice are preserved.
289
290 Local Variables:
291 mode: change-log
292 left-margin: 8
293 fill-column: 74
294 version-control: never
295 End:
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