1 2005-11-07 Steve Ellcey <sje@cup.hp.com>
3 * configure: Regenerate after modifying bfd/warning.m4.
5 2005-11-07 Alan Modra <amodra@bigpond.net.au>
7 * i386-dis.c (ckprefix): Handle rex on fwait. Don't print
8 ignored rex prefixes here.
9 (print_insn): Instead, handle them similarly to fwait followed
12 2005-11-02 H.J. Lu <hongjiu.lu@intel.com>
14 * iq2000-desc.c: Regenerated.
15 * iq2000-desc.h: Likewise.
16 * iq2000-dis.c: Likewise.
17 * iq2000-opc.c: Likewise.
19 2005-11-02 Paul Brook <paul@codesourcery.com>
21 * arm-dis.c (print_insn_thumb32): Word align blx target address.
23 2005-10-31 Alan Modra <amodra@bigpond.net.au>
25 * arm-dis.c (print_insn): Warning fix.
27 2005-10-30 H.J. Lu <hongjiu.lu@intel.com>
29 * Makefile.am: Run "make dep-am".
30 * Makefile.in: Regenerated.
32 * dep-in.sed: Replace " ./" with " ".
34 2005-10-28 Dave Brolley <brolley@redhat.com>
36 * All CGEN-generated sources: Regenerate.
38 Contribute the following changes:
39 2005-09-19 Dave Brolley <brolley@redhat.com>
41 * disassemble.c (disassemble_init_for_target): Add 'break' to case for
42 bfd_arch_tic4x. Use cgen_bitset_create and cgen_bitset_set for
45 2005-02-16 Dave Brolley <brolley@redhat.com>
47 * cgen-dis.in: Rename CGEN_ISA_MASK to CGEN_BITSET. Rename
48 cgen_isa_mask_* to cgen_bitset_*.
49 * cgen-opc.c: Likewise.
51 2003-11-28 Richard Sandiford <rsandifo@redhat.com>
53 * cgen-dis.in (print_insn_@arch@): Fix comparison with cached isas.
54 * *-dis.c: Regenerate.
56 2003-06-05 DJ Delorie <dj@redhat.com>
58 * cgen-dis.in (print_insn_@arch@): Copy prev_isas, don't assign
59 it, as it may point to a reused buffer. Set prev_isas when we
62 2002-12-13 Dave Brolley <brolley@redhat.com>
64 * cgen-opc.c (cgen_isa_mask_create): New support function for
66 (cgen_isa_mask_init): Ditto.
67 (cgen_isa_mask_clear): Ditto.
68 (cgen_isa_mask_add): Ditto.
69 (cgen_isa_mask_set): Ditto.
70 (cgen_isa_supported): Ditto.
71 (cgen_isa_mask_compare): Ditto.
72 (cgen_isa_mask_intersection): Ditto.
73 (cgen_isa_mask_copy): Ditto.
74 (cgen_isa_mask_combine): Ditto.
75 * cgen-dis.in (libiberty.h): #include it.
76 (isas): Renamed from 'isa' and now (CGEN_ISA_MASK *).
77 (print_insn_@arch@): Use CGEN_ISA_MASK and support functions.
78 * Makefile.am (CGENDEPS): Add utils-cgen.scm and attrs.scm.
79 * Makefile.in: Regenerated.
81 2005-10-27 DJ Delorie <dj@redhat.com>
83 * m32c-asm.c: Regenerate.
84 * m32c-desc.c: Regenerate.
85 * m32c-desc.h: Regenerate.
86 * m32c-dis.c: Regenerate.
87 * m32c-ibld.c: Regenerate.
88 * m32c-opc.c: Regenerate.
89 * m32c-opc.h: Regenerate.
91 2005-10-26 DJ Delorie <dj@redhat.com>
93 * m32c-asm.c: Regenerate.
94 * m32c-desc.c: Regenerate.
95 * m32c-desc.h: Regenerate.
96 * m32c-dis.c: Regenerate.
97 * m32c-ibld.c: Regenerate.
98 * m32c-opc.c: Regenerate.
99 * m32c-opc.h: Regenerate.
101 2005-10-26 Paul Brook <paul@codesourcery.com>
103 * arm-dis.c (arm_opcodes): Correct "sel" entry.
105 2005-10-26 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
107 * m32r-asm.c: Regenerate.
109 2005-10-25 DJ Delorie <dj@redhat.com>
111 * m32c-asm.c: Regenerate.
112 * m32c-desc.c: Regenerate.
113 * m32c-desc.h: Regenerate.
114 * m32c-dis.c: Regenerate.
115 * m32c-ibld.c: Regenerate.
116 * m32c-opc.c: Regenerate.
117 * m32c-opc.h: Regenerate.
119 2005-10-25 Arnold Metselaar <arnold.metselaar@planet.nl>
121 * configure.in: Add target architecture bfd_arch_z80.
122 * configure: Regenerated.
123 * disassemble.c (disassembler)<ARCH_z80>: Add case
125 * z80-dis.c: New file.
127 2005-10-25 Alan Modra <amodra@bigpond.net.au>
129 * po/POTFILES.in: Regenerate.
130 * po/opcodes.pot: Regenerate.
132 2005-10-24 Jan Beulich <jbeulich@novell.com>
134 * ia64-asmtab.c: Regenerate.
136 2005-10-21 DJ Delorie <dj@redhat.com>
138 * m32c-asm.c: Regenerate.
139 * m32c-desc.c: Regenerate.
140 * m32c-desc.h: Regenerate.
141 * m32c-dis.c: Regenerate.
142 * m32c-ibld.c: Regenerate.
143 * m32c-opc.c: Regenerate.
144 * m32c-opc.h: Regenerate.
146 2005-10-21 Nick Clifton <nickc@redhat.com>
148 * bfin-dis.c: Tidy up code, removing redundant constructs.
150 2005-10-19 Martin Schwidefsky <schwidefsky@de.ibm.com>
152 * s390-opc.txt: Add unnormalized hfp multiply and multiply-and-add
155 2005-10-18 Nick Clifton <nickc@redhat.com>
157 * m32r-asm.c: Regenerate after updating m32r.opc.
159 2005-10-18 Jie Zhang <jie.zhang@analog.com>
161 * bfin-dis.c (print_insn_bfin): Do proper endian transform when
162 reading instruction from memory.
164 2005-10-18 Nick Clifton <nickc@redhat.com>
166 * m32r-asm.c: Regenerate after updating m32r.opc.
168 2005-10-14 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
170 * m32r-asm.c: Regenerate after updating m32r.opc.
172 2005-10-08 James Lemke <jim@wasabisystems.com>
174 * arm-dis.c (coprocessor_opcodes): Fix mask for various Maverick CDP
177 2005-10-06 Daniel Jacobowitz <dan@codesourcery.com>
179 * ppc-dis.c (struct dis_private): Remove.
180 (powerpc_dialect): Avoid aliasing warnings.
181 (print_insn_big_powerpc, print_insn_little_powerpc): Likewise.
183 2005-09-30 Nick Clifton <nickc@redhat.com>
185 * po/ga.po: New Irish translation.
186 * configure.in (ALL_LINGUAS): Add "ga".
187 * configure: Regenerate.
189 2005-09-30 H.J. Lu <hongjiu.lu@intel.com>
191 * Makefile.am: Run "make dep-am".
192 * Makefile.in: Regenerated.
193 * aclocal.m4: Likewise.
194 * configure: Likewise.
196 2005-09-30 Catherine Moore <clm@cm00re.com>
198 * Makefile.am: Bfin support.
199 * Makefile.in: Regenerated.
200 * aclocal.m4: Regenerated.
201 * bfin-dis.c: New file.
202 * configure.in: Bfin support.
203 * configure: Regenerated.
204 * disassemble.c (ARCH_bfin): Define.
205 (disassembler): Add case for bfd_arch_bfin.
207 2005-09-28 Jan Beulich <jbeulich@novell.com>
209 * i386-dis.c (stack_v_mode): Renamed from branch_v_mode.
212 (Ob64, Ov64): Rename to Ob, Ov. Delete unused original definitions.
213 (dis386): Document and use new 'V' meta character. Use it for
214 single-byte push/pop opcode forms. Use stackEv for mod-r/m push/pop
215 opcode forms. Correct typo in 'pop ss'. Replace Ob64/Ov64 by Ob/Ov.
216 (putop): 'q' suffix for 'T' and 'U' meta depends on DFLAG. Mark
217 data prefix as used whenever DFLAG was examined. Handle 'V'.
218 (intel_operand_size): Use stack_v_mode.
219 (OP_E): Use stack_v_mode, but handle only the special case of
220 64-bit mode without operand size override here; fall through to
221 v_mode case otherwise.
222 (OP_REG): Special case rAX_reg ... rDI_reg only when 64-bit mode
223 and no operand size override is present.
224 (OP_J): Use get32s for obtaining the displacement also when rex64
227 2005-09-08 Paul Brook <paul@codesourcery.com>
229 * arm-dis.c (arm_opcodes, thumb32_opcodes): Rename smi to smc.
231 2005-09-06 Chao-ying Fu <fu@mips.com>
233 * mips-opc.c (MT32): New define.
234 (mips_builtin_opcodes): Move "bc0f", "bc0fl", "bc0t", "bc0tl" to the
235 bottom to avoid opcode collision with "mftr" and "mttr".
237 * mips-dis.c (mips_arch_choices): Enable INSN_MT for mips32r2.
238 (print_insn_args): Add supports for +t, +T, !, $, *, &, g operand
241 2005-09-02 Paul Brook <paul@codesourcery.com>
243 * arm-dis.c (coprocessor_opcodes): Add null terminator.
245 2005-09-02 Paul Brook <paul@codesourcery.com>
247 * arm-dis.c (coprocessor_opcodes): New.
248 (arm_opcodes, thumb32_opcodes): Remove coprocessor insns.
249 (print_insn_coprocessor): New function.
250 (print_insn_arm): Use print_insn_coprocessor. Remove coprocessor
252 (print_insn_thumb32): Use print_insn_coprocessor.
254 2005-08-30 Paul Brook <paul@codesourcery.com>
256 * arm-dis.c (thumb_opcodes): Disassemble sub(3) as subs.
258 2005-08-26 Jan Beulich <jbeulich@novell.com>
260 * i386-dis.c (intel_operand_size): New, broken out from OP_E for
262 (OP_E): Call intel_operand_size, move call site out of mode
264 (OP_OFF): Call intel_operand_size if suffix_always. Remove
265 ATTRIBUTE_UNUSED from parameters.
266 (OP_OFF64): Likewise.
267 (OP_ESreg): Call intel_operand_size.
268 (OP_DSreg): Likewise.
269 (OP_DIR): Use colon rather than semicolon as separator of far
272 2005-08-25 Chao-ying Fu <fu@mips.com>
274 * mips-opc.c (WR_a, RD_a, MOD_a, DSP_VOLA, D32): New define.
275 (mips_builtin_opcodes): Add DSP instructions.
276 * mips-dis.c (mips_arch_choices): Enable INSN_DSP for mips32, mips32r2,
278 (print_insn_args): Add supports for 3, 4, 5, 6, 7, 8, 9, 0, :, ', @
281 2005-08-23 David Ung <davidu@mips.com>
283 * mips16-opc.c (mips16_opcodes): Add the MIPS16e jalrc/jrc
284 instructions to the table.
286 2005-08-18 Alan Modra <amodra@bigpond.net.au>
288 * a29k-dis.c: Delete.
289 * Makefile.am: Remove a29k support.
290 * configure.in: Likewise.
291 * disassemble.c: Likewise.
292 * Makefile.in: Regenerate.
293 * configure: Regenerate.
294 * po/POTFILES.in: Regenerate.
296 2005-08-15 Daniel Jacobowitz <dan@codesourcery.com>
298 * ppc-dis.c (powerpc_dialect): Handle e300.
299 (print_ppc_disassembler_options): Likewise.
300 * ppc-opc.c (PPCE300): Define.
301 (powerpc_opcodes): Mark icbt as available for the e300.
303 2005-08-13 John David Anglin <dave.anglin@nrc-cnrc.gc.ca>
305 * hppa-dis.c (print_insn_hppa): Don't print '%' before register names.
306 Use "rp" instead of "%r2" in "b,l" insns.
308 2005-08-12 Martin Schwidefsky <schwidefsky@de.ibm.com>
310 * s390-dis.c (print_insn_s390): Print unsigned operands with %u.
311 * s390-mkopc.c (s390_opcode_cpu_val): Add support for cpu type z9-109.
313 * s390-opc.c (I32_16, U32_16, M_16): Add defines 32 bit immediates
314 and 4 bit optional masks.
315 (INSTR_RIL_RI, INSTR_RIL_RU, INSTR_RRF_M0RR, INSTR_RSE_CCRD,
316 INSTR_RSY_CCRD, INSTR_SSF_RRDRD): Add new instruction formats.
317 (MASK_RIL_RI, MASK_RIL_RU, MASK_RRF_M0RR, MASK_RSE_CCRD,
318 MASK_RSY_CCRD, MASK_SSF_RRDRD): Likewise.
319 (s390_opformats): Likewise.
320 * s390-opc.txt: Add new instructions for cpu type z9-109.
322 2005-08-05 John David Anglin <dave.anglin@nrc-crnc.gc.ca>
324 * hppa-dis.c (print_insn_hppa): Prefix 21-bit values with "L%".
326 2005-07-29 Paul Brook <paul@codesourcery.com>
328 * arm-dis.c: Fix disassebly of thumb2 writeback addressing modes.
330 2005-07-29 Paul Brook <paul@codesourcery.com>
332 * arm-dis.c (thumb32_opc): Fix addressing mode for tbh.
333 (print_insn_thumb32): Fix decoding of thumb2 'I' operands.
335 2005-07-25 DJ Delorie <dj@redhat.com>
337 * m32c-asm.c Regenerate.
338 * m32c-dis.c Regenerate.
340 2005-07-20 DJ Delorie <dj@redhat.com>
342 * disassemble.c (disassemble_init_for_target): M32C ISAs are
343 enums, so convert them to bit masks, which attributes are.
345 2005-07-18 Nick Clifton <nickc@redhat.com>
347 * configure.in: Restore alpha ordering to list of arches.
348 * configure: Regenerate.
349 * disassemble.c: Restore alpha ordering to list of arches.
351 2005-07-18 Nick Clifton <nickc@redhat.com>
353 * m32c-asm.c: Regenerate.
354 * m32c-desc.c: Regenerate.
355 * m32c-desc.h: Regenerate.
356 * m32c-dis.c: Regenerate.
357 * m32c-ibld.h: Regenerate.
358 * m32c-opc.c: Regenerate.
359 * m32c-opc.h: Regenerate.
361 2005-07-18 H.J. Lu <hongjiu.lu@intel.com>
363 * i386-dis.c (PNI_Fixup): Update comment.
364 (VMX_Fixup): Properly handle the suffix check.
366 2005-07-16 John David Anglin <dave.anglin@nrc-cnrc.gc.ca>
368 * hppa-dis.c (print_insn_hppa): Add space after 'w' in wide-mode
371 2005-07-16 Alan Modra <amodra@bigpond.net.au>
373 * Makefile.am: Run "make dep-am".
374 (stamp-m32c): Fix cpu dependencies.
375 * Makefile.in: Regenerate.
376 * ip2k-dis.c: Regenerate.
378 2007-07-15 H.J. Lu <hongjiu.lu@intel.com>
380 * i386-dis.c (OP_VMX): New. Handle Intel VMX Instructions.
381 (VMX_Fixup): New. Fix up Intel VMX Instructions.
385 (dis386_twobyte): Updated entries 0x78 and 0x79.
386 (twobyte_has_modrm): Likewise.
387 (grps): Use OP_VMX in the "sgdtIQ" entry. Updated GRP9.
388 (OP_G): Handle m_mode.
390 2005-07-14 Jim Blandy <jimb@redhat.com>
392 Add support for the Renesas M32C and M16C.
393 * m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c: New.
394 * m32c-desc.h, m32c-opc.h: New.
395 * Makefile.am (HFILES): List m32c-desc.h and m32c-opc.h.
396 (CFILES): List m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c,
398 (ALL_MACHINES): List m32c-asm.lo, m32c-desc.lo, m32c-dis.lo,
399 m32c-ibld.lo, m32c-opc.lo.
400 (CLEANFILES): List stamp-m32c.
401 (M32C_DEPS): List stamp-m32c, if CGEN_MAINT.
402 (CGEN_CPUS): Add m32c.
403 (m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c)
404 (m32c-desc.h, m32c-opc.h): Depend on M32C_DEPS.
405 (m32c_opc_h): New variable.
406 (stamp-m32c, m32c-asm.lo, m32c-desc.lo, m32c-dis.lo, m32c-ibld.lo)
407 (m32c-opc.lo): New rules.
408 * Makefile.in: Regenerated.
409 * configure.in: Add case for bfd_m32c_arch.
410 * configure: Regenerated.
411 * disassemble.c (ARCH_m32c): New.
412 [ARCH_m32c]: #include "m32c-desc.h".
413 (disassembler) [ARCH_m32c]: Add case for bfd_arch_m32c.
414 (disassemble_init_for_target) [ARCH_m32c]: Same.
416 * cgen-ops.h, cgen-types.h: New files.
417 * Makefile.am (HFILES): List them.
418 * Makefile.in: Regenerated.
420 2005-07-07 Kaveh R. Ghazi <ghazi@caip.rutgers.edu>
422 * arc-dis.c, arm-dis.c, cris-dis.c, crx-dis.c, d10v-dis.c,
423 d30v-dis.c, fr30-dis.c, h8300-dis.c, h8500-dis.c, i860-dis.c,
424 ia64-dis.c, ip2k-dis.c, m10200-dis.c, m10300-dis.c,
425 m88k-dis.c, mcore-dis.c, mips-dis.c, ms1-dis.c, or32-dis.c,
426 ppc-dis.c, sh64-dis.c, sparc-dis.c, tic4x-dis.c, tic80-dis.c,
427 v850-dis.c: Fix format bugs.
428 * ia64-gen.c (fail, warn): Add format attribute.
429 * or32-opc.c (debug): Likewise.
431 2005-07-07 Khem Raj <kraj@mvista.com>
433 * arm-dis.c (opcode32 arm_opcodes): Fix ARM VFP fadds instruction
436 2005-07-06 Alan Modra <amodra@bigpond.net.au>
438 * Makefile.am (stamp-m32r): Fix path to cpu files.
439 (stamp-m32r, stamp-iq2000): Likewise.
440 * Makefile.in: Regenerate.
441 * m32r-asm.c: Regenerate.
442 * po/POTFILES.in: Remove arm-opc.h. Add ms1-asm.c, ms1-desc.c,
443 ms1-desc.h, ms1-dis.c, ms1-ibld.c, ms1-opc.c, ms1-opc.h.
445 2005-07-05 Nick Clifton <nickc@redhat.com>
447 * iq2000-asm.c: Regenerate.
448 * ms1-asm.c: Regenerate.
450 2005-07-05 Jan Beulich <jbeulich@novell.com>
452 * i386-dis.c (SVME_Fixup): New.
453 (grps): Use it for the lidt entry.
454 (PNI_Fixup): Call OP_M rather than OP_E.
455 (INVLPG_Fixup): Likewise.
457 2005-07-04 H.J. Lu <hongjiu.lu@intel.com>
459 * tic30-dis.c (cnvt_tmsfloat_ieee): Use HUGE_VALF if defined.
461 2005-07-01 Nick Clifton <nickc@redhat.com>
463 * a29k-dis.c: Update to ISO C90 style function declarations and
465 * alpha-opc.c: Likewise.
466 * arc-dis.c: Likewise.
467 * arc-opc.c: Likewise.
468 * avr-dis.c: Likewise.
469 * cgen-asm.in: Likewise.
470 * cgen-dis.in: Likewise.
471 * cgen-ibld.in: Likewise.
472 * cgen-opc.c: Likewise.
473 * cris-dis.c: Likewise.
474 * d10v-dis.c: Likewise.
475 * d30v-dis.c: Likewise.
476 * d30v-opc.c: Likewise.
477 * dis-buf.c: Likewise.
478 * dlx-dis.c: Likewise.
479 * h8300-dis.c: Likewise.
480 * h8500-dis.c: Likewise.
481 * hppa-dis.c: Likewise.
482 * i370-dis.c: Likewise.
483 * i370-opc.c: Likewise.
484 * m10200-dis.c: Likewise.
485 * m10300-dis.c: Likewise.
486 * m68k-dis.c: Likewise.
487 * m88k-dis.c: Likewise.
488 * mips-dis.c: Likewise.
489 * mmix-dis.c: Likewise.
490 * msp430-dis.c: Likewise.
491 * ns32k-dis.c: Likewise.
492 * or32-dis.c: Likewise.
493 * or32-opc.c: Likewise.
494 * pdp11-dis.c: Likewise.
495 * pj-dis.c: Likewise.
496 * s390-dis.c: Likewise.
497 * sh-dis.c: Likewise.
498 * sh64-dis.c: Likewise.
499 * sparc-dis.c: Likewise.
500 * sparc-opc.c: Likewise.
501 * sysdep.h: Likewise.
502 * tic30-dis.c: Likewise.
503 * tic4x-dis.c: Likewise.
504 * tic80-dis.c: Likewise.
505 * v850-dis.c: Likewise.
506 * v850-opc.c: Likewise.
507 * vax-dis.c: Likewise.
508 * w65-dis.c: Likewise.
509 * z8kgen.c: Likewise.
511 * fr30-*: Regenerate.
513 * ip2k-*: Regenerate.
514 * iq2000-*: Regenerate.
515 * m32r-*: Regenerate.
517 * openrisc-*: Regenerate.
518 * xstormy16-*: Regenerate.
520 2005-06-23 Ben Elliston <bje@gnu.org>
522 * m68k-dis.c: Use ISC C90.
523 * m68k-opc.c: Formatting fixes.
525 2005-06-16 David Ung <davidu@mips.com>
527 * mips16-opc.c (mips16_opcodes): Add the following MIPS16e
528 instructions to the table; seb/seh/sew/zeb/zeh/zew.
530 2005-06-15 Dave Brolley <brolley@redhat.com>
532 Contribute Morpho ms1 on behalf of Red Hat
533 * ms1-asm.c, ms1-desc.c, ms1-dis.c, ms1-ibld.c, ms1-opc.c,
534 ms1-opc.h: New files, Morpho ms1 target.
536 2004-05-14 Stan Cox <scox@redhat.com>
538 * disassemble.c (ARCH_ms1): Define.
539 (disassembler): Handle bfd_arch_ms1
541 2004-05-13 Michael Snyder <msnyder@redhat.com>
543 * Makefile.am, Makefile.in: Add ms1 target.
544 * configure.in: Ditto.
546 2005-06-08 Zack Weinberg <zack@codesourcery.com>
548 * arm-opc.h: Delete; fold contents into ...
549 * arm-dis.c: ... here. Move includes of internal COFF headers
550 next to includes of internal ELF headers.
551 (streq, WORD_ADDRESS, BDISP, BDISP23): Delete, unused.
552 (struct arm_opcode): Rename struct opcode32. Make 'assembler' const.
553 (struct thumb_opcode): Rename struct opcode16. Make 'assembler' const.
554 (arm_conditional, arm_fp_const, arm_shift, arm_regname, regnames)
555 (iwmmxt_wwnames, iwmmxt_wwssnames):
557 (regnames): Remove iWMMXt coprocessor register sets.
558 (iwmmxt_regnames, iwmmxt_cregnames): New statics.
559 (get_arm_regnames): Adjust fourth argument to match above changes.
560 (set_iwmmxt_regnames): Delete.
561 (print_insn_arm): Constify 'c'. Use ISO syntax for function
562 pointer calls. Expand sole use of BDISP. Use iwmmxt_regnames
563 and iwmmxt_cregnames, not set_iwmmxt_regnames.
564 (print_insn_thumb16, print_insn_thumb32): Constify 'c'. Use
565 ISO syntax for function pointer calls.
567 2005-06-07 Zack Weinberg <zack@codesourcery.com>
569 * arm-dis.c: Split up the comments describing the format codes, so
570 that the ARM and 16-bit Thumb opcode tables each have comments
571 preceding them that describe all the codes, and only the codes,
572 valid in those tables. (32-bit Thumb table is already like this.)
573 Reorder the lists in all three comments to match the order in
574 which the codes are implemented.
575 Remove all forward declarations of static functions. Convert all
576 function definitions to ISO C format.
577 (print_insn_arm, print_insn_thumb16, print_insn_thumb32):
579 (print_insn_thumb16): Remove unused case 'I'.
580 (print_insn): Update for changed calling convention of subroutines.
582 2005-05-25 Jan Beulich <jbeulich@novell.com>
584 * i386-dis.c (OP_E): In Intel mode, display 32-bit displacements in
585 hex (but retain it being displayed as signed). Remove redundant
586 checks. Add handling of displacements for 16-bit addressing in Intel
589 2005-05-25 Jan Beulich <jbeulich@novell.com>
591 * i386-dis.c (prefix_name): Remove pointless mode_64bit check.
592 (OP_E): Remove redundant REX_EXTZ handling. Remove pointless
593 masking of 'rm' in 16-bit memory address handling.
595 2005-05-19 Anton Blanchard <anton@samba.org>
597 * ppc-dis.c (powerpc_dialect): Handle "-Mpower5".
598 (print_ppc_disassembler_options): Document it.
599 * ppc-opc.c (SVC_LEV): Define.
600 (LEV): Allow optional operand.
602 (powerpc_opcodes): Extend "sc". Adjust "svc" and "svcl". Add
603 "hrfid", "popcntb", "fsqrtes", "fsqrtes.", "fre" and "fre.".
605 2005-05-19 Kelley Cook <kcook@gcc.gnu.org>
607 * Makefile.in: Regenerate.
609 2005-05-17 Zack Weinberg <zack@codesourcery.com>
611 * arm-dis.c (thumb_opcodes): Add disassembly for V6T2 16-bit
612 instructions. Adjust disassembly of some opcodes to match
614 (thumb32_opcodes): New table.
615 (print_insn_thumb): Rename print_insn_thumb16; don't handle
616 two-halfword branches here.
617 (print_insn_thumb32): New function.
618 (print_insn): Choose among print_insn_arm, print_insn_thumb16,
619 and print_insn_thumb32. Be consistent about order of
620 halfwords when printing 32-bit instructions.
622 2005-05-07 H.J. Lu <hongjiu.lu@intel.com>
625 * i386-dis.c (branch_v_mode): New.
626 (indirEv): Use branch_v_mode instead of v_mode.
627 (OP_E): Handle branch_v_mode.
629 2005-05-07 H.J. Lu <hongjiu.lu@intel.com>
631 * d10v-dis.c (dis_2_short): Support 64bit host.
633 2005-05-07 Nick Clifton <nickc@redhat.com>
635 * po/nl.po: Updated translation.
637 2005-05-07 Nick Clifton <nickc@redhat.com>
639 * Update the address and phone number of the FSF organization in
640 the GPL notices in the following files:
641 a29k-dis.c, aclocal.m4, alpha-dis.c, alpha-opc.c, arc-dis.c,
642 arc-dis.h, arc-ext.c, arc-ext.h, arc-opc.c, arm-dis.c, arm-opc.h,
643 avr-dis.c, cgen-asm.c, cgen-asm.in, cgen-dis.c, cgen-dis.in,
644 cgen-ibld.in, cgen-opc.c, cgen.sh, cris-dis.c, cris-opc.c,
645 crx-dis.c, crx-opc.c, d10v-dis.c, d10v-opc.c, d30v-dis.c,
646 d30v-opc.c, dis-buf.c, dis-init.c, disassemble.c, dlx-dis.c,
647 fr30-asm.c, fr30-desc.c, fr30-desc.h, fr30-dis.c, fr30-ibld.c,
648 fr30-opc.c, fr30-opc.h, frv-asm.c, frv-desc.c, frv-desc.h,
649 frv-dis.c, frv-ibld.c, frv-opc.c, frv-opc.h, h8300-dis.c,
650 h8500-dis.c, h8500-opc.h, hppa-dis.c, i370-dis.c, i370-opc.c,
651 i386-dis.c, i860-dis.c, i960-dis.c, ia64-asmtab.h, ia64-dis.c,
652 ia64-gen.c, ia64-opc-a.c, ia64-opc-b.c, ia64-opc-d.c,
653 ia64-opc-f.c, ia64-opc-i.c, ia64-opc-m.c, ia64-opc-x.c,
654 ia64-opc.c, ia64-opc.h, ip2k-asm.c, ip2k-desc.c, ip2k-desc.h,
655 ip2k-dis.c, ip2k-ibld.c, ip2k-opc.c, ip2k-opc.h, iq2000-asm.c,
656 iq2000-desc.c, iq2000-desc.h, iq2000-dis.c, iq2000-ibld.c,
657 iq2000-opc.c, iq2000-opc.h, m10200-dis.c, m10200-opc.c,
658 m10300-dis.c, m10300-opc.c, m32r-asm.c, m32r-desc.c, m32r-desc.h,
659 m32r-dis.c, m32r-ibld.c, m32r-opc.c, m32r-opc.h, m32r-opinst.c,
660 m68hc11-dis.c, m68hc11-opc.c, m68k-dis.c, m68k-opc.c, m88k-dis.c,
661 maxq-dis.c, mcore-dis.c, mcore-opc.h, mips-dis.c, mips-opc.c,
662 mips16-opc.c, mmix-dis.c, mmix-opc.c, msp430-dis.c, ns32k-dis.c,
663 openrisc-asm.c, openrisc-desc.c, openrisc-desc.h, openrisc-dis.c,
664 openrisc-ibld.c, openrisc-opc.c, openrisc-opc.h, opintl.h,
665 or32-dis.c, or32-opc.c, pdp11-dis.c, pdp11-opc.c, pj-dis.c,
666 pj-opc.c, ppc-dis.c, ppc-opc.c, s390-dis.c, s390-mkopc.c,
667 s390-opc.c, sh-dis.c, sh-opc.h, sh64-dis.c, sh64-opc.c,
668 sh64-opc.h, sparc-dis.c, sparc-opc.c, sysdep.h, tic30-dis.c,
669 tic4x-dis.c, tic54x-dis.c, tic54x-opc.c, tic80-dis.c, tic80-opc.c,
670 v850-dis.c, v850-opc.c, vax-dis.c, w65-dis.c, w65-opc.h,
671 xstormy16-asm.c, xstormy16-desc.c, xstormy16-desc.h,
672 xstormy16-dis.c, xstormy16-ibld.c, xstormy16-opc.c,
673 xstormy16-opc.h, xtensa-dis.c, z8k-dis.c, z8kgen.c
675 2005-05-05 James E Wilson <wilson@specifixinc.com>
677 * ia64-opc.c: Include sysdep.h before libiberty.h.
679 2005-05-05 Nick Clifton <nickc@redhat.com>
681 * configure.in (ALL_LINGUAS): Add vi.
682 * configure: Regenerate.
685 2005-04-26 Jerome Guitton <guitton@gnat.com>
687 * configure.in: Fix the check for basename declaration.
688 * configure: Regenerate.
690 2005-04-19 Alan Modra <amodra@bigpond.net.au>
692 * ppc-opc.c (RTO): Define.
693 (powerpc_opcodes <tlbsx, tlbsx., tlbre>): Combine PPC403 and BOOKE
694 entries to suit PPC440.
696 2005-04-18 Mark Kettenis <kettenis@gnu.org>
698 * i386-dis.c: Insert hyphens into selected VIA PadLock extensions.
701 2005-04-14 Nick Clifton <nickc@redhat.com>
703 * po/fi.po: New translation: Finnish.
704 * configure.in (ALL_LINGUAS): Add fi.
705 * configure: Regenerate.
707 2005-04-14 Alan Modra <amodra@bigpond.net.au>
709 * Makefile.am (NO_WERROR): Define.
710 * configure.in: Invoke AM_BINUTILS_WARNINGS.
711 * Makefile.in: Regenerate.
712 * aclocal.m4: Regenerate.
713 * configure: Regenerate.
715 2005-04-04 Nick Clifton <nickc@redhat.com>
717 * fr30-asm.c: Regenerate.
718 * frv-asm.c: Regenerate.
719 * iq2000-asm.c: Regenerate.
720 * m32r-asm.c: Regenerate.
721 * openrisc-asm.c: Regenerate.
723 2005-04-01 Jan Beulich <jbeulich@novell.com>
725 * i386-dis.c (PNI_Fixup): Neither mwait nor monitor have any
726 visible operands in Intel mode. The first operand of monitor is
729 2005-04-01 Jan Beulich <jbeulich@novell.com>
731 * i386-dis.c (INVLPG_Fixup): Decode rdtscp; change code to allow for
732 easier future additions.
734 2005-03-31 Jerome Guitton <guitton@gnat.com>
736 * configure.in: Check for basename.
737 * configure: Regenerate.
740 2005-03-29 H.J. Lu <hongjiu.lu@intel.com>
742 * i386-dis.c (SEG_Fixup): New.
744 (dis386): Use "Sv" for 0x8c and 0x8e.
746 2005-03-21 Jan-Benedict Glaw <jbglaw@lug-owl.de>
747 Nick Clifton <nickc@redhat.com>
749 * vax-dis.c: (entry_addr): New varible: An array of user supplied
750 function entry mask addresses.
751 (entry_addr_occupied_slots): New variable: The number of occupied
752 elements in entry_addr.
753 (entry_addr_total_slots): New variable: The total number of
754 elements in entry_addr.
755 (parse_disassembler_options): New function. Fills in the entry_addr
757 (free_entry_array): New function. Release the memory used by the
758 entry addr array. Suppressed because there is no way to call it.
759 (is_function_entry): Check if a given address is a function's
760 start address by looking at supplied entry mask addresses and
761 symbol information, if available.
762 (print_insn_vax): Use parse_disassembler_options and is_function_entry.
764 2005-03-23 H.J. Lu <hongjiu.lu@intel.com>
766 * cris-dis.c (print_with_operands): Use ~31L for long instead
769 2005-03-20 H.J. Lu <hongjiu.lu@intel.com>
771 * mmix-opc.c (O): Revert the last change.
774 2005-03-19 H.J. Lu <hongjiu.lu@intel.com>
776 * mmix-opc.c (O): Use 24UL instead of 24 for unsigned long.
779 2005-03-19 Hans-Peter Nilsson <hp@bitrange.com>
781 * mmix-opc.c (O, Z): Force expression as unsigned long.
783 2005-03-18 Nick Clifton <nickc@redhat.com>
785 * ip2k-asm.c: Regenerate.
786 * op/opcodes.pot: Regenerate.
788 2005-03-16 Nick Clifton <nickc@redhat.com>
789 Ben Elliston <bje@au.ibm.com>
791 * configure.in (werror): New switch: Add -Werror to the
792 compiler command line. Enabled by default. Disable via
794 * configure: Regenerate.
796 2005-03-16 Alan Modra <amodra@bigpond.net.au>
798 * ppc-dis.c (powerpc_dialect): Don't set PPC_OPCODE_ALTIVEC when
801 2005-03-15 Alan Modra <amodra@bigpond.net.au>
803 * po/es.po: Commit new Spanish translation.
805 * po/fr.po: Commit new French translation.
807 2005-03-14 Jan-Benedict Glaw <jbglaw@lug-owl.de>
809 * vax-dis.c: Fix spelling error
810 (print_insn_vax): Use ".word 0x0012 # Entry mask: r1 r2 >" instead
811 of just "Entry mask: < r1 ... >"
813 2005-03-12 Zack Weinberg <zack@codesourcery.com>
815 * arm-dis.c (arm_opcodes): Document %E and %V.
816 Add entries for v6T2 ARM instructions:
817 bfc bfi mls strht ldrht ldrsht ldrsbt movw movt rbit ubfx sbfx.
818 (print_insn_arm): Add support for %E and %V.
819 (thumb_opcodes): Add ARMv6K instructions nop, sev, wfe, wfi, yield.
821 2005-03-10 Jeff Baker <jbaker@qnx.com>
822 Alan Modra <amodra@bigpond.net.au>
824 * ppc-opc.c (insert_sprg, extract_sprg): New Functions.
825 (powerpc_operands <SPRG>): Call the above. Bit field is 5 bits.
827 (XSPRG_MASK): Mask off extra bits now part of sprg field.
828 (powerpc_opcodes): Asjust mfsprg and mtsprg to suit new mask. Move
829 mfsprg4..7 after msprg and consolidate.
831 2005-03-09 Jan-Benedict Glaw <jbglaw@lug-owl.de>
833 * vax-dis.c (entry_mask_bit): New array.
834 (print_insn_vax): Decode function entry mask.
836 2005-03-07 Aldy Hernandez <aldyh@redhat.com>
838 * ppc-opc.c (powerpc_opcodes): Fix encoding of efscfd.
840 2005-03-05 Alan Modra <amodra@bigpond.net.au>
842 * po/opcodes.pot: Regenerate.
844 2005-03-03 Ramana Radhakrishnan <ramana.radhakrishnan@codito.com>
846 * arc-dis.c (a4_decoding_class): New enum.
847 (dsmOneArcInst): Use the enum values for the decoding class.
848 Remove redundant case in the switch for decodingClass value 11.
850 2005-03-02 Jan Beulich <jbeulich@novell.com>
852 * i386-dis.c (print_insn): Suppress lock prefix printing for cr8...15
854 (OP_C): Consider lock prefix in non-64-bit modes.
856 2005-02-24 Alan Modra <amodra@bigpond.net.au>
858 * cris-dis.c (format_hex): Remove ineffective warning fix.
859 * crx-dis.c (make_instruction): Warning fix.
860 * frv-asm.c: Regenerate.
862 2005-02-23 Nick Clifton <nickc@redhat.com>
864 * cgen-dis.in: Use bfd_byte for buffers that are passed to
867 * ia64-opc.c (locate_opcode_ent): Initialise opval array.
869 * crx-dis.c (make_instruction): Move argument structure into inner
870 scope and ensure that all of its fields are initialised before
873 * fr30-asm.c: Regenerate.
874 * fr30-dis.c: Regenerate.
875 * frv-asm.c: Regenerate.
876 * frv-dis.c: Regenerate.
877 * ip2k-asm.c: Regenerate.
878 * ip2k-dis.c: Regenerate.
879 * iq2000-asm.c: Regenerate.
880 * iq2000-dis.c: Regenerate.
881 * m32r-asm.c: Regenerate.
882 * m32r-dis.c: Regenerate.
883 * openrisc-asm.c: Regenerate.
884 * openrisc-dis.c: Regenerate.
885 * xstormy16-asm.c: Regenerate.
886 * xstormy16-dis.c: Regenerate.
888 2005-02-22 Alan Modra <amodra@bigpond.net.au>
890 * arc-ext.c: Warning fixes.
891 * arc-ext.h: Likewise.
892 * cgen-opc.c: Likewise.
893 * ia64-gen.c: Likewise.
894 * maxq-dis.c: Likewise.
895 * ns32k-dis.c: Likewise.
896 * w65-dis.c: Likewise.
897 * ia64-asmtab.c: Regenerate.
899 2005-02-22 Alan Modra <amodra@bigpond.net.au>
901 * fr30-desc.c: Regenerate.
902 * fr30-desc.h: Regenerate.
903 * fr30-opc.c: Regenerate.
904 * fr30-opc.h: Regenerate.
905 * frv-desc.c: Regenerate.
906 * frv-desc.h: Regenerate.
907 * frv-opc.c: Regenerate.
908 * frv-opc.h: Regenerate.
909 * ip2k-desc.c: Regenerate.
910 * ip2k-desc.h: Regenerate.
911 * ip2k-opc.c: Regenerate.
912 * ip2k-opc.h: Regenerate.
913 * iq2000-desc.c: Regenerate.
914 * iq2000-desc.h: Regenerate.
915 * iq2000-opc.c: Regenerate.
916 * iq2000-opc.h: Regenerate.
917 * m32r-desc.c: Regenerate.
918 * m32r-desc.h: Regenerate.
919 * m32r-opc.c: Regenerate.
920 * m32r-opc.h: Regenerate.
921 * m32r-opinst.c: Regenerate.
922 * openrisc-desc.c: Regenerate.
923 * openrisc-desc.h: Regenerate.
924 * openrisc-opc.c: Regenerate.
925 * openrisc-opc.h: Regenerate.
926 * xstormy16-desc.c: Regenerate.
927 * xstormy16-desc.h: Regenerate.
928 * xstormy16-opc.c: Regenerate.
929 * xstormy16-opc.h: Regenerate.
931 2005-02-21 Alan Modra <amodra@bigpond.net.au>
933 * Makefile.am: Run "make dep-am"
934 * Makefile.in: Regenerate.
936 2005-02-15 Nick Clifton <nickc@redhat.com>
938 * cgen-dis.in (print_address): Add an ATTRIBUTE_UNUSED to prevent
939 compile time warnings.
940 (print_keyword): Likewise.
941 (default_print_insn): Likewise.
943 * fr30-desc.c: Regenerated.
944 * fr30-desc.h: Regenerated.
945 * fr30-dis.c: Regenerated.
946 * fr30-opc.c: Regenerated.
947 * fr30-opc.h: Regenerated.
948 * frv-desc.c: Regenerated.
949 * frv-dis.c: Regenerated.
950 * frv-opc.c: Regenerated.
951 * ip2k-asm.c: Regenerated.
952 * ip2k-desc.c: Regenerated.
953 * ip2k-desc.h: Regenerated.
954 * ip2k-dis.c: Regenerated.
955 * ip2k-opc.c: Regenerated.
956 * ip2k-opc.h: Regenerated.
957 * iq2000-desc.c: Regenerated.
958 * iq2000-dis.c: Regenerated.
959 * iq2000-opc.c: Regenerated.
960 * m32r-asm.c: Regenerated.
961 * m32r-desc.c: Regenerated.
962 * m32r-desc.h: Regenerated.
963 * m32r-dis.c: Regenerated.
964 * m32r-opc.c: Regenerated.
965 * m32r-opc.h: Regenerated.
966 * m32r-opinst.c: Regenerated.
967 * openrisc-desc.c: Regenerated.
968 * openrisc-desc.h: Regenerated.
969 * openrisc-dis.c: Regenerated.
970 * openrisc-opc.c: Regenerated.
971 * openrisc-opc.h: Regenerated.
972 * xstormy16-desc.c: Regenerated.
973 * xstormy16-desc.h: Regenerated.
974 * xstormy16-dis.c: Regenerated.
975 * xstormy16-opc.c: Regenerated.
976 * xstormy16-opc.h: Regenerated.
978 2005-02-14 H.J. Lu <hongjiu.lu@intel.com>
980 * dis-buf.c (perror_memory): Use sprintf_vma to print out
983 2005-02-11 Nick Clifton <nickc@redhat.com>
985 * iq2000-asm.c: Regenerate.
987 * frv-dis.c: Regenerate.
989 2005-02-07 Jim Blandy <jimb@redhat.com>
991 * Makefile.am (CGEN): Load guile.scm before calling the main
993 * Makefile.in: Regenerated.
994 * cgen.sh: Be prepared for the 'cgen' argument to contain spaces.
995 Simply pass the cgen-opc.scm path to ${cgen} as its first
996 argument; ${cgen} itself now contains the '-s', or whatever is
997 appropriate for the Scheme being used.
999 2005-01-31 Andrew Cagney <cagney@gnu.org>
1001 * configure: Regenerate to track ../gettext.m4.
1003 2005-01-31 Jan Beulich <jbeulich@novell.com>
1005 * ia64-gen.c (NELEMS): Define.
1006 (shrink): Generate alias with missing second predicate register when
1007 opcode has two outputs and these are both predicates.
1008 * ia64-opc-i.c (FULL17): Define.
1009 (ia64_opcodes_i): Add mov-to-pr alias without second input. Use FULL17
1010 here to generate output template.
1011 (TBITCM, TNATCM): Undefine after use.
1012 * ia64-opc-m.c (ia64_opcodes_i): Add alloc alias without ar.pfs as
1013 first input. Add ld16 aliases without ar.csd as second output. Add
1014 st16 aliases without ar.csd as second input. Add cmpxchg aliases
1015 without ar.ccv as third input. Add cmp8xchg16 aliases without ar.csd/
1016 ar.ccv as third/fourth inputs. Consolidate through...
1017 (CMPXCHG_acq, CMPXCHG_rel, CMPXCHG_1, CMPXCHG_2, CMPXCHG_4, CMPXCHG_8,
1018 CMPXCHGn, CMP8XCHG16, CMPXCHG_ALL): Define.
1019 * ia64-asmtab.c: Regenerate.
1021 2005-01-27 Andrew Cagney <cagney@gnu.org>
1023 * configure: Regenerate to track ../gettext.m4 change.
1025 2005-01-25 Alexandre Oliva <aoliva@redhat.com>
1027 2004-11-10 Alexandre Oliva <aoliva@redhat.com>
1028 * frv-asm.c: Rebuilt.
1029 * frv-desc.c: Rebuilt.
1030 * frv-desc.h: Rebuilt.
1031 * frv-dis.c: Rebuilt.
1032 * frv-ibld.c: Rebuilt.
1033 * frv-opc.c: Rebuilt.
1034 * frv-opc.h: Rebuilt.
1036 2005-01-24 Andrew Cagney <cagney@gnu.org>
1038 * configure: Regenerate, ../gettext.m4 was updated.
1040 2005-01-21 Fred Fish <fnf@specifixinc.com>
1042 * mips-opc.c: Change INSN_ALIAS to INSN2_ALIAS.
1043 Change INSN_WRITE_MDMX_ACC to INSN2_WRITE_MDMX_ACC.
1044 Change INSN_READ_MDMX_ACC to INSN2_READ_MDMX_ACC.
1045 * mips-dis.c: Ditto.
1047 2005-01-20 Alan Modra <amodra@bigpond.net.au>
1049 * ppc-opc.c (powerpc_opcodes): Add optional 'l' arg to tlbiel.
1051 2005-01-19 Fred Fish <fnf@specifixinc.com>
1053 * mips-dis.c (no_aliases): New disassembly option flag.
1054 (set_default_mips_dis_options): Init no_aliases to zero.
1055 (parse_mips_dis_option): Handle no-aliases option.
1056 (print_insn_mips): Ignore table entries that are aliases
1057 if no_aliases is set.
1058 (print_insn_mips16): Ditto.
1059 * mips-opc.c (mips_builtin_opcodes): Add initializer column for
1060 new pinfo2 member and add INSN_ALIAS initializers as needed. Also
1061 move WR_MACC and RD_MACC initializers from pinfo to pinfo2.
1062 * mips16-opc.c (mips16_opcodes): Ditto.
1064 2005-01-17 Andrew Stubbs <andrew.stubbs@st.com>
1066 * sh-opc.h (arch_sh2a_or_sh3e,arch_sh2a_or_sh4): Correct definition.
1067 (inheritance diagram): Add missing edge.
1068 (arch_sh1_up): Rename arch_sh_up to match external name to make life
1069 easier for the testsuite.
1070 (arch_sh4_nofp_up): Likewise, rename arch_sh4_nofpu_up.
1071 (arch_sh4a_nofp_up): Likewise, rename arch_sh4a_nofpu_up.
1072 (arch_sh2a_nofpu_or_sh4_nommu_nofpu_up): Add missing
1073 arch_sh2a_or_sh4_up child.
1074 (sh_table): Do renaming as above.
1075 Correct comment for ldc.l for gas testsuite to read.
1076 Remove rogue mul.l from sh1 (duplicate of the one for sh2).
1077 Correct comments for movy.w and movy.l for gas testsuite to read.
1078 Correct comments for fmov.d and fmov.s for gas testsuite to read.
1080 2005-01-12 H.J. Lu <hongjiu.lu@intel.com>
1082 * i386-dis.c (OP_E): Don't ignore scale in SIB for 64 bit mode.
1084 2005-01-12 H.J. Lu <hongjiu.lu@intel.com>
1086 * i386-dis.c (OP_E): Ignore scale when index == 0x4 in SIB.
1088 2005-01-10 Andreas Schwab <schwab@suse.de>
1090 * disassemble.c (disassemble_init_for_target) <case
1091 bfd_arch_ia64>: Set skip_zeroes to 16.
1092 <case bfd_arch_tic4x>: Set skip_zeroes to 32.
1094 2004-12-23 Tomer Levi <Tomer.Levi@nsc.com>
1096 * crx-opc.c: Mark 'bcop' instruction as RELAXABLE.
1098 2004-12-14 Svein E. Seldal <Svein.Seldal@solidas.com>
1100 * avr-dis.c: Prettyprint. Added printing of symbol names in all
1101 memory references. Convert avr_operand() to C90 formatting.
1103 2004-12-05 Tomer Levi <Tomer.Levi@nsc.com>
1105 * crx-dis.c (print_arg): Use 'info->print_address_func' for address printing.
1107 2004-11-29 Tomer Levi <Tomer.Levi@nsc.com>
1109 * crx-opc.c (crx_optab): Mark all rbase_disps* operands as signed.
1110 (no_op_insn): Initialize array with instructions that have no
1112 * crx-dis.c (make_instruction): Get rid of COP_BRANCH_INS operand swapping.
1114 2004-11-29 Richard Earnshaw <rearnsha@arm.com>
1116 * arm-dis.c: Correct top-level comment.
1118 2004-11-27 Richard Earnshaw <rearnsha@arm.com>
1120 * arm-opc.h (arm_opcode, thumb_opcode): Add extra field for the
1121 architecuture defining the insn.
1122 (arm_opcodes, thumb_opcodes): Delete. Move to ...
1123 * arm-dis.c (arm_opcodes, thumb_opcodes): Here. Add architecutre
1125 Also include opcode/arm.h.
1126 * Makefile.am (arm-dis.lo): Update dependency list.
1127 * Makefile.in: Regenerate.
1129 2004-11-22 Ravi Ramaseshan <ravi.ramaseshan@codito.com>
1131 * opcode/arc-opc.c (insert_base): Modify ls_operand[LS_OFFSET] to
1132 reflect the change to the short immediate syntax.
1134 2004-11-19 Alan Modra <amodra@bigpond.net.au>
1136 * or32-opc.c (debug): Warning fix.
1137 * po/POTFILES.in: Regenerate.
1139 * maxq-dis.c: Formatting.
1140 (print_insn): Warning fix.
1142 2004-11-17 Daniel Jacobowitz <dan@codesourcery.com>
1144 * arm-dis.c (WORD_ADDRESS): Define.
1145 (print_insn): Use it. Correct big-endian end-of-section handling.
1147 2004-11-08 Inderpreet Singh <inderpreetb@nioda.hcltech.com>
1148 Vineet Sharma <vineets@noida.hcltech.com>
1150 * maxq-dis.c: New file.
1151 * disassemble.c (ARCH_maxq): Define.
1152 (disassembler): Add 'print_insn_maxq_little' for handling maxq
1154 * configure.in: Add case for bfd_maxq_arch.
1155 * configure: Regenerate.
1156 * Makefile.am: Add support for maxq-dis.c
1157 * Makefile.in: Regenerate.
1158 * aclocal.m4: Regenerate.
1160 2004-11-05 Tomer Levi <Tomer.Levi@nsc.com>
1162 * crx-opc.c (crx_optab): Rename 'arg_icr' to 'arg_idxr' for Index register
1164 * crx-dis.c: Likewise.
1166 2004-11-04 Hans-Peter Nilsson <hp@axis.com>
1168 Generally, handle CRISv32.
1169 * cris-dis.c (TRACE_CASE): Define as (disdata->trace_case).
1170 (struct cris_disasm_data): New type.
1171 (format_reg, format_hex, cris_constraint, print_flags)
1172 (get_opcode_entry): Add struct cris_disasm_data * parameter. All
1174 (format_sup_reg, print_insn_crisv32_with_register_prefix)
1175 (print_insn_crisv32_without_register_prefix)
1176 (print_insn_crisv10_v32_with_register_prefix)
1177 (print_insn_crisv10_v32_without_register_prefix)
1178 (cris_parse_disassembler_options): New functions.
1179 (bytes_to_skip, cris_spec_reg): Add enum cris_disass_family
1180 parameter. All callers changed.
1181 (get_opcode_entry): Call malloc, not xmalloc. Return NULL on
1183 (cris_constraint) <case 'Y', 'U'>: New cases.
1184 (bytes_to_skip): Handle 'Y' and 'N' as 's'. Skip size is 4 bytes
1186 (print_with_operands) <case 'Y'>: New case.
1187 (print_with_operands) <case 'T', 'A', '[', ']', 'd', 'n', 'u'>
1188 <case 'N', 'Y', 'Q'>: New cases.
1189 (print_insn_cris_generic): Emit "bcc ." for zero and CRISv32.
1190 (print_insn_cris_with_register_prefix)
1191 (print_insn_cris_without_register_prefix): Call
1192 cris_parse_disassembler_options.
1193 * cris-opc.c (cris_spec_regs): Mention that this table isn't used
1194 for CRISv32 and the size of immediate operands. New v32-only
1195 entries for bz, pid, srs, wz, exs, eda, dz, ebp, erp, nrp, ccs and
1196 spc. Add v32-only 4-byte entries for p2, p3, p5 and p6. Change
1197 ccr, ibr, irp to be v0..v10. Change bar, dccr to be v8..v10.
1198 Change brp to be v3..v10.
1199 (cris_support_regs): New vector.
1200 (cris_opcodes): Update head comment. New format characters '[',
1201 ']', space, 'A', 'd', 'N', 'n', 'Q', 'T', 'u', 'U', 'Y'.
1202 Add new opcodes for v32 and adjust existing opcodes to accommodate
1203 differences to earlier variants.
1204 (cris_cond15s): New vector.
1206 2004-11-04 Jan Beulich <jbeulich@novell.com>
1208 * i386-dis.c (Eq, Edqw, indirEp, Gdq, I1): Define.
1210 (Mp): Use f_mode rather than none at all.
1211 (t_mode, dq_mode, dqw_mode, f_mode, const_1_mode): Define. t_mode
1212 replaces what previously was x_mode; x_mode now means 128-bit SSE
1214 (dis386): Make far jumps and calls have an 'l' prefix only in AT&T
1215 mode. movmskpX's, pextrw's, and pmovmskb's first operands are Gdq.
1216 pinsrw's second operand is Edqw.
1217 (grps): 1-bit shifts' and rotates' second operands are I1. cmpxchg8b's
1218 operand is Eq. movntq's and movntdq's first operands are EM. s[gi]dt,
1219 fldenv, frstor, fsave, fstenv all should also have suffixes in Intel
1220 mode when an operand size override is present or always suffixing.
1221 More instructions will need to be added to this group.
1222 (putop): Handle new macro chars 'C' (short/long suffix selector),
1223 'I' (Intel mode override for following macro char), and 'J' (for
1224 adding the 'l' prefix to far branches in AT&T mode). When an
1225 alternative was specified in the template, honor macro character when
1226 specified for Intel mode.
1227 (OP_E): Handle new *_mode values. Correct pointer specifications for
1228 memory operands. Consolidate output of index register.
1229 (OP_G): Handle new *_mode values.
1230 (OP_I): Handle const_1_mode.
1231 (OP_ESreg, OP_DSreg): Generate pointer specifications. Indicate
1232 respective opcode prefix bits have been consumed.
1233 (OP_EM, OP_EX): Provide some default handling for generating pointer
1236 2004-10-28 Tomer Levi <Tomer.Levi@nsc.com>
1238 * crx-opc.c (REV_COP_INST): New macro, reverse operand order of
1241 2004-10-27 Tomer Levi <Tomer.Levi@nsc.com>
1243 * crx-dis.c (enum REG_ARG_TYPE): New, replacing COP_ARG_TYPE.
1244 (getregliststring): Support HI/LO and user registers.
1245 * crx-opc.c (crx_instruction): Update data structure according to the
1246 rearrangement done in CRX opcode header file.
1247 (crx_regtab): Likewise.
1248 (crx_optab): Likewise.
1249 (crx_instruction): Reorder load/stor instructions, remove unsupported
1251 support new Co-Processor instruction 'cpi'.
1253 2004-10-27 Nick Clifton <nickc@redhat.com>
1255 * opcodes/iq2000-asm.c: Regenerate.
1256 * opcodes/iq2000-desc.c: Regenerate.
1257 * opcodes/iq2000-desc.h: Regenerate.
1258 * opcodes/iq2000-dis.c: Regenerate.
1259 * opcodes/iq2000-ibld.c: Regenerate.
1260 * opcodes/iq2000-opc.c: Regenerate.
1261 * opcodes/iq2000-opc.h: Regenerate.
1263 2004-10-21 Tomer Levi <Tomer.Levi@nsc.com>
1265 * crx-opc.c (crx_instruction): Replace i3, i4, i5 with us3,
1266 us4, us5 (respectively).
1267 Remove unsupported 'popa' instruction.
1268 Reverse operands order in store co-processor instructions.
1270 2004-10-15 Alan Modra <amodra@bigpond.net.au>
1272 * Makefile.am: Run "make dep-am"
1273 * Makefile.in: Regenerate.
1275 2004-10-12 Bob Wilson <bob.wilson@acm.org>
1277 * xtensa-dis.c: Use ISO C90 formatting.
1279 2004-10-09 Alan Modra <amodra@bigpond.net.au>
1281 * ppc-opc.c: Revert 2004-09-09 change.
1283 2004-10-07 Bob Wilson <bob.wilson@acm.org>
1285 * xtensa-dis.c (state_names): Delete.
1286 (fetch_data): Use xtensa_isa_maxlength.
1287 (print_xtensa_operand): Replace operand parameter with opcode/operand
1288 pair. Remove print_sr_name parameter. Use new xtensa-isa.h functions.
1289 (print_insn_xtensa): Use new xtensa-isa.h functions. Handle multislot
1290 instruction bundles. Use xmalloc instead of malloc.
1292 2004-10-07 David Gibson <david@gibson.dropbear.id.au>
1294 * ppc-opc.c: Replace literal "0"s with NULLs in pointer
1297 2004-10-07 Tomer Levi <Tomer.Levi@nsc.com>
1299 * crx-opc.c (crx_instruction): Support Co-processor insns.
1300 * crx-dis.c (COP_ARG_TYPE): New enum for CO-Processor arguments.
1301 (getregliststring): Change function to use the above enum.
1302 (print_arg): Handle CO-Processor insns.
1303 (crx_cinvs): Add 'b' option to invalidate the branch-target
1306 2004-10-06 Aldy Hernandez <aldyh@redhat.com>
1308 * ppc-opc.c (powerpc_opcodes): Add efscfd, efdabs, efdnabs,
1309 efdneg, efdadd, efdsub, efdmul, efddiv, efdcmpgt, efdcmplt,
1310 efdcmpeq, efdtstgt, efdtstlt, efdtsteq, efdcfsi, efdcfsid,
1311 efdcfui, efdcfuid, efdcfsf, efdcfuf, efdctsi, efdctsidz, efdctsiz,
1312 efdctui, efdctuidz, efdctuiz, efdctsf, efdctuf, efdctuf, efdcfs.
1314 2004-10-01 Bill Farmer <Bill@the-farmers.freeserve.co.uk>
1316 * pdp11-dis.c (print_insn_pdp11): Subtract the SOB's displacement
1319 2004-09-30 Paul Brook <paul@codesourcery.com>
1321 * arm-dis.c (print_insn_arm): Handle 'e' for SMI instruction.
1322 * arm-opc.h: Document %e. Add ARMv6ZK instructions.
1324 2004-09-17 H.J. Lu <hongjiu.lu@intel.com>
1326 * Makefile.am (AUTOMAKE_OPTIONS): Require 1.9.
1327 (CONFIG_STATUS_DEPENDENCIES): New.
1328 (Makefile): Removed.
1329 (config.status): Likewise.
1330 * Makefile.in: Regenerated.
1332 2004-09-17 Alan Modra <amodra@bigpond.net.au>
1334 * Makefile.am: Run "make dep-am".
1335 * Makefile.in: Regenerate.
1336 * aclocal.m4: Regenerate.
1337 * configure: Regenerate.
1338 * po/POTFILES.in: Regenerate.
1339 * po/opcodes.pot: Regenerate.
1341 2004-09-11 Andreas Schwab <schwab@suse.de>
1343 * configure: Rebuild.
1345 2004-09-09 Segher Boessenkool <segher@kernel.crashing.org>
1347 * ppc-opc.c (L): Make this field not optional.
1349 2004-09-03 Tomer Levi <Tomer.Levi@nsc.com>
1351 * opc-crx.c: Rename 'popma' to 'popa', remove 'pushma'.
1352 Fix parameter to 'm[t|f]csr' insns.
1354 2004-08-30 Nathanael Nerode <neroden@gcc.gnu.org>
1356 * configure.in: Autoupdate to autoconf 2.59.
1357 * aclocal.m4: Rebuild with aclocal 1.4p6.
1358 * configure: Rebuild with autoconf 2.59.
1359 * Makefile.in: Rebuild with automake 1.4p6 (picking up
1360 bfd changes for autoconf 2.59 on the way).
1361 * config.in: Rebuild with autoheader 2.59.
1363 2004-08-27 Richard Sandiford <rsandifo@redhat.com>
1365 * frv-desc.[ch], frv-opc.[ch]: Regenerated.
1367 2004-07-30 Michal Ludvig <mludvig@suse.cz>
1369 * i386-dis.c (GRPPADLCK): Renamed to GRPPADLCK1
1370 (GRPPADLCK2): New define.
1371 (twobyte_has_modrm): True for 0xA6.
1372 (grps): GRPPADLCK2 for opcode 0xA6.
1374 2004-07-29 Alexandre Oliva <aoliva@redhat.com>
1376 Introduce SH2a support.
1377 * sh-opc.h (arch_sh2a_base): Renumber.
1378 (arch_sh2a_nofpu_base): Remove.
1379 (arch_sh_base_mask): Adjust.
1380 (arch_opann_mask): New.
1381 (arch_sh2a, arch_sh2a_nofpu): Adjust.
1382 (arch_sh2a_up, arch_sh2a_nofpu_up): Likewise.
1383 (sh_table): Adjust whitespace.
1384 2004-02-24 Corinna Vinschen <vinschen@redhat.com>
1385 * sh-opc.h (arch_sh2a_nofpu_up): New. Use instead of arch_sh2a_up in
1386 instruction list throughout.
1387 (arch_sh2a_up): Redefine to include fpu instruction set. Use instead
1388 of arch_sh2a in instruction list throughout.
1389 (arch_sh2e_up): Accomodate above changes.
1390 (arch_sh2_up): Ditto.
1391 2004-02-20 Corinna Vinschen <vinschen@redhat.com>
1392 * sh-opc.h: Add arch_sh2a_nofpu to arch_sh2_up.
1393 2004-02-18 Corinna Vinschen <vinschen@redhat.com>
1394 * sh-dis.c (print_insn_sh): Add bfd_mach_sh2a_nofpu handling.
1395 * sh-opc.h (arch_sh2a_nofpu): New.
1396 (arch_sh2a_up): New, defines sh2a and sh2a_nofpu.
1397 (sh_table): Change all arch_sh2a to arch_sh2a_up unless FPU
1399 2004-01-20 DJ Delorie <dj@redhat.com>
1400 * sh-dis.c (print_insn_sh): SH2A does not have 'X' fp regs.
1401 2003-12-29 DJ Delorie <dj@redhat.com>
1402 * sh-opc.c (sh_nibble_type, sh_arg_type, arch_2a, arch_2e_up,
1403 sh_opcode_info, sh_table): Add sh2a support.
1404 (arch_op32): New, to tag 32-bit opcodes.
1405 * sh-dis.c (print_insn_sh): Support sh2a opcodes.
1406 2003-12-02 Michael Snyder <msnyder@redhat.com>
1407 * sh-opc.h (arch_sh2a): Add.
1408 * sh-dis.c (arch_sh2a): Handle.
1409 * sh-opc.h (arch_sh2_up): Fix up to include arch_sh2a.
1411 2004-07-27 Tomer Levi <Tomer.Levi@nsc.com>
1413 * crx-opc.c: Add popx,pushx insns. Indent code, fix comments.
1415 2004-07-22 Nick Clifton <nickc@redhat.com>
1418 * h8300-dis.c (bfd_h8_disassemble): Do not dump raw bytes for the
1419 insns - this is done by objdump itself.
1420 * h8500-dis.c (print_insn_h8500): Likewise.
1422 2004-07-21 Jan Beulich <jbeulich@novell.com>
1424 * i386-dis.c (OP_E): Show rip-relative addressing in 64-bit mode
1425 regardless of address size prefix in effect.
1426 (ptr_reg): Size or address registers does not depend on rex64, but
1427 on the presence of an address size override.
1428 (OP_MMX): Use rex.x only for xmm registers.
1429 (OP_EM): Use rex.z only for xmm registers.
1431 2004-07-20 Maciej W. Rozycki <macro@linux-mips.org>
1433 * mips-opc.c (mips_builtin_opcodes): Move coprocessor 2
1434 move/branch operations to the bottom so that VR5400 multimedia
1435 instructions take precedence in disassembly.
1437 2004-07-20 Maciej W. Rozycki <macro@linux-mips.org>
1439 * mips-opc.c (mips_builtin_opcodes): Remove the MIPS32
1440 ISA-specific "break" encoding.
1442 2004-07-13 Elvis Chiang <elvisfb@gmail.com>
1444 * arm-opc.h: Fix typo in comment.
1446 2004-07-11 Andreas Schwab <schwab@suse.de>
1448 * m68k-dis.c (m68k_valid_ea): Fix typos in last change.
1450 2004-07-09 Andreas Schwab <schwab@suse.de>
1452 * m68k-dis.c (m68k_valid_ea): Check validity of all codes.
1454 2004-07-07 Tomer Levi <Tomer.Levi@nsc.com>
1456 * Makefile.am (CFILES): Add crx-dis.c, crx-opc.c.
1457 (ALL_MACHINES): Add crx-dis.lo, crx-opc.lo.
1458 (crx-dis.lo): New target.
1459 (crx-opc.lo): Likewise.
1460 * Makefile.in: Regenerate.
1461 * configure.in: Handle bfd_crx_arch.
1462 * configure: Regenerate.
1463 * crx-dis.c: New file.
1464 * crx-opc.c: New file.
1465 * disassemble.c (ARCH_crx): Define.
1466 (disassembler): Handle ARCH_crx.
1468 2004-06-29 James E Wilson <wilson@specifixinc.com>
1470 * ia64-opc-a.c (ia64_opcodes_a): Delete mov immediate pseudo for adds.
1471 * ia64-asmtab.c: Regnerate.
1473 2004-06-28 Alan Modra <amodra@bigpond.net.au>
1475 * ppc-opc.c (insert_fxm): Handle mfocrf and mtocrf.
1476 (extract_fxm): Don't test dialect.
1477 (XFXFXM_MASK): Include the power4 bit.
1478 (XFXM): Add p4 param.
1479 (powerpc_opcodes): Add mfocrf and mtocrf. Adjust mtcr.
1481 2004-06-27 Alexandre Oliva <aoliva@redhat.com>
1483 2003-07-21 Richard Sandiford <rsandifo@redhat.com>
1484 * disassemble.c (disassembler): Handle bfd_mach_h8300sxn.
1486 2004-06-26 Alan Modra <amodra@bigpond.net.au>
1488 * ppc-opc.c (BH, XLBH_MASK): Define.
1489 (powerpc_opcodes): Allow BH field on bclr, bclrl, bcctr, bcctrl.
1491 2004-06-24 Alan Modra <amodra@bigpond.net.au>
1493 * i386-dis.c (x_mode): Comment.
1494 (two_source_ops): File scope.
1495 (float_mem): Correct fisttpll and fistpll.
1496 (float_mem_mode): New table.
1498 (OP_E): Correct intel mode PTR output.
1499 (ptr_reg): Use open_char and close_char.
1500 (PNI_Fixup): Handle possible suffix on sidt. Use op1out etc. for
1501 operands. Set two_source_ops.
1503 2004-06-15 Alan Modra <amodra@bigpond.net.au>
1505 * arc-ext.c (build_ARC_extmap): Use bfd_get_section_size
1506 instead of _raw_size.
1508 2004-06-08 Jakub Jelinek <jakub@redhat.com>
1510 * ia64-gen.c (in_iclass): Handle more postinc st
1512 * ia64-asmtab.c: Rebuilt.
1514 2004-06-01 Martin Schwidefsky <schwidefsky@de.ibm.com>
1516 * s390-opc.txt: Correct architecture mask for some opcodes.
1517 lrv, lrvh, strv, ml, dl, alc, slb rll and mvclu are available
1518 in the esa mode as well.
1520 2004-05-28 Andrew Stubbs <andrew.stubbs@superh.com>
1522 * sh-dis.c (target_arch): Make unsigned.
1523 (print_insn_sh): Replace (most of) switch with a call to
1524 sh_get_arch_from_bfd_mach(). Also use new architecture flags system.
1525 * sh-opc.h: Redefine architecture flags values.
1526 Add sh3-nommu architecture.
1527 Reorganise <arch>_up macros so they make more visual sense.
1528 (SH_MERGE_ARCH_SET): Define new macro.
1529 (SH_VALID_BASE_ARCH_SET): Likewise.
1530 (SH_VALID_MMU_ARCH_SET): Likewise.
1531 (SH_VALID_CO_ARCH_SET): Likewise.
1532 (SH_VALID_ARCH_SET): Likewise.
1533 (SH_MERGE_ARCH_SET_VALID): Likewise.
1534 (SH_ARCH_SET_HAS_FPU): Likewise.
1535 (SH_ARCH_SET_HAS_DSP): Likewise.
1536 (SH_ARCH_UNKNOWN_ARCH): Likewise.
1537 (sh_get_arch_from_bfd_mach): Add prototype.
1538 (sh_get_arch_up_from_bfd_mach): Likewise.
1539 (sh_get_bfd_mach_from_arch_set): Likewise.
1540 (sh_merge_bfd_arc): Likewise.
1542 2004-05-24 Peter Barada <peter@the-baradas.com>
1544 * m68k-dis.c(print_insn_m68k): Strip body of diassembly out
1545 into new match_insn_m68k function. Loop over canidate
1546 matches and select first that completely matches.
1547 * m68k-dis.c(print_insn_arg): Fix 'g' case to only extract 1 bit.
1548 * m68k-dis.c(print_insn_arg): Call new function m68k_valid_ea
1549 to verify addressing for MAC/EMAC.
1550 * m68k-dis.c(print_insn_arg): Use reg_half_names for MAC/EMAC
1551 reigster halves since 'fpu' and 'spl' look misleading.
1552 * m68k-dis.c(fetch_arg): Fix 'G', 'H', 'I', 'f', 'M', 'N' cases.
1553 * m68k-opc.c: Rearragne mac/emac cases to use longest for
1554 first, tighten up match masks.
1555 * m68k-opc.c: Add 'size' field to struct m68k_opcode. Produce
1556 'size' from special case code in print_insn_m68k to
1557 determine decode size of insns.
1559 2004-05-19 Alan Modra <amodra@bigpond.net.au>
1561 * ppc-opc.c (insert_fxm): Enable two operand mfcr when -many as
1562 well as when -mpower4.
1564 2004-05-13 Nick Clifton <nickc@redhat.com>
1566 * po/fr.po: Updated French translation.
1568 2004-05-05 Peter Barada <peter@the-baradas.com>
1570 * m68k-dis.c(print_insn_m68k): Add new chips, use core
1571 variants in arch_mask. Only set m68881/68851 for 68k chips.
1572 * m68k-op.c: Switch from ColdFire chips to core variants.
1574 2004-05-05 Alan Modra <amodra@bigpond.net.au>
1577 * ppc-opc.c (PPCVEC): Remove PPC_OPCODE_PPC.
1579 2004-04-29 Ben Elliston <bje@au.ibm.com>
1581 * ppc-opc.c (XCMPL): Renmame to XOPL. Update users.
1582 (powerpc_opcodes): Add "dbczl" instruction for PPC970.
1584 2004-04-22 Kaz Kojima <kkojima@rr.iij4u.or.jp>
1586 * sh-dis.c (print_insn_sh): Print the value in constant pool
1587 as a symbol if it looks like a symbol.
1589 2004-04-22 Peter Barada <peter@the-baradas.com>
1591 * m68k-dis.c(print_insn_m68k): Set mfcmac/mcfemac on
1592 appropriate ColdFire architectures.
1593 (print_insn_m68k): Handle EMAC, MAC/EMAC scalefactor, and MAC/EMAC
1595 Add EMAC instructions, fix MAC instructions. Remove
1596 macmw/macml/msacmw/msacml instructions since mask addressing now
1599 2004-04-20 Jakub Jelinek <jakub@redhat.com>
1601 * sparc-opc.c (fmoviccx, fmovfccx, fmovccx): Define.
1602 (fmovicc, fmovfcc, fmovcc): Remove fpsize argument, change opcode to
1603 suffix. Use fmov*x macros, create all 3 fpsize variants in one
1604 macro. Adjust all users.
1606 2004-04-15 Anil Paranjpe <anilp1@kpitcummins.com>
1608 * h8300-dis.c (bfd_h8_disassemble) : Treat "adds" & "subs"
1611 2004-03-30 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
1613 * m32r-asm.c: Regenerate.
1615 2004-03-29 Stan Shebs <shebs@apple.com>
1617 * mpw-config.in, mpw-make.sed: Remove MPW support files, no longer
1620 2004-03-19 Alan Modra <amodra@bigpond.net.au>
1622 * aclocal.m4: Regenerate.
1623 * config.in: Regenerate.
1624 * configure: Regenerate.
1625 * po/POTFILES.in: Regenerate.
1626 * po/opcodes.pot: Regenerate.
1628 2004-03-16 Alan Modra <amodra@bigpond.net.au>
1630 * ppc-dis.c (print_insn_powerpc): Don't print tabs. Handle
1632 * ppc-opc.c (RA0): Define.
1633 (RAQ, RAL, RAM, RAS, RSQ, RTQ, RSO): Use PPC_OPERAND_GPR_0.
1634 (RAOPT): Rename from RAO. Update all uses.
1635 (powerpc_opcodes): Use RA0 as appropriate.
1637 2004-03-15 Aldy Hernandez <aldyh@redhat.com>
1639 * ppc-opc.c (powerpc_opcodes): Add BOOKE versions of mfsprg.
1641 2004-03-15 Alan Modra <amodra@bigpond.net.au>
1643 * sparc-dis.c (print_insn_sparc): Update getword prototype.
1645 2004-03-12 Michal Ludvig <mludvig@suse.cz>
1647 * i386-dis.c (GRPPLOCK): Delete.
1648 (grps): Delete GRPPLOCK entry.
1650 2004-03-12 Alan Modra <amodra@bigpond.net.au>
1652 * i386-dis.c (OP_M, OP_0f0e, OP_0fae, NOP_Fixup): New functions.
1654 (None, PADLOCK_SPECIAL, PADLOCK_0): Delete.
1655 (GRPPADLCK): Define.
1656 (dis386): Use NOP_Fixup on "nop".
1657 (dis386_twobyte): Use GRPPADLCK on opcode 0xa7.
1658 (twobyte_has_modrm): Set for 0xa7.
1659 (padlock_table): Delete. Move to..
1660 (grps): ..here, using OP_0f07. Use OP_Ofae on lfence, mfence
1662 (print_insn): Revert PADLOCK_SPECIAL code.
1663 (OP_E): Delete sfence, lfence, mfence checks.
1665 2004-03-12 Jakub Jelinek <jakub@redhat.com>
1667 * i386-dis.c (grps): Use INVLPG_Fixup instead of OP_E for invlpg.
1668 (INVLPG_Fixup): New function.
1669 (PNI_Fixup): Remove ATTRIBUTE_UNUSED from sizeflag.
1671 2004-03-12 Michal Ludvig <mludvig@suse.cz>
1673 * i386-dis.c (PADLOCK_SPECIAL, PADLOCK_0): New defines.
1674 (dis386_twobyte): Opcode 0xa7 is PADLOCK_0.
1675 (padlock_table): New struct with PadLock instructions.
1676 (print_insn): Handle PADLOCK_SPECIAL.
1678 2004-03-12 Alan Modra <amodra@bigpond.net.au>
1680 * i386-dis.c (grps): Use clflush by default for 0x0fae/7.
1681 (OP_E): Twiddle clflush to sfence here.
1683 2004-03-08 Nick Clifton <nickc@redhat.com>
1685 * po/de.po: Updated German translation.
1687 2003-03-03 Andrew Stubbs <andrew.stubbs@superh.com>
1689 * sh-dis.c (print_insn_sh): Don't disassemble fp instructions in
1690 nofpu mode. Add BFD type bfd_mach_sh4_nommu_nofpu.
1691 * sh-opc.h: Add sh4_nommu_nofpu architecture and adjust instructions
1694 2004-03-01 Richard Sandiford <rsandifo@redhat.com>
1696 * frv-asm.c: Regenerate.
1697 * frv-desc.c: Regenerate.
1698 * frv-desc.h: Regenerate.
1699 * frv-dis.c: Regenerate.
1700 * frv-ibld.c: Regenerate.
1701 * frv-opc.c: Regenerate.
1702 * frv-opc.h: Regenerate.
1704 2004-03-01 Richard Sandiford <rsandifo@redhat.com>
1706 * frv-desc.c, frv-opc.c: Regenerate.
1708 2004-03-01 Richard Sandiford <rsandifo@redhat.com>
1710 * frv-desc.c, frv-opc.c, frv-opc.h: Regenerate.
1712 2004-02-26 Andrew Stubbs <andrew.stubbs@superh.com>
1714 * sh-opc.h: Move fsca and fsrra instructions from sh4a to sh4.
1715 Also correct mistake in the comment.
1717 2004-02-26 Andrew Stubbs <andrew.stubbs@superh.com>
1719 * sh-dis.c (print_insn_sh): Add REG_N_D nibble type to
1720 ensure that double registers have even numbers.
1721 Add REG_N_B01 for nn01 (binary 01) nibble to ensure
1722 that reserved instruction 0xfffd does not decode the same
1724 * sh-opc.h: Add REG_N_D nibble type and use it whereever
1725 REG_N refers to a double register.
1726 Add REG_N_B01 nibble type and use it instead of REG_NM
1728 Adjust the bit patterns in a few comments.
1730 2004-02-25 Aldy Hernandez <aldyh@redhat.com>
1732 * ppc-opc.c (powerpc_opcodes): Change mask for dcbt and dcbtst.
1734 2004-02-20 Aldy Hernandez <aldyh@redhat.com>
1736 * ppc-opc.c (powerpc_opcodes): Move mfmcsrr0 before mfdc_dat.
1738 2004-02-20 Aldy Hernandez <aldyh@redhat.com>
1740 * ppc-opc.c (powerpc_opcodes): Add m*ivor35.
1742 2004-02-20 Aldy Hernandez <aldyh@redhat.com>
1744 * ppc-opc.c (powerpc_opcodes): Add mfivor32, mfivor33, mfivor34,
1745 mtivor32, mtivor33, mtivor34.
1747 2004-02-19 Aldy Hernandez <aldyh@redhat.com>
1749 * ppc-opc.c (powerpc_opcodes): Add mfmcar.
1751 2004-02-10 Petko Manolov <petkan@nucleusys.com>
1753 * arm-opc.h Maverick accumulator register opcode fixes.
1755 2004-02-13 Ben Elliston <bje@wasabisystems.com>
1757 * m32r-dis.c: Regenerate.
1759 2004-01-27 Michael Snyder <msnyder@redhat.com>
1761 * sh-opc.h (sh_table): "fsrra", not "fssra".
1763 2004-01-23 Andrew Over <andrew.over@cs.anu.edu.au>
1765 * sparc-opc.c (fdtox, fstox, fqtox, fxtod, fxtos, fxtoq): Tighten
1768 2004-01-19 Andrew Over <andrew.over@cs.anu.edu.au>
1770 * sparc-opc.c (sparc_opcodes) <f[dsq]tox, fxto[dsq]>: Fix args.
1772 2004-01-19 Alan Modra <amodra@bigpond.net.au>
1774 * i386-dis.c (OP_E): Print scale factor on intel mode sib when not
1775 1. Don't print scale factor on AT&T mode when index missing.
1777 2004-01-16 Alexandre Oliva <aoliva@redhat.com>
1779 * m10300-opc.c (mov): 8- and 24-bit immediates are zero-extended
1780 when loaded into XR registers.
1782 2004-01-14 Richard Sandiford <rsandifo@redhat.com>
1784 * frv-desc.h: Regenerate.
1785 * frv-desc.c: Regenerate.
1786 * frv-opc.c: Regenerate.
1788 2004-01-13 Michael Snyder <msnyder@redhat.com>
1790 * sh-dis.c (print_insn_sh): Allocate 4 bytes for insn.
1792 2004-01-09 Paul Brook <paul@codesourcery.com>
1794 * arm-opc.h (arm_opcodes): Move generic mcrr after known
1797 2004-01-07 Daniel Jacobowitz <drow@mvista.com>
1799 * Makefile.am (libopcodes_la_DEPENDENCIES)
1800 (libopcodes_la_LIBADD): Revert 2003-05-17 change. Add explanatory
1801 comment about the problem.
1802 * Makefile.in: Regenerate.
1804 2004-01-06 Alexandre Oliva <aoliva@redhat.com>
1806 2003-12-19 Alexandre Oliva <aoliva@redhat.com>
1807 * frv-asm.c (parse_ulo16, parse_uhi16, parse_d12): Fix some
1808 cut&paste errors in shifting/truncating numerical operands.
1809 2003-08-04 Alexandre Oliva <aoliva@redhat.com>
1810 * frv-asm.c (parse_ulo16): Parse gotofflo and gotofffuncdesclo.
1811 (parse_uslo16): Likewise.
1812 (parse_uhi16): Parse gotoffhi and gotofffuncdeschi.
1813 (parse_d12): Parse gotoff12 and gotofffuncdesc12.
1814 (parse_s12): Likewise.
1815 2003-08-04 Alexandre Oliva <aoliva@redhat.com>
1816 * frv-asm.c (parse_ulo16): Parse gotlo and gotfuncdesclo.
1817 (parse_uslo16): Likewise.
1818 (parse_uhi16): Parse gothi and gotfuncdeschi.
1819 (parse_d12): Parse got12 and gotfuncdesc12.
1820 (parse_s12): Likewise.
1822 2004-01-02 Albert Bartoszko <albar@nt.kegel.com.pl>
1824 * msp430-dis.c (msp430_doubleoperand): Check for an 'add'
1825 instruction which looks similar to an 'rla' instruction.
1827 For older changes see ChangeLog-0203
1833 version-control: never