opcodes/ChangeLog

   1 2010-10-22  Alan Modra  <amodra@gmail.com>
   2
   3         * Makefile.am (CLEANFILES): Add stamp-lm32.  Sort.
   4         * Makefile.in: Regenerate.
   5
   6 2010-10-18  Maciej W. Rozycki  <macro@linux-mips.org>
   7
   8         * mips-opc.c (mips_builtin_opcodes): Move M_LD_OB and M_SD_OB
   9         macros before their corresponding MIPS III hardware instructions.
  10
  11 2010-10-16  H.J. Lu  <hongjiu.lu@intel.com>
  12
  13         * i386-gen.c (cpu_flag_init): Add CpuNop to CPU_GENERIC64_FLAGS.
  14
  15         * i386-init.h: Regenerated.
  16
  17 2010-10-15  Mike Frysinger  <vapier@gentoo.org>
  18
  19         * bfin-dis.c (decode_dsp32alu_0): Call imm5d() for BYTEOP2M.
  20
  21 2010-10-14  H.J. Lu  <hongjiu.lu@intel.com>
  22
  23         * i386-opc.tbl: Remove CheckRegSize from movq.
  24         * i386-tbl.h: Regenerated.
  25
  26 2010-10-14  H.J. Lu  <hongjiu.lu@intel.com>
  27
  28         * i386-opc.tbl: Remove CheckRegSize from instructions with
  29         0, 1 or fixed operands.
  30         * i386-tbl.h: Regenerated.
  31
  32 2010-10-14  H.J. Lu  <hongjiu.lu@intel.com>
  33
  34         * i386-gen.c (opcode_modifiers): Add CheckRegSize.
  35
  36         * i386-opc.h (CheckRegSize): New.
  37         (i386_opcode_modifier): Add checkregsize.
  38
  39         * i386-opc.tbl: Add CheckRegSize to instructions which
  40         require register size check.
  41         * i386-tbl.h: Regenerated.
  42
  43 2010-10-12  Andreas Schwab  <schwab@linux-m68k.org>
  44
  45         * m68k-opc.c (m68k_opcodes): Move fnop before fbf.
  46
  47 2010-10-11  Andreas Krebbel  <Andreas.Krebbel@de.ibm.com>
  48
  49         * s390-opc.c: Make the instruction masks for the load/store on
  50         condition instructions to cover the condition code mask as well.
  51         * s390-opc.txt: lgoc -> locg and stgoc -> stocg.
  52
  53 2010-10-11  Jan Kratochvil  <jan.kratochvil@redhat.com>
  54             Jiang Jilin  <freephp@gmail.com>
  55
  56         * Makefile.am (libopcodes_a_SOURCES): New as empty.
  57         * Makefile.in: Regenerate.
  58
  59 2010-10-09  Matt Rice  <ratmice@gmail.com>
  60
  61         * fr30-desc.h: Regenerate.
  62         * frv-desc.h: Regenerate.
  63         * ip2k-desc.h: Regenerate.
  64         * iq2000-desc.h: Regenerate.
  65         * lm32-desc.h: Regenerate.
  66         * m32c-desc.h: Regenerate.
  67         * m32r-desc.h: Regenerate.
  68         * mep-desc.h: Regenerate.
  69         * mep-opc.c: Regenerate.
  70         * mt-desc.h: Regenerate.
  71         * openrisc-desc.h: Regenerate.
  72         * xc16x-desc.h: Regenerate.
  73         * xstormy16-desc.h: Regenerate.
  74
  75 2010-10-08  Pierre Muller  <muller@ics.u-strasbg.fr>
  76
  77         Fix build with -DDEBUG=7
  78         * frv-opc.c: Regenerate.
  79         * or32-dis.c (DEBUG): Don't redefine.
  80         (find_bytes_big, or32_extract, or32_opcode_match, or32_print_register):
  81         Adapt DEBUG code to some type changes throughout.
  82         * or32-opc.c (or32_extract): Likewise.
  83
  84 2010-10-07  Bernd Schmidt  <bernds@codesourcery.com>
  85
  86         * tic6x-dis.c (print_insn_tic6x): Correct decoding of fstg field
  87         in SPKERNEL instructions.
  88
  89 2010-10-02  H.J. Lu  <hongjiu.lu@intel.com>
  90
  91         PR binutils/12076
  92         * i386-dis.c (RMAL): Remove duplicate.
  93
  94 2010-09-30  Pierre Muller  <muller@ics.u-strasbg.fr>
  95
  96         * s390-mkopc.c (main): Exit with error 1 if sscanf fails
  97         to parse all 6 parameters.
  98
  99 2010-09-28  Pierre Muller  <muller@ics.u-strasbg.fr>
 100
 101         * s390-mkopc.c (main): Change description array size to 80.
 102         Add maximum length of 79 to description parsing.
 103
 104 2010-09-27  Ralf Wildenhues  <Ralf.Wildenhues@gmx.de>
 105
 106         * configure: Regenerate.
 107
 108 2010-09-27  Andreas Krebbel  <Andreas.Krebbel@de.ibm.com>
 109
 110         * s390-mkopc.c (enum s390_opcde_cpu_val): Add S390_OPCODE_Z196.
 111         (main): Recognize the new CPU string.
 112         * s390-opc.c: Add new instruction formats and masks.
 113         * s390-opc.txt: Add new z196 instructions.
 114
 115 2010-09-27  Andreas Krebbel  <Andreas.Krebbel@de.ibm.com>
 116
 117         * s390-dis.c (print_insn_s390): Pick instruction with most
 118         specific mask.
 119         * s390-opc.c: Add unused bits to the insn mask.
 120         * s390-opc.txt: Reorder some instructions to prefer more recent
 121         versions.
 122
 123 2010-09-27  Tejas Belagod  <tejas.belagod@arm.com>
 124
 125         * arm_dis.c (print_insn_coprocessor): Apply off-by-alignment
 126         correction to unaligned PCs while printing comment.
 127
 128 2010-09-23  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 129
 130         * arm-dis.c (arm_opcodes): Add Virtualiztion Extensions support.
 131         (thumb32_opcodes): Likewise.
 132         (banked_regname): New function.
 133         (print_insn_arm): Add Virtualization Extensions support.
 134         (print_insn_thumb32): Likewise.
 135
 136 2010-09-23  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 137
 138         * arm-dis.c (arm_opcodes): Support disassembly of UDIV and SDIV in
 139         ARM state.
 140
 141 2010-09-23  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 142
 143         * arm-dis.c (arm_opcodes): SMC implies Security Extensions.
 144         (thumb32_opcodes): Likewise.
 145
 146 2010-09-23  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 147
 148         * arm-dis.c (arm_opcodes): Add support for pldw.
 149         (thumb32_opcodes): Likewise.
 150
 151 2010-09-22  Robin Getz  <robin.getz@analog.com>
 152
 153         * bfin-dis.c (fmtconst): Cast address to 32bits.
 154
 155 2010-09-22  Mike Frysinger  <vapier@gentoo.org>
 156
 157         * bfin-dis.c (decode_REGMV_0): Rewrite valid combo checks.
 158
 159 2010-09-22  Robin Getz  <robin.getz@analog.com>
 160
 161         * bfin-dis.c (decode_ProgCtrl_0): Check for parallel insns.
 162         Reject P6/P7 to TESTSET.
 163         (decode_PushPopReg_0): Check for parallel insns.  Reject pushing
 164         SP onto the stack.
 165         (decode_PushPopMultiple_0): Check for parallel insns.  Make sure
 166         P/D fields match all the time.
 167         (decode_CCflag_0): Check for parallel insns.  Verify x/y fields
 168         are 0 for accumulator compares.
 169         (decode_CC2stat_0): Check for parallel insns.  Reject CC<op>CC.
 170         (decode_CaCTRL_0, decode_ccMV_0, decode_CC2dreg_0, decode_BRCC_0,
 171         decode_UJUMP_0, decode_LOGI2op_0, decode_COMPI2opD_0,
 172         decode_COMPI2opP_0, decode_LoopSetup_0, decode_LDIMMhalf_0,
 173         decode_CALLa_0, decode_linkage_0, decode_pseudoDEBUG_0,
 174         decode_pseudoOChar_0, decode_pseudodbg_assert_0): Check for parallel
 175         insns.
 176         (decode_dagMODim_0): Verify br field for IREG ops.
 177         (decode_LDST_0): Reject preg load into same preg.
 178         (_print_insn_bfin): Handle returns for ILLEGAL decodes.
 179         (print_insn_bfin): Likewise.
 180
 181 2010-09-22  Mike Frysinger  <vapier@gentoo.org>
 182
 183         * bfin-dis.c (decode_PushPopMultiple_0): Return 0 when pr > 5.
 184
 185 2010-09-22  Robin Getz  <robin.getz@analog.com>
 186
 187         * bfin-dis.c (decode_dsp32shiftimm_0): Add missing "S" flag.
 188
 189 2010-09-22  Mike Frysinger  <vapier@gentoo.org>
 190
 191         * bfin-dis.c (decode_CC2stat_0): Decode all ASTAT bits.
 192
 193 2010-09-22  Robin Getz  <robin.getz@analog.com>
 194
 195         * bfin-dis.c (IS_DREG, IS_PREG, IS_GENREG, IS_DAGREG): Reject
 196         register values greater than 8.
 197         (IS_RESERVEDREG, allreg, mostreg): New helpers.
 198         (decode_ProgCtrl_0): Call IS_DREG/IS_PREG as appropriate.
 199         (decode_PushPopReg_0): Call mostreg/allreg as appropriate.
 200         (decode_CC2dreg_0): Check valid CC register number.
 201
 202 2010-09-22  Robin Getz  <robin.getz@analog.com>
 203
 204         * bfin-dis.c (decode_pseudoDEBUG_0): Add space after DBG.
 205
 206 2010-09-22  Robin Getz  <robin.getz@analog.com>
 207
 208         * bfin-dis.c (machine_registers): Add AC0_COPY, V_COPY, and RND_MOD.
 209         (reg_names): Likewise.
 210         (decode_statbits): Likewise; while reformatting to make manageable.
 211
 212 2010-09-22  Mike Frysinger  <vapier@gentoo.org>
 213
 214         * bfin-dis.c (decode_pseudoDEBUG_0): Add space after OUTC.
 215         (decode_pseudoOChar_0): New function.
 216         (_print_insn_bfin): Remove #if 0 and call new decode_pseudoOChar_0.
 217
 218 2010-09-22  Robin Getz  <robin.getz@analog.com>
 219
 220         * bfin-dis.c (decode_dsp32shift_0): Decode sub opcodes 2/2 as
 221         LSHIFT instead of SHIFT.
 222
 223 2010-09-22  Mike Frysinger  <vapier@gentoo.org>
 224
 225         * bfin-dis.c (constant_formats): Constify the whole structure.
 226         (fmtconst): Add const to return value.
 227         (reg_names): Mark const.
 228         (decode_multfunc): Mark s0/s1 as const.
 229         (decode_macfunc): Mark a/sop as const.
 230
 231 2010-09-17  Tejas Belagod  <tejas.belagod@arm.com>
 232
 233         * arm_dis.c (coprocessor_opcodes): Add MRC entry for APSR_nzcv.
 234
 235 2010-09-14  Maciej W. Rozycki  <macro@codesourcery.com>
 236
 237         * mips-opc.c (mips_builtin_opcodes): Add "sync_acquire",
 238         "sync_mb", "sync_release", "sync_rmb" and "sync_wmb".
 239
 240 2010-09-10  Pierre Muller  <muller@ics.u-strasbg.fr>
 241
 242         * src/opcodes/dlx-dis.c (print_insn_dlx): Use dlx_insn type for
 243         dlx_insn_type array.
 244
 245 2010-08-31  H.J. Lu  <hongjiu.lu@intel.com>
 246
 247         PR binutils/11960
 248         * i386-dis.c (sIv): New.
 249         (dis386): Replace Iq with sIv on "pushT".
 250         (reg_table): Replace T with {T|} on callT, JcallT, jmpT and JjmpT.
 251         (x86_64_table): Replace {T|}/{P|} with P.
 252         (putop): Add 'w' to 'T'/'P' if needed for Intel syntax.
 253         (OP_sI): Update v_mode.  Remove w_mode.
 254
 255 2010-08-27  Nathan Froyd  <froydnj@codesourcery.com>
 256
 257         * ppc-opc.c (powerpc_opcodes) [lswx,lswi,stswx,stswi]: Deprecate
 258         on E500 and E500MC.
 259
 260 2010-08-17  H.J. Lu  <hongjiu.lu@intel.com>
 261
 262         * i386-dis.c (reg_table): Replace Eb with Mb on prefetch and
 263         prefetchw.
 264
 265 2010-08-06  Quentin Neill <quentin.neill@amd.com>
 266
 267         * i386-gen.c (cpu_flag_init): Define CpuNop extension flag, add
 268         to processor flags for PENTIUMPRO processors and later.
 269         * i386-opc.h (enum): Add CpuNop.
 270         (i386_cpu_flags): Add cpunop bit.
 271         * i386-opc.tbl: Change nop cpu_flags.
 272         * i386-init.h: Regenerated.
 273         * i386-tbl.h: Likewise.
 274
 275 2010-08-06  Quentin Neill <quentin.neill@amd.com>
 276
 277         * i386-opc.h (enum): Fix typos in comments.
 278
 279 2010-08-06  Alan Modra  <amodra@gmail.com>
 280
 281         * disassemble.c: Formatting.
 282         (disassemble_init_for_target <ARCH_m32c>): Comment on endian.
 283
 284 2010-08-05  H.J. Lu  <hongjiu.lu@intel.com>
 285
 286         * i386-opc.tbl: Add Cpu186 to ud1/ud2/ud2a/ud2b.
 287         * i386-tbl.h: Regenerated.
 288
 289 2010-08-05  H.J. Lu  <hongjiu.lu@intel.com>
 290
 291         * i386-dis.c (dis386_twobyte): Replace ud2a/ud2b with ud2/ud1.
 292
 293         * i386-opc.tbl: Add ud1.  Remove Cpu686 from ud2/ud2a/ud2b.
 294         * i386-tbl.h: Regenerated.
 295
 296 2010-07-29  DJ Delorie  <dj@redhat.com>
 297
 298         * rx-decode.opc (SRR): New.
 299         (rx_decode_opcode): Use it for movbi and movbir.  Decode NOP2 (mov
 300         r0,r0) and NOP3 (max r0,r0) special cases.
 301         * rx-decode.c: Regenerate.
 302
 303 2010-07-28  H.J. Lu  <hongjiu.lu@intel.com>
 304
 305         * i386-dis.c: Add 0F to VEX opcode enums.
 306
 307 2010-07-27  DJ Delorie  <dj@redhat.com>
 308
 309         * rx-decode.opc (store_flags): Remove, replace with F_* macros.
 310         (rx_decode_opcode): Likewise.
 311         * rx-decode.c: Regenerate.
 312
 313 2010-07-23  Naveen.H.S  <naveen.S@kpitcummins.com>
 314             Ina Pandit  <ina.pandit@kpitcummins.com>
 315
 316         * v850-dis.c (v850_sreg_names): Updated structure for system
 317         registers.
 318         (float_cc_names): new structure for condition codes.
 319         (print_value): Update the function that prints value.
 320         (get_operand_value): New function to get the operand value.
 321         (disassemble): Updated to handle the disassembly of instructions.
 322         (print_insn_v850): Updated function to print instruction for different
 323         families.
 324         * opcodes/v850-opc.c (v850_msg_is_out_of_range, insert_i5div1,
 325         extract_i5div1, insert_i5div2, extract_i5div2, insert_i5div3,
 326         extract_i5div3, insert_d5_4, extract_d5_4, extract_d8_6,
 327         insert_d8_7, extract_d8_7, insert_v8, extract_v8, insert_u16_loop,
 328         extract_u16_loop, insert_d16_15, extract_d16_15, insert_d16_16,
 329         extract_d16_16, nsert_d17_16, extract_d17_16, insert_d22,
 330         extract_d22, insert_d23, extract_d23, insert_i9, extract_i9,
 331         insert_u9, extract_u9, extract_spe, insert_r4, extract_r4): New.
 332         (insert_d8_7, insert_d5_4, insert_i5div): Remove.
 333         (v850_operands): Update with the relocation name. Also update
 334         the instructions with specific set of processors.
 335
 336 2010-07-08 Tejas Belagod <tejas.belagod@arm.com>
 337
 338         * arm-dis.c (print_insn_arm): Add cases for printing more
 339         symbolic operands.
 340         (print_insn_thumb32): Likewise.
 341
 342 2010-07-06  Maciej W. Rozycki  <macro@codesourcery.com>
 343
 344         * mips-dis.c (print_insn_mips): Correct branch instruction type
 345         determination.
 346
 347 2010-07-06  Maciej W. Rozycki  <macro@codesourcery.com>
 348
 349         * mips-dis.c (print_mips16_insn_arg): Remove branch instruction
 350         type and delay slot determination.
 351         (print_insn_mips16): Extend branch instruction type and delay
 352         slot determination to cover all instructions.
 353         * mips16-opc.c (BR): Remove macro.
 354         (UBR, CBR): New macros.
 355         (mips16_opcodes): Update branch annotation for "b", "beqz",
 356         "bnez", "bteqz" and "btnez".  Add branch annotation for "jalrc"
 357         and "jrc".
 358
 359 2010-07-05  H.J. Lu  <hongjiu.lu@intel.com>
 360
 361         AVX Programming Reference (June, 2010)
 362         * i386-dis.c (mod_table): Replace rdrnd with rdrand.
 363         * i386-opc.tbl: Likewise.
 364         * i386-tbl.h: Regenerated.
 365
 366 2010-07-05  H.J. Lu  <hongjiu.lu@intel.com>
 367
 368         * i386-opc.h (CpuFSGSBase): Fix a typo in comments.
 369
 370 2010-07-03  Andreas Schwab  <schwab@linux-m68k.org>
 371
 372         * ppc-dis.c (powerpc_init_dialect): Cast PPC_OPCODE_xxx to
 373         ppc_cpu_t before inverting.
 374         (ppc_parse_cpu): Likewise.
 375         (print_insn_powerpc): Likewise.
 376
 377 2010-07-03  Alan Modra  <amodra@gmail.com>
 378
 379         * ppc-dis.c (ppc_opts, powerpc_init_dialect): Remove old opcode flags.
 380         * ppc-opc.c (PPC32, POWER32, COM32, CLASSIC): Delete.
 381         (PPC64, MFDEC2): Update.
 382         (NON32, NO371): Define.
 383         (powerpc_opcode): Update to not use old opcode flags, and avoid
 384         -m601 duplicates.
 385
 386 2010-07-03  DJ Delorie  <dj@delorie.com>
 387
 388         * m32c-ibld.c: Regenerate.
 389
 390 2010-07-03  Alan Modra  <amodra@gmail.com>
 391
 392         * ppc-opc.c (PWR2COM): Define.
 393         (PPCPWR2): Add PPC_OPCODE_COMMON.
 394         (powerpc_opcodes): Add "subc", "subco", "subco.", "fcir", "fcir.",
 395         "fcirz", "fcirz." to -mcom opcodes.  Remove "mfsri", "dclst",
 396         "rac" from -mcom.
 397
 398 2010-07-01  H.J. Lu  <hongjiu.lu@intel.com>
 399
 400         AVX Programming Reference (June, 2010)
 401         * i386-dis.c (PREFIX_0FAE_REG_0): New.
 402         (PREFIX_0FAE_REG_1): Likewise.
 403         (PREFIX_0FAE_REG_2): Likewise.
 404         (PREFIX_0FAE_REG_3): Likewise.
 405         (PREFIX_VEX_3813): Likewise.
 406         (PREFIX_VEX_3A1D): Likewise.
 407         (prefix_table): Add PREFIX_0FAE_REG_0, PREFIX_0FAE_REG_1,
 408         PREFIX_0FAE_REG_2, PREFIX_0FAE_REG_3, PREFIX_VEX_3813 and
 409         PREFIX_VEX_3A1D.
 410         (vex_table): Add PREFIX_VEX_3813 and PREFIX_VEX_3A1D.
 411         (mod_table): Add PREFIX_0FAE_REG_0, PREFIX_0FAE_REG_1,
 412         PREFIX_0FAE_REG_2, PREFIX_0FAE_REG_3 xsaveopt and rdrnd.
 413
 414         * i386-gen.c (cpu_flag_init): Add CPU_XSAVEOPT_FLAGS,
 415         CPU_FSGSBASE_FLAGS, CPU_RDRND_FLAGS and CPU_F16C_FLAGS.
 416         (cpu_flags): Add CpuXsaveopt, CpuFSGSBase, CpuRdRnd and CpuF16C.
 417
 418         * i386-opc.h (CpuXsaveopt): New.
 419         (CpuFSGSBase): Likewise.
 420         (CpuRdRnd): Likewise.
 421         (CpuF16C): Likewise.
 422         (i386_cpu_flags): Add cpuxsaveopt, cpufsgsbase, cpurdrnd and
 423         cpuf16c.
 424
 425         * i386-opc.tbl: Add xsaveopt, rdfsbase, rdgsbase, rdrnd,
 426         wrfsbase, wrgsbase, vcvtph2ps and vcvtps2ph.
 427         * i386-init.h: Regenerated.
 428         * i386-tbl.h: Likewise.
 429
 430 2010-07-01  Sebastian Andrzej Siewior  <bigeasy@linutronix.de>
 431
 432         * ppc-opc.c (powerpc_opcodes): Revert deprecation of mfocrf, mtcrf
 433         and mtocrf on EFS.
 434
 435 2010-06-29  Alan Modra  <amodra@gmail.com>
 436
 437         * maxq-dis.c: Delete file.
 438         * Makefile.am: Remove references to maxq.
 439         * configure.in: Likewise.
 440         * disassemble.c: Likewise.
 441         * Makefile.in: Regenerate.
 442         * configure: Regenerate.
 443         * po/POTFILES.in: Regenerate.
 444
 445 2010-06-29  Alan Modra  <amodra@gmail.com>
 446
 447         * mep-dis.c: Regenerate.
 448
 449 2010-06-28  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 450
 451         * arm-disc.c (parse_insn_neon):  Fix Neon alignment syntax.
 452
 453 2010-06-27  Alan Modra  <amodra@gmail.com>
 454
 455         * arc-dis.c (arc_sprintf): Delete set but unused variables.
 456         (decodeInstr): Likewise.
 457         * dlx-dis.c (print_insn_dlx): Likewise.
 458         * h8300-dis.c (bfd_h8_disassemble_init): Likewise.
 459         * maxq-dis.c (check_move, print_insn): Likewise.
 460         * mep-dis.c (mep_examine_ivc2_insns): Likewise.
 461         * msp430-dis.c (msp430_branchinstr): Likewise.
 462         * bfin-dis.c (_print_insn_bfin): Avoid set but unused warning.
 463         * cgen-asm.in (parse_insn_normal, _cgen_assemble_insn): Likewise.
 464         * sparc-dis.c (print_insn_sparc): Likewise.
 465         * fr30-asm.c: Regenerate.
 466         * frv-asm.c: Regenerate.
 467         * ip2k-asm.c: Regenerate.
 468         * iq2000-asm.c: Regenerate.
 469         * lm32-asm.c: Regenerate.
 470         * m32c-asm.c: Regenerate.
 471         * m32r-asm.c: Regenerate.
 472         * mep-asm.c: Regenerate.
 473         * mt-asm.c: Regenerate.
 474         * openrisc-asm.c: Regenerate.
 475         * xc16x-asm.c: Regenerate.
 476         * xstormy16-asm.c: Regenerate.
 477
 478 2010-06-16  Vincent Rivière  <vincent.riviere@freesbee.fr>
 479
 480         PR gas/11673
 481         * m68k-opc.c (m68k_opcodes): Remove move.l for isab and later.
 482
 483 2010-06-16  Vincent Rivière  <vincent.riviere@freesbee.fr>
 484
 485         PR binutils/11676
 486         * m68k-dis.c (print_insn_arg): Prefix float constants with #0e.
 487
 488 2010-06-14  Sebastian Andrzej Siewior  <bigeasy@linutronix.de>
 489
 490         * ppc-dis.c (ppc_opts):  Remove PPC_OPCODE_E500MC from e500 and
 491         e500x2.  Add PPC_OPCODE_E500 to e500 and e500x2
 492         * ppc-opc.c (powerpc_opcodes): Deprecate all opcodes on EFS which
 493         touch floating point regs and are enabled by COM, PPC or PPCCOM.
 494         Treat sync as msync on e500.  Treat eieio as mbar 1 on e500.
 495         Treat lwsync as msync on e500.
 496
 497 2010-06-07  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 498
 499         * arm-dis.c (thumb-opcodes): Add disassembly for movs.
 500
 501 2010-05-28  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 502
 503         * arm-dis.c (print_insn_neon):  Ensure disassembly of Neon
 504         constants is the same on 32-bit and 64-bit hosts.
 505
 506 2010-05-27  Jason Duerstock  <jason.duerstock+binutils@gmail.com>
 507
 508         * m68k-dis.c (print_insn_m68k): Emit undefined instructions as
 509         .short directives so that they can be reassembled.
 510
 511 2010-05-26  Catherine Moore <clm@codesourcery.com>
 512             David Ung  <davidu@mips.com>
 513
 514         * mips-opc.c: Change membership to I1 for instructions ssnop and
 515         ehb.
 516
 517 2010-05-26  H.J. Lu  <hongjiu.lu@intel.com>
 518
 519         * i386-dis.c (sib): New.
 520         (get_sib): Likewise.
 521         (print_insn): Call get_sib.
 522         OP_E_memory): Use sib.
 523
 524 2010-05-26  Catherine Moore  <clm@codesoourcery.com>
 525
 526         * mips-dis.c (mips_arch): Remove INSN_MIPS16.
 527         * mips-opc.c (I16): Remove.
 528         (mips_builtin_op): Reclassify jalx.
 529
 530 2010-05-19  Alan Modra  <amodra@gmail.com>
 531
 532         * ppc-opc.c (powerpc_opcodes): Enable divdeu, devweu, divde,
 533         divwe, divdeuo, divweuo, divdeo, divweo for A2.  Add icswepx.
 534
 535 2010-05-13  Alan Modra  <amodra@gmail.com>
 536
 537         * ppc-opc.c (powerpc_opcodes): Correct wclr encoding.
 538
 539 2010-05-11  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 540
 541         * arm-dis.c (thumb_opcodes): Update ldmia entry to use new %W
 542         format.
 543         (print_insn_thumb16): Add support for new %W format.
 544
 545 2010-05-07  Tristan Gingold  <gingold@adacore.com>
 546
 547         * Makefile.in: Regenerate with automake 1.11.1.
 548         * aclocal.m4: Ditto.
 549
 550 2010-05-05  Nick Clifton  <nickc@redhat.com>
 551
 552         * po/es.po: Updated Spanish translation.
 553
 554 2010-04-22  Nick Clifton  <nickc@redhat.com>
 555
 556         * po/opcodes.pot: Updated by the Translation project.
 557         * po/vi.po: Updated Vietnamese translation.
 558
 559 2010-04-16  H.J. Lu  <hongjiu.lu@intel.com>
 560
 561         * i386-dis.c (get_valid_dis386): Return bad_opcode on unknown
 562         bits in opcode.
 563
 564 2010-04-09  Nick Clifton  <nickc@redhat.com>
 565
 566         * i386-dis.c (print_insn): Remove unused variable op.
 567         (OP_sI): Remove unused variable mask.
 568
 569 2010-04-07  Alan Modra  <amodra@gmail.com>
 570
 571         * configure: Regenerate.
 572
 573 2010-04-06  Peter Bergner  <bergner@vnet.ibm.com>
 574
 575         * ppc-opc.c (RBOPT): New define.
 576         ("dccci"): Enable for PPCA2.  Make operands optional.
 577         ("iccci"): Likewise.  Do not deprecate for PPC476.
 578
 579 2010-04-02  Masaki Muranaka  <monaka@monami-software.com>
 580
 581         * cr16-opc.c (cr16_instruction): Fix typo in comment.
 582
 583 2010-03-25  Joseph Myers  <joseph@codesourcery.com>
 584
 585         * Makefile.am (TARGET_LIBOPCODES_CFILES): Add tic6x-dis.c.
 586         * Makefile.in: Regenerate.
 587         * configure.in (bfd_tic6x_arch): New.
 588         * configure: Regenerate.
 589         * disassemble.c (ARCH_tic6x): Define if ARCH_all.
 590         (disassembler): Handle TI C6X.
 591         * tic6x-dis.c: New.
 592
 593 2010-03-24  Mike Frysinger  <vapier@gentoo.org>
 594
 595         * bfin-dis.c (decode_regs_hi): Change REG_LH2 typo to REG_MH2.
 596
 597 2010-03-23  Joseph Myers  <joseph@codesourcery.com>
 598
 599         * dis-buf.c (buffer_read_memory): Give error for reading just
 600         before the start of memory.
 601
 602 2010-03-22  Sebastian Pop  <sebastian.pop@amd.com>
 603             Quentin Neill <quentin.neill@amd.com>
 604
 605         * i386-dis.c (OP_LWP_I): Removed.
 606         (reg_table): Do not use OP_LWP_I, use Iq.
 607         (OP_LWPCB_E): Remove use of names16.
 608         (OP_LWP_E): Same.
 609         * i386-opc.tbl: Removed 16bit LWP insns.  32bit LWP insns
 610         should not set the Vex.length bit.
 611         * i386-tbl.h: Regenerated.
 612
 613 2010-02-25  Edmar Wienskoski  <edmar@freescale.com>
 614
 615         * ppc-dis.c (ppc_opts): Add PPC_OPCODE_E500MC for "e500mc64".
 616
 617 2010-02-24  Nick Clifton  <nickc@redhat.com>
 618
 619         PR binutils/6773
 620         * arm-dis.c (arm_opcodes): Replace <prefix>addsubx with
 621         <prefix>asx.  Replace <prefix>subaddx with <prefix>sax.
 622         (thumb32_opcodes): Likewise.
 623
 624 2010-02-15  Nick Clifton  <nickc@redhat.com>
 625
 626         * po/vi.po: Updated Vietnamese translation.
 627
 628 2010-02-12  Doug Evans  <dje@sebabeach.org>
 629
 630         * lm32-opinst.c: Regenerate.
 631
 632 2010-02-11  Doug Evans  <dje@sebabeach.org>
 633
 634         * cgen-dis.in (print_normal): Delete CGEN_PRINT_NORMAL.
 635         (print_address): Delete CGEN_PRINT_ADDRESS.
 636         * fr30-dis.c, * frv-dis.c, * ip2k-dis.c, * iq2000-dis.c,
 637         * lm32-dis.c, * m32c-dis.c, * m32r-desc.c, * m32r-desc.h,
 638         * m32r-dis.c, * mep-dis.c, * mt-dis.c, * openrisc-dis.c,
 639         * xc16x-dis.c, * xstormy16-dis.c: Regenerate.
 640
 641         * fr30-desc.c, * fr30-desc.h, * fr30-opc.c,
 642         * frv-desc.c, * frv-desc.h, * frv-opc.c,
 643         * ip2k-desc.c, * ip2k-desc.h, * ip2k-opc.c,
 644         * iq2000-desc.c, * iq2000-desc.h, * iq2000-opc.c,
 645         * lm32-desc.c, * lm32-desc.h, * lm32-opc.c, * lm32-opinst.c,
 646         * m32c-desc.c, * m32c-desc.h, * m32c-opc.c,
 647         * m32r-desc.c, * m32r-desc.h, * m32r-opc.c, * m32r-opinst.c,
 648         * mep-desc.c, * mep-desc.h, * mep-opc.c,
 649         * mt-desc.c, * mt-desc.h, * mt-opc.c,
 650         * openrisc-desc.c, * openrisc-desc.h, * openrisc-opc.c,
 651         * xc16x-desc.c, * xc16x-desc.h, * xc16x-opc.c,
 652         * xstormy16-desc.c, * xstormy16-desc.h, * xstormy16-opc.c: Regenerate.
 653
 654 2010-02-11  H.J. Lu  <hongjiu.lu@intel.com>
 655
 656         * i386-dis.c: Update copyright.
 657         * i386-gen.c: Likewise.
 658         * i386-opc.h: Likewise.
 659         * i386-opc.tbl: Likewise.
 660
 661 2010-02-10  Quentin Neill  <quentin.neill@amd.com>
 662             Sebastian Pop  <sebastian.pop@amd.com>
 663
 664         * i386-dis.c (OP_EX_VexImmW): Reintroduced
 665         function to handle 5th imm8 operand.
 666         (PREFIX_VEX_3A48): Added.
 667         (PREFIX_VEX_3A49): Added.
 668         (VEX_W_3A48_P_2): Added.
 669         (VEX_W_3A49_P_2): Added.
 670         (prefix table): Added entries for PREFIX_VEX_3A48
 671         and PREFIX_VEX_3A49.
 672         (vex table): Added entries for VEX_W_3A48_P_2 and
 673         and VEX_W_3A49_P_2.
 674         * i386-gen.c (operand_type_init): Added OPERAND_TYPE_VEC_IMM4
 675         for Vec_Imm4 operands.
 676         * i386-opc.h (enum): Added Vec_Imm4.
 677         (i386_operand_type): Added vec_imm4.
 678         * i386-opc.tbl: Add entries for vpermilp[ds].
 679         * i386-init.h: Regenerated.
 680         * i386-tbl.h: Regenerated.
 681
 682 2010-02-10  Richard Sandiford  <r.sandiford@uk.ibm.com>
 683
 684         * ppc-dis.c (ppc_opts): Add "pwr4", "pwr5", "pwr5x", "pwr6"
 685         and "pwr7".  Move "a2" into alphabetical order.
 686
 687 2010-02-08  Philipp Tomsich  <philipp.tomsich@theobroma-systems.com>
 688
 689         * ppc-dis.c (ppc_opts): Add titan entry.
 690         * ppc-opc.c (TITAN, MULHW): Define.
 691         (powerpc_opcodes): Support AppliedMicro Titan core (APM83xxx).
 692
 693 2010-02-03  Quentin Neill  <quentin.neill@amd.com>
 694
 695         * i386-gen.c (cpu_flag_init): Rename CPU_AMDFAM15_FLAGS
 696         to CPU_BDVER1_FLAGS
 697         * i386-init.h: Regenerated.
 698
 699 2010-02-03  Anthony Green  <green@moxielogic.com>
 700
 701         * moxie-opc.c (moxie_form1_opc_info): Move "nop" from 0x00 to
 702         0x0f, and make 0x00 an illegal instruction.
 703
 704 2010-01-29  Daniel Jacobowitz  <dan@codesourcery.com>
 705
 706         * opcodes/arm-dis.c (struct arm_private_data): New.
 707         (print_insn_coprocessor, print_insn_arm): Update to use struct
 708         arm_private_data.
 709         (is_mapping_symbol, get_map_sym_type): New functions.
 710         (get_sym_code_type): Check the symbol's section.  Do not check
 711         mapping symbols.
 712         (print_insn): Default to disassembling ARM mode code.  Check
 713         for mapping symbols separately from other symbols.  Use
 714         struct arm_private_data.
 715
 716 2010-01-28  H.J. Lu  <hongjiu.lu@intel.com>
 717
 718         * i386-dis.c (EXVexWdqScalar): New.
 719         (vex_scalar_w_dq_mode): Likewise.
 720         (prefix_table): Update entries for PREFIX_VEX_3899,
 721         PREFIX_VEX_389B, PREFIX_VEX_389D, PREFIX_VEX_389F,
 722         PREFIX_VEX_38A9, PREFIX_VEX_38AB, PREFIX_VEX_38AD,
 723         PREFIX_VEX_38AF, PREFIX_VEX_38B9, PREFIX_VEX_38BB,
 724         PREFIX_VEX_38BD and PREFIX_VEX_38BF.
 725         (intel_operand_size): Handle vex_scalar_w_dq_mode.
 726         (OP_EX): Likewise.
 727
 728 2010-01-27  H.J. Lu  <hongjiu.lu@intel.com>
 729
 730         * i386-dis.c (XMScalar): New.
 731         (EXdScalar): Likewise.
 732         (EXqScalar): Likewise.
 733         (EXqScalarS): Likewise.
 734         (VexScalar): Likewise.
 735         (EXdVexScalarS): Likewise.
 736         (EXqVexScalarS): Likewise.
 737         (XMVexScalar): Likewise.
 738         (scalar_mode): Likewise.
 739         (d_scalar_mode): Likewise.
 740         (d_scalar_swap_mode): Likewise.
 741         (q_scalar_mode): Likewise.
 742         (q_scalar_swap_mode): Likewise.
 743         (vex_scalar_mode): Likewise.
 744         (vex_len_table): Duplcate entries for VEX_LEN_10_P_1,
 745         VEX_LEN_10_P_3, VEX_LEN_11_P_1, VEX_LEN_11_P_3, VEX_LEN_2A_P_1,
 746         VEX_LEN_2A_P_3, VEX_LEN_2C_P_3, VEX_LEN_2D_P_1, VEX_LEN_2E_P_0,
 747         VEX_LEN_2E_P_2, VEX_LEN_2F_P_2, VEX_LEN_51_P_1, VEX_LEN_51_P_3,
 748         VEX_LEN_52_P_1, VEX_LEN_53_P_1, VEX_LEN_58_P_1, VEX_LEN_58_P_3,
 749         VEX_LEN_59_P_1, VEX_LEN_5A_P_1, VEX_LEN_5A_P_3, VEX_LEN_5C_P_1,
 750         VEX_LEN_5C_P_3, VEX_LEN_5D_P_1, VEX_LEN_5D_P_3, VEX_LEN_5E_P_1,
 751         VEX_LEN_5E_P_3, VEX_LEN_5F_P_1, VEX_LEN_5F_P_3, VEX_LEN_6E_P_2,
 752         VEX_LEN_7E_P_1, VEX_LEN_7E_P_2, VEX_LEN_D6_P_2, VEX_LEN_C2_P_1,
 753         VEX_LEN_C2_P_3, VEX_LEN_3A0A_P_2 and VEX_LEN_3A0B_P_2.
 754         (vex_w_table): Update entries for VEX_W_10_P_1, VEX_W_10_P_3,
 755         VEX_W_11_P_1, VEX_W_11_P_3, VEX_W_2E_P_0, VEX_W_2E_P_2,
 756         VEX_W_2F_P_0, VEX_W_2F_P_2, VEX_W_51_P_1, VEX_W_51_P_3,
 757         VEX_W_52_P_1, VEX_W_53_P_1, VEX_W_58_P_1, VEX_W_58_P_3,
 758         VEX_W_59_P_1, VEX_W_59_P_3, VEX_W_5A_P_1, VEX_W_5A_P_3,
 759         VEX_W_5C_P_1, VEX_W_5C_P_3, VEX_W_5D_P_1, VEX_W_5D_P_3,
 760         VEX_W_5E_P_1, VEX_W_5E_P_3, VEX_W_5F_P_1, VEX_W_5F_P_3,
 761         VEX_W_7E_P_1, VEX_W_D6_P_2  VEX_W_C2_P_1, VEX_W_C2_P_3,
 762         VEX_W_3A0A_P_2 and VEX_W_3A0B_P_2.
 763         (intel_operand_size): Handle d_scalar_mode, d_scalar_swap_mode,
 764         q_scalar_mode, q_scalar_swap_mode.
 765         (OP_XMM): Handle scalar_mode.
 766         (OP_EX): Handle d_scalar_mode, d_scalar_swap_mode, q_scalar_mode
 767         and q_scalar_swap_mode.
 768         (OP_VEX): Handle vex_scalar_mode.
 769
 770 2010-01-24  H.J. Lu  <hongjiu.lu@intel.com>
 771
 772         * i386-dis.c (prefix_table): Remove trailing { Bad_Opcode }.
 773
 774 2010-01-24  H.J. Lu  <hongjiu.lu@intel.com>
 775
 776         * i386-dis.c (vex_len_table): Remove trailing { Bad_Opcode }.
 777
 778 2010-01-24  H.J. Lu  <hongjiu.lu@intel.com>
 779
 780         * i386-dis.c (prefix_table): Remove trailing { Bad_Opcode }.
 781
 782 2010-01-24  H.J. Lu  <hongjiu.lu@intel.com>
 783
 784         * i386-dis.c (Bad_Opcode): New.
 785         (bad_opcode): Likewise.
 786         (dis386): Replace { "(bad)", { XX } } with { Bad_Opcode }.
 787         (dis386_twobyte): Likewise.
 788         (reg_table): Likewise.
 789         (prefix_table): Likewise.
 790         (x86_64_table): Likewise.
 791         (vex_len_table): Likewise.
 792         (vex_w_table): Likewise.
 793         (mod_table): Likewise.
 794         (rm_table): Likewise.
 795         (float_reg): Likewise.
 796         (reg_table): Remove trailing "(bad)" entries.
 797         (prefix_table): Likewise.
 798         (x86_64_table): Likewise.
 799         (vex_len_table): Likewise.
 800         (vex_w_table): Likewise.
 801         (mod_table): Likewise.
 802         (rm_table): Likewise.
 803         (get_valid_dis386): Handle bytemode 0.
 804
 805 2010-01-23  H.J. Lu  <hongjiu.lu@intel.com>
 806
 807         * i386-opc.h (VEXScalar): New.
 808
 809         * i386-opc.tbl: Replace "Vex" with "Vex=3" on AVX scalar
 810         instructions.
 811         * i386-tbl.h: Regenerated.
 812
 813 2010-01-21  H.J. Lu  <hongjiu.lu@intel.com>
 814
 815         * i386-dis.c (mod_table): Use FXSAVE on xsave and xrstor.
 816
 817         * i386-opc.tbl: Add xsave64 and xrstor64.
 818         * i386-tbl.h: Regenerated.
 819
 820 2010-01-20  Nick Clifton  <nickc@redhat.com>
 821
 822         PR 11170
 823         * arm-dis.c (print_arm_address): Do not ignore negative bit in PC
 824         based post-indexed addressing.
 825
 826 2010-01-15  Sebastian Pop  <sebastian.pop@amd.com>
 827
 828         * i386-opc.tbl: Support all the possible aliases for VPCOM* insns.
 829         * i386-tbl.h: Regenerated.
 830
 831 2010-01-14  H.J. Lu  <hongjiu.lu@intel.com>
 832
 833         * i386-opc.h (VexVVVV): Replace VEX.DNS with VEX.NDS in
 834         comments.
 835
 836 2010-01-14  H.J. Lu  <hongjiu.lu@intel.com>
 837
 838         * i386-dis.c (names_mm): New.
 839         (intel_names_mm): Likewise.
 840         (att_names_mm): Likewise.
 841         (names_xmm): Likewise.
 842         (intel_names_xmm): Likewise.
 843         (att_names_xmm): Likewise.
 844         (names_ymm): Likewise.
 845         (intel_names_ymm): Likewise.
 846         (att_names_ymm): Likewise.
 847         (print_insn): Set names_mm, names_xmm and names_ymm.
 848         (OP_MMX): Use names_mm, names_xmm and names_ymm.
 849         (OP_XMM): Likewise.
 850         (OP_EM): Likewise.
 851         (OP_EMC): Likewise.
 852         (OP_MXC): Likewise.
 853         (OP_EX): Likewise.
 854         (XMM_Fixup): Likewise.
 855         (OP_VEX): Likewise.
 856         (OP_EX_VexReg): Likewise.
 857         (OP_Vex_2src): Likewise.
 858         (OP_Vex_2src_1): Likewise.
 859         (OP_Vex_2src_2): Likewise.
 860         (OP_REG_VexI4): Likewise.
 861
 862 2010-01-13  H.J. Lu  <hongjiu.lu@intel.com>
 863
 864         * i386-dis.c (print_insn): Update comments.
 865
 866 2010-01-12  H.J. Lu  <hongjiu.lu@intel.com>
 867
 868         * i386-dis.c (rex_original): Removed.
 869         (ckprefix): Remove rex_original.
 870         (print_insn): Update comments.
 871
 872 2010-01-09  Ralf Wildenhues  <Ralf.Wildenhues@gmx.de>
 873
 874         * Makefile.in: Regenerate.
 875         * configure: Regenerate.
 876
 877 2010-01-07  Doug Evans  <dje@sebabeach.org>
 878
 879         * cgen-ibld.in (insert_normal, extract_normal): Minor cleanup.
 880         * fr30-ibld.c, * frv-ibld.c, * ip2k-ibld.c, * iq2000-ibld.c,
 881         * lm32-ibld.c, * m32c-ibld.c, * m32r-ibld.c, * mep-ibld.c,
 882         * mt-ibld.c, * openrisc-ibld.c, * xc16x-ibld.c,
 883         * xstormy16-ibld.c: Regenerate.
 884
 885 2010-01-06  Quentin Neill  <quentin.neill@amd.com>
 886
 887         * i386-gen.c (cpu_flag_init): Add new CPU_AMDFAM15_FLAGS.
 888         * i386-init.h: Regenerated.
 889
 890 2010-01-06  Daniel Gutson  <dgutson@codesourcery.com>
 891
 892         * arm-dis.c (print_insn): Fixed search for next symbol and data
 893         dumping condition, and the initial mapping symbol state.
 894
 895 2010-01-05  Doug Evans  <dje@sebabeach.org>
 896
 897         * cgen-ibld.in: #include "cgen/basic-modes.h".
 898         * fr30-ibld.c, * frv-ibld.c, * ip2k-ibld.c, * iq2000-ibld.c,
 899         * lm32-ibld.c, * m32c-ibld.c, * m32r-ibld.c, * mep-ibld.c,
 900         * mt-ibld.c, * openrisc-ibld.c, * xc16x-ibld.c,
 901         * xstormy16-ibld.c: Regenerate.
 902
 903 2010-01-04  Nick Clifton  <nickc@redhat.com>
 904
 905         PR 11123
 906         * arm-dis.c (print_insn_coprocessor): Initialise value.
 907
 908 2010-01-04  Edmar Wienskoski  <edmar@freescale.com>
 909
 910         * ppc-dis.c (ppc_opts): Add entry for "e500mc64".
 911
 912 2010-01-02  Doug Evans  <dje@sebabeach.org>
 913
 914         * cgen-asm.in: Update copyright year.
 915         * cgen-dis.in: Update copyright year.
 916         * cgen-ibld.in: Update copyright year.
 917         * fr30-asm.c, * fr30-desc.c, * fr30-desc.h, * fr30-dis.c,
 918         * fr30-ibld.c, * fr30-opc.c, * fr30-opc.h, * frv-asm.c, * frv-desc.c,
 919         * frv-desc.h, * frv-dis.c, * frv-ibld.c, * frv-opc.c, * frv-opc.h,
 920         * ip2k-asm.c, * ip2k-desc.c, * ip2k-desc.h, * ip2k-dis.c,
 921         * ip2k-ibld.c, * ip2k-opc.c, * ip2k-opc.h, * iq2000-asm.c,
 922         * iq2000-desc.c, * iq2000-desc.h, * iq2000-dis.c, * iq2000-ibld.c,
 923         * iq2000-opc.c, * iq2000-opc.h, * lm32-asm.c, * lm32-desc.c,
 924         * lm32-desc.h, * lm32-dis.c, * lm32-ibld.c, * lm32-opc.c, * lm32-opc.h,
 925         * lm32-opinst.c, * m32c-asm.c, * m32c-desc.c, * m32c-desc.h,
 926         * m32c-dis.c, * m32c-ibld.c, * m32c-opc.c, * m32c-opc.h, * m32r-asm.c,
 927         * m32r-desc.c, * m32r-desc.h, * m32r-dis.c, * m32r-ibld.c,
 928         * m32r-opc.c, * m32r-opc.h, * m32r-opinst.c, * mep-asm.c, * mep-desc.c,
 929         * mep-desc.h, * mep-dis.c, * mep-ibld.c, * mep-opc.c, * mep-opc.h,
 930         * mt-asm.c, * mt-desc.c, * mt-desc.h, * mt-dis.c, * mt-ibld.c,
 931         * mt-opc.c, * mt-opc.h, * openrisc-asm.c, * openrisc-desc.c,
 932         * openrisc-desc.h, * openrisc-dis.c, * openrisc-ibld.c,
 933         * openrisc-opc.c, * openrisc-opc.h, * xc16x-asm.c, * xc16x-desc.c,
 934         * xc16x-desc.h, * xc16x-dis.c, * xc16x-ibld.c, * xc16x-opc.c,
 935         * xc16x-opc.h, * xstormy16-asm.c, * xstormy16-desc.c,
 936         * xstormy16-desc.h, * xstormy16-dis.c, * xstormy16-ibld.c,
 937         * xstormy16-opc.c, * xstormy16-opc.h: Regenerate.
 938
 939 For older changes see ChangeLog-2009
 940 \f
 941 Local Variables:
 942 mode: change-log
 943 left-margin: 8
 944 fill-column: 74
 945 version-control: never
 946 End: