opcodes/ChangeLog

   1 2005-02-23  Nick Clifton  <nickc@redhat.com>
   2
   3         * cgen-dis.in: Use bfd_byte for buffers that are passed to
   4         read_memory.
   5
   6         * ia64-opc.c (locate_opcode_ent): Initialise opval array.
   7
   8         * crx-dis.c (make_instruction): Move argument structure into inner
   9         scope and ensure that all of its fields are initialised before
  10         they are used.
  11
  12         * fr30-asm.c: Regenerate.
  13         * fr30-dis.c: Regenerate.
  14         * frv-asm.c: Regenerate.
  15         * frv-dis.c: Regenerate.
  16         * ip2k-asm.c: Regenerate.
  17         * ip2k-dis.c: Regenerate.
  18         * iq2000-asm.c: Regenerate.
  19         * iq2000-dis.c: Regenerate.
  20         * m32r-asm.c: Regenerate.
  21         * m32r-dis.c: Regenerate.
  22         * openrisc-asm.c: Regenerate.
  23         * openrisc-dis.c: Regenerate.
  24         * xstormy16-asm.c: Regenerate.
  25         * xstormy16-dis.c: Regenerate.
  26
  27 2005-02-22  Alan Modra  <amodra@bigpond.net.au>
  28
  29         * arc-ext.c: Warning fixes.
  30         * arc-ext.h: Likewise.
  31         * cgen-opc.c: Likewise.
  32         * ia64-gen.c: Likewise.
  33         * maxq-dis.c: Likewise.
  34         * ns32k-dis.c: Likewise.
  35         * w65-dis.c: Likewise.
  36         * ia64-asmtab.c: Regenerate.
  37
  38 2005-02-22  Alan Modra  <amodra@bigpond.net.au>
  39
  40         * fr30-desc.c: Regenerate.
  41         * fr30-desc.h: Regenerate.
  42         * fr30-opc.c: Regenerate.
  43         * fr30-opc.h: Regenerate.
  44         * frv-desc.c: Regenerate.
  45         * frv-desc.h: Regenerate.
  46         * frv-opc.c: Regenerate.
  47         * frv-opc.h: Regenerate.
  48         * ip2k-desc.c: Regenerate.
  49         * ip2k-desc.h: Regenerate.
  50         * ip2k-opc.c: Regenerate.
  51         * ip2k-opc.h: Regenerate.
  52         * iq2000-desc.c: Regenerate.
  53         * iq2000-desc.h: Regenerate.
  54         * iq2000-opc.c: Regenerate.
  55         * iq2000-opc.h: Regenerate.
  56         * m32r-desc.c: Regenerate.
  57         * m32r-desc.h: Regenerate.
  58         * m32r-opc.c: Regenerate.
  59         * m32r-opc.h: Regenerate.
  60         * m32r-opinst.c: Regenerate.
  61         * openrisc-desc.c: Regenerate.
  62         * openrisc-desc.h: Regenerate.
  63         * openrisc-opc.c: Regenerate.
  64         * openrisc-opc.h: Regenerate.
  65         * xstormy16-desc.c: Regenerate.
  66         * xstormy16-desc.h: Regenerate.
  67         * xstormy16-opc.c: Regenerate.
  68         * xstormy16-opc.h: Regenerate.
  69
  70 2005-02-21  Alan Modra  <amodra@bigpond.net.au>
  71
  72         * Makefile.am: Run "make dep-am"
  73         * Makefile.in: Regenerate.
  74
  75 2005-02-15  Nick Clifton  <nickc@redhat.com>
  76
  77         * cgen-dis.in (print_address): Add an ATTRIBUTE_UNUSED to prevent
  78         compile time warnings.
  79         (print_keyword): Likewise.
  80         (default_print_insn): Likewise.
  81
  82         * fr30-desc.c: Regenerated.
  83         * fr30-desc.h: Regenerated.
  84         * fr30-dis.c: Regenerated.
  85         * fr30-opc.c: Regenerated.
  86         * fr30-opc.h: Regenerated.
  87         * frv-desc.c: Regenerated.
  88         * frv-dis.c: Regenerated.
  89         * frv-opc.c: Regenerated.
  90         * ip2k-asm.c: Regenerated.
  91         * ip2k-desc.c: Regenerated.
  92         * ip2k-desc.h: Regenerated.
  93         * ip2k-dis.c: Regenerated.
  94         * ip2k-opc.c: Regenerated.
  95         * ip2k-opc.h: Regenerated.
  96         * iq2000-desc.c: Regenerated.
  97         * iq2000-dis.c: Regenerated.
  98         * iq2000-opc.c: Regenerated.
  99         * m32r-asm.c: Regenerated.
 100         * m32r-desc.c: Regenerated.
 101         * m32r-desc.h: Regenerated.
 102         * m32r-dis.c: Regenerated.
 103         * m32r-opc.c: Regenerated.
 104         * m32r-opc.h: Regenerated.
 105         * m32r-opinst.c: Regenerated.
 106         * openrisc-desc.c: Regenerated.
 107         * openrisc-desc.h: Regenerated.
 108         * openrisc-dis.c: Regenerated.
 109         * openrisc-opc.c: Regenerated.
 110         * openrisc-opc.h: Regenerated.
 111         * xstormy16-desc.c: Regenerated.
 112         * xstormy16-desc.h: Regenerated.
 113         * xstormy16-dis.c: Regenerated.
 114         * xstormy16-opc.c: Regenerated.
 115         * xstormy16-opc.h: Regenerated.
 116
 117 2005-02-14  H.J. Lu  <hongjiu.lu@intel.com>
 118
 119         * dis-buf.c (perror_memory): Use sprintf_vma to print out
 120         address.
 121
 122 2005-02-11  Nick Clifton  <nickc@redhat.com>
 123
 124         * iq2000-asm.c: Regenerate.
 125
 126         * frv-dis.c: Regenerate.
 127
 128 2005-02-07  Jim Blandy  <jimb@redhat.com>
 129
 130         * Makefile.am (CGEN): Load guile.scm before calling the main
 131         application script.
 132         * Makefile.in: Regenerated.
 133         * cgen.sh: Be prepared for the 'cgen' argument to contain spaces.
 134         Simply pass the cgen-opc.scm path to ${cgen} as its first
 135         argument; ${cgen} itself now contains the '-s', or whatever is
 136         appropriate for the Scheme being used.
 137
 138 2005-01-31  Andrew Cagney  <cagney@gnu.org>
 139
 140         * configure: Regenerate to track ../gettext.m4.
 141
 142 2005-01-31  Jan Beulich  <jbeulich@novell.com>
 143
 144         * ia64-gen.c (NELEMS): Define.
 145         (shrink): Generate alias with missing second predicate register when
 146         opcode has two outputs and these are both predicates.
 147         * ia64-opc-i.c (FULL17): Define.
 148         (ia64_opcodes_i): Add mov-to-pr alias without second input. Use FULL17
 149         here to generate output template.
 150         (TBITCM, TNATCM): Undefine after use.
 151         * ia64-opc-m.c (ia64_opcodes_i): Add alloc alias without ar.pfs as
 152         first input. Add ld16 aliases without ar.csd as second output. Add
 153         st16 aliases without ar.csd as second input. Add cmpxchg aliases
 154         without ar.ccv as third input. Add cmp8xchg16 aliases without ar.csd/
 155         ar.ccv as third/fourth inputs. Consolidate through...
 156         (CMPXCHG_acq, CMPXCHG_rel, CMPXCHG_1, CMPXCHG_2, CMPXCHG_4, CMPXCHG_8,
 157         CMPXCHGn, CMP8XCHG16, CMPXCHG_ALL): Define.
 158         * ia64-asmtab.c: Regenerate.
 159
 160 2005-01-27  Andrew Cagney  <cagney@gnu.org>
 161
 162         * configure: Regenerate to track ../gettext.m4 change.
 163
 164 2005-01-25  Alexandre Oliva  <aoliva@redhat.com>
 165
 166         2004-11-10  Alexandre Oliva  <aoliva@redhat.com>
 167         * frv-asm.c: Rebuilt.
 168         * frv-desc.c: Rebuilt.
 169         * frv-desc.h: Rebuilt.
 170         * frv-dis.c: Rebuilt.
 171         * frv-ibld.c: Rebuilt.
 172         * frv-opc.c: Rebuilt.
 173         * frv-opc.h: Rebuilt.
 174
 175 2005-01-24  Andrew Cagney  <cagney@gnu.org>
 176
 177         * configure: Regenerate, ../gettext.m4 was updated.
 178
 179 2005-01-21  Fred Fish  <fnf@specifixinc.com>
 180
 181         * mips-opc.c:  Change INSN_ALIAS to INSN2_ALIAS.
 182         Change INSN_WRITE_MDMX_ACC to INSN2_WRITE_MDMX_ACC.
 183         Change INSN_READ_MDMX_ACC to INSN2_READ_MDMX_ACC.
 184         * mips-dis.c: Ditto.
 185
 186 2005-01-20  Alan Modra  <amodra@bigpond.net.au>
 187
 188         * ppc-opc.c (powerpc_opcodes): Add optional 'l' arg to tlbiel.
 189
 190 2005-01-19  Fred Fish  <fnf@specifixinc.com>
 191
 192         * mips-dis.c (no_aliases): New disassembly option flag.
 193         (set_default_mips_dis_options): Init no_aliases to zero.
 194         (parse_mips_dis_option): Handle no-aliases option.
 195         (print_insn_mips): Ignore table entries that are aliases
 196         if no_aliases is set.
 197         (print_insn_mips16): Ditto.
 198         * mips-opc.c (mips_builtin_opcodes): Add initializer column for
 199         new pinfo2 member and add INSN_ALIAS initializers as needed.  Also
 200         move WR_MACC and RD_MACC initializers from pinfo to pinfo2.
 201         * mips16-opc.c (mips16_opcodes): Ditto.
 202
 203 2005-01-17  Andrew Stubbs  <andrew.stubbs@st.com>
 204
 205         * sh-opc.h (arch_sh2a_or_sh3e,arch_sh2a_or_sh4): Correct definition.
 206         (inheritance diagram): Add missing edge.
 207         (arch_sh1_up): Rename arch_sh_up to match external name to make life
 208         easier for the testsuite.
 209         (arch_sh4_nofp_up): Likewise, rename arch_sh4_nofpu_up.
 210         (arch_sh4a_nofp_up): Likewise, rename arch_sh4a_nofpu_up.
 211         (arch_sh2a_nofpu_or_sh4_nommu_nofpu_up): Add missing
 212         arch_sh2a_or_sh4_up child.
 213         (sh_table): Do renaming as above.
 214         Correct comment for ldc.l for gas testsuite to read.
 215         Remove rogue mul.l from sh1 (duplicate of the one for sh2).
 216         Correct comments for movy.w and movy.l for gas testsuite to read.
 217         Correct comments for fmov.d and fmov.s for gas testsuite to read.
 218
 219 2005-01-12  H.J. Lu  <hongjiu.lu@intel.com>
 220
 221         * i386-dis.c (OP_E): Don't ignore scale in SIB for 64 bit mode.
 222
 223 2005-01-12  H.J. Lu  <hongjiu.lu@intel.com>
 224
 225         * i386-dis.c (OP_E): Ignore scale when index == 0x4 in SIB.
 226
 227 2005-01-10  Andreas Schwab  <schwab@suse.de>
 228
 229         * disassemble.c (disassemble_init_for_target) <case
 230         bfd_arch_ia64>: Set skip_zeroes to 16.
 231         <case bfd_arch_tic4x>: Set skip_zeroes to 32.
 232
 233 2004-12-23  Tomer Levi  <Tomer.Levi@nsc.com>
 234
 235         * crx-opc.c: Mark 'bcop' instruction as RELAXABLE.
 236
 237 2004-12-14  Svein E. Seldal  <Svein.Seldal@solidas.com>
 238
 239         * avr-dis.c: Prettyprint. Added printing of symbol names in all
 240         memory references. Convert avr_operand() to C90 formatting.
 241
 242 2004-12-05  Tomer Levi  <Tomer.Levi@nsc.com>
 243
 244         * crx-dis.c (print_arg): Use 'info->print_address_func' for address printing.
 245
 246 2004-11-29  Tomer Levi  <Tomer.Levi@nsc.com>
 247
 248         * crx-opc.c (crx_optab): Mark all rbase_disps* operands as signed.
 249         (no_op_insn): Initialize array with instructions that have no
 250         operands.
 251         * crx-dis.c (make_instruction): Get rid of COP_BRANCH_INS operand swapping.
 252
 253 2004-11-29  Richard Earnshaw  <rearnsha@arm.com>
 254
 255         * arm-dis.c: Correct top-level comment.
 256
 257 2004-11-27  Richard Earnshaw  <rearnsha@arm.com>
 258
 259         * arm-opc.h (arm_opcode, thumb_opcode): Add extra field for the
 260         architecuture defining the insn.
 261         (arm_opcodes, thumb_opcodes): Delete.  Move to ...
 262         * arm-dis.c (arm_opcodes, thumb_opcodes): Here.  Add architecutre
 263         field.
 264         Also include opcode/arm.h.
 265         * Makefile.am (arm-dis.lo): Update dependency list.
 266         * Makefile.in: Regenerate.
 267
 268 2004-11-22  Ravi Ramaseshan  <ravi.ramaseshan@codito.com>
 269
 270         * opcode/arc-opc.c (insert_base): Modify ls_operand[LS_OFFSET] to
 271         reflect the change to the short immediate syntax.
 272
 273 2004-11-19  Alan Modra  <amodra@bigpond.net.au>
 274
 275         * or32-opc.c (debug): Warning fix.
 276         * po/POTFILES.in: Regenerate.
 277
 278         * maxq-dis.c: Formatting.
 279         (print_insn): Warning fix.
 280
 281 2004-11-17  Daniel Jacobowitz  <dan@codesourcery.com>
 282
 283         * arm-dis.c (WORD_ADDRESS): Define.
 284         (print_insn): Use it.  Correct big-endian end-of-section handling.
 285
 286 2004-11-08  Inderpreet Singh   <inderpreetb@nioda.hcltech.com>
 287             Vineet Sharma      <vineets@noida.hcltech.com>
 288
 289         * maxq-dis.c: New file.
 290         * disassemble.c (ARCH_maxq): Define.
 291         (disassembler): Add 'print_insn_maxq_little' for handling maxq
 292         instructions..
 293         * configure.in: Add case for bfd_maxq_arch.
 294         * configure: Regenerate.
 295         * Makefile.am: Add support for maxq-dis.c
 296         * Makefile.in: Regenerate.
 297         * aclocal.m4: Regenerate.
 298
 299 2004-11-05  Tomer Levi  <Tomer.Levi@nsc.com>
 300
 301         * crx-opc.c (crx_optab): Rename 'arg_icr' to 'arg_idxr' for Index register
 302         mode.
 303         * crx-dis.c: Likewise.
 304
 305 2004-11-04  Hans-Peter Nilsson  <hp@axis.com>
 306
 307         Generally, handle CRISv32.
 308         * cris-dis.c (TRACE_CASE): Define as (disdata->trace_case).
 309         (struct cris_disasm_data): New type.
 310         (format_reg, format_hex, cris_constraint, print_flags)
 311         (get_opcode_entry): Add struct cris_disasm_data * parameter.  All
 312         callers changed.
 313         (format_sup_reg, print_insn_crisv32_with_register_prefix)
 314         (print_insn_crisv32_without_register_prefix)
 315         (print_insn_crisv10_v32_with_register_prefix)
 316         (print_insn_crisv10_v32_without_register_prefix)
 317         (cris_parse_disassembler_options): New functions.
 318         (bytes_to_skip, cris_spec_reg): Add enum cris_disass_family
 319         parameter.  All callers changed.
 320         (get_opcode_entry): Call malloc, not xmalloc.  Return NULL on
 321         failure.
 322         (cris_constraint) <case 'Y', 'U'>: New cases.
 323         (bytes_to_skip): Handle 'Y' and 'N' as 's'.  Skip size is 4 bytes
 324         for constraint 'n'.
 325         (print_with_operands) <case 'Y'>: New case.
 326         (print_with_operands) <case 'T', 'A', '[', ']', 'd', 'n', 'u'>
 327         <case 'N', 'Y', 'Q'>: New cases.
 328         (print_insn_cris_generic): Emit "bcc ." for zero and CRISv32.
 329         (print_insn_cris_with_register_prefix)
 330         (print_insn_cris_without_register_prefix): Call
 331         cris_parse_disassembler_options.
 332         * cris-opc.c (cris_spec_regs): Mention that this table isn't used
 333         for CRISv32 and the size of immediate operands.  New v32-only
 334         entries for bz, pid, srs, wz, exs, eda, dz, ebp, erp, nrp, ccs and
 335         spc.  Add v32-only 4-byte entries for p2, p3, p5 and p6.  Change
 336         ccr, ibr, irp to be v0..v10.  Change bar, dccr to be v8..v10.
 337         Change brp to be v3..v10.
 338         (cris_support_regs): New vector.
 339         (cris_opcodes): Update head comment.  New format characters '[',
 340         ']', space, 'A', 'd', 'N', 'n', 'Q', 'T', 'u', 'U', 'Y'.
 341         Add new opcodes for v32 and adjust existing opcodes to accommodate
 342         differences to earlier variants.
 343         (cris_cond15s): New vector.
 344
 345 2004-11-04 Jan Beulich <jbeulich@novell.com>
 346
 347         * i386-dis.c (Eq, Edqw, indirEp, Gdq, I1): Define.
 348         (indirEb): Remove.
 349         (Mp): Use f_mode rather than none at all.
 350         (t_mode, dq_mode, dqw_mode, f_mode, const_1_mode): Define. t_mode
 351         replaces what previously was x_mode; x_mode now means 128-bit SSE
 352         operands.
 353         (dis386): Make far jumps and calls have an 'l' prefix only in AT&T
 354         mode. movmskpX's, pextrw's, and pmovmskb's first operands are Gdq.
 355         pinsrw's second operand is Edqw.
 356         (grps): 1-bit shifts' and rotates' second operands are I1. cmpxchg8b's
 357         operand is Eq. movntq's and movntdq's first operands are EM. s[gi]dt,
 358         fldenv, frstor, fsave, fstenv all should also have suffixes in Intel
 359         mode when an operand size override is present or always suffixing.
 360         More instructions will need to be added to this group.
 361         (putop): Handle new macro chars 'C' (short/long suffix selector),
 362         'I' (Intel mode override for following macro char), and 'J' (for
 363         adding the 'l' prefix to far branches in AT&T mode). When an
 364         alternative was specified in the template, honor macro character when
 365         specified for Intel mode.
 366         (OP_E): Handle new *_mode values. Correct pointer specifications for
 367         memory operands. Consolidate output of index register.
 368         (OP_G): Handle new *_mode values.
 369         (OP_I): Handle const_1_mode.
 370         (OP_ESreg, OP_DSreg): Generate pointer specifications. Indicate
 371         respective opcode prefix bits have been consumed.
 372         (OP_EM, OP_EX): Provide some default handling for generating pointer
 373         specifications.
 374
 375 2004-10-28  Tomer Levi  <Tomer.Levi@nsc.com>
 376
 377         * crx-opc.c (REV_COP_INST): New macro, reverse operand order of
 378         COP_INST macro.
 379
 380 2004-10-27  Tomer Levi  <Tomer.Levi@nsc.com>
 381
 382         * crx-dis.c (enum REG_ARG_TYPE): New, replacing COP_ARG_TYPE.
 383         (getregliststring): Support HI/LO and user registers.
 384         * crx-opc.c (crx_instruction): Update data structure according to the
 385         rearrangement done in CRX opcode header file.
 386         (crx_regtab):  Likewise.
 387         (crx_optab):  Likewise.
 388         (crx_instruction): Reorder load/stor instructions, remove unsupported
 389         formats.
 390         support new Co-Processor instruction 'cpi'.
 391
 392 2004-10-27  Nick Clifton  <nickc@redhat.com>
 393
 394         * opcodes/iq2000-asm.c: Regenerate.
 395         * opcodes/iq2000-desc.c: Regenerate.
 396         * opcodes/iq2000-desc.h: Regenerate.
 397         * opcodes/iq2000-dis.c: Regenerate.
 398         * opcodes/iq2000-ibld.c: Regenerate.
 399         * opcodes/iq2000-opc.c: Regenerate.
 400         * opcodes/iq2000-opc.h: Regenerate.
 401
 402 2004-10-21  Tomer Levi  <Tomer.Levi@nsc.com>
 403
 404         * crx-opc.c (crx_instruction): Replace i3, i4, i5 with us3,
 405         us4, us5 (respectively).
 406         Remove unsupported 'popa' instruction.
 407         Reverse operands order in store co-processor instructions.
 408
 409 2004-10-15  Alan Modra  <amodra@bigpond.net.au>
 410
 411         * Makefile.am: Run "make dep-am"
 412         * Makefile.in: Regenerate.
 413
 414 2004-10-12  Bob Wilson  <bob.wilson@acm.org>
 415
 416         * xtensa-dis.c: Use ISO C90 formatting.
 417
 418 2004-10-09  Alan Modra  <amodra@bigpond.net.au>
 419
 420         * ppc-opc.c: Revert 2004-09-09 change.
 421
 422 2004-10-07  Bob Wilson  <bob.wilson@acm.org>
 423
 424         * xtensa-dis.c (state_names): Delete.
 425         (fetch_data): Use xtensa_isa_maxlength.
 426         (print_xtensa_operand): Replace operand parameter with opcode/operand
 427         pair.  Remove print_sr_name parameter.  Use new xtensa-isa.h functions.
 428         (print_insn_xtensa): Use new xtensa-isa.h functions.  Handle multislot
 429         instruction bundles.  Use xmalloc instead of malloc.
 430
 431 2004-10-07  David Gibson  <david@gibson.dropbear.id.au>
 432
 433         * ppc-opc.c: Replace literal "0"s with NULLs in pointer
 434         initializers.
 435
 436 2004-10-07  Tomer Levi  <Tomer.Levi@nsc.com>
 437
 438         * crx-opc.c (crx_instruction): Support Co-processor insns.
 439         * crx-dis.c (COP_ARG_TYPE): New enum for CO-Processor arguments.
 440         (getregliststring): Change function to use the above enum.
 441         (print_arg): Handle CO-Processor insns.
 442         (crx_cinvs): Add 'b' option to invalidate the branch-target
 443         cache.
 444
 445 2004-10-06  Aldy Hernandez  <aldyh@redhat.com>
 446
 447         * ppc-opc.c (powerpc_opcodes): Add efscfd, efdabs, efdnabs,
 448         efdneg, efdadd, efdsub, efdmul, efddiv, efdcmpgt, efdcmplt,
 449         efdcmpeq, efdtstgt, efdtstlt, efdtsteq, efdcfsi, efdcfsid,
 450         efdcfui, efdcfuid, efdcfsf, efdcfuf, efdctsi, efdctsidz, efdctsiz,
 451         efdctui, efdctuidz, efdctuiz, efdctsf, efdctuf, efdctuf, efdcfs.
 452
 453 2004-10-01  Bill Farmer  <Bill@the-farmers.freeserve.co.uk>
 454
 455         * pdp11-dis.c (print_insn_pdp11): Subtract the SOB's displacement
 456         rather than add it.
 457
 458 2004-09-30  Paul Brook  <paul@codesourcery.com>
 459
 460         * arm-dis.c (print_insn_arm): Handle 'e' for SMI instruction.
 461         * arm-opc.h: Document %e.  Add ARMv6ZK instructions.
 462
 463 2004-09-17  H.J. Lu  <hongjiu.lu@intel.com>
 464
 465         * Makefile.am (AUTOMAKE_OPTIONS): Require 1.9.
 466         (CONFIG_STATUS_DEPENDENCIES): New.
 467         (Makefile): Removed.
 468         (config.status): Likewise.
 469         * Makefile.in: Regenerated.
 470
 471 2004-09-17  Alan Modra  <amodra@bigpond.net.au>
 472
 473         * Makefile.am: Run "make dep-am".
 474         * Makefile.in: Regenerate.
 475         * aclocal.m4: Regenerate.
 476         * configure: Regenerate.
 477         * po/POTFILES.in: Regenerate.
 478         * po/opcodes.pot: Regenerate.
 479
 480 2004-09-11  Andreas Schwab  <schwab@suse.de>
 481
 482         * configure: Rebuild.
 483
 484 2004-09-09  Segher Boessenkool  <segher@kernel.crashing.org>
 485
 486         * ppc-opc.c (L): Make this field not optional.
 487
 488 2004-09-03  Tomer Levi  <Tomer.Levi@nsc.com>
 489
 490         * opc-crx.c: Rename 'popma' to 'popa', remove 'pushma'.
 491         Fix parameter to 'm[t|f]csr' insns.
 492
 493 2004-08-30  Nathanael Nerode  <neroden@gcc.gnu.org>
 494
 495         * configure.in: Autoupdate to autoconf 2.59.
 496         * aclocal.m4: Rebuild with aclocal 1.4p6.
 497         * configure: Rebuild with autoconf 2.59.
 498         * Makefile.in: Rebuild with automake 1.4p6 (picking up
 499         bfd changes for autoconf 2.59 on the way).
 500         * config.in: Rebuild with autoheader 2.59.
 501
 502 2004-08-27  Richard Sandiford  <rsandifo@redhat.com>
 503
 504         * frv-desc.[ch], frv-opc.[ch]: Regenerated.
 505
 506 2004-07-30  Michal Ludvig  <mludvig@suse.cz>
 507
 508         * i386-dis.c (GRPPADLCK): Renamed to GRPPADLCK1
 509         (GRPPADLCK2): New define.
 510         (twobyte_has_modrm): True for 0xA6.
 511         (grps): GRPPADLCK2 for opcode 0xA6.
 512
 513 2004-07-29  Alexandre Oliva  <aoliva@redhat.com>
 514
 515         Introduce SH2a support.
 516         * sh-opc.h (arch_sh2a_base): Renumber.
 517         (arch_sh2a_nofpu_base): Remove.
 518         (arch_sh_base_mask): Adjust.
 519         (arch_opann_mask): New.
 520         (arch_sh2a, arch_sh2a_nofpu): Adjust.
 521         (arch_sh2a_up, arch_sh2a_nofpu_up): Likewise.
 522         (sh_table): Adjust whitespace.
 523         2004-02-24  Corinna Vinschen  <vinschen@redhat.com>
 524         * sh-opc.h (arch_sh2a_nofpu_up): New.  Use instead of arch_sh2a_up in
 525         instruction list throughout.
 526         (arch_sh2a_up): Redefine to include fpu instruction set.  Use instead
 527         of arch_sh2a in instruction list throughout.
 528         (arch_sh2e_up): Accomodate above changes.
 529         (arch_sh2_up): Ditto.
 530         2004-02-20  Corinna Vinschen  <vinschen@redhat.com>
 531         * sh-opc.h: Add arch_sh2a_nofpu to arch_sh2_up.
 532         2004-02-18  Corinna Vinschen  <vinschen@redhat.com>
 533         * sh-dis.c (print_insn_sh): Add bfd_mach_sh2a_nofpu handling.
 534         * sh-opc.h (arch_sh2a_nofpu): New.
 535         (arch_sh2a_up): New, defines sh2a and sh2a_nofpu.
 536         (sh_table): Change all arch_sh2a to arch_sh2a_up unless FPU
 537         instruction.
 538         2004-01-20  DJ Delorie  <dj@redhat.com>
 539         * sh-dis.c (print_insn_sh): SH2A does not have 'X' fp regs.
 540         2003-12-29  DJ Delorie  <dj@redhat.com>
 541         * sh-opc.c (sh_nibble_type, sh_arg_type, arch_2a, arch_2e_up,
 542         sh_opcode_info, sh_table): Add sh2a support.
 543         (arch_op32): New, to tag 32-bit opcodes.
 544         * sh-dis.c (print_insn_sh): Support sh2a opcodes.
 545         2003-12-02  Michael Snyder  <msnyder@redhat.com>
 546         * sh-opc.h (arch_sh2a): Add.
 547         * sh-dis.c (arch_sh2a): Handle.
 548         * sh-opc.h (arch_sh2_up): Fix up to include arch_sh2a.
 549
 550 2004-07-27  Tomer Levi  <Tomer.Levi@nsc.com>
 551
 552         * crx-opc.c: Add popx,pushx insns. Indent code, fix comments.
 553
 554 2004-07-22  Nick Clifton  <nickc@redhat.com>
 555
 556         PR/280
 557         * h8300-dis.c (bfd_h8_disassemble): Do not dump raw bytes for the
 558         insns - this is done by objdump itself.
 559         * h8500-dis.c (print_insn_h8500): Likewise.
 560
 561 2004-07-21  Jan Beulich <jbeulich@novell.com>
 562
 563         * i386-dis.c (OP_E): Show rip-relative addressing in 64-bit mode
 564         regardless of address size prefix in effect.
 565         (ptr_reg): Size or address registers does not depend on rex64, but
 566         on the presence of an address size override.
 567         (OP_MMX): Use rex.x only for xmm registers.
 568         (OP_EM): Use rex.z only for xmm registers.
 569
 570 2004-07-20  Maciej W. Rozycki  <macro@linux-mips.org>
 571
 572         * mips-opc.c (mips_builtin_opcodes): Move coprocessor 2
 573         move/branch operations to the bottom so that VR5400 multimedia
 574         instructions take precedence in disassembly.
 575
 576 2004-07-20  Maciej W. Rozycki  <macro@linux-mips.org>
 577
 578         * mips-opc.c (mips_builtin_opcodes): Remove the MIPS32
 579         ISA-specific "break" encoding.
 580
 581 2004-07-13  Elvis Chiang  <elvisfb@gmail.com>
 582
 583         * arm-opc.h: Fix typo in comment.
 584
 585 2004-07-11  Andreas Schwab  <schwab@suse.de>
 586
 587         * m68k-dis.c (m68k_valid_ea): Fix typos in last change.
 588
 589 2004-07-09  Andreas Schwab  <schwab@suse.de>
 590
 591         * m68k-dis.c (m68k_valid_ea): Check validity of all codes.
 592
 593 2004-07-07  Tomer Levi  <Tomer.Levi@nsc.com>
 594
 595         * Makefile.am (CFILES): Add crx-dis.c, crx-opc.c.
 596         (ALL_MACHINES): Add crx-dis.lo, crx-opc.lo.
 597         (crx-dis.lo): New target.
 598         (crx-opc.lo): Likewise.
 599         * Makefile.in: Regenerate.
 600         * configure.in: Handle bfd_crx_arch.
 601         * configure: Regenerate.
 602         * crx-dis.c: New file.
 603         * crx-opc.c: New file.
 604         * disassemble.c (ARCH_crx): Define.
 605         (disassembler): Handle ARCH_crx.
 606
 607 2004-06-29  James E Wilson  <wilson@specifixinc.com>
 608
 609         * ia64-opc-a.c (ia64_opcodes_a): Delete mov immediate pseudo for adds.
 610         * ia64-asmtab.c: Regnerate.
 611
 612 2004-06-28  Alan Modra  <amodra@bigpond.net.au>
 613
 614         * ppc-opc.c (insert_fxm): Handle mfocrf and mtocrf.
 615         (extract_fxm): Don't test dialect.
 616         (XFXFXM_MASK): Include the power4 bit.
 617         (XFXM): Add p4 param.
 618         (powerpc_opcodes): Add mfocrf and mtocrf.  Adjust mtcr.
 619
 620 2004-06-27  Alexandre Oliva  <aoliva@redhat.com>
 621
 622         2003-07-21  Richard Sandiford  <rsandifo@redhat.com>
 623         * disassemble.c (disassembler): Handle bfd_mach_h8300sxn.
 624
 625 2004-06-26  Alan Modra  <amodra@bigpond.net.au>
 626
 627         * ppc-opc.c (BH, XLBH_MASK): Define.
 628         (powerpc_opcodes): Allow BH field on bclr, bclrl, bcctr, bcctrl.
 629
 630 2004-06-24  Alan Modra  <amodra@bigpond.net.au>
 631
 632         * i386-dis.c (x_mode): Comment.
 633         (two_source_ops): File scope.
 634         (float_mem): Correct fisttpll and fistpll.
 635         (float_mem_mode): New table.
 636         (dofloat): Use it.
 637         (OP_E): Correct intel mode PTR output.
 638         (ptr_reg): Use open_char and close_char.
 639         (PNI_Fixup): Handle possible suffix on sidt.  Use op1out etc. for
 640         operands.  Set two_source_ops.
 641
 642 2004-06-15  Alan Modra  <amodra@bigpond.net.au>
 643
 644         * arc-ext.c (build_ARC_extmap): Use bfd_get_section_size
 645         instead of _raw_size.
 646
 647 2004-06-08  Jakub Jelinek  <jakub@redhat.com>
 648
 649         * ia64-gen.c (in_iclass): Handle more postinc st
 650         and ld variants.
 651         * ia64-asmtab.c: Rebuilt.
 652
 653 2004-06-01  Martin Schwidefsky  <schwidefsky@de.ibm.com>
 654
 655         * s390-opc.txt: Correct architecture mask for some opcodes.
 656         lrv, lrvh, strv, ml, dl, alc, slb rll and mvclu are available
 657         in the esa mode as well.
 658
 659 2004-05-28  Andrew Stubbs <andrew.stubbs@superh.com>
 660
 661         * sh-dis.c (target_arch): Make unsigned.
 662         (print_insn_sh): Replace (most of) switch with a call to
 663         sh_get_arch_from_bfd_mach(). Also use new architecture flags system.
 664         * sh-opc.h: Redefine architecture flags values.
 665         Add sh3-nommu architecture.
 666         Reorganise <arch>_up macros so they make more visual sense.
 667         (SH_MERGE_ARCH_SET): Define new macro.
 668         (SH_VALID_BASE_ARCH_SET): Likewise.
 669         (SH_VALID_MMU_ARCH_SET): Likewise.
 670         (SH_VALID_CO_ARCH_SET): Likewise.
 671         (SH_VALID_ARCH_SET): Likewise.
 672         (SH_MERGE_ARCH_SET_VALID): Likewise.
 673         (SH_ARCH_SET_HAS_FPU): Likewise.
 674         (SH_ARCH_SET_HAS_DSP): Likewise.
 675         (SH_ARCH_UNKNOWN_ARCH): Likewise.
 676         (sh_get_arch_from_bfd_mach): Add prototype.
 677         (sh_get_arch_up_from_bfd_mach): Likewise.
 678         (sh_get_bfd_mach_from_arch_set): Likewise.
 679         (sh_merge_bfd_arc): Likewise.
 680
 681 2004-05-24  Peter Barada  <peter@the-baradas.com>
 682
 683         * m68k-dis.c(print_insn_m68k): Strip body of diassembly out
 684         into new match_insn_m68k function.  Loop over canidate
 685         matches and select first that completely matches.
 686         * m68k-dis.c(print_insn_arg): Fix 'g' case to only extract 1 bit.
 687         * m68k-dis.c(print_insn_arg): Call new function m68k_valid_ea
 688         to verify addressing for MAC/EMAC.
 689         * m68k-dis.c(print_insn_arg): Use reg_half_names for MAC/EMAC
 690         reigster halves since 'fpu' and 'spl' look misleading.
 691         * m68k-dis.c(fetch_arg): Fix 'G', 'H', 'I', 'f', 'M', 'N' cases.
 692         * m68k-opc.c: Rearragne mac/emac cases to use longest for
 693         first, tighten up match masks.
 694         * m68k-opc.c: Add 'size' field to struct m68k_opcode.  Produce
 695         'size' from special case code in print_insn_m68k to
 696         determine decode size of insns.
 697
 698 2004-05-19  Alan Modra  <amodra@bigpond.net.au>
 699
 700         * ppc-opc.c (insert_fxm): Enable two operand mfcr when -many as
 701         well as when -mpower4.
 702
 703 2004-05-13  Nick Clifton  <nickc@redhat.com>
 704
 705         * po/fr.po: Updated French translation.
 706
 707 2004-05-05  Peter Barada  <peter@the-baradas.com>
 708
 709         * m68k-dis.c(print_insn_m68k): Add new chips, use core
 710         variants in arch_mask.  Only set m68881/68851 for 68k chips.
 711         * m68k-op.c: Switch from ColdFire chips to core variants.
 712
 713 2004-05-05  Alan Modra  <amodra@bigpond.net.au>
 714
 715         PR 147.
 716         * ppc-opc.c (PPCVEC): Remove PPC_OPCODE_PPC.
 717
 718 2004-04-29  Ben Elliston  <bje@au.ibm.com>
 719
 720         * ppc-opc.c (XCMPL): Renmame to XOPL. Update users.
 721         (powerpc_opcodes): Add "dbczl" instruction for PPC970.
 722
 723 2004-04-22  Kaz Kojima  <kkojima@rr.iij4u.or.jp>
 724
 725         * sh-dis.c (print_insn_sh): Print the value in constant pool
 726         as a symbol if it looks like a symbol.
 727
 728 2004-04-22  Peter Barada <peter@the-baradas.com>
 729
 730         * m68k-dis.c(print_insn_m68k): Set mfcmac/mcfemac on
 731         appropriate ColdFire architectures.
 732         (print_insn_m68k): Handle EMAC, MAC/EMAC scalefactor, and MAC/EMAC
 733         mask addressing.
 734         Add EMAC instructions, fix MAC instructions. Remove
 735         macmw/macml/msacmw/msacml instructions since mask addressing now
 736         supported.
 737
 738 2004-04-20  Jakub Jelinek  <jakub@redhat.com>
 739
 740         * sparc-opc.c (fmoviccx, fmovfccx, fmovccx): Define.
 741         (fmovicc, fmovfcc, fmovcc): Remove fpsize argument, change opcode to
 742         suffix.  Use fmov*x macros, create all 3 fpsize variants in one
 743         macro.  Adjust all users.
 744
 745 2004-04-15  Anil Paranjpe  <anilp1@kpitcummins.com>
 746
 747         * h8300-dis.c (bfd_h8_disassemble) : Treat "adds" & "subs"
 748         separately.
 749
 750 2004-03-30  Kazuhiro Inaoka  <inaoka.kazuhiro@renesas.com>
 751
 752         * m32r-asm.c: Regenerate.
 753
 754 2004-03-29  Stan Shebs  <shebs@apple.com>
 755
 756         * mpw-config.in, mpw-make.sed: Remove MPW support files, no longer
 757         used.
 758
 759 2004-03-19  Alan Modra  <amodra@bigpond.net.au>
 760
 761         * aclocal.m4: Regenerate.
 762         * config.in: Regenerate.
 763         * configure: Regenerate.
 764         * po/POTFILES.in: Regenerate.
 765         * po/opcodes.pot: Regenerate.
 766
 767 2004-03-16  Alan Modra  <amodra@bigpond.net.au>
 768
 769         * ppc-dis.c (print_insn_powerpc): Don't print tabs.  Handle
 770         PPC_OPERANDS_GPR_0.
 771         * ppc-opc.c (RA0): Define.
 772         (RAQ, RAL, RAM, RAS, RSQ, RTQ, RSO): Use PPC_OPERAND_GPR_0.
 773         (RAOPT): Rename from RAO.  Update all uses.
 774         (powerpc_opcodes): Use RA0 as appropriate.
 775
 776 2004-03-15  Aldy Hernandez  <aldyh@redhat.com>
 777
 778         * ppc-opc.c (powerpc_opcodes): Add BOOKE versions of mfsprg.
 779
 780 2004-03-15  Alan Modra  <amodra@bigpond.net.au>
 781
 782         * sparc-dis.c (print_insn_sparc): Update getword prototype.
 783
 784 2004-03-12  Michal Ludvig  <mludvig@suse.cz>
 785
 786         * i386-dis.c (GRPPLOCK): Delete.
 787         (grps): Delete GRPPLOCK entry.
 788
 789 2004-03-12  Alan Modra  <amodra@bigpond.net.au>
 790
 791         * i386-dis.c (OP_M, OP_0f0e, OP_0fae, NOP_Fixup): New functions.
 792         (M, Mp): Use OP_M.
 793         (None, PADLOCK_SPECIAL, PADLOCK_0): Delete.
 794         (GRPPADLCK): Define.
 795         (dis386): Use NOP_Fixup on "nop".
 796         (dis386_twobyte): Use GRPPADLCK on opcode 0xa7.
 797         (twobyte_has_modrm): Set for 0xa7.
 798         (padlock_table): Delete.  Move to..
 799         (grps): ..here, using OP_0f07.  Use OP_Ofae on lfence, mfence
 800         and clflush.
 801         (print_insn): Revert PADLOCK_SPECIAL code.
 802         (OP_E): Delete sfence, lfence, mfence checks.
 803
 804 2004-03-12  Jakub Jelinek  <jakub@redhat.com>
 805
 806         * i386-dis.c (grps): Use INVLPG_Fixup instead of OP_E for invlpg.
 807         (INVLPG_Fixup): New function.
 808         (PNI_Fixup): Remove ATTRIBUTE_UNUSED from sizeflag.
 809
 810 2004-03-12  Michal Ludvig  <mludvig@suse.cz>
 811
 812         * i386-dis.c (PADLOCK_SPECIAL, PADLOCK_0): New defines.
 813         (dis386_twobyte): Opcode 0xa7 is PADLOCK_0.
 814         (padlock_table): New struct with PadLock instructions.
 815         (print_insn): Handle PADLOCK_SPECIAL.
 816
 817 2004-03-12  Alan Modra  <amodra@bigpond.net.au>
 818
 819         * i386-dis.c (grps): Use clflush by default for 0x0fae/7.
 820         (OP_E): Twiddle clflush to sfence here.
 821
 822 2004-03-08  Nick Clifton  <nickc@redhat.com>
 823
 824         * po/de.po: Updated German translation.
 825
 826 2003-03-03  Andrew Stubbs  <andrew.stubbs@superh.com>
 827
 828         * sh-dis.c (print_insn_sh): Don't disassemble fp instructions in
 829         nofpu mode.  Add BFD type bfd_mach_sh4_nommu_nofpu.
 830         * sh-opc.h: Add sh4_nommu_nofpu architecture and adjust instructions
 831         accordingly.
 832
 833 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
 834
 835         * frv-asm.c: Regenerate.
 836         * frv-desc.c: Regenerate.
 837         * frv-desc.h: Regenerate.
 838         * frv-dis.c: Regenerate.
 839         * frv-ibld.c: Regenerate.
 840         * frv-opc.c: Regenerate.
 841         * frv-opc.h: Regenerate.
 842
 843 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
 844
 845         * frv-desc.c, frv-opc.c: Regenerate.
 846
 847 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
 848
 849         * frv-desc.c, frv-opc.c, frv-opc.h: Regenerate.
 850
 851 2004-02-26  Andrew Stubbs  <andrew.stubbs@superh.com>
 852
 853         * sh-opc.h: Move fsca and fsrra instructions from sh4a to sh4.
 854         Also correct mistake in the comment.
 855
 856 2004-02-26  Andrew Stubbs <andrew.stubbs@superh.com>
 857
 858         * sh-dis.c (print_insn_sh): Add REG_N_D nibble type to
 859         ensure that double registers have even numbers.
 860         Add REG_N_B01 for nn01 (binary 01) nibble to ensure
 861         that reserved instruction 0xfffd does not decode the same
 862         as 0xfdfd (ftrv).
 863         * sh-opc.h: Add REG_N_D nibble type and use it whereever
 864         REG_N refers to a double register.
 865         Add REG_N_B01 nibble type and use it instead of REG_NM
 866         in ftrv.
 867         Adjust the bit patterns in a few comments.
 868
 869 2004-02-25  Aldy Hernandez  <aldyh@redhat.com>
 870
 871         * ppc-opc.c (powerpc_opcodes): Change mask for dcbt and dcbtst.
 872
 873 2004-02-20  Aldy Hernandez  <aldyh@redhat.com>
 874
 875         * ppc-opc.c (powerpc_opcodes): Move mfmcsrr0 before mfdc_dat.
 876
 877 2004-02-20  Aldy Hernandez  <aldyh@redhat.com>
 878
 879         * ppc-opc.c (powerpc_opcodes): Add m*ivor35.
 880
 881 2004-02-20  Aldy Hernandez  <aldyh@redhat.com>
 882
 883         * ppc-opc.c (powerpc_opcodes): Add mfivor32, mfivor33, mfivor34,
 884         mtivor32, mtivor33, mtivor34.
 885
 886 2004-02-19  Aldy Hernandez  <aldyh@redhat.com>
 887
 888         * ppc-opc.c (powerpc_opcodes): Add mfmcar.
 889
 890 2004-02-10  Petko Manolov  <petkan@nucleusys.com>
 891
 892         * arm-opc.h Maverick accumulator register opcode fixes.
 893
 894 2004-02-13  Ben Elliston  <bje@wasabisystems.com>
 895
 896         * m32r-dis.c: Regenerate.
 897
 898 2004-01-27  Michael Snyder  <msnyder@redhat.com>
 899
 900         * sh-opc.h (sh_table): "fsrra", not "fssra".
 901
 902 2004-01-23  Andrew Over <andrew.over@cs.anu.edu.au>
 903
 904         * sparc-opc.c (fdtox, fstox, fqtox, fxtod, fxtos, fxtoq): Tighten
 905         contraints.
 906
 907 2004-01-19  Andrew Over  <andrew.over@cs.anu.edu.au>
 908
 909         * sparc-opc.c (sparc_opcodes) <f[dsq]tox, fxto[dsq]>: Fix args.
 910
 911 2004-01-19  Alan Modra  <amodra@bigpond.net.au>
 912
 913         * i386-dis.c (OP_E): Print scale factor on intel mode sib when not
 914         1.  Don't print scale factor on AT&T mode when index missing.
 915
 916 2004-01-16  Alexandre Oliva  <aoliva@redhat.com>
 917
 918         * m10300-opc.c (mov): 8- and 24-bit immediates are zero-extended
 919         when loaded into XR registers.
 920
 921 2004-01-14  Richard Sandiford  <rsandifo@redhat.com>
 922
 923         * frv-desc.h: Regenerate.
 924         * frv-desc.c: Regenerate.
 925         * frv-opc.c: Regenerate.
 926
 927 2004-01-13  Michael Snyder  <msnyder@redhat.com>
 928
 929         * sh-dis.c (print_insn_sh): Allocate 4 bytes for insn.
 930
 931 2004-01-09  Paul Brook  <paul@codesourcery.com>
 932
 933         * arm-opc.h (arm_opcodes): Move generic mcrr after known
 934         specific opcodes.
 935
 936 2004-01-07  Daniel Jacobowitz  <drow@mvista.com>
 937
 938         * Makefile.am (libopcodes_la_DEPENDENCIES)
 939         (libopcodes_la_LIBADD): Revert 2003-05-17 change.  Add explanatory
 940         comment about the problem.
 941         * Makefile.in: Regenerate.
 942
 943 2004-01-06  Alexandre Oliva  <aoliva@redhat.com>
 944
 945         2003-12-19  Alexandre Oliva  <aoliva@redhat.com>
 946         * frv-asm.c (parse_ulo16, parse_uhi16, parse_d12): Fix some
 947         cut&paste errors in shifting/truncating numerical operands.
 948         2003-08-04  Alexandre Oliva  <aoliva@redhat.com>
 949         * frv-asm.c (parse_ulo16): Parse gotofflo and gotofffuncdesclo.
 950         (parse_uslo16): Likewise.
 951         (parse_uhi16): Parse gotoffhi and gotofffuncdeschi.
 952         (parse_d12): Parse gotoff12 and gotofffuncdesc12.
 953         (parse_s12): Likewise.
 954         2003-08-04  Alexandre Oliva  <aoliva@redhat.com>
 955         * frv-asm.c (parse_ulo16): Parse gotlo and gotfuncdesclo.
 956         (parse_uslo16): Likewise.
 957         (parse_uhi16): Parse gothi and gotfuncdeschi.
 958         (parse_d12): Parse got12 and gotfuncdesc12.
 959         (parse_s12): Likewise.
 960
 961 2004-01-02  Albert Bartoszko  <albar@nt.kegel.com.pl>
 962
 963         * msp430-dis.c (msp430_doubleoperand): Check for an 'add'
 964         instruction which looks similar to an 'rla' instruction.
 965
 966 For older changes see ChangeLog-0203
 967 \f
 968 Local Variables:
 969 mode: change-log
 970 left-margin: 8
 971 fill-column: 74
 972 version-control: never
 973 End: