opcodes/ChangeLog

   1 2016-03-30  Claudiu Zissulescu  <claziss@synopsys.com>
   2
   3         * arc-regs.h (IC_RAM_ADDRESS, IC_TAG, IC_WP, IC_DATA, CONTROL0)
   4         (AX2, AY2, MX2, MY2, AY0, AY1, DC_RAM_ADDR, DC_TAG, CONTROL1)
   5         (RTT): Remove duplicate.
   6         (LCDINSTR, LCDDATA, LCDSTAT, CC_*, PCT_COUNT*, PCT_SNAP*)
   7         (PCT_CONFIG*): Remove.
   8         (D1L, D1H, D2H, D2L): Define.
   9
  10 2016-03-29  Claudiu Zissulescu  <claziss@synopsys.com>
  11
  12         * arc-ext-tbl.h (dsp_fp_i2flt): Fix typo.
  13
  14 2016-03-29  Claudiu Zissulescu  <claziss@synopsys.com>
  15
  16         * arc-tbl.h (invld07): Remove.
  17         * arc-ext-tbl.h: New file.
  18         * arc-dis.c (FIELDA, FIELDB, FIELDC): Remove.
  19         * arc-opc.c (arc_opcodes): Add ext-tbl include.
  20
  21 2016-03-24  Jan Kratochvil  <jan.kratochvil@redhat.com>
  22
  23         Fix -Wstack-usage warnings.
  24         * aarch64-dis.c (print_operands): Substitute size.
  25         * aarch64-opc.c (print_register_offset_address): Substitute tblen.
  26
  27 2016-03-22  Jose E. Marchesi  <jose.marchesi@oracle.com>
  28
  29         * sparc-opc.c (sparc_opcodes): Reorder entries for `rd' in order
  30         to get a proper diagnostic when an invalid ASR register is used.
  31
  32 2016-03-22  Nick Clifton  <nickc@redhat.com>
  33
  34         * configure: Regenerate.
  35
  36 2016-03-21  Andrew Burgess  <andrew.burgess@embecosm.com>
  37
  38         * arc-nps400-tbl.h: New file.
  39         * arc-opc.c: Add top level comment.
  40         (insert_nps_3bit_dst): New function.
  41         (extract_nps_3bit_dst): New function.
  42         (insert_nps_3bit_src2): New function.
  43         (extract_nps_3bit_src2): New function.
  44         (insert_nps_bitop_size): New function.
  45         (extract_nps_bitop_size): New function.
  46         (arc_flag_operands): Add nps400 entries.
  47         (arc_flag_classes): Add nps400 entries.
  48         (arc_operands): Add nps400 entries.
  49         (arc_opcodes): Add nps400 include.
  50
  51 2016-03-21  Andrew Burgess  <andrew.burgess@embecosm.com>
  52
  53         * arc-opc.c (arc_flag_classes): Convert all flag classes to use
  54         the new class enum values.
  55
  56 2016-03-21  Andrew Burgess  <andrew.burgess@embecosm.com>
  57
  58         * arc-dis.c (print_insn_arc): Handle nps400.
  59
  60 2016-03-21  Andrew Burgess  <andrew.burgess@embecosm.com>
  61
  62         * arc-opc.c (BASE): Delete.
  63
  64 2016-03-18  Nick Clifton  <nickc@redhat.com>
  65
  66         PR target/19721
  67         * aarch64-tbl.h (aarch64_opcode_table): Fix type of second operand
  68         of MOV insn that aliases an ORR insn.
  69
  70 2016-03-16  Jiong Wang  <jiong.wang@arm.com>
  71
  72         * arm-dis.c (neon_opcodes): Support new FP16 instructions.
  73
  74 2016-03-07  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
  75
  76         * mcore-opc.h: Add const qualifiers.
  77         * microblaze-opc.h (struct op_code_struct): Likewise.
  78         * sh-opc.h: Likewise.
  79         * tic4x-dis.c (tic4x_print_indirect): Likewise.
  80         (tic4x_print_op): Likewise.
  81
  82 2016-03-02  Alan Modra  <amodra@gmail.com>
  83
  84         * or1k-desc.h: Regenerate.
  85         * fr30-ibld.c: Regenerate.
  86         * rl78-decode.c: Regenerate.
  87
  88 2016-03-01  Nick Clifton  <nickc@redhat.com>
  89
  90         PR target/19747
  91         * rl78-dis.c (print_insn_rl78_common): Fix typo.
  92
  93 2016-02-24  Renlin Li  <renlin.li@arm.com>
  94
  95         * arm-dis.c (coprocessor_opcodes): Add fp16 instruction entries.
  96         (print_insn_coprocessor): Support fp16 instructions.
  97
  98 2016-02-24  Renlin Li  <renlin.li@arm.com>
  99
 100         * arm-dis.c (print_insn_coprocessor): Fix mask for vsel, vmaxnm,
 101         vminnm, vrint(mpna).
 102
 103 2016-02-24  Renlin Li  <renlin.li@arm.com>
 104
 105         * arm-dis.c (print_insn_coprocessor): Check co-processor number for
 106         cpd/cpd2, mcr/mcr2, mrc/mrc2, ldc/ldc2, stc/stc2.
 107
 108 2016-02-15  H.J. Lu  <hongjiu.lu@intel.com>
 109
 110         * i386-dis.c (print_insn): Parenthesize expression to prevent
 111         truncated addresses.
 112         (OP_J): Likewise.
 113
 114 2016-02-10  Claudiu Zissulescu  <claziss@synopsys.com>
 115             Janek van Oirschot  <jvanoirs@synopsys.com>
 116
 117         * arc-opc.c (arc_relax_opcodes, arc_num_relax_opcodes): New
 118         variable.
 119
 120 2016-02-04  Nick Clifton  <nickc@redhat.com>
 121
 122         PR target/19561
 123         * msp430-dis.c (print_insn_msp430): Add a special case for
 124         decoding an RRC instruction with the ZC bit set in the extension
 125         word.
 126
 127 2016-02-02  Andrew Burgess  <andrew.burgess@embecosm.com>
 128
 129         * cgen-ibld.in (insert_normal): Rework calculation of shift.
 130         * epiphany-ibld.c: Regenerate.
 131         * fr30-ibld.c: Regenerate.
 132         * frv-ibld.c: Regenerate.
 133         * ip2k-ibld.c: Regenerate.
 134         * iq2000-ibld.c: Regenerate.
 135         * lm32-ibld.c: Regenerate.
 136         * m32c-ibld.c: Regenerate.
 137         * m32r-ibld.c: Regenerate.
 138         * mep-ibld.c: Regenerate.
 139         * mt-ibld.c: Regenerate.
 140         * or1k-ibld.c: Regenerate.
 141         * xc16x-ibld.c: Regenerate.
 142         * xstormy16-ibld.c: Regenerate.
 143
 144 2016-02-02  Andrew Burgess  <andrew.burgess@embecosm.com>
 145
 146         * epiphany-dis.c: Regenerated from latest cpu files.
 147
 148 2016-02-01  Michael McConville  <mmcco@mykolab.com>
 149
 150         * cgen-dis.c (count_decodable_bits): Use unsigned value for mask
 151         test bit.
 152
 153 2016-01-25  Renlin Li  <renlin.li@arm.com>
 154
 155         * arm-dis.c (mapping_symbol_for_insn): New function.
 156         (find_ifthen_state): Call mapping_symbol_for_insn().
 157
 158 2016-01-20  Matthew Wahab  <matthew.wahab@arm.com>
 159
 160         * aarch64-opc.c (operand_general_constraint_met_p): Check validity
 161         of MSR UAO immediate operand.
 162
 163 2016-01-18  Maciej W. Rozycki  <macro@imgtec.com>
 164
 165         * mips-dis.c (print_insn_micromips): Remove 48-bit microMIPS
 166         instruction support.
 167
 168 2016-01-17  Alan Modra  <amodra@gmail.com>
 169
 170         * configure: Regenerate.
 171
 172 2016-01-14  Nick Clifton  <nickc@redhat.com>
 173
 174         * rl78-decode.opc (rl78_decode_opcode): Add 's' operand to movw
 175         instructions that can support stack pointer operations.
 176         * rl78-decode.c: Regenerate.
 177         * rl78-dis.c: Fix display of stack pointer in MOVW based
 178         instructions.
 179
 180 2016-01-14  Matthew Wahab  <matthew.wahab@arm.com>
 181
 182         * aarch64-opc.c (aarch64_sys_reg_supported_p): Merge conditionals
 183         testing for RAS support.  Add checks for erxfr_el1, erxctlr_el1,
 184         erxtatus_el1 and erxaddr_el1.
 185
 186 2016-01-12  Matthew Wahab  <matthew.wahab@arm.com>
 187
 188         * arm-dis.c (arm_opcodes): Add "esb".
 189         (thumb_opcodes): Likewise.
 190
 191 2016-01-11  Peter Bergner <bergner@vnet.ibm.com>
 192
 193         * ppc-opc.c <xscmpnedp>: Delete.
 194         <xvcmpnedp>: Likewise.
 195         <xvcmpnedp.>: Likewise.
 196         <xvcmpnesp>: Likewise.
 197         <xvcmpnesp.>: Likewise.
 198
 199 2016-01-08  Andreas Schwab  <schwab@linux-m68k.org>
 200
 201         PR gas/13050
 202         * m68k-opc.c (moveb, movew): For ISA_B/C only allow #,d(An) in
 203         addition to ISA_A.
 204
 205 2016-01-01  Alan Modra  <amodra@gmail.com>
 206
 207         Update year range in copyright notice of all files.
 208
 209 For older changes see ChangeLog-2015
 210 \f
 211 Copyright (C) 2016 Free Software Foundation, Inc.
 212
 213 Copying and distribution of this file, with or without modification,
 214 are permitted in any medium without royalty provided the copyright
 215 notice and this notice are preserved.
 216
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