1 2005-05-19 Kelley Cook <kcook@gcc.gnu.org>
3 * Makefile.in: Regenerate.
5 2005-05-17 Zack Weinberg <zack@codesourcery.com>
7 * arm-dis.c (thumb_opcodes): Add disassembly for V6T2 16-bit
8 instructions. Adjust disassembly of some opcodes to match
10 (thumb32_opcodes): New table.
11 (print_insn_thumb): Rename print_insn_thumb16; don't handle
12 two-halfword branches here.
13 (print_insn_thumb32): New function.
14 (print_insn): Choose among print_insn_arm, print_insn_thumb16,
15 and print_insn_thumb32. Be consistent about order of
16 halfwords when printing 32-bit instructions.
18 2005-05-07 H.J. Lu <hongjiu.lu@intel.com>
21 * i386-dis.c (branch_v_mode): New.
22 (indirEv): Use branch_v_mode instead of v_mode.
23 (OP_E): Handle branch_v_mode.
25 2005-05-07 H.J. Lu <hongjiu.lu@intel.com>
27 * d10v-dis.c (dis_2_short): Support 64bit host.
29 2005-05-07 Nick Clifton <nickc@redhat.com>
31 * po/nl.po: Updated translation.
33 2005-05-07 Nick Clifton <nickc@redhat.com>
35 * Update the address and phone number of the FSF organization in
36 the GPL notices in the following files:
37 a29k-dis.c, aclocal.m4, alpha-dis.c, alpha-opc.c, arc-dis.c,
38 arc-dis.h, arc-ext.c, arc-ext.h, arc-opc.c, arm-dis.c, arm-opc.h,
39 avr-dis.c, cgen-asm.c, cgen-asm.in, cgen-dis.c, cgen-dis.in,
40 cgen-ibld.in, cgen-opc.c, cgen.sh, cris-dis.c, cris-opc.c,
41 crx-dis.c, crx-opc.c, d10v-dis.c, d10v-opc.c, d30v-dis.c,
42 d30v-opc.c, dis-buf.c, dis-init.c, disassemble.c, dlx-dis.c,
43 fr30-asm.c, fr30-desc.c, fr30-desc.h, fr30-dis.c, fr30-ibld.c,
44 fr30-opc.c, fr30-opc.h, frv-asm.c, frv-desc.c, frv-desc.h,
45 frv-dis.c, frv-ibld.c, frv-opc.c, frv-opc.h, h8300-dis.c,
46 h8500-dis.c, h8500-opc.h, hppa-dis.c, i370-dis.c, i370-opc.c,
47 i386-dis.c, i860-dis.c, i960-dis.c, ia64-asmtab.h, ia64-dis.c,
48 ia64-gen.c, ia64-opc-a.c, ia64-opc-b.c, ia64-opc-d.c,
49 ia64-opc-f.c, ia64-opc-i.c, ia64-opc-m.c, ia64-opc-x.c,
50 ia64-opc.c, ia64-opc.h, ip2k-asm.c, ip2k-desc.c, ip2k-desc.h,
51 ip2k-dis.c, ip2k-ibld.c, ip2k-opc.c, ip2k-opc.h, iq2000-asm.c,
52 iq2000-desc.c, iq2000-desc.h, iq2000-dis.c, iq2000-ibld.c,
53 iq2000-opc.c, iq2000-opc.h, m10200-dis.c, m10200-opc.c,
54 m10300-dis.c, m10300-opc.c, m32r-asm.c, m32r-desc.c, m32r-desc.h,
55 m32r-dis.c, m32r-ibld.c, m32r-opc.c, m32r-opc.h, m32r-opinst.c,
56 m68hc11-dis.c, m68hc11-opc.c, m68k-dis.c, m68k-opc.c, m88k-dis.c,
57 maxq-dis.c, mcore-dis.c, mcore-opc.h, mips-dis.c, mips-opc.c,
58 mips16-opc.c, mmix-dis.c, mmix-opc.c, msp430-dis.c, ns32k-dis.c,
59 openrisc-asm.c, openrisc-desc.c, openrisc-desc.h, openrisc-dis.c,
60 openrisc-ibld.c, openrisc-opc.c, openrisc-opc.h, opintl.h,
61 or32-dis.c, or32-opc.c, pdp11-dis.c, pdp11-opc.c, pj-dis.c,
62 pj-opc.c, ppc-dis.c, ppc-opc.c, s390-dis.c, s390-mkopc.c,
63 s390-opc.c, sh-dis.c, sh-opc.h, sh64-dis.c, sh64-opc.c,
64 sh64-opc.h, sparc-dis.c, sparc-opc.c, sysdep.h, tic30-dis.c,
65 tic4x-dis.c, tic54x-dis.c, tic54x-opc.c, tic80-dis.c, tic80-opc.c,
66 v850-dis.c, v850-opc.c, vax-dis.c, w65-dis.c, w65-opc.h,
67 xstormy16-asm.c, xstormy16-desc.c, xstormy16-desc.h,
68 xstormy16-dis.c, xstormy16-ibld.c, xstormy16-opc.c,
69 xstormy16-opc.h, xtensa-dis.c, z8k-dis.c, z8kgen.c
71 2005-05-05 James E Wilson <wilson@specifixinc.com>
73 * ia64-opc.c: Include sysdep.h before libiberty.h.
75 2005-05-05 Nick Clifton <nickc@redhat.com>
77 * configure.in (ALL_LINGUAS): Add vi.
78 * configure: Regenerate.
81 2005-04-26 Jerome Guitton <guitton@gnat.com>
83 * configure.in: Fix the check for basename declaration.
84 * configure: Regenerate.
86 2005-04-19 Alan Modra <amodra@bigpond.net.au>
88 * ppc-opc.c (RTO): Define.
89 (powerpc_opcodes <tlbsx, tlbsx., tlbre>): Combine PPC403 and BOOKE
90 entries to suit PPC440.
92 2005-04-18 Mark Kettenis <kettenis@gnu.org>
94 * i386-dis.c: Insert hyphens into selected VIA PadLock extensions.
97 2005-04-14 Nick Clifton <nickc@redhat.com>
99 * po/fi.po: New translation: Finnish.
100 * configure.in (ALL_LINGUAS): Add fi.
101 * configure: Regenerate.
103 2005-04-14 Alan Modra <amodra@bigpond.net.au>
105 * Makefile.am (NO_WERROR): Define.
106 * configure.in: Invoke AM_BINUTILS_WARNINGS.
107 * Makefile.in: Regenerate.
108 * aclocal.m4: Regenerate.
109 * configure: Regenerate.
111 2005-04-04 Nick Clifton <nickc@redhat.com>
113 * fr30-asm.c: Regenerate.
114 * frv-asm.c: Regenerate.
115 * iq2000-asm.c: Regenerate.
116 * m32r-asm.c: Regenerate.
117 * openrisc-asm.c: Regenerate.
119 2005-04-01 Jan Beulich <jbeulich@novell.com>
121 * i386-dis.c (PNI_Fixup): Neither mwait nor monitor have any
122 visible operands in Intel mode. The first operand of monitor is
125 2005-04-01 Jan Beulich <jbeulich@novell.com>
127 * i386-dis.c (INVLPG_Fixup): Decode rdtscp; change code to allow for
128 easier future additions.
130 2005-03-31 Jerome Guitton <guitton@gnat.com>
132 * configure.in: Check for basename.
133 * configure: Regenerate.
136 2005-03-29 H.J. Lu <hongjiu.lu@intel.com>
138 * i386-dis.c (SEG_Fixup): New.
140 (dis386): Use "Sv" for 0x8c and 0x8e.
142 2005-03-21 Jan-Benedict Glaw <jbglaw@lug-owl.de>
143 Nick Clifton <nickc@redhat.com>
145 * vax-dis.c: (entry_addr): New varible: An array of user supplied
146 function entry mask addresses.
147 (entry_addr_occupied_slots): New variable: The number of occupied
148 elements in entry_addr.
149 (entry_addr_total_slots): New variable: The total number of
150 elements in entry_addr.
151 (parse_disassembler_options): New function. Fills in the entry_addr
153 (free_entry_array): New function. Release the memory used by the
154 entry addr array. Suppressed because there is no way to call it.
155 (is_function_entry): Check if a given address is a function's
156 start address by looking at supplied entry mask addresses and
157 symbol information, if available.
158 (print_insn_vax): Use parse_disassembler_options and is_function_entry.
160 2005-03-23 H.J. Lu <hongjiu.lu@intel.com>
162 * cris-dis.c (print_with_operands): Use ~31L for long instead
165 2005-03-20 H.J. Lu <hongjiu.lu@intel.com>
167 * mmix-opc.c (O): Revert the last change.
170 2005-03-19 H.J. Lu <hongjiu.lu@intel.com>
172 * mmix-opc.c (O): Use 24UL instead of 24 for unsigned long.
175 2005-03-19 Hans-Peter Nilsson <hp@bitrange.com>
177 * mmix-opc.c (O, Z): Force expression as unsigned long.
179 2005-03-18 Nick Clifton <nickc@redhat.com>
181 * ip2k-asm.c: Regenerate.
182 * op/opcodes.pot: Regenerate.
184 2005-03-16 Nick Clifton <nickc@redhat.com>
185 Ben Elliston <bje@au.ibm.com>
187 * configure.in (werror): New switch: Add -Werror to the
188 compiler command line. Enabled by default. Disable via
190 * configure: Regenerate.
192 2005-03-16 Alan Modra <amodra@bigpond.net.au>
194 * ppc-dis.c (powerpc_dialect): Don't set PPC_OPCODE_ALTIVEC when
197 2005-03-15 Alan Modra <amodra@bigpond.net.au>
199 * po/es.po: Commit new Spanish translation.
201 * po/fr.po: Commit new French translation.
203 2005-03-14 Jan-Benedict Glaw <jbglaw@lug-owl.de>
205 * vax-dis.c: Fix spelling error
206 (print_insn_vax): Use ".word 0x0012 # Entry mask: r1 r2 >" instead
207 of just "Entry mask: < r1 ... >"
209 2005-03-12 Zack Weinberg <zack@codesourcery.com>
211 * arm-dis.c (arm_opcodes): Document %E and %V.
212 Add entries for v6T2 ARM instructions:
213 bfc bfi mls strht ldrht ldrsht ldrsbt movw movt rbit ubfx sbfx.
214 (print_insn_arm): Add support for %E and %V.
215 (thumb_opcodes): Add ARMv6K instructions nop, sev, wfe, wfi, yield.
217 2005-03-10 Jeff Baker <jbaker@qnx.com>
218 Alan Modra <amodra@bigpond.net.au>
220 * ppc-opc.c (insert_sprg, extract_sprg): New Functions.
221 (powerpc_operands <SPRG>): Call the above. Bit field is 5 bits.
223 (XSPRG_MASK): Mask off extra bits now part of sprg field.
224 (powerpc_opcodes): Asjust mfsprg and mtsprg to suit new mask. Move
225 mfsprg4..7 after msprg and consolidate.
227 2005-03-09 Jan-Benedict Glaw <jbglaw@lug-owl.de>
229 * vax-dis.c (entry_mask_bit): New array.
230 (print_insn_vax): Decode function entry mask.
232 2005-03-07 Aldy Hernandez <aldyh@redhat.com>
234 * ppc-opc.c (powerpc_opcodes): Fix encoding of efscfd.
236 2005-03-05 Alan Modra <amodra@bigpond.net.au>
238 * po/opcodes.pot: Regenerate.
240 2005-03-03 Ramana Radhakrishnan <ramana.radhakrishnan@codito.com>
242 * arc-dis.c (a4_decoding_class): New enum.
243 (dsmOneArcInst): Use the enum values for the decoding class.
244 Remove redundant case in the switch for decodingClass value 11.
246 2005-03-02 Jan Beulich <jbeulich@novell.com>
248 * i386-dis.c (print_insn): Suppress lock prefix printing for cr8...15
250 (OP_C): Consider lock prefix in non-64-bit modes.
252 2005-02-24 Alan Modra <amodra@bigpond.net.au>
254 * cris-dis.c (format_hex): Remove ineffective warning fix.
255 * crx-dis.c (make_instruction): Warning fix.
256 * frv-asm.c: Regenerate.
258 2005-02-23 Nick Clifton <nickc@redhat.com>
260 * cgen-dis.in: Use bfd_byte for buffers that are passed to
263 * ia64-opc.c (locate_opcode_ent): Initialise opval array.
265 * crx-dis.c (make_instruction): Move argument structure into inner
266 scope and ensure that all of its fields are initialised before
269 * fr30-asm.c: Regenerate.
270 * fr30-dis.c: Regenerate.
271 * frv-asm.c: Regenerate.
272 * frv-dis.c: Regenerate.
273 * ip2k-asm.c: Regenerate.
274 * ip2k-dis.c: Regenerate.
275 * iq2000-asm.c: Regenerate.
276 * iq2000-dis.c: Regenerate.
277 * m32r-asm.c: Regenerate.
278 * m32r-dis.c: Regenerate.
279 * openrisc-asm.c: Regenerate.
280 * openrisc-dis.c: Regenerate.
281 * xstormy16-asm.c: Regenerate.
282 * xstormy16-dis.c: Regenerate.
284 2005-02-22 Alan Modra <amodra@bigpond.net.au>
286 * arc-ext.c: Warning fixes.
287 * arc-ext.h: Likewise.
288 * cgen-opc.c: Likewise.
289 * ia64-gen.c: Likewise.
290 * maxq-dis.c: Likewise.
291 * ns32k-dis.c: Likewise.
292 * w65-dis.c: Likewise.
293 * ia64-asmtab.c: Regenerate.
295 2005-02-22 Alan Modra <amodra@bigpond.net.au>
297 * fr30-desc.c: Regenerate.
298 * fr30-desc.h: Regenerate.
299 * fr30-opc.c: Regenerate.
300 * fr30-opc.h: Regenerate.
301 * frv-desc.c: Regenerate.
302 * frv-desc.h: Regenerate.
303 * frv-opc.c: Regenerate.
304 * frv-opc.h: Regenerate.
305 * ip2k-desc.c: Regenerate.
306 * ip2k-desc.h: Regenerate.
307 * ip2k-opc.c: Regenerate.
308 * ip2k-opc.h: Regenerate.
309 * iq2000-desc.c: Regenerate.
310 * iq2000-desc.h: Regenerate.
311 * iq2000-opc.c: Regenerate.
312 * iq2000-opc.h: Regenerate.
313 * m32r-desc.c: Regenerate.
314 * m32r-desc.h: Regenerate.
315 * m32r-opc.c: Regenerate.
316 * m32r-opc.h: Regenerate.
317 * m32r-opinst.c: Regenerate.
318 * openrisc-desc.c: Regenerate.
319 * openrisc-desc.h: Regenerate.
320 * openrisc-opc.c: Regenerate.
321 * openrisc-opc.h: Regenerate.
322 * xstormy16-desc.c: Regenerate.
323 * xstormy16-desc.h: Regenerate.
324 * xstormy16-opc.c: Regenerate.
325 * xstormy16-opc.h: Regenerate.
327 2005-02-21 Alan Modra <amodra@bigpond.net.au>
329 * Makefile.am: Run "make dep-am"
330 * Makefile.in: Regenerate.
332 2005-02-15 Nick Clifton <nickc@redhat.com>
334 * cgen-dis.in (print_address): Add an ATTRIBUTE_UNUSED to prevent
335 compile time warnings.
336 (print_keyword): Likewise.
337 (default_print_insn): Likewise.
339 * fr30-desc.c: Regenerated.
340 * fr30-desc.h: Regenerated.
341 * fr30-dis.c: Regenerated.
342 * fr30-opc.c: Regenerated.
343 * fr30-opc.h: Regenerated.
344 * frv-desc.c: Regenerated.
345 * frv-dis.c: Regenerated.
346 * frv-opc.c: Regenerated.
347 * ip2k-asm.c: Regenerated.
348 * ip2k-desc.c: Regenerated.
349 * ip2k-desc.h: Regenerated.
350 * ip2k-dis.c: Regenerated.
351 * ip2k-opc.c: Regenerated.
352 * ip2k-opc.h: Regenerated.
353 * iq2000-desc.c: Regenerated.
354 * iq2000-dis.c: Regenerated.
355 * iq2000-opc.c: Regenerated.
356 * m32r-asm.c: Regenerated.
357 * m32r-desc.c: Regenerated.
358 * m32r-desc.h: Regenerated.
359 * m32r-dis.c: Regenerated.
360 * m32r-opc.c: Regenerated.
361 * m32r-opc.h: Regenerated.
362 * m32r-opinst.c: Regenerated.
363 * openrisc-desc.c: Regenerated.
364 * openrisc-desc.h: Regenerated.
365 * openrisc-dis.c: Regenerated.
366 * openrisc-opc.c: Regenerated.
367 * openrisc-opc.h: Regenerated.
368 * xstormy16-desc.c: Regenerated.
369 * xstormy16-desc.h: Regenerated.
370 * xstormy16-dis.c: Regenerated.
371 * xstormy16-opc.c: Regenerated.
372 * xstormy16-opc.h: Regenerated.
374 2005-02-14 H.J. Lu <hongjiu.lu@intel.com>
376 * dis-buf.c (perror_memory): Use sprintf_vma to print out
379 2005-02-11 Nick Clifton <nickc@redhat.com>
381 * iq2000-asm.c: Regenerate.
383 * frv-dis.c: Regenerate.
385 2005-02-07 Jim Blandy <jimb@redhat.com>
387 * Makefile.am (CGEN): Load guile.scm before calling the main
389 * Makefile.in: Regenerated.
390 * cgen.sh: Be prepared for the 'cgen' argument to contain spaces.
391 Simply pass the cgen-opc.scm path to ${cgen} as its first
392 argument; ${cgen} itself now contains the '-s', or whatever is
393 appropriate for the Scheme being used.
395 2005-01-31 Andrew Cagney <cagney@gnu.org>
397 * configure: Regenerate to track ../gettext.m4.
399 2005-01-31 Jan Beulich <jbeulich@novell.com>
401 * ia64-gen.c (NELEMS): Define.
402 (shrink): Generate alias with missing second predicate register when
403 opcode has two outputs and these are both predicates.
404 * ia64-opc-i.c (FULL17): Define.
405 (ia64_opcodes_i): Add mov-to-pr alias without second input. Use FULL17
406 here to generate output template.
407 (TBITCM, TNATCM): Undefine after use.
408 * ia64-opc-m.c (ia64_opcodes_i): Add alloc alias without ar.pfs as
409 first input. Add ld16 aliases without ar.csd as second output. Add
410 st16 aliases without ar.csd as second input. Add cmpxchg aliases
411 without ar.ccv as third input. Add cmp8xchg16 aliases without ar.csd/
412 ar.ccv as third/fourth inputs. Consolidate through...
413 (CMPXCHG_acq, CMPXCHG_rel, CMPXCHG_1, CMPXCHG_2, CMPXCHG_4, CMPXCHG_8,
414 CMPXCHGn, CMP8XCHG16, CMPXCHG_ALL): Define.
415 * ia64-asmtab.c: Regenerate.
417 2005-01-27 Andrew Cagney <cagney@gnu.org>
419 * configure: Regenerate to track ../gettext.m4 change.
421 2005-01-25 Alexandre Oliva <aoliva@redhat.com>
423 2004-11-10 Alexandre Oliva <aoliva@redhat.com>
424 * frv-asm.c: Rebuilt.
425 * frv-desc.c: Rebuilt.
426 * frv-desc.h: Rebuilt.
427 * frv-dis.c: Rebuilt.
428 * frv-ibld.c: Rebuilt.
429 * frv-opc.c: Rebuilt.
430 * frv-opc.h: Rebuilt.
432 2005-01-24 Andrew Cagney <cagney@gnu.org>
434 * configure: Regenerate, ../gettext.m4 was updated.
436 2005-01-21 Fred Fish <fnf@specifixinc.com>
438 * mips-opc.c: Change INSN_ALIAS to INSN2_ALIAS.
439 Change INSN_WRITE_MDMX_ACC to INSN2_WRITE_MDMX_ACC.
440 Change INSN_READ_MDMX_ACC to INSN2_READ_MDMX_ACC.
443 2005-01-20 Alan Modra <amodra@bigpond.net.au>
445 * ppc-opc.c (powerpc_opcodes): Add optional 'l' arg to tlbiel.
447 2005-01-19 Fred Fish <fnf@specifixinc.com>
449 * mips-dis.c (no_aliases): New disassembly option flag.
450 (set_default_mips_dis_options): Init no_aliases to zero.
451 (parse_mips_dis_option): Handle no-aliases option.
452 (print_insn_mips): Ignore table entries that are aliases
453 if no_aliases is set.
454 (print_insn_mips16): Ditto.
455 * mips-opc.c (mips_builtin_opcodes): Add initializer column for
456 new pinfo2 member and add INSN_ALIAS initializers as needed. Also
457 move WR_MACC and RD_MACC initializers from pinfo to pinfo2.
458 * mips16-opc.c (mips16_opcodes): Ditto.
460 2005-01-17 Andrew Stubbs <andrew.stubbs@st.com>
462 * sh-opc.h (arch_sh2a_or_sh3e,arch_sh2a_or_sh4): Correct definition.
463 (inheritance diagram): Add missing edge.
464 (arch_sh1_up): Rename arch_sh_up to match external name to make life
465 easier for the testsuite.
466 (arch_sh4_nofp_up): Likewise, rename arch_sh4_nofpu_up.
467 (arch_sh4a_nofp_up): Likewise, rename arch_sh4a_nofpu_up.
468 (arch_sh2a_nofpu_or_sh4_nommu_nofpu_up): Add missing
469 arch_sh2a_or_sh4_up child.
470 (sh_table): Do renaming as above.
471 Correct comment for ldc.l for gas testsuite to read.
472 Remove rogue mul.l from sh1 (duplicate of the one for sh2).
473 Correct comments for movy.w and movy.l for gas testsuite to read.
474 Correct comments for fmov.d and fmov.s for gas testsuite to read.
476 2005-01-12 H.J. Lu <hongjiu.lu@intel.com>
478 * i386-dis.c (OP_E): Don't ignore scale in SIB for 64 bit mode.
480 2005-01-12 H.J. Lu <hongjiu.lu@intel.com>
482 * i386-dis.c (OP_E): Ignore scale when index == 0x4 in SIB.
484 2005-01-10 Andreas Schwab <schwab@suse.de>
486 * disassemble.c (disassemble_init_for_target) <case
487 bfd_arch_ia64>: Set skip_zeroes to 16.
488 <case bfd_arch_tic4x>: Set skip_zeroes to 32.
490 2004-12-23 Tomer Levi <Tomer.Levi@nsc.com>
492 * crx-opc.c: Mark 'bcop' instruction as RELAXABLE.
494 2004-12-14 Svein E. Seldal <Svein.Seldal@solidas.com>
496 * avr-dis.c: Prettyprint. Added printing of symbol names in all
497 memory references. Convert avr_operand() to C90 formatting.
499 2004-12-05 Tomer Levi <Tomer.Levi@nsc.com>
501 * crx-dis.c (print_arg): Use 'info->print_address_func' for address printing.
503 2004-11-29 Tomer Levi <Tomer.Levi@nsc.com>
505 * crx-opc.c (crx_optab): Mark all rbase_disps* operands as signed.
506 (no_op_insn): Initialize array with instructions that have no
508 * crx-dis.c (make_instruction): Get rid of COP_BRANCH_INS operand swapping.
510 2004-11-29 Richard Earnshaw <rearnsha@arm.com>
512 * arm-dis.c: Correct top-level comment.
514 2004-11-27 Richard Earnshaw <rearnsha@arm.com>
516 * arm-opc.h (arm_opcode, thumb_opcode): Add extra field for the
517 architecuture defining the insn.
518 (arm_opcodes, thumb_opcodes): Delete. Move to ...
519 * arm-dis.c (arm_opcodes, thumb_opcodes): Here. Add architecutre
521 Also include opcode/arm.h.
522 * Makefile.am (arm-dis.lo): Update dependency list.
523 * Makefile.in: Regenerate.
525 2004-11-22 Ravi Ramaseshan <ravi.ramaseshan@codito.com>
527 * opcode/arc-opc.c (insert_base): Modify ls_operand[LS_OFFSET] to
528 reflect the change to the short immediate syntax.
530 2004-11-19 Alan Modra <amodra@bigpond.net.au>
532 * or32-opc.c (debug): Warning fix.
533 * po/POTFILES.in: Regenerate.
535 * maxq-dis.c: Formatting.
536 (print_insn): Warning fix.
538 2004-11-17 Daniel Jacobowitz <dan@codesourcery.com>
540 * arm-dis.c (WORD_ADDRESS): Define.
541 (print_insn): Use it. Correct big-endian end-of-section handling.
543 2004-11-08 Inderpreet Singh <inderpreetb@nioda.hcltech.com>
544 Vineet Sharma <vineets@noida.hcltech.com>
546 * maxq-dis.c: New file.
547 * disassemble.c (ARCH_maxq): Define.
548 (disassembler): Add 'print_insn_maxq_little' for handling maxq
550 * configure.in: Add case for bfd_maxq_arch.
551 * configure: Regenerate.
552 * Makefile.am: Add support for maxq-dis.c
553 * Makefile.in: Regenerate.
554 * aclocal.m4: Regenerate.
556 2004-11-05 Tomer Levi <Tomer.Levi@nsc.com>
558 * crx-opc.c (crx_optab): Rename 'arg_icr' to 'arg_idxr' for Index register
560 * crx-dis.c: Likewise.
562 2004-11-04 Hans-Peter Nilsson <hp@axis.com>
564 Generally, handle CRISv32.
565 * cris-dis.c (TRACE_CASE): Define as (disdata->trace_case).
566 (struct cris_disasm_data): New type.
567 (format_reg, format_hex, cris_constraint, print_flags)
568 (get_opcode_entry): Add struct cris_disasm_data * parameter. All
570 (format_sup_reg, print_insn_crisv32_with_register_prefix)
571 (print_insn_crisv32_without_register_prefix)
572 (print_insn_crisv10_v32_with_register_prefix)
573 (print_insn_crisv10_v32_without_register_prefix)
574 (cris_parse_disassembler_options): New functions.
575 (bytes_to_skip, cris_spec_reg): Add enum cris_disass_family
576 parameter. All callers changed.
577 (get_opcode_entry): Call malloc, not xmalloc. Return NULL on
579 (cris_constraint) <case 'Y', 'U'>: New cases.
580 (bytes_to_skip): Handle 'Y' and 'N' as 's'. Skip size is 4 bytes
582 (print_with_operands) <case 'Y'>: New case.
583 (print_with_operands) <case 'T', 'A', '[', ']', 'd', 'n', 'u'>
584 <case 'N', 'Y', 'Q'>: New cases.
585 (print_insn_cris_generic): Emit "bcc ." for zero and CRISv32.
586 (print_insn_cris_with_register_prefix)
587 (print_insn_cris_without_register_prefix): Call
588 cris_parse_disassembler_options.
589 * cris-opc.c (cris_spec_regs): Mention that this table isn't used
590 for CRISv32 and the size of immediate operands. New v32-only
591 entries for bz, pid, srs, wz, exs, eda, dz, ebp, erp, nrp, ccs and
592 spc. Add v32-only 4-byte entries for p2, p3, p5 and p6. Change
593 ccr, ibr, irp to be v0..v10. Change bar, dccr to be v8..v10.
594 Change brp to be v3..v10.
595 (cris_support_regs): New vector.
596 (cris_opcodes): Update head comment. New format characters '[',
597 ']', space, 'A', 'd', 'N', 'n', 'Q', 'T', 'u', 'U', 'Y'.
598 Add new opcodes for v32 and adjust existing opcodes to accommodate
599 differences to earlier variants.
600 (cris_cond15s): New vector.
602 2004-11-04 Jan Beulich <jbeulich@novell.com>
604 * i386-dis.c (Eq, Edqw, indirEp, Gdq, I1): Define.
606 (Mp): Use f_mode rather than none at all.
607 (t_mode, dq_mode, dqw_mode, f_mode, const_1_mode): Define. t_mode
608 replaces what previously was x_mode; x_mode now means 128-bit SSE
610 (dis386): Make far jumps and calls have an 'l' prefix only in AT&T
611 mode. movmskpX's, pextrw's, and pmovmskb's first operands are Gdq.
612 pinsrw's second operand is Edqw.
613 (grps): 1-bit shifts' and rotates' second operands are I1. cmpxchg8b's
614 operand is Eq. movntq's and movntdq's first operands are EM. s[gi]dt,
615 fldenv, frstor, fsave, fstenv all should also have suffixes in Intel
616 mode when an operand size override is present or always suffixing.
617 More instructions will need to be added to this group.
618 (putop): Handle new macro chars 'C' (short/long suffix selector),
619 'I' (Intel mode override for following macro char), and 'J' (for
620 adding the 'l' prefix to far branches in AT&T mode). When an
621 alternative was specified in the template, honor macro character when
622 specified for Intel mode.
623 (OP_E): Handle new *_mode values. Correct pointer specifications for
624 memory operands. Consolidate output of index register.
625 (OP_G): Handle new *_mode values.
626 (OP_I): Handle const_1_mode.
627 (OP_ESreg, OP_DSreg): Generate pointer specifications. Indicate
628 respective opcode prefix bits have been consumed.
629 (OP_EM, OP_EX): Provide some default handling for generating pointer
632 2004-10-28 Tomer Levi <Tomer.Levi@nsc.com>
634 * crx-opc.c (REV_COP_INST): New macro, reverse operand order of
637 2004-10-27 Tomer Levi <Tomer.Levi@nsc.com>
639 * crx-dis.c (enum REG_ARG_TYPE): New, replacing COP_ARG_TYPE.
640 (getregliststring): Support HI/LO and user registers.
641 * crx-opc.c (crx_instruction): Update data structure according to the
642 rearrangement done in CRX opcode header file.
643 (crx_regtab): Likewise.
644 (crx_optab): Likewise.
645 (crx_instruction): Reorder load/stor instructions, remove unsupported
647 support new Co-Processor instruction 'cpi'.
649 2004-10-27 Nick Clifton <nickc@redhat.com>
651 * opcodes/iq2000-asm.c: Regenerate.
652 * opcodes/iq2000-desc.c: Regenerate.
653 * opcodes/iq2000-desc.h: Regenerate.
654 * opcodes/iq2000-dis.c: Regenerate.
655 * opcodes/iq2000-ibld.c: Regenerate.
656 * opcodes/iq2000-opc.c: Regenerate.
657 * opcodes/iq2000-opc.h: Regenerate.
659 2004-10-21 Tomer Levi <Tomer.Levi@nsc.com>
661 * crx-opc.c (crx_instruction): Replace i3, i4, i5 with us3,
662 us4, us5 (respectively).
663 Remove unsupported 'popa' instruction.
664 Reverse operands order in store co-processor instructions.
666 2004-10-15 Alan Modra <amodra@bigpond.net.au>
668 * Makefile.am: Run "make dep-am"
669 * Makefile.in: Regenerate.
671 2004-10-12 Bob Wilson <bob.wilson@acm.org>
673 * xtensa-dis.c: Use ISO C90 formatting.
675 2004-10-09 Alan Modra <amodra@bigpond.net.au>
677 * ppc-opc.c: Revert 2004-09-09 change.
679 2004-10-07 Bob Wilson <bob.wilson@acm.org>
681 * xtensa-dis.c (state_names): Delete.
682 (fetch_data): Use xtensa_isa_maxlength.
683 (print_xtensa_operand): Replace operand parameter with opcode/operand
684 pair. Remove print_sr_name parameter. Use new xtensa-isa.h functions.
685 (print_insn_xtensa): Use new xtensa-isa.h functions. Handle multislot
686 instruction bundles. Use xmalloc instead of malloc.
688 2004-10-07 David Gibson <david@gibson.dropbear.id.au>
690 * ppc-opc.c: Replace literal "0"s with NULLs in pointer
693 2004-10-07 Tomer Levi <Tomer.Levi@nsc.com>
695 * crx-opc.c (crx_instruction): Support Co-processor insns.
696 * crx-dis.c (COP_ARG_TYPE): New enum for CO-Processor arguments.
697 (getregliststring): Change function to use the above enum.
698 (print_arg): Handle CO-Processor insns.
699 (crx_cinvs): Add 'b' option to invalidate the branch-target
702 2004-10-06 Aldy Hernandez <aldyh@redhat.com>
704 * ppc-opc.c (powerpc_opcodes): Add efscfd, efdabs, efdnabs,
705 efdneg, efdadd, efdsub, efdmul, efddiv, efdcmpgt, efdcmplt,
706 efdcmpeq, efdtstgt, efdtstlt, efdtsteq, efdcfsi, efdcfsid,
707 efdcfui, efdcfuid, efdcfsf, efdcfuf, efdctsi, efdctsidz, efdctsiz,
708 efdctui, efdctuidz, efdctuiz, efdctsf, efdctuf, efdctuf, efdcfs.
710 2004-10-01 Bill Farmer <Bill@the-farmers.freeserve.co.uk>
712 * pdp11-dis.c (print_insn_pdp11): Subtract the SOB's displacement
715 2004-09-30 Paul Brook <paul@codesourcery.com>
717 * arm-dis.c (print_insn_arm): Handle 'e' for SMI instruction.
718 * arm-opc.h: Document %e. Add ARMv6ZK instructions.
720 2004-09-17 H.J. Lu <hongjiu.lu@intel.com>
722 * Makefile.am (AUTOMAKE_OPTIONS): Require 1.9.
723 (CONFIG_STATUS_DEPENDENCIES): New.
725 (config.status): Likewise.
726 * Makefile.in: Regenerated.
728 2004-09-17 Alan Modra <amodra@bigpond.net.au>
730 * Makefile.am: Run "make dep-am".
731 * Makefile.in: Regenerate.
732 * aclocal.m4: Regenerate.
733 * configure: Regenerate.
734 * po/POTFILES.in: Regenerate.
735 * po/opcodes.pot: Regenerate.
737 2004-09-11 Andreas Schwab <schwab@suse.de>
739 * configure: Rebuild.
741 2004-09-09 Segher Boessenkool <segher@kernel.crashing.org>
743 * ppc-opc.c (L): Make this field not optional.
745 2004-09-03 Tomer Levi <Tomer.Levi@nsc.com>
747 * opc-crx.c: Rename 'popma' to 'popa', remove 'pushma'.
748 Fix parameter to 'm[t|f]csr' insns.
750 2004-08-30 Nathanael Nerode <neroden@gcc.gnu.org>
752 * configure.in: Autoupdate to autoconf 2.59.
753 * aclocal.m4: Rebuild with aclocal 1.4p6.
754 * configure: Rebuild with autoconf 2.59.
755 * Makefile.in: Rebuild with automake 1.4p6 (picking up
756 bfd changes for autoconf 2.59 on the way).
757 * config.in: Rebuild with autoheader 2.59.
759 2004-08-27 Richard Sandiford <rsandifo@redhat.com>
761 * frv-desc.[ch], frv-opc.[ch]: Regenerated.
763 2004-07-30 Michal Ludvig <mludvig@suse.cz>
765 * i386-dis.c (GRPPADLCK): Renamed to GRPPADLCK1
766 (GRPPADLCK2): New define.
767 (twobyte_has_modrm): True for 0xA6.
768 (grps): GRPPADLCK2 for opcode 0xA6.
770 2004-07-29 Alexandre Oliva <aoliva@redhat.com>
772 Introduce SH2a support.
773 * sh-opc.h (arch_sh2a_base): Renumber.
774 (arch_sh2a_nofpu_base): Remove.
775 (arch_sh_base_mask): Adjust.
776 (arch_opann_mask): New.
777 (arch_sh2a, arch_sh2a_nofpu): Adjust.
778 (arch_sh2a_up, arch_sh2a_nofpu_up): Likewise.
779 (sh_table): Adjust whitespace.
780 2004-02-24 Corinna Vinschen <vinschen@redhat.com>
781 * sh-opc.h (arch_sh2a_nofpu_up): New. Use instead of arch_sh2a_up in
782 instruction list throughout.
783 (arch_sh2a_up): Redefine to include fpu instruction set. Use instead
784 of arch_sh2a in instruction list throughout.
785 (arch_sh2e_up): Accomodate above changes.
786 (arch_sh2_up): Ditto.
787 2004-02-20 Corinna Vinschen <vinschen@redhat.com>
788 * sh-opc.h: Add arch_sh2a_nofpu to arch_sh2_up.
789 2004-02-18 Corinna Vinschen <vinschen@redhat.com>
790 * sh-dis.c (print_insn_sh): Add bfd_mach_sh2a_nofpu handling.
791 * sh-opc.h (arch_sh2a_nofpu): New.
792 (arch_sh2a_up): New, defines sh2a and sh2a_nofpu.
793 (sh_table): Change all arch_sh2a to arch_sh2a_up unless FPU
795 2004-01-20 DJ Delorie <dj@redhat.com>
796 * sh-dis.c (print_insn_sh): SH2A does not have 'X' fp regs.
797 2003-12-29 DJ Delorie <dj@redhat.com>
798 * sh-opc.c (sh_nibble_type, sh_arg_type, arch_2a, arch_2e_up,
799 sh_opcode_info, sh_table): Add sh2a support.
800 (arch_op32): New, to tag 32-bit opcodes.
801 * sh-dis.c (print_insn_sh): Support sh2a opcodes.
802 2003-12-02 Michael Snyder <msnyder@redhat.com>
803 * sh-opc.h (arch_sh2a): Add.
804 * sh-dis.c (arch_sh2a): Handle.
805 * sh-opc.h (arch_sh2_up): Fix up to include arch_sh2a.
807 2004-07-27 Tomer Levi <Tomer.Levi@nsc.com>
809 * crx-opc.c: Add popx,pushx insns. Indent code, fix comments.
811 2004-07-22 Nick Clifton <nickc@redhat.com>
814 * h8300-dis.c (bfd_h8_disassemble): Do not dump raw bytes for the
815 insns - this is done by objdump itself.
816 * h8500-dis.c (print_insn_h8500): Likewise.
818 2004-07-21 Jan Beulich <jbeulich@novell.com>
820 * i386-dis.c (OP_E): Show rip-relative addressing in 64-bit mode
821 regardless of address size prefix in effect.
822 (ptr_reg): Size or address registers does not depend on rex64, but
823 on the presence of an address size override.
824 (OP_MMX): Use rex.x only for xmm registers.
825 (OP_EM): Use rex.z only for xmm registers.
827 2004-07-20 Maciej W. Rozycki <macro@linux-mips.org>
829 * mips-opc.c (mips_builtin_opcodes): Move coprocessor 2
830 move/branch operations to the bottom so that VR5400 multimedia
831 instructions take precedence in disassembly.
833 2004-07-20 Maciej W. Rozycki <macro@linux-mips.org>
835 * mips-opc.c (mips_builtin_opcodes): Remove the MIPS32
836 ISA-specific "break" encoding.
838 2004-07-13 Elvis Chiang <elvisfb@gmail.com>
840 * arm-opc.h: Fix typo in comment.
842 2004-07-11 Andreas Schwab <schwab@suse.de>
844 * m68k-dis.c (m68k_valid_ea): Fix typos in last change.
846 2004-07-09 Andreas Schwab <schwab@suse.de>
848 * m68k-dis.c (m68k_valid_ea): Check validity of all codes.
850 2004-07-07 Tomer Levi <Tomer.Levi@nsc.com>
852 * Makefile.am (CFILES): Add crx-dis.c, crx-opc.c.
853 (ALL_MACHINES): Add crx-dis.lo, crx-opc.lo.
854 (crx-dis.lo): New target.
855 (crx-opc.lo): Likewise.
856 * Makefile.in: Regenerate.
857 * configure.in: Handle bfd_crx_arch.
858 * configure: Regenerate.
859 * crx-dis.c: New file.
860 * crx-opc.c: New file.
861 * disassemble.c (ARCH_crx): Define.
862 (disassembler): Handle ARCH_crx.
864 2004-06-29 James E Wilson <wilson@specifixinc.com>
866 * ia64-opc-a.c (ia64_opcodes_a): Delete mov immediate pseudo for adds.
867 * ia64-asmtab.c: Regnerate.
869 2004-06-28 Alan Modra <amodra@bigpond.net.au>
871 * ppc-opc.c (insert_fxm): Handle mfocrf and mtocrf.
872 (extract_fxm): Don't test dialect.
873 (XFXFXM_MASK): Include the power4 bit.
874 (XFXM): Add p4 param.
875 (powerpc_opcodes): Add mfocrf and mtocrf. Adjust mtcr.
877 2004-06-27 Alexandre Oliva <aoliva@redhat.com>
879 2003-07-21 Richard Sandiford <rsandifo@redhat.com>
880 * disassemble.c (disassembler): Handle bfd_mach_h8300sxn.
882 2004-06-26 Alan Modra <amodra@bigpond.net.au>
884 * ppc-opc.c (BH, XLBH_MASK): Define.
885 (powerpc_opcodes): Allow BH field on bclr, bclrl, bcctr, bcctrl.
887 2004-06-24 Alan Modra <amodra@bigpond.net.au>
889 * i386-dis.c (x_mode): Comment.
890 (two_source_ops): File scope.
891 (float_mem): Correct fisttpll and fistpll.
892 (float_mem_mode): New table.
894 (OP_E): Correct intel mode PTR output.
895 (ptr_reg): Use open_char and close_char.
896 (PNI_Fixup): Handle possible suffix on sidt. Use op1out etc. for
897 operands. Set two_source_ops.
899 2004-06-15 Alan Modra <amodra@bigpond.net.au>
901 * arc-ext.c (build_ARC_extmap): Use bfd_get_section_size
902 instead of _raw_size.
904 2004-06-08 Jakub Jelinek <jakub@redhat.com>
906 * ia64-gen.c (in_iclass): Handle more postinc st
908 * ia64-asmtab.c: Rebuilt.
910 2004-06-01 Martin Schwidefsky <schwidefsky@de.ibm.com>
912 * s390-opc.txt: Correct architecture mask for some opcodes.
913 lrv, lrvh, strv, ml, dl, alc, slb rll and mvclu are available
914 in the esa mode as well.
916 2004-05-28 Andrew Stubbs <andrew.stubbs@superh.com>
918 * sh-dis.c (target_arch): Make unsigned.
919 (print_insn_sh): Replace (most of) switch with a call to
920 sh_get_arch_from_bfd_mach(). Also use new architecture flags system.
921 * sh-opc.h: Redefine architecture flags values.
922 Add sh3-nommu architecture.
923 Reorganise <arch>_up macros so they make more visual sense.
924 (SH_MERGE_ARCH_SET): Define new macro.
925 (SH_VALID_BASE_ARCH_SET): Likewise.
926 (SH_VALID_MMU_ARCH_SET): Likewise.
927 (SH_VALID_CO_ARCH_SET): Likewise.
928 (SH_VALID_ARCH_SET): Likewise.
929 (SH_MERGE_ARCH_SET_VALID): Likewise.
930 (SH_ARCH_SET_HAS_FPU): Likewise.
931 (SH_ARCH_SET_HAS_DSP): Likewise.
932 (SH_ARCH_UNKNOWN_ARCH): Likewise.
933 (sh_get_arch_from_bfd_mach): Add prototype.
934 (sh_get_arch_up_from_bfd_mach): Likewise.
935 (sh_get_bfd_mach_from_arch_set): Likewise.
936 (sh_merge_bfd_arc): Likewise.
938 2004-05-24 Peter Barada <peter@the-baradas.com>
940 * m68k-dis.c(print_insn_m68k): Strip body of diassembly out
941 into new match_insn_m68k function. Loop over canidate
942 matches and select first that completely matches.
943 * m68k-dis.c(print_insn_arg): Fix 'g' case to only extract 1 bit.
944 * m68k-dis.c(print_insn_arg): Call new function m68k_valid_ea
945 to verify addressing for MAC/EMAC.
946 * m68k-dis.c(print_insn_arg): Use reg_half_names for MAC/EMAC
947 reigster halves since 'fpu' and 'spl' look misleading.
948 * m68k-dis.c(fetch_arg): Fix 'G', 'H', 'I', 'f', 'M', 'N' cases.
949 * m68k-opc.c: Rearragne mac/emac cases to use longest for
950 first, tighten up match masks.
951 * m68k-opc.c: Add 'size' field to struct m68k_opcode. Produce
952 'size' from special case code in print_insn_m68k to
953 determine decode size of insns.
955 2004-05-19 Alan Modra <amodra@bigpond.net.au>
957 * ppc-opc.c (insert_fxm): Enable two operand mfcr when -many as
958 well as when -mpower4.
960 2004-05-13 Nick Clifton <nickc@redhat.com>
962 * po/fr.po: Updated French translation.
964 2004-05-05 Peter Barada <peter@the-baradas.com>
966 * m68k-dis.c(print_insn_m68k): Add new chips, use core
967 variants in arch_mask. Only set m68881/68851 for 68k chips.
968 * m68k-op.c: Switch from ColdFire chips to core variants.
970 2004-05-05 Alan Modra <amodra@bigpond.net.au>
973 * ppc-opc.c (PPCVEC): Remove PPC_OPCODE_PPC.
975 2004-04-29 Ben Elliston <bje@au.ibm.com>
977 * ppc-opc.c (XCMPL): Renmame to XOPL. Update users.
978 (powerpc_opcodes): Add "dbczl" instruction for PPC970.
980 2004-04-22 Kaz Kojima <kkojima@rr.iij4u.or.jp>
982 * sh-dis.c (print_insn_sh): Print the value in constant pool
983 as a symbol if it looks like a symbol.
985 2004-04-22 Peter Barada <peter@the-baradas.com>
987 * m68k-dis.c(print_insn_m68k): Set mfcmac/mcfemac on
988 appropriate ColdFire architectures.
989 (print_insn_m68k): Handle EMAC, MAC/EMAC scalefactor, and MAC/EMAC
991 Add EMAC instructions, fix MAC instructions. Remove
992 macmw/macml/msacmw/msacml instructions since mask addressing now
995 2004-04-20 Jakub Jelinek <jakub@redhat.com>
997 * sparc-opc.c (fmoviccx, fmovfccx, fmovccx): Define.
998 (fmovicc, fmovfcc, fmovcc): Remove fpsize argument, change opcode to
999 suffix. Use fmov*x macros, create all 3 fpsize variants in one
1000 macro. Adjust all users.
1002 2004-04-15 Anil Paranjpe <anilp1@kpitcummins.com>
1004 * h8300-dis.c (bfd_h8_disassemble) : Treat "adds" & "subs"
1007 2004-03-30 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
1009 * m32r-asm.c: Regenerate.
1011 2004-03-29 Stan Shebs <shebs@apple.com>
1013 * mpw-config.in, mpw-make.sed: Remove MPW support files, no longer
1016 2004-03-19 Alan Modra <amodra@bigpond.net.au>
1018 * aclocal.m4: Regenerate.
1019 * config.in: Regenerate.
1020 * configure: Regenerate.
1021 * po/POTFILES.in: Regenerate.
1022 * po/opcodes.pot: Regenerate.
1024 2004-03-16 Alan Modra <amodra@bigpond.net.au>
1026 * ppc-dis.c (print_insn_powerpc): Don't print tabs. Handle
1028 * ppc-opc.c (RA0): Define.
1029 (RAQ, RAL, RAM, RAS, RSQ, RTQ, RSO): Use PPC_OPERAND_GPR_0.
1030 (RAOPT): Rename from RAO. Update all uses.
1031 (powerpc_opcodes): Use RA0 as appropriate.
1033 2004-03-15 Aldy Hernandez <aldyh@redhat.com>
1035 * ppc-opc.c (powerpc_opcodes): Add BOOKE versions of mfsprg.
1037 2004-03-15 Alan Modra <amodra@bigpond.net.au>
1039 * sparc-dis.c (print_insn_sparc): Update getword prototype.
1041 2004-03-12 Michal Ludvig <mludvig@suse.cz>
1043 * i386-dis.c (GRPPLOCK): Delete.
1044 (grps): Delete GRPPLOCK entry.
1046 2004-03-12 Alan Modra <amodra@bigpond.net.au>
1048 * i386-dis.c (OP_M, OP_0f0e, OP_0fae, NOP_Fixup): New functions.
1050 (None, PADLOCK_SPECIAL, PADLOCK_0): Delete.
1051 (GRPPADLCK): Define.
1052 (dis386): Use NOP_Fixup on "nop".
1053 (dis386_twobyte): Use GRPPADLCK on opcode 0xa7.
1054 (twobyte_has_modrm): Set for 0xa7.
1055 (padlock_table): Delete. Move to..
1056 (grps): ..here, using OP_0f07. Use OP_Ofae on lfence, mfence
1058 (print_insn): Revert PADLOCK_SPECIAL code.
1059 (OP_E): Delete sfence, lfence, mfence checks.
1061 2004-03-12 Jakub Jelinek <jakub@redhat.com>
1063 * i386-dis.c (grps): Use INVLPG_Fixup instead of OP_E for invlpg.
1064 (INVLPG_Fixup): New function.
1065 (PNI_Fixup): Remove ATTRIBUTE_UNUSED from sizeflag.
1067 2004-03-12 Michal Ludvig <mludvig@suse.cz>
1069 * i386-dis.c (PADLOCK_SPECIAL, PADLOCK_0): New defines.
1070 (dis386_twobyte): Opcode 0xa7 is PADLOCK_0.
1071 (padlock_table): New struct with PadLock instructions.
1072 (print_insn): Handle PADLOCK_SPECIAL.
1074 2004-03-12 Alan Modra <amodra@bigpond.net.au>
1076 * i386-dis.c (grps): Use clflush by default for 0x0fae/7.
1077 (OP_E): Twiddle clflush to sfence here.
1079 2004-03-08 Nick Clifton <nickc@redhat.com>
1081 * po/de.po: Updated German translation.
1083 2003-03-03 Andrew Stubbs <andrew.stubbs@superh.com>
1085 * sh-dis.c (print_insn_sh): Don't disassemble fp instructions in
1086 nofpu mode. Add BFD type bfd_mach_sh4_nommu_nofpu.
1087 * sh-opc.h: Add sh4_nommu_nofpu architecture and adjust instructions
1090 2004-03-01 Richard Sandiford <rsandifo@redhat.com>
1092 * frv-asm.c: Regenerate.
1093 * frv-desc.c: Regenerate.
1094 * frv-desc.h: Regenerate.
1095 * frv-dis.c: Regenerate.
1096 * frv-ibld.c: Regenerate.
1097 * frv-opc.c: Regenerate.
1098 * frv-opc.h: Regenerate.
1100 2004-03-01 Richard Sandiford <rsandifo@redhat.com>
1102 * frv-desc.c, frv-opc.c: Regenerate.
1104 2004-03-01 Richard Sandiford <rsandifo@redhat.com>
1106 * frv-desc.c, frv-opc.c, frv-opc.h: Regenerate.
1108 2004-02-26 Andrew Stubbs <andrew.stubbs@superh.com>
1110 * sh-opc.h: Move fsca and fsrra instructions from sh4a to sh4.
1111 Also correct mistake in the comment.
1113 2004-02-26 Andrew Stubbs <andrew.stubbs@superh.com>
1115 * sh-dis.c (print_insn_sh): Add REG_N_D nibble type to
1116 ensure that double registers have even numbers.
1117 Add REG_N_B01 for nn01 (binary 01) nibble to ensure
1118 that reserved instruction 0xfffd does not decode the same
1120 * sh-opc.h: Add REG_N_D nibble type and use it whereever
1121 REG_N refers to a double register.
1122 Add REG_N_B01 nibble type and use it instead of REG_NM
1124 Adjust the bit patterns in a few comments.
1126 2004-02-25 Aldy Hernandez <aldyh@redhat.com>
1128 * ppc-opc.c (powerpc_opcodes): Change mask for dcbt and dcbtst.
1130 2004-02-20 Aldy Hernandez <aldyh@redhat.com>
1132 * ppc-opc.c (powerpc_opcodes): Move mfmcsrr0 before mfdc_dat.
1134 2004-02-20 Aldy Hernandez <aldyh@redhat.com>
1136 * ppc-opc.c (powerpc_opcodes): Add m*ivor35.
1138 2004-02-20 Aldy Hernandez <aldyh@redhat.com>
1140 * ppc-opc.c (powerpc_opcodes): Add mfivor32, mfivor33, mfivor34,
1141 mtivor32, mtivor33, mtivor34.
1143 2004-02-19 Aldy Hernandez <aldyh@redhat.com>
1145 * ppc-opc.c (powerpc_opcodes): Add mfmcar.
1147 2004-02-10 Petko Manolov <petkan@nucleusys.com>
1149 * arm-opc.h Maverick accumulator register opcode fixes.
1151 2004-02-13 Ben Elliston <bje@wasabisystems.com>
1153 * m32r-dis.c: Regenerate.
1155 2004-01-27 Michael Snyder <msnyder@redhat.com>
1157 * sh-opc.h (sh_table): "fsrra", not "fssra".
1159 2004-01-23 Andrew Over <andrew.over@cs.anu.edu.au>
1161 * sparc-opc.c (fdtox, fstox, fqtox, fxtod, fxtos, fxtoq): Tighten
1164 2004-01-19 Andrew Over <andrew.over@cs.anu.edu.au>
1166 * sparc-opc.c (sparc_opcodes) <f[dsq]tox, fxto[dsq]>: Fix args.
1168 2004-01-19 Alan Modra <amodra@bigpond.net.au>
1170 * i386-dis.c (OP_E): Print scale factor on intel mode sib when not
1171 1. Don't print scale factor on AT&T mode when index missing.
1173 2004-01-16 Alexandre Oliva <aoliva@redhat.com>
1175 * m10300-opc.c (mov): 8- and 24-bit immediates are zero-extended
1176 when loaded into XR registers.
1178 2004-01-14 Richard Sandiford <rsandifo@redhat.com>
1180 * frv-desc.h: Regenerate.
1181 * frv-desc.c: Regenerate.
1182 * frv-opc.c: Regenerate.
1184 2004-01-13 Michael Snyder <msnyder@redhat.com>
1186 * sh-dis.c (print_insn_sh): Allocate 4 bytes for insn.
1188 2004-01-09 Paul Brook <paul@codesourcery.com>
1190 * arm-opc.h (arm_opcodes): Move generic mcrr after known
1193 2004-01-07 Daniel Jacobowitz <drow@mvista.com>
1195 * Makefile.am (libopcodes_la_DEPENDENCIES)
1196 (libopcodes_la_LIBADD): Revert 2003-05-17 change. Add explanatory
1197 comment about the problem.
1198 * Makefile.in: Regenerate.
1200 2004-01-06 Alexandre Oliva <aoliva@redhat.com>
1202 2003-12-19 Alexandre Oliva <aoliva@redhat.com>
1203 * frv-asm.c (parse_ulo16, parse_uhi16, parse_d12): Fix some
1204 cut&paste errors in shifting/truncating numerical operands.
1205 2003-08-04 Alexandre Oliva <aoliva@redhat.com>
1206 * frv-asm.c (parse_ulo16): Parse gotofflo and gotofffuncdesclo.
1207 (parse_uslo16): Likewise.
1208 (parse_uhi16): Parse gotoffhi and gotofffuncdeschi.
1209 (parse_d12): Parse gotoff12 and gotofffuncdesc12.
1210 (parse_s12): Likewise.
1211 2003-08-04 Alexandre Oliva <aoliva@redhat.com>
1212 * frv-asm.c (parse_ulo16): Parse gotlo and gotfuncdesclo.
1213 (parse_uslo16): Likewise.
1214 (parse_uhi16): Parse gothi and gotfuncdeschi.
1215 (parse_d12): Parse got12 and gotfuncdesc12.
1216 (parse_s12): Likewise.
1218 2004-01-02 Albert Bartoszko <albar@nt.kegel.com.pl>
1220 * msp430-dis.c (msp430_doubleoperand): Check for an 'add'
1221 instruction which looks similar to an 'rla' instruction.
1223 For older changes see ChangeLog-0203
1229 version-control: never