opcodes/ChangeLog

   1 2007-07-15  H.J. Lu <hongjiu.lu@intel.com>
   2
   3         * i386-dis.c (OP_VMX): New. Handle Intel VMX Instructions.
   4         (VMX_Fixup): New. Fix up Intel VMX Instructions.
   5         (Em): New.
   6         (Gm): New.
   7         (VM): New.
   8         (dis386_twobyte): Updated entries 0x78 and 0x79.
   9         (twobyte_has_modrm): Likewise.
  10         (grps): Use OP_VMX in the "sgdtIQ" entry. Updated GRP9.
  11         (OP_G): Handle m_mode.
  12
  13 2005-07-14  Jim Blandy  <jimb@redhat.com>
  14
  15         Add support for the Renesas M32C and M16C.
  16         * m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c: New.
  17         * m32c-desc.h, m32c-opc.h: New.
  18         * Makefile.am (HFILES): List m32c-desc.h and m32c-opc.h.
  19         (CFILES): List m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c,
  20         m32c-opc.c.
  21         (ALL_MACHINES): List m32c-asm.lo, m32c-desc.lo, m32c-dis.lo,
  22         m32c-ibld.lo, m32c-opc.lo.
  23         (CLEANFILES): List stamp-m32c.
  24         (M32C_DEPS): List stamp-m32c, if CGEN_MAINT.
  25         (CGEN_CPUS): Add m32c.
  26         (m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c)
  27         (m32c-desc.h, m32c-opc.h): Depend on M32C_DEPS.
  28         (m32c_opc_h): New variable.
  29         (stamp-m32c, m32c-asm.lo, m32c-desc.lo, m32c-dis.lo, m32c-ibld.lo)
  30         (m32c-opc.lo): New rules.
  31         * Makefile.in: Regenerated.
  32         * configure.in: Add case for bfd_m32c_arch.
  33         * configure: Regenerated.
  34         * disassemble.c (ARCH_m32c): New.
  35         [ARCH_m32c]: #include "m32c-desc.h".
  36         (disassembler) [ARCH_m32c]: Add case for bfd_arch_m32c.
  37         (disassemble_init_for_target) [ARCH_m32c]: Same.
  38
  39         * cgen-ops.h, cgen-types.h: New files.
  40         * Makefile.am (HFILES): List them.
  41         * Makefile.in: Regenerated.
  42
  43 2005-07-07  Kaveh R. Ghazi  <ghazi@caip.rutgers.edu>
  44
  45         * arc-dis.c, arm-dis.c, cris-dis.c, crx-dis.c, d10v-dis.c,
  46         d30v-dis.c, fr30-dis.c, h8300-dis.c, h8500-dis.c, i860-dis.c,
  47         ia64-dis.c, ip2k-dis.c, m10200-dis.c, m10300-dis.c,
  48         m88k-dis.c, mcore-dis.c, mips-dis.c, ms1-dis.c, or32-dis.c,
  49         ppc-dis.c, sh64-dis.c, sparc-dis.c, tic4x-dis.c, tic80-dis.c,
  50         v850-dis.c: Fix format bugs.
  51         * ia64-gen.c (fail, warn): Add format attribute.
  52         * or32-opc.c (debug): Likewise.
  53
  54 2005-07-07  Khem Raj  <kraj@mvista.com>
  55
  56         * arm-dis.c (opcode32 arm_opcodes): Fix ARM VFP fadds instruction
  57         disassembly pattern.
  58
  59 2005-07-06  Alan Modra  <amodra@bigpond.net.au>
  60
  61         * Makefile.am (stamp-m32r): Fix path to cpu files.
  62         (stamp-m32r, stamp-iq2000): Likewise.
  63         * Makefile.in: Regenerate.
  64         * m32r-asm.c: Regenerate.
  65         * po/POTFILES.in: Remove arm-opc.h.  Add ms1-asm.c, ms1-desc.c,
  66         ms1-desc.h, ms1-dis.c, ms1-ibld.c, ms1-opc.c, ms1-opc.h.
  67
  68 2005-07-05  Nick Clifton  <nickc@redhat.com>
  69
  70         * iq2000-asm.c: Regenerate.
  71         * ms1-asm.c: Regenerate.
  72
  73 2005-07-05  Jan Beulich  <jbeulich@novell.com>
  74
  75         * i386-dis.c (SVME_Fixup): New.
  76         (grps): Use it for the lidt entry.
  77         (PNI_Fixup): Call OP_M rather than OP_E.
  78         (INVLPG_Fixup): Likewise.
  79
  80 2005-07-04  H.J. Lu  <hongjiu.lu@intel.com>
  81
  82         * tic30-dis.c (cnvt_tmsfloat_ieee): Use HUGE_VALF if defined.
  83
  84 2005-07-01  Nick Clifton  <nickc@redhat.com>
  85
  86         * a29k-dis.c: Update to ISO C90 style function declarations and
  87         fix formatting.
  88         * alpha-opc.c: Likewise.
  89         * arc-dis.c: Likewise.
  90         * arc-opc.c: Likewise.
  91         * avr-dis.c: Likewise.
  92         * cgen-asm.in: Likewise.
  93         * cgen-dis.in: Likewise.
  94         * cgen-ibld.in: Likewise.
  95         * cgen-opc.c: Likewise.
  96         * cris-dis.c: Likewise.
  97         * d10v-dis.c: Likewise.
  98         * d30v-dis.c: Likewise.
  99         * d30v-opc.c: Likewise.
 100         * dis-buf.c: Likewise.
 101         * dlx-dis.c: Likewise.
 102         * h8300-dis.c: Likewise.
 103         * h8500-dis.c: Likewise.
 104         * hppa-dis.c: Likewise.
 105         * i370-dis.c: Likewise.
 106         * i370-opc.c: Likewise.
 107         * m10200-dis.c: Likewise.
 108         * m10300-dis.c: Likewise.
 109         * m68k-dis.c: Likewise.
 110         * m88k-dis.c: Likewise.
 111         * mips-dis.c: Likewise.
 112         * mmix-dis.c: Likewise.
 113         * msp430-dis.c: Likewise.
 114         * ns32k-dis.c: Likewise.
 115         * or32-dis.c: Likewise.
 116         * or32-opc.c: Likewise.
 117         * pdp11-dis.c: Likewise.
 118         * pj-dis.c: Likewise.
 119         * s390-dis.c: Likewise.
 120         * sh-dis.c: Likewise.
 121         * sh64-dis.c: Likewise.
 122         * sparc-dis.c: Likewise.
 123         * sparc-opc.c: Likewise.
 124         * sysdep.h: Likewise.
 125         * tic30-dis.c: Likewise.
 126         * tic4x-dis.c: Likewise.
 127         * tic80-dis.c: Likewise.
 128         * v850-dis.c: Likewise.
 129         * v850-opc.c: Likewise.
 130         * vax-dis.c: Likewise.
 131         * w65-dis.c: Likewise.
 132         * z8kgen.c: Likewise.
 133
 134         * fr30-*: Regenerate.
 135         * frv-*: Regenerate.
 136         * ip2k-*: Regenerate.
 137         * iq2000-*: Regenerate.
 138         * m32r-*: Regenerate.
 139         * ms1-*: Regenerate.
 140         * openrisc-*: Regenerate.
 141         * xstormy16-*: Regenerate.
 142
 143 2005-06-23  Ben Elliston  <bje@gnu.org>
 144
 145         * m68k-dis.c: Use ISC C90.
 146         * m68k-opc.c: Formatting fixes.
 147
 148 2005-06-16  David Ung  <davidu@mips.com>
 149
 150         * mips16-opc.c (mips16_opcodes): Add the following MIPS16e
 151         instructions to the table; seb/seh/sew/zeb/zeh/zew.
 152
 153 2005-06-15  Dave Brolley  <brolley@redhat.com>
 154
 155         Contribute Morpho ms1 on behalf of Red Hat
 156         * ms1-asm.c, ms1-desc.c, ms1-dis.c, ms1-ibld.c, ms1-opc.c,
 157         ms1-opc.h: New files, Morpho ms1 target.
 158
 159         2004-05-14  Stan Cox  <scox@redhat.com>
 160
 161         * disassemble.c (ARCH_ms1): Define.
 162         (disassembler): Handle bfd_arch_ms1
 163
 164         2004-05-13  Michael Snyder  <msnyder@redhat.com>
 165
 166         * Makefile.am, Makefile.in: Add ms1 target.
 167         * configure.in: Ditto.
 168
 169 2005-06-08  Zack Weinberg  <zack@codesourcery.com>
 170
 171         * arm-opc.h: Delete; fold contents into ...
 172         * arm-dis.c: ... here.  Move includes of internal COFF headers
 173         next to includes of internal ELF headers.
 174         (streq, WORD_ADDRESS, BDISP, BDISP23): Delete, unused.
 175         (struct arm_opcode): Rename struct opcode32.  Make 'assembler' const.
 176         (struct thumb_opcode): Rename struct opcode16.  Make 'assembler' const.
 177         (arm_conditional, arm_fp_const, arm_shift, arm_regname, regnames)
 178         (iwmmxt_wwnames, iwmmxt_wwssnames):
 179         Make const.
 180         (regnames): Remove iWMMXt coprocessor register sets.
 181         (iwmmxt_regnames, iwmmxt_cregnames): New statics.
 182         (get_arm_regnames): Adjust fourth argument to match above changes.
 183         (set_iwmmxt_regnames): Delete.
 184         (print_insn_arm): Constify 'c'.  Use ISO syntax for function
 185         pointer calls.  Expand sole use of BDISP.  Use iwmmxt_regnames
 186         and iwmmxt_cregnames, not set_iwmmxt_regnames.
 187         (print_insn_thumb16, print_insn_thumb32): Constify 'c'.  Use
 188         ISO syntax for function pointer calls.
 189
 190 2005-06-07  Zack Weinberg  <zack@codesourcery.com>
 191
 192         * arm-dis.c: Split up the comments describing the format codes, so
 193         that the ARM and 16-bit Thumb opcode tables each have comments
 194         preceding them that describe all the codes, and only the codes,
 195         valid in those tables.  (32-bit Thumb table is already like this.)
 196         Reorder the lists in all three comments to match the order in
 197         which the codes are implemented.
 198         Remove all forward declarations of static functions.  Convert all
 199         function definitions to ISO C format.
 200         (print_insn_arm, print_insn_thumb16, print_insn_thumb32):
 201         Return nothing.
 202         (print_insn_thumb16): Remove unused case 'I'.
 203         (print_insn): Update for changed calling convention of subroutines.
 204
 205 2005-05-25  Jan Beulich  <jbeulich@novell.com>
 206
 207         * i386-dis.c (OP_E): In Intel mode, display 32-bit displacements in
 208         hex (but retain it being displayed as signed). Remove redundant
 209         checks. Add handling of displacements for 16-bit addressing in Intel
 210         mode.
 211
 212 2005-05-25  Jan Beulich  <jbeulich@novell.com>
 213
 214         * i386-dis.c (prefix_name): Remove pointless mode_64bit check.
 215         (OP_E): Remove redundant REX_EXTZ handling. Remove pointless
 216         masking of 'rm' in 16-bit memory address handling.
 217
 218 2005-05-19  Anton Blanchard  <anton@samba.org>
 219
 220         * ppc-dis.c (powerpc_dialect): Handle "-Mpower5".
 221         (print_ppc_disassembler_options): Document it.
 222         * ppc-opc.c (SVC_LEV): Define.
 223         (LEV): Allow optional operand.
 224         (POWER5): Define.
 225         (powerpc_opcodes): Extend "sc".  Adjust "svc" and "svcl".  Add
 226         "hrfid", "popcntb", "fsqrtes", "fsqrtes.", "fre" and "fre.".
 227
 228 2005-05-19  Kelley Cook  <kcook@gcc.gnu.org>
 229
 230         * Makefile.in:  Regenerate.
 231
 232 2005-05-17  Zack Weinberg  <zack@codesourcery.com>
 233
 234         * arm-dis.c (thumb_opcodes): Add disassembly for V6T2 16-bit
 235         instructions.  Adjust disassembly of some opcodes to match
 236         unified syntax.
 237         (thumb32_opcodes): New table.
 238         (print_insn_thumb): Rename print_insn_thumb16; don't handle
 239         two-halfword branches here.
 240         (print_insn_thumb32): New function.
 241         (print_insn): Choose among print_insn_arm, print_insn_thumb16,
 242         and print_insn_thumb32.  Be consistent about order of
 243         halfwords when printing 32-bit instructions.
 244
 245 2005-05-07  H.J. Lu  <hongjiu.lu@intel.com>
 246
 247         PR 843
 248         * i386-dis.c (branch_v_mode): New.
 249         (indirEv): Use branch_v_mode instead of v_mode.
 250         (OP_E): Handle branch_v_mode.
 251
 252 2005-05-07  H.J. Lu  <hongjiu.lu@intel.com>
 253
 254         * d10v-dis.c (dis_2_short): Support 64bit host.
 255
 256 2005-05-07  Nick Clifton  <nickc@redhat.com>
 257
 258         * po/nl.po: Updated translation.
 259
 260 2005-05-07  Nick Clifton  <nickc@redhat.com>
 261
 262         * Update the address and phone number of the FSF organization in
 263         the GPL notices in the following files:
 264         a29k-dis.c, aclocal.m4, alpha-dis.c, alpha-opc.c, arc-dis.c,
 265         arc-dis.h, arc-ext.c, arc-ext.h, arc-opc.c, arm-dis.c, arm-opc.h,
 266         avr-dis.c, cgen-asm.c, cgen-asm.in, cgen-dis.c, cgen-dis.in,
 267         cgen-ibld.in, cgen-opc.c, cgen.sh, cris-dis.c, cris-opc.c,
 268         crx-dis.c, crx-opc.c, d10v-dis.c, d10v-opc.c, d30v-dis.c,
 269         d30v-opc.c, dis-buf.c, dis-init.c, disassemble.c, dlx-dis.c,
 270         fr30-asm.c, fr30-desc.c, fr30-desc.h, fr30-dis.c, fr30-ibld.c,
 271         fr30-opc.c, fr30-opc.h, frv-asm.c, frv-desc.c, frv-desc.h,
 272         frv-dis.c, frv-ibld.c, frv-opc.c, frv-opc.h, h8300-dis.c,
 273         h8500-dis.c, h8500-opc.h, hppa-dis.c, i370-dis.c, i370-opc.c,
 274         i386-dis.c, i860-dis.c, i960-dis.c, ia64-asmtab.h, ia64-dis.c,
 275         ia64-gen.c, ia64-opc-a.c, ia64-opc-b.c, ia64-opc-d.c,
 276         ia64-opc-f.c, ia64-opc-i.c, ia64-opc-m.c, ia64-opc-x.c,
 277         ia64-opc.c, ia64-opc.h, ip2k-asm.c, ip2k-desc.c, ip2k-desc.h,
 278         ip2k-dis.c, ip2k-ibld.c, ip2k-opc.c, ip2k-opc.h, iq2000-asm.c,
 279         iq2000-desc.c, iq2000-desc.h, iq2000-dis.c, iq2000-ibld.c,
 280         iq2000-opc.c, iq2000-opc.h, m10200-dis.c, m10200-opc.c,
 281         m10300-dis.c, m10300-opc.c, m32r-asm.c, m32r-desc.c, m32r-desc.h,
 282         m32r-dis.c, m32r-ibld.c, m32r-opc.c, m32r-opc.h, m32r-opinst.c,
 283         m68hc11-dis.c, m68hc11-opc.c, m68k-dis.c, m68k-opc.c, m88k-dis.c,
 284         maxq-dis.c, mcore-dis.c, mcore-opc.h, mips-dis.c, mips-opc.c,
 285         mips16-opc.c, mmix-dis.c, mmix-opc.c, msp430-dis.c, ns32k-dis.c,
 286         openrisc-asm.c, openrisc-desc.c, openrisc-desc.h, openrisc-dis.c,
 287         openrisc-ibld.c, openrisc-opc.c, openrisc-opc.h, opintl.h,
 288         or32-dis.c, or32-opc.c, pdp11-dis.c, pdp11-opc.c, pj-dis.c,
 289         pj-opc.c, ppc-dis.c, ppc-opc.c, s390-dis.c, s390-mkopc.c,
 290         s390-opc.c, sh-dis.c, sh-opc.h, sh64-dis.c, sh64-opc.c,
 291         sh64-opc.h, sparc-dis.c, sparc-opc.c, sysdep.h, tic30-dis.c,
 292         tic4x-dis.c, tic54x-dis.c, tic54x-opc.c, tic80-dis.c, tic80-opc.c,
 293         v850-dis.c, v850-opc.c, vax-dis.c, w65-dis.c, w65-opc.h,
 294         xstormy16-asm.c, xstormy16-desc.c, xstormy16-desc.h,
 295         xstormy16-dis.c, xstormy16-ibld.c, xstormy16-opc.c,
 296         xstormy16-opc.h, xtensa-dis.c, z8k-dis.c, z8kgen.c
 297
 298 2005-05-05  James E Wilson  <wilson@specifixinc.com>
 299
 300         * ia64-opc.c: Include sysdep.h before libiberty.h.
 301
 302 2005-05-05  Nick Clifton  <nickc@redhat.com>
 303
 304         * configure.in (ALL_LINGUAS): Add vi.
 305         * configure: Regenerate.
 306         * po/vi.po: New.
 307
 308 2005-04-26  Jerome Guitton  <guitton@gnat.com>
 309
 310         * configure.in: Fix the check for basename declaration.
 311         * configure: Regenerate.
 312
 313 2005-04-19  Alan Modra  <amodra@bigpond.net.au>
 314
 315         * ppc-opc.c (RTO): Define.
 316         (powerpc_opcodes <tlbsx, tlbsx., tlbre>): Combine PPC403 and BOOKE
 317         entries to suit PPC440.
 318
 319 2005-04-18  Mark Kettenis  <kettenis@gnu.org>
 320
 321         * i386-dis.c: Insert hyphens into selected VIA PadLock extensions.
 322         Add xcrypt-ctr.
 323
 324 2005-04-14  Nick Clifton  <nickc@redhat.com>
 325
 326         * po/fi.po: New translation: Finnish.
 327         * configure.in (ALL_LINGUAS): Add fi.
 328         * configure: Regenerate.
 329
 330 2005-04-14  Alan Modra  <amodra@bigpond.net.au>
 331
 332         * Makefile.am (NO_WERROR): Define.
 333         * configure.in: Invoke AM_BINUTILS_WARNINGS.
 334         * Makefile.in: Regenerate.
 335         * aclocal.m4: Regenerate.
 336         * configure: Regenerate.
 337
 338 2005-04-04  Nick Clifton  <nickc@redhat.com>
 339
 340         * fr30-asm.c: Regenerate.
 341         * frv-asm.c: Regenerate.
 342         * iq2000-asm.c: Regenerate.
 343         * m32r-asm.c: Regenerate.
 344         * openrisc-asm.c: Regenerate.
 345
 346 2005-04-01  Jan Beulich  <jbeulich@novell.com>
 347
 348         * i386-dis.c (PNI_Fixup): Neither mwait nor monitor have any
 349         visible operands in Intel mode. The first operand of monitor is
 350         %rax in 64-bit mode.
 351
 352 2005-04-01  Jan Beulich  <jbeulich@novell.com>
 353
 354         * i386-dis.c (INVLPG_Fixup): Decode rdtscp; change code to allow for
 355         easier future additions.
 356
 357 2005-03-31  Jerome Guitton  <guitton@gnat.com>
 358
 359         * configure.in: Check for basename.
 360         * configure: Regenerate.
 361         * config.in: Ditto.
 362
 363 2005-03-29  H.J. Lu  <hongjiu.lu@intel.com>
 364
 365         * i386-dis.c (SEG_Fixup): New.
 366         (Sv): New.
 367         (dis386): Use "Sv" for 0x8c and 0x8e.
 368
 369 2005-03-21  Jan-Benedict Glaw  <jbglaw@lug-owl.de>
 370             Nick Clifton  <nickc@redhat.com>
 371
 372         * vax-dis.c: (entry_addr): New varible:  An array of user supplied
 373         function entry mask addresses.
 374         (entry_addr_occupied_slots): New variable: The number of occupied
 375         elements in entry_addr.
 376         (entry_addr_total_slots): New variable: The total number of
 377         elements in entry_addr.
 378         (parse_disassembler_options): New function.  Fills in the entry_addr
 379         array.
 380         (free_entry_array): New function.  Release the memory used by the
 381         entry addr array.  Suppressed because there is no way to call it.
 382         (is_function_entry): Check if a given address is a function's
 383         start address by looking at supplied entry mask addresses and
 384         symbol information, if available.
 385         (print_insn_vax): Use parse_disassembler_options and is_function_entry.
 386
 387 2005-03-23  H.J. Lu  <hongjiu.lu@intel.com>
 388
 389         * cris-dis.c (print_with_operands): Use ~31L for long instead
 390         of ~31.
 391
 392 2005-03-20  H.J. Lu  <hongjiu.lu@intel.com>
 393
 394         * mmix-opc.c (O): Revert the last change.
 395         (Z): Likewise.
 396
 397 2005-03-19  H.J. Lu  <hongjiu.lu@intel.com>
 398
 399         * mmix-opc.c (O): Use 24UL instead of 24 for unsigned long.
 400         (Z): Likewise.
 401
 402 2005-03-19  Hans-Peter Nilsson  <hp@bitrange.com>
 403
 404         * mmix-opc.c (O, Z): Force expression as unsigned long.
 405
 406 2005-03-18  Nick Clifton  <nickc@redhat.com>
 407
 408         * ip2k-asm.c: Regenerate.
 409         * op/opcodes.pot: Regenerate.
 410
 411 2005-03-16  Nick Clifton  <nickc@redhat.com>
 412             Ben Elliston  <bje@au.ibm.com>
 413
 414         * configure.in (werror): New switch: Add -Werror to the
 415         compiler command line.  Enabled by default.  Disable via
 416         --disable-werror.
 417         * configure: Regenerate.
 418
 419 2005-03-16  Alan Modra  <amodra@bigpond.net.au>
 420
 421         * ppc-dis.c (powerpc_dialect): Don't set PPC_OPCODE_ALTIVEC when
 422         BOOKE.
 423
 424 2005-03-15  Alan Modra  <amodra@bigpond.net.au>
 425
 426         * po/es.po: Commit new Spanish translation.
 427
 428         * po/fr.po: Commit new French translation.
 429
 430 2005-03-14  Jan-Benedict Glaw  <jbglaw@lug-owl.de>
 431
 432         * vax-dis.c: Fix spelling error
 433         (print_insn_vax): Use ".word 0x0012 # Entry mask: r1 r2 >" instead
 434         of just "Entry mask: < r1 ... >"
 435
 436 2005-03-12  Zack Weinberg  <zack@codesourcery.com>
 437
 438         * arm-dis.c (arm_opcodes): Document %E and %V.
 439         Add entries for v6T2 ARM instructions:
 440         bfc bfi mls strht ldrht ldrsht ldrsbt movw movt rbit ubfx sbfx.
 441         (print_insn_arm): Add support for %E and %V.
 442         (thumb_opcodes): Add ARMv6K instructions nop, sev, wfe, wfi, yield.
 443
 444 2005-03-10  Jeff Baker  <jbaker@qnx.com>
 445             Alan Modra  <amodra@bigpond.net.au>
 446
 447         * ppc-opc.c (insert_sprg, extract_sprg): New Functions.
 448         (powerpc_operands <SPRG>): Call the above.  Bit field is 5 bits.
 449         (SPRG_MASK): Delete.
 450         (XSPRG_MASK): Mask off extra bits now part of sprg field.
 451         (powerpc_opcodes): Asjust mfsprg and mtsprg to suit new mask.  Move
 452         mfsprg4..7 after msprg and consolidate.
 453
 454 2005-03-09  Jan-Benedict Glaw  <jbglaw@lug-owl.de>
 455
 456         * vax-dis.c (entry_mask_bit): New array.
 457         (print_insn_vax): Decode function entry mask.
 458
 459 2005-03-07  Aldy Hernandez  <aldyh@redhat.com>
 460
 461         * ppc-opc.c (powerpc_opcodes): Fix encoding of efscfd.
 462
 463 2005-03-05  Alan Modra  <amodra@bigpond.net.au>
 464
 465         * po/opcodes.pot: Regenerate.
 466
 467 2005-03-03  Ramana Radhakrishnan  <ramana.radhakrishnan@codito.com>
 468
 469         * arc-dis.c (a4_decoding_class): New enum.
 470         (dsmOneArcInst): Use the enum values for the decoding class.
 471         Remove redundant case in the switch for decodingClass value 11.
 472
 473 2005-03-02  Jan Beulich  <jbeulich@novell.com>
 474
 475         * i386-dis.c (print_insn): Suppress lock prefix printing for cr8...15
 476         accesses.
 477         (OP_C): Consider lock prefix in non-64-bit modes.
 478
 479 2005-02-24  Alan Modra  <amodra@bigpond.net.au>
 480
 481         * cris-dis.c (format_hex): Remove ineffective warning fix.
 482         * crx-dis.c (make_instruction): Warning fix.
 483         * frv-asm.c: Regenerate.
 484
 485 2005-02-23  Nick Clifton  <nickc@redhat.com>
 486
 487         * cgen-dis.in: Use bfd_byte for buffers that are passed to
 488         read_memory.
 489
 490         * ia64-opc.c (locate_opcode_ent): Initialise opval array.
 491
 492         * crx-dis.c (make_instruction): Move argument structure into inner
 493         scope and ensure that all of its fields are initialised before
 494         they are used.
 495
 496         * fr30-asm.c: Regenerate.
 497         * fr30-dis.c: Regenerate.
 498         * frv-asm.c: Regenerate.
 499         * frv-dis.c: Regenerate.
 500         * ip2k-asm.c: Regenerate.
 501         * ip2k-dis.c: Regenerate.
 502         * iq2000-asm.c: Regenerate.
 503         * iq2000-dis.c: Regenerate.
 504         * m32r-asm.c: Regenerate.
 505         * m32r-dis.c: Regenerate.
 506         * openrisc-asm.c: Regenerate.
 507         * openrisc-dis.c: Regenerate.
 508         * xstormy16-asm.c: Regenerate.
 509         * xstormy16-dis.c: Regenerate.
 510
 511 2005-02-22  Alan Modra  <amodra@bigpond.net.au>
 512
 513         * arc-ext.c: Warning fixes.
 514         * arc-ext.h: Likewise.
 515         * cgen-opc.c: Likewise.
 516         * ia64-gen.c: Likewise.
 517         * maxq-dis.c: Likewise.
 518         * ns32k-dis.c: Likewise.
 519         * w65-dis.c: Likewise.
 520         * ia64-asmtab.c: Regenerate.
 521
 522 2005-02-22  Alan Modra  <amodra@bigpond.net.au>
 523
 524         * fr30-desc.c: Regenerate.
 525         * fr30-desc.h: Regenerate.
 526         * fr30-opc.c: Regenerate.
 527         * fr30-opc.h: Regenerate.
 528         * frv-desc.c: Regenerate.
 529         * frv-desc.h: Regenerate.
 530         * frv-opc.c: Regenerate.
 531         * frv-opc.h: Regenerate.
 532         * ip2k-desc.c: Regenerate.
 533         * ip2k-desc.h: Regenerate.
 534         * ip2k-opc.c: Regenerate.
 535         * ip2k-opc.h: Regenerate.
 536         * iq2000-desc.c: Regenerate.
 537         * iq2000-desc.h: Regenerate.
 538         * iq2000-opc.c: Regenerate.
 539         * iq2000-opc.h: Regenerate.
 540         * m32r-desc.c: Regenerate.
 541         * m32r-desc.h: Regenerate.
 542         * m32r-opc.c: Regenerate.
 543         * m32r-opc.h: Regenerate.
 544         * m32r-opinst.c: Regenerate.
 545         * openrisc-desc.c: Regenerate.
 546         * openrisc-desc.h: Regenerate.
 547         * openrisc-opc.c: Regenerate.
 548         * openrisc-opc.h: Regenerate.
 549         * xstormy16-desc.c: Regenerate.
 550         * xstormy16-desc.h: Regenerate.
 551         * xstormy16-opc.c: Regenerate.
 552         * xstormy16-opc.h: Regenerate.
 553
 554 2005-02-21  Alan Modra  <amodra@bigpond.net.au>
 555
 556         * Makefile.am: Run "make dep-am"
 557         * Makefile.in: Regenerate.
 558
 559 2005-02-15  Nick Clifton  <nickc@redhat.com>
 560
 561         * cgen-dis.in (print_address): Add an ATTRIBUTE_UNUSED to prevent
 562         compile time warnings.
 563         (print_keyword): Likewise.
 564         (default_print_insn): Likewise.
 565
 566         * fr30-desc.c: Regenerated.
 567         * fr30-desc.h: Regenerated.
 568         * fr30-dis.c: Regenerated.
 569         * fr30-opc.c: Regenerated.
 570         * fr30-opc.h: Regenerated.
 571         * frv-desc.c: Regenerated.
 572         * frv-dis.c: Regenerated.
 573         * frv-opc.c: Regenerated.
 574         * ip2k-asm.c: Regenerated.
 575         * ip2k-desc.c: Regenerated.
 576         * ip2k-desc.h: Regenerated.
 577         * ip2k-dis.c: Regenerated.
 578         * ip2k-opc.c: Regenerated.
 579         * ip2k-opc.h: Regenerated.
 580         * iq2000-desc.c: Regenerated.
 581         * iq2000-dis.c: Regenerated.
 582         * iq2000-opc.c: Regenerated.
 583         * m32r-asm.c: Regenerated.
 584         * m32r-desc.c: Regenerated.
 585         * m32r-desc.h: Regenerated.
 586         * m32r-dis.c: Regenerated.
 587         * m32r-opc.c: Regenerated.
 588         * m32r-opc.h: Regenerated.
 589         * m32r-opinst.c: Regenerated.
 590         * openrisc-desc.c: Regenerated.
 591         * openrisc-desc.h: Regenerated.
 592         * openrisc-dis.c: Regenerated.
 593         * openrisc-opc.c: Regenerated.
 594         * openrisc-opc.h: Regenerated.
 595         * xstormy16-desc.c: Regenerated.
 596         * xstormy16-desc.h: Regenerated.
 597         * xstormy16-dis.c: Regenerated.
 598         * xstormy16-opc.c: Regenerated.
 599         * xstormy16-opc.h: Regenerated.
 600
 601 2005-02-14  H.J. Lu  <hongjiu.lu@intel.com>
 602
 603         * dis-buf.c (perror_memory): Use sprintf_vma to print out
 604         address.
 605
 606 2005-02-11  Nick Clifton  <nickc@redhat.com>
 607
 608         * iq2000-asm.c: Regenerate.
 609
 610         * frv-dis.c: Regenerate.
 611
 612 2005-02-07  Jim Blandy  <jimb@redhat.com>
 613
 614         * Makefile.am (CGEN): Load guile.scm before calling the main
 615         application script.
 616         * Makefile.in: Regenerated.
 617         * cgen.sh: Be prepared for the 'cgen' argument to contain spaces.
 618         Simply pass the cgen-opc.scm path to ${cgen} as its first
 619         argument; ${cgen} itself now contains the '-s', or whatever is
 620         appropriate for the Scheme being used.
 621
 622 2005-01-31  Andrew Cagney  <cagney@gnu.org>
 623
 624         * configure: Regenerate to track ../gettext.m4.
 625
 626 2005-01-31  Jan Beulich  <jbeulich@novell.com>
 627
 628         * ia64-gen.c (NELEMS): Define.
 629         (shrink): Generate alias with missing second predicate register when
 630         opcode has two outputs and these are both predicates.
 631         * ia64-opc-i.c (FULL17): Define.
 632         (ia64_opcodes_i): Add mov-to-pr alias without second input. Use FULL17
 633         here to generate output template.
 634         (TBITCM, TNATCM): Undefine after use.
 635         * ia64-opc-m.c (ia64_opcodes_i): Add alloc alias without ar.pfs as
 636         first input. Add ld16 aliases without ar.csd as second output. Add
 637         st16 aliases without ar.csd as second input. Add cmpxchg aliases
 638         without ar.ccv as third input. Add cmp8xchg16 aliases without ar.csd/
 639         ar.ccv as third/fourth inputs. Consolidate through...
 640         (CMPXCHG_acq, CMPXCHG_rel, CMPXCHG_1, CMPXCHG_2, CMPXCHG_4, CMPXCHG_8,
 641         CMPXCHGn, CMP8XCHG16, CMPXCHG_ALL): Define.
 642         * ia64-asmtab.c: Regenerate.
 643
 644 2005-01-27  Andrew Cagney  <cagney@gnu.org>
 645
 646         * configure: Regenerate to track ../gettext.m4 change.
 647
 648 2005-01-25  Alexandre Oliva  <aoliva@redhat.com>
 649
 650         2004-11-10  Alexandre Oliva  <aoliva@redhat.com>
 651         * frv-asm.c: Rebuilt.
 652         * frv-desc.c: Rebuilt.
 653         * frv-desc.h: Rebuilt.
 654         * frv-dis.c: Rebuilt.
 655         * frv-ibld.c: Rebuilt.
 656         * frv-opc.c: Rebuilt.
 657         * frv-opc.h: Rebuilt.
 658
 659 2005-01-24  Andrew Cagney  <cagney@gnu.org>
 660
 661         * configure: Regenerate, ../gettext.m4 was updated.
 662
 663 2005-01-21  Fred Fish  <fnf@specifixinc.com>
 664
 665         * mips-opc.c:  Change INSN_ALIAS to INSN2_ALIAS.
 666         Change INSN_WRITE_MDMX_ACC to INSN2_WRITE_MDMX_ACC.
 667         Change INSN_READ_MDMX_ACC to INSN2_READ_MDMX_ACC.
 668         * mips-dis.c: Ditto.
 669
 670 2005-01-20  Alan Modra  <amodra@bigpond.net.au>
 671
 672         * ppc-opc.c (powerpc_opcodes): Add optional 'l' arg to tlbiel.
 673
 674 2005-01-19  Fred Fish  <fnf@specifixinc.com>
 675
 676         * mips-dis.c (no_aliases): New disassembly option flag.
 677         (set_default_mips_dis_options): Init no_aliases to zero.
 678         (parse_mips_dis_option): Handle no-aliases option.
 679         (print_insn_mips): Ignore table entries that are aliases
 680         if no_aliases is set.
 681         (print_insn_mips16): Ditto.
 682         * mips-opc.c (mips_builtin_opcodes): Add initializer column for
 683         new pinfo2 member and add INSN_ALIAS initializers as needed.  Also
 684         move WR_MACC and RD_MACC initializers from pinfo to pinfo2.
 685         * mips16-opc.c (mips16_opcodes): Ditto.
 686
 687 2005-01-17  Andrew Stubbs  <andrew.stubbs@st.com>
 688
 689         * sh-opc.h (arch_sh2a_or_sh3e,arch_sh2a_or_sh4): Correct definition.
 690         (inheritance diagram): Add missing edge.
 691         (arch_sh1_up): Rename arch_sh_up to match external name to make life
 692         easier for the testsuite.
 693         (arch_sh4_nofp_up): Likewise, rename arch_sh4_nofpu_up.
 694         (arch_sh4a_nofp_up): Likewise, rename arch_sh4a_nofpu_up.
 695         (arch_sh2a_nofpu_or_sh4_nommu_nofpu_up): Add missing
 696         arch_sh2a_or_sh4_up child.
 697         (sh_table): Do renaming as above.
 698         Correct comment for ldc.l for gas testsuite to read.
 699         Remove rogue mul.l from sh1 (duplicate of the one for sh2).
 700         Correct comments for movy.w and movy.l for gas testsuite to read.
 701         Correct comments for fmov.d and fmov.s for gas testsuite to read.
 702
 703 2005-01-12  H.J. Lu  <hongjiu.lu@intel.com>
 704
 705         * i386-dis.c (OP_E): Don't ignore scale in SIB for 64 bit mode.
 706
 707 2005-01-12  H.J. Lu  <hongjiu.lu@intel.com>
 708
 709         * i386-dis.c (OP_E): Ignore scale when index == 0x4 in SIB.
 710
 711 2005-01-10  Andreas Schwab  <schwab@suse.de>
 712
 713         * disassemble.c (disassemble_init_for_target) <case
 714         bfd_arch_ia64>: Set skip_zeroes to 16.
 715         <case bfd_arch_tic4x>: Set skip_zeroes to 32.
 716
 717 2004-12-23  Tomer Levi  <Tomer.Levi@nsc.com>
 718
 719         * crx-opc.c: Mark 'bcop' instruction as RELAXABLE.
 720
 721 2004-12-14  Svein E. Seldal  <Svein.Seldal@solidas.com>
 722
 723         * avr-dis.c: Prettyprint. Added printing of symbol names in all
 724         memory references. Convert avr_operand() to C90 formatting.
 725
 726 2004-12-05  Tomer Levi  <Tomer.Levi@nsc.com>
 727
 728         * crx-dis.c (print_arg): Use 'info->print_address_func' for address printing.
 729
 730 2004-11-29  Tomer Levi  <Tomer.Levi@nsc.com>
 731
 732         * crx-opc.c (crx_optab): Mark all rbase_disps* operands as signed.
 733         (no_op_insn): Initialize array with instructions that have no
 734         operands.
 735         * crx-dis.c (make_instruction): Get rid of COP_BRANCH_INS operand swapping.
 736
 737 2004-11-29  Richard Earnshaw  <rearnsha@arm.com>
 738
 739         * arm-dis.c: Correct top-level comment.
 740
 741 2004-11-27  Richard Earnshaw  <rearnsha@arm.com>
 742
 743         * arm-opc.h (arm_opcode, thumb_opcode): Add extra field for the
 744         architecuture defining the insn.
 745         (arm_opcodes, thumb_opcodes): Delete.  Move to ...
 746         * arm-dis.c (arm_opcodes, thumb_opcodes): Here.  Add architecutre
 747         field.
 748         Also include opcode/arm.h.
 749         * Makefile.am (arm-dis.lo): Update dependency list.
 750         * Makefile.in: Regenerate.
 751
 752 2004-11-22  Ravi Ramaseshan  <ravi.ramaseshan@codito.com>
 753
 754         * opcode/arc-opc.c (insert_base): Modify ls_operand[LS_OFFSET] to
 755         reflect the change to the short immediate syntax.
 756
 757 2004-11-19  Alan Modra  <amodra@bigpond.net.au>
 758
 759         * or32-opc.c (debug): Warning fix.
 760         * po/POTFILES.in: Regenerate.
 761
 762         * maxq-dis.c: Formatting.
 763         (print_insn): Warning fix.
 764
 765 2004-11-17  Daniel Jacobowitz  <dan@codesourcery.com>
 766
 767         * arm-dis.c (WORD_ADDRESS): Define.
 768         (print_insn): Use it.  Correct big-endian end-of-section handling.
 769
 770 2004-11-08  Inderpreet Singh   <inderpreetb@nioda.hcltech.com>
 771             Vineet Sharma      <vineets@noida.hcltech.com>
 772
 773         * maxq-dis.c: New file.
 774         * disassemble.c (ARCH_maxq): Define.
 775         (disassembler): Add 'print_insn_maxq_little' for handling maxq
 776         instructions..
 777         * configure.in: Add case for bfd_maxq_arch.
 778         * configure: Regenerate.
 779         * Makefile.am: Add support for maxq-dis.c
 780         * Makefile.in: Regenerate.
 781         * aclocal.m4: Regenerate.
 782
 783 2004-11-05  Tomer Levi  <Tomer.Levi@nsc.com>
 784
 785         * crx-opc.c (crx_optab): Rename 'arg_icr' to 'arg_idxr' for Index register
 786         mode.
 787         * crx-dis.c: Likewise.
 788
 789 2004-11-04  Hans-Peter Nilsson  <hp@axis.com>
 790
 791         Generally, handle CRISv32.
 792         * cris-dis.c (TRACE_CASE): Define as (disdata->trace_case).
 793         (struct cris_disasm_data): New type.
 794         (format_reg, format_hex, cris_constraint, print_flags)
 795         (get_opcode_entry): Add struct cris_disasm_data * parameter.  All
 796         callers changed.
 797         (format_sup_reg, print_insn_crisv32_with_register_prefix)
 798         (print_insn_crisv32_without_register_prefix)
 799         (print_insn_crisv10_v32_with_register_prefix)
 800         (print_insn_crisv10_v32_without_register_prefix)
 801         (cris_parse_disassembler_options): New functions.
 802         (bytes_to_skip, cris_spec_reg): Add enum cris_disass_family
 803         parameter.  All callers changed.
 804         (get_opcode_entry): Call malloc, not xmalloc.  Return NULL on
 805         failure.
 806         (cris_constraint) <case 'Y', 'U'>: New cases.
 807         (bytes_to_skip): Handle 'Y' and 'N' as 's'.  Skip size is 4 bytes
 808         for constraint 'n'.
 809         (print_with_operands) <case 'Y'>: New case.
 810         (print_with_operands) <case 'T', 'A', '[', ']', 'd', 'n', 'u'>
 811         <case 'N', 'Y', 'Q'>: New cases.
 812         (print_insn_cris_generic): Emit "bcc ." for zero and CRISv32.
 813         (print_insn_cris_with_register_prefix)
 814         (print_insn_cris_without_register_prefix): Call
 815         cris_parse_disassembler_options.
 816         * cris-opc.c (cris_spec_regs): Mention that this table isn't used
 817         for CRISv32 and the size of immediate operands.  New v32-only
 818         entries for bz, pid, srs, wz, exs, eda, dz, ebp, erp, nrp, ccs and
 819         spc.  Add v32-only 4-byte entries for p2, p3, p5 and p6.  Change
 820         ccr, ibr, irp to be v0..v10.  Change bar, dccr to be v8..v10.
 821         Change brp to be v3..v10.
 822         (cris_support_regs): New vector.
 823         (cris_opcodes): Update head comment.  New format characters '[',
 824         ']', space, 'A', 'd', 'N', 'n', 'Q', 'T', 'u', 'U', 'Y'.
 825         Add new opcodes for v32 and adjust existing opcodes to accommodate
 826         differences to earlier variants.
 827         (cris_cond15s): New vector.
 828
 829 2004-11-04 Jan Beulich <jbeulich@novell.com>
 830
 831         * i386-dis.c (Eq, Edqw, indirEp, Gdq, I1): Define.
 832         (indirEb): Remove.
 833         (Mp): Use f_mode rather than none at all.
 834         (t_mode, dq_mode, dqw_mode, f_mode, const_1_mode): Define. t_mode
 835         replaces what previously was x_mode; x_mode now means 128-bit SSE
 836         operands.
 837         (dis386): Make far jumps and calls have an 'l' prefix only in AT&T
 838         mode. movmskpX's, pextrw's, and pmovmskb's first operands are Gdq.
 839         pinsrw's second operand is Edqw.
 840         (grps): 1-bit shifts' and rotates' second operands are I1. cmpxchg8b's
 841         operand is Eq. movntq's and movntdq's first operands are EM. s[gi]dt,
 842         fldenv, frstor, fsave, fstenv all should also have suffixes in Intel
 843         mode when an operand size override is present or always suffixing.
 844         More instructions will need to be added to this group.
 845         (putop): Handle new macro chars 'C' (short/long suffix selector),
 846         'I' (Intel mode override for following macro char), and 'J' (for
 847         adding the 'l' prefix to far branches in AT&T mode). When an
 848         alternative was specified in the template, honor macro character when
 849         specified for Intel mode.
 850         (OP_E): Handle new *_mode values. Correct pointer specifications for
 851         memory operands. Consolidate output of index register.
 852         (OP_G): Handle new *_mode values.
 853         (OP_I): Handle const_1_mode.
 854         (OP_ESreg, OP_DSreg): Generate pointer specifications. Indicate
 855         respective opcode prefix bits have been consumed.
 856         (OP_EM, OP_EX): Provide some default handling for generating pointer
 857         specifications.
 858
 859 2004-10-28  Tomer Levi  <Tomer.Levi@nsc.com>
 860
 861         * crx-opc.c (REV_COP_INST): New macro, reverse operand order of
 862         COP_INST macro.
 863
 864 2004-10-27  Tomer Levi  <Tomer.Levi@nsc.com>
 865
 866         * crx-dis.c (enum REG_ARG_TYPE): New, replacing COP_ARG_TYPE.
 867         (getregliststring): Support HI/LO and user registers.
 868         * crx-opc.c (crx_instruction): Update data structure according to the
 869         rearrangement done in CRX opcode header file.
 870         (crx_regtab):  Likewise.
 871         (crx_optab):  Likewise.
 872         (crx_instruction): Reorder load/stor instructions, remove unsupported
 873         formats.
 874         support new Co-Processor instruction 'cpi'.
 875
 876 2004-10-27  Nick Clifton  <nickc@redhat.com>
 877
 878         * opcodes/iq2000-asm.c: Regenerate.
 879         * opcodes/iq2000-desc.c: Regenerate.
 880         * opcodes/iq2000-desc.h: Regenerate.
 881         * opcodes/iq2000-dis.c: Regenerate.
 882         * opcodes/iq2000-ibld.c: Regenerate.
 883         * opcodes/iq2000-opc.c: Regenerate.
 884         * opcodes/iq2000-opc.h: Regenerate.
 885
 886 2004-10-21  Tomer Levi  <Tomer.Levi@nsc.com>
 887
 888         * crx-opc.c (crx_instruction): Replace i3, i4, i5 with us3,
 889         us4, us5 (respectively).
 890         Remove unsupported 'popa' instruction.
 891         Reverse operands order in store co-processor instructions.
 892
 893 2004-10-15  Alan Modra  <amodra@bigpond.net.au>
 894
 895         * Makefile.am: Run "make dep-am"
 896         * Makefile.in: Regenerate.
 897
 898 2004-10-12  Bob Wilson  <bob.wilson@acm.org>
 899
 900         * xtensa-dis.c: Use ISO C90 formatting.
 901
 902 2004-10-09  Alan Modra  <amodra@bigpond.net.au>
 903
 904         * ppc-opc.c: Revert 2004-09-09 change.
 905
 906 2004-10-07  Bob Wilson  <bob.wilson@acm.org>
 907
 908         * xtensa-dis.c (state_names): Delete.
 909         (fetch_data): Use xtensa_isa_maxlength.
 910         (print_xtensa_operand): Replace operand parameter with opcode/operand
 911         pair.  Remove print_sr_name parameter.  Use new xtensa-isa.h functions.
 912         (print_insn_xtensa): Use new xtensa-isa.h functions.  Handle multislot
 913         instruction bundles.  Use xmalloc instead of malloc.
 914
 915 2004-10-07  David Gibson  <david@gibson.dropbear.id.au>
 916
 917         * ppc-opc.c: Replace literal "0"s with NULLs in pointer
 918         initializers.
 919
 920 2004-10-07  Tomer Levi  <Tomer.Levi@nsc.com>
 921
 922         * crx-opc.c (crx_instruction): Support Co-processor insns.
 923         * crx-dis.c (COP_ARG_TYPE): New enum for CO-Processor arguments.
 924         (getregliststring): Change function to use the above enum.
 925         (print_arg): Handle CO-Processor insns.
 926         (crx_cinvs): Add 'b' option to invalidate the branch-target
 927         cache.
 928
 929 2004-10-06  Aldy Hernandez  <aldyh@redhat.com>
 930
 931         * ppc-opc.c (powerpc_opcodes): Add efscfd, efdabs, efdnabs,
 932         efdneg, efdadd, efdsub, efdmul, efddiv, efdcmpgt, efdcmplt,
 933         efdcmpeq, efdtstgt, efdtstlt, efdtsteq, efdcfsi, efdcfsid,
 934         efdcfui, efdcfuid, efdcfsf, efdcfuf, efdctsi, efdctsidz, efdctsiz,
 935         efdctui, efdctuidz, efdctuiz, efdctsf, efdctuf, efdctuf, efdcfs.
 936
 937 2004-10-01  Bill Farmer  <Bill@the-farmers.freeserve.co.uk>
 938
 939         * pdp11-dis.c (print_insn_pdp11): Subtract the SOB's displacement
 940         rather than add it.
 941
 942 2004-09-30  Paul Brook  <paul@codesourcery.com>
 943
 944         * arm-dis.c (print_insn_arm): Handle 'e' for SMI instruction.
 945         * arm-opc.h: Document %e.  Add ARMv6ZK instructions.
 946
 947 2004-09-17  H.J. Lu  <hongjiu.lu@intel.com>
 948
 949         * Makefile.am (AUTOMAKE_OPTIONS): Require 1.9.
 950         (CONFIG_STATUS_DEPENDENCIES): New.
 951         (Makefile): Removed.
 952         (config.status): Likewise.
 953         * Makefile.in: Regenerated.
 954
 955 2004-09-17  Alan Modra  <amodra@bigpond.net.au>
 956
 957         * Makefile.am: Run "make dep-am".
 958         * Makefile.in: Regenerate.
 959         * aclocal.m4: Regenerate.
 960         * configure: Regenerate.
 961         * po/POTFILES.in: Regenerate.
 962         * po/opcodes.pot: Regenerate.
 963
 964 2004-09-11  Andreas Schwab  <schwab@suse.de>
 965
 966         * configure: Rebuild.
 967
 968 2004-09-09  Segher Boessenkool  <segher@kernel.crashing.org>
 969
 970         * ppc-opc.c (L): Make this field not optional.
 971
 972 2004-09-03  Tomer Levi  <Tomer.Levi@nsc.com>
 973
 974         * opc-crx.c: Rename 'popma' to 'popa', remove 'pushma'.
 975         Fix parameter to 'm[t|f]csr' insns.
 976
 977 2004-08-30  Nathanael Nerode  <neroden@gcc.gnu.org>
 978
 979         * configure.in: Autoupdate to autoconf 2.59.
 980         * aclocal.m4: Rebuild with aclocal 1.4p6.
 981         * configure: Rebuild with autoconf 2.59.
 982         * Makefile.in: Rebuild with automake 1.4p6 (picking up
 983         bfd changes for autoconf 2.59 on the way).
 984         * config.in: Rebuild with autoheader 2.59.
 985
 986 2004-08-27  Richard Sandiford  <rsandifo@redhat.com>
 987
 988         * frv-desc.[ch], frv-opc.[ch]: Regenerated.
 989
 990 2004-07-30  Michal Ludvig  <mludvig@suse.cz>
 991
 992         * i386-dis.c (GRPPADLCK): Renamed to GRPPADLCK1
 993         (GRPPADLCK2): New define.
 994         (twobyte_has_modrm): True for 0xA6.
 995         (grps): GRPPADLCK2 for opcode 0xA6.
 996
 997 2004-07-29  Alexandre Oliva  <aoliva@redhat.com>
 998
 999         Introduce SH2a support.
1000         * sh-opc.h (arch_sh2a_base): Renumber.
1001         (arch_sh2a_nofpu_base): Remove.
1002         (arch_sh_base_mask): Adjust.
1003         (arch_opann_mask): New.
1004         (arch_sh2a, arch_sh2a_nofpu): Adjust.
1005         (arch_sh2a_up, arch_sh2a_nofpu_up): Likewise.
1006         (sh_table): Adjust whitespace.
1007         2004-02-24  Corinna Vinschen  <vinschen@redhat.com>
1008         * sh-opc.h (arch_sh2a_nofpu_up): New.  Use instead of arch_sh2a_up in
1009         instruction list throughout.
1010         (arch_sh2a_up): Redefine to include fpu instruction set.  Use instead
1011         of arch_sh2a in instruction list throughout.
1012         (arch_sh2e_up): Accomodate above changes.
1013         (arch_sh2_up): Ditto.
1014         2004-02-20  Corinna Vinschen  <vinschen@redhat.com>
1015         * sh-opc.h: Add arch_sh2a_nofpu to arch_sh2_up.
1016         2004-02-18  Corinna Vinschen  <vinschen@redhat.com>
1017         * sh-dis.c (print_insn_sh): Add bfd_mach_sh2a_nofpu handling.
1018         * sh-opc.h (arch_sh2a_nofpu): New.
1019         (arch_sh2a_up): New, defines sh2a and sh2a_nofpu.
1020         (sh_table): Change all arch_sh2a to arch_sh2a_up unless FPU
1021         instruction.
1022         2004-01-20  DJ Delorie  <dj@redhat.com>
1023         * sh-dis.c (print_insn_sh): SH2A does not have 'X' fp regs.
1024         2003-12-29  DJ Delorie  <dj@redhat.com>
1025         * sh-opc.c (sh_nibble_type, sh_arg_type, arch_2a, arch_2e_up,
1026         sh_opcode_info, sh_table): Add sh2a support.
1027         (arch_op32): New, to tag 32-bit opcodes.
1028         * sh-dis.c (print_insn_sh): Support sh2a opcodes.
1029         2003-12-02  Michael Snyder  <msnyder@redhat.com>
1030         * sh-opc.h (arch_sh2a): Add.
1031         * sh-dis.c (arch_sh2a): Handle.
1032         * sh-opc.h (arch_sh2_up): Fix up to include arch_sh2a.
1033
1034 2004-07-27  Tomer Levi  <Tomer.Levi@nsc.com>
1035
1036         * crx-opc.c: Add popx,pushx insns. Indent code, fix comments.
1037
1038 2004-07-22  Nick Clifton  <nickc@redhat.com>
1039
1040         PR/280
1041         * h8300-dis.c (bfd_h8_disassemble): Do not dump raw bytes for the
1042         insns - this is done by objdump itself.
1043         * h8500-dis.c (print_insn_h8500): Likewise.
1044
1045 2004-07-21  Jan Beulich <jbeulich@novell.com>
1046
1047         * i386-dis.c (OP_E): Show rip-relative addressing in 64-bit mode
1048         regardless of address size prefix in effect.
1049         (ptr_reg): Size or address registers does not depend on rex64, but
1050         on the presence of an address size override.
1051         (OP_MMX): Use rex.x only for xmm registers.
1052         (OP_EM): Use rex.z only for xmm registers.
1053
1054 2004-07-20  Maciej W. Rozycki  <macro@linux-mips.org>
1055
1056         * mips-opc.c (mips_builtin_opcodes): Move coprocessor 2
1057         move/branch operations to the bottom so that VR5400 multimedia
1058         instructions take precedence in disassembly.
1059
1060 2004-07-20  Maciej W. Rozycki  <macro@linux-mips.org>
1061
1062         * mips-opc.c (mips_builtin_opcodes): Remove the MIPS32
1063         ISA-specific "break" encoding.
1064
1065 2004-07-13  Elvis Chiang  <elvisfb@gmail.com>
1066
1067         * arm-opc.h: Fix typo in comment.
1068
1069 2004-07-11  Andreas Schwab  <schwab@suse.de>
1070
1071         * m68k-dis.c (m68k_valid_ea): Fix typos in last change.
1072
1073 2004-07-09  Andreas Schwab  <schwab@suse.de>
1074
1075         * m68k-dis.c (m68k_valid_ea): Check validity of all codes.
1076
1077 2004-07-07  Tomer Levi  <Tomer.Levi@nsc.com>
1078
1079         * Makefile.am (CFILES): Add crx-dis.c, crx-opc.c.
1080         (ALL_MACHINES): Add crx-dis.lo, crx-opc.lo.
1081         (crx-dis.lo): New target.
1082         (crx-opc.lo): Likewise.
1083         * Makefile.in: Regenerate.
1084         * configure.in: Handle bfd_crx_arch.
1085         * configure: Regenerate.
1086         * crx-dis.c: New file.
1087         * crx-opc.c: New file.
1088         * disassemble.c (ARCH_crx): Define.
1089         (disassembler): Handle ARCH_crx.
1090
1091 2004-06-29  James E Wilson  <wilson@specifixinc.com>
1092
1093         * ia64-opc-a.c (ia64_opcodes_a): Delete mov immediate pseudo for adds.
1094         * ia64-asmtab.c: Regnerate.
1095
1096 2004-06-28  Alan Modra  <amodra@bigpond.net.au>
1097
1098         * ppc-opc.c (insert_fxm): Handle mfocrf and mtocrf.
1099         (extract_fxm): Don't test dialect.
1100         (XFXFXM_MASK): Include the power4 bit.
1101         (XFXM): Add p4 param.
1102         (powerpc_opcodes): Add mfocrf and mtocrf.  Adjust mtcr.
1103
1104 2004-06-27  Alexandre Oliva  <aoliva@redhat.com>
1105
1106         2003-07-21  Richard Sandiford  <rsandifo@redhat.com>
1107         * disassemble.c (disassembler): Handle bfd_mach_h8300sxn.
1108
1109 2004-06-26  Alan Modra  <amodra@bigpond.net.au>
1110
1111         * ppc-opc.c (BH, XLBH_MASK): Define.
1112         (powerpc_opcodes): Allow BH field on bclr, bclrl, bcctr, bcctrl.
1113
1114 2004-06-24  Alan Modra  <amodra@bigpond.net.au>
1115
1116         * i386-dis.c (x_mode): Comment.
1117         (two_source_ops): File scope.
1118         (float_mem): Correct fisttpll and fistpll.
1119         (float_mem_mode): New table.
1120         (dofloat): Use it.
1121         (OP_E): Correct intel mode PTR output.
1122         (ptr_reg): Use open_char and close_char.
1123         (PNI_Fixup): Handle possible suffix on sidt.  Use op1out etc. for
1124         operands.  Set two_source_ops.
1125
1126 2004-06-15  Alan Modra  <amodra@bigpond.net.au>
1127
1128         * arc-ext.c (build_ARC_extmap): Use bfd_get_section_size
1129         instead of _raw_size.
1130
1131 2004-06-08  Jakub Jelinek  <jakub@redhat.com>
1132
1133         * ia64-gen.c (in_iclass): Handle more postinc st
1134         and ld variants.
1135         * ia64-asmtab.c: Rebuilt.
1136
1137 2004-06-01  Martin Schwidefsky  <schwidefsky@de.ibm.com>
1138
1139         * s390-opc.txt: Correct architecture mask for some opcodes.
1140         lrv, lrvh, strv, ml, dl, alc, slb rll and mvclu are available
1141         in the esa mode as well.
1142
1143 2004-05-28  Andrew Stubbs <andrew.stubbs@superh.com>
1144
1145         * sh-dis.c (target_arch): Make unsigned.
1146         (print_insn_sh): Replace (most of) switch with a call to
1147         sh_get_arch_from_bfd_mach(). Also use new architecture flags system.
1148         * sh-opc.h: Redefine architecture flags values.
1149         Add sh3-nommu architecture.
1150         Reorganise <arch>_up macros so they make more visual sense.
1151         (SH_MERGE_ARCH_SET): Define new macro.
1152         (SH_VALID_BASE_ARCH_SET): Likewise.
1153         (SH_VALID_MMU_ARCH_SET): Likewise.
1154         (SH_VALID_CO_ARCH_SET): Likewise.
1155         (SH_VALID_ARCH_SET): Likewise.
1156         (SH_MERGE_ARCH_SET_VALID): Likewise.
1157         (SH_ARCH_SET_HAS_FPU): Likewise.
1158         (SH_ARCH_SET_HAS_DSP): Likewise.
1159         (SH_ARCH_UNKNOWN_ARCH): Likewise.
1160         (sh_get_arch_from_bfd_mach): Add prototype.
1161         (sh_get_arch_up_from_bfd_mach): Likewise.
1162         (sh_get_bfd_mach_from_arch_set): Likewise.
1163         (sh_merge_bfd_arc): Likewise.
1164
1165 2004-05-24  Peter Barada  <peter@the-baradas.com>
1166
1167         * m68k-dis.c(print_insn_m68k): Strip body of diassembly out
1168         into new match_insn_m68k function.  Loop over canidate
1169         matches and select first that completely matches.
1170         * m68k-dis.c(print_insn_arg): Fix 'g' case to only extract 1 bit.
1171         * m68k-dis.c(print_insn_arg): Call new function m68k_valid_ea
1172         to verify addressing for MAC/EMAC.
1173         * m68k-dis.c(print_insn_arg): Use reg_half_names for MAC/EMAC
1174         reigster halves since 'fpu' and 'spl' look misleading.
1175         * m68k-dis.c(fetch_arg): Fix 'G', 'H', 'I', 'f', 'M', 'N' cases.
1176         * m68k-opc.c: Rearragne mac/emac cases to use longest for
1177         first, tighten up match masks.
1178         * m68k-opc.c: Add 'size' field to struct m68k_opcode.  Produce
1179         'size' from special case code in print_insn_m68k to
1180         determine decode size of insns.
1181
1182 2004-05-19  Alan Modra  <amodra@bigpond.net.au>
1183
1184         * ppc-opc.c (insert_fxm): Enable two operand mfcr when -many as
1185         well as when -mpower4.
1186
1187 2004-05-13  Nick Clifton  <nickc@redhat.com>
1188
1189         * po/fr.po: Updated French translation.
1190
1191 2004-05-05  Peter Barada  <peter@the-baradas.com>
1192
1193         * m68k-dis.c(print_insn_m68k): Add new chips, use core
1194         variants in arch_mask.  Only set m68881/68851 for 68k chips.
1195         * m68k-op.c: Switch from ColdFire chips to core variants.
1196
1197 2004-05-05  Alan Modra  <amodra@bigpond.net.au>
1198
1199         PR 147.
1200         * ppc-opc.c (PPCVEC): Remove PPC_OPCODE_PPC.
1201
1202 2004-04-29  Ben Elliston  <bje@au.ibm.com>
1203
1204         * ppc-opc.c (XCMPL): Renmame to XOPL. Update users.
1205         (powerpc_opcodes): Add "dbczl" instruction for PPC970.
1206
1207 2004-04-22  Kaz Kojima  <kkojima@rr.iij4u.or.jp>
1208
1209         * sh-dis.c (print_insn_sh): Print the value in constant pool
1210         as a symbol if it looks like a symbol.
1211
1212 2004-04-22  Peter Barada <peter@the-baradas.com>
1213
1214         * m68k-dis.c(print_insn_m68k): Set mfcmac/mcfemac on
1215         appropriate ColdFire architectures.
1216         (print_insn_m68k): Handle EMAC, MAC/EMAC scalefactor, and MAC/EMAC
1217         mask addressing.
1218         Add EMAC instructions, fix MAC instructions. Remove
1219         macmw/macml/msacmw/msacml instructions since mask addressing now
1220         supported.
1221
1222 2004-04-20  Jakub Jelinek  <jakub@redhat.com>
1223
1224         * sparc-opc.c (fmoviccx, fmovfccx, fmovccx): Define.
1225         (fmovicc, fmovfcc, fmovcc): Remove fpsize argument, change opcode to
1226         suffix.  Use fmov*x macros, create all 3 fpsize variants in one
1227         macro.  Adjust all users.
1228
1229 2004-04-15  Anil Paranjpe  <anilp1@kpitcummins.com>
1230
1231         * h8300-dis.c (bfd_h8_disassemble) : Treat "adds" & "subs"
1232         separately.
1233
1234 2004-03-30  Kazuhiro Inaoka  <inaoka.kazuhiro@renesas.com>
1235
1236         * m32r-asm.c: Regenerate.
1237
1238 2004-03-29  Stan Shebs  <shebs@apple.com>
1239
1240         * mpw-config.in, mpw-make.sed: Remove MPW support files, no longer
1241         used.
1242
1243 2004-03-19  Alan Modra  <amodra@bigpond.net.au>
1244
1245         * aclocal.m4: Regenerate.
1246         * config.in: Regenerate.
1247         * configure: Regenerate.
1248         * po/POTFILES.in: Regenerate.
1249         * po/opcodes.pot: Regenerate.
1250
1251 2004-03-16  Alan Modra  <amodra@bigpond.net.au>
1252
1253         * ppc-dis.c (print_insn_powerpc): Don't print tabs.  Handle
1254         PPC_OPERANDS_GPR_0.
1255         * ppc-opc.c (RA0): Define.
1256         (RAQ, RAL, RAM, RAS, RSQ, RTQ, RSO): Use PPC_OPERAND_GPR_0.
1257         (RAOPT): Rename from RAO.  Update all uses.
1258         (powerpc_opcodes): Use RA0 as appropriate.
1259
1260 2004-03-15  Aldy Hernandez  <aldyh@redhat.com>
1261
1262         * ppc-opc.c (powerpc_opcodes): Add BOOKE versions of mfsprg.
1263
1264 2004-03-15  Alan Modra  <amodra@bigpond.net.au>
1265
1266         * sparc-dis.c (print_insn_sparc): Update getword prototype.
1267
1268 2004-03-12  Michal Ludvig  <mludvig@suse.cz>
1269
1270         * i386-dis.c (GRPPLOCK): Delete.
1271         (grps): Delete GRPPLOCK entry.
1272
1273 2004-03-12  Alan Modra  <amodra@bigpond.net.au>
1274
1275         * i386-dis.c (OP_M, OP_0f0e, OP_0fae, NOP_Fixup): New functions.
1276         (M, Mp): Use OP_M.
1277         (None, PADLOCK_SPECIAL, PADLOCK_0): Delete.
1278         (GRPPADLCK): Define.
1279         (dis386): Use NOP_Fixup on "nop".
1280         (dis386_twobyte): Use GRPPADLCK on opcode 0xa7.
1281         (twobyte_has_modrm): Set for 0xa7.
1282         (padlock_table): Delete.  Move to..
1283         (grps): ..here, using OP_0f07.  Use OP_Ofae on lfence, mfence
1284         and clflush.
1285         (print_insn): Revert PADLOCK_SPECIAL code.
1286         (OP_E): Delete sfence, lfence, mfence checks.
1287
1288 2004-03-12  Jakub Jelinek  <jakub@redhat.com>
1289
1290         * i386-dis.c (grps): Use INVLPG_Fixup instead of OP_E for invlpg.
1291         (INVLPG_Fixup): New function.
1292         (PNI_Fixup): Remove ATTRIBUTE_UNUSED from sizeflag.
1293
1294 2004-03-12  Michal Ludvig  <mludvig@suse.cz>
1295
1296         * i386-dis.c (PADLOCK_SPECIAL, PADLOCK_0): New defines.
1297         (dis386_twobyte): Opcode 0xa7 is PADLOCK_0.
1298         (padlock_table): New struct with PadLock instructions.
1299         (print_insn): Handle PADLOCK_SPECIAL.
1300
1301 2004-03-12  Alan Modra  <amodra@bigpond.net.au>
1302
1303         * i386-dis.c (grps): Use clflush by default for 0x0fae/7.
1304         (OP_E): Twiddle clflush to sfence here.
1305
1306 2004-03-08  Nick Clifton  <nickc@redhat.com>
1307
1308         * po/de.po: Updated German translation.
1309
1310 2003-03-03  Andrew Stubbs  <andrew.stubbs@superh.com>
1311
1312         * sh-dis.c (print_insn_sh): Don't disassemble fp instructions in
1313         nofpu mode.  Add BFD type bfd_mach_sh4_nommu_nofpu.
1314         * sh-opc.h: Add sh4_nommu_nofpu architecture and adjust instructions
1315         accordingly.
1316
1317 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
1318
1319         * frv-asm.c: Regenerate.
1320         * frv-desc.c: Regenerate.
1321         * frv-desc.h: Regenerate.
1322         * frv-dis.c: Regenerate.
1323         * frv-ibld.c: Regenerate.
1324         * frv-opc.c: Regenerate.
1325         * frv-opc.h: Regenerate.
1326
1327 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
1328
1329         * frv-desc.c, frv-opc.c: Regenerate.
1330
1331 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
1332
1333         * frv-desc.c, frv-opc.c, frv-opc.h: Regenerate.
1334
1335 2004-02-26  Andrew Stubbs  <andrew.stubbs@superh.com>
1336
1337         * sh-opc.h: Move fsca and fsrra instructions from sh4a to sh4.
1338         Also correct mistake in the comment.
1339
1340 2004-02-26  Andrew Stubbs <andrew.stubbs@superh.com>
1341
1342         * sh-dis.c (print_insn_sh): Add REG_N_D nibble type to
1343         ensure that double registers have even numbers.
1344         Add REG_N_B01 for nn01 (binary 01) nibble to ensure
1345         that reserved instruction 0xfffd does not decode the same
1346         as 0xfdfd (ftrv).
1347         * sh-opc.h: Add REG_N_D nibble type and use it whereever
1348         REG_N refers to a double register.
1349         Add REG_N_B01 nibble type and use it instead of REG_NM
1350         in ftrv.
1351         Adjust the bit patterns in a few comments.
1352
1353 2004-02-25  Aldy Hernandez  <aldyh@redhat.com>
1354
1355         * ppc-opc.c (powerpc_opcodes): Change mask for dcbt and dcbtst.
1356
1357 2004-02-20  Aldy Hernandez  <aldyh@redhat.com>
1358
1359         * ppc-opc.c (powerpc_opcodes): Move mfmcsrr0 before mfdc_dat.
1360
1361 2004-02-20  Aldy Hernandez  <aldyh@redhat.com>
1362
1363         * ppc-opc.c (powerpc_opcodes): Add m*ivor35.
1364
1365 2004-02-20  Aldy Hernandez  <aldyh@redhat.com>
1366
1367         * ppc-opc.c (powerpc_opcodes): Add mfivor32, mfivor33, mfivor34,
1368         mtivor32, mtivor33, mtivor34.
1369
1370 2004-02-19  Aldy Hernandez  <aldyh@redhat.com>
1371
1372         * ppc-opc.c (powerpc_opcodes): Add mfmcar.
1373
1374 2004-02-10  Petko Manolov  <petkan@nucleusys.com>
1375
1376         * arm-opc.h Maverick accumulator register opcode fixes.
1377
1378 2004-02-13  Ben Elliston  <bje@wasabisystems.com>
1379
1380         * m32r-dis.c: Regenerate.
1381
1382 2004-01-27  Michael Snyder  <msnyder@redhat.com>
1383
1384         * sh-opc.h (sh_table): "fsrra", not "fssra".
1385
1386 2004-01-23  Andrew Over <andrew.over@cs.anu.edu.au>
1387
1388         * sparc-opc.c (fdtox, fstox, fqtox, fxtod, fxtos, fxtoq): Tighten
1389         contraints.
1390
1391 2004-01-19  Andrew Over  <andrew.over@cs.anu.edu.au>
1392
1393         * sparc-opc.c (sparc_opcodes) <f[dsq]tox, fxto[dsq]>: Fix args.
1394
1395 2004-01-19  Alan Modra  <amodra@bigpond.net.au>
1396
1397         * i386-dis.c (OP_E): Print scale factor on intel mode sib when not
1398         1.  Don't print scale factor on AT&T mode when index missing.
1399
1400 2004-01-16  Alexandre Oliva  <aoliva@redhat.com>
1401
1402         * m10300-opc.c (mov): 8- and 24-bit immediates are zero-extended
1403         when loaded into XR registers.
1404
1405 2004-01-14  Richard Sandiford  <rsandifo@redhat.com>
1406
1407         * frv-desc.h: Regenerate.
1408         * frv-desc.c: Regenerate.
1409         * frv-opc.c: Regenerate.
1410
1411 2004-01-13  Michael Snyder  <msnyder@redhat.com>
1412
1413         * sh-dis.c (print_insn_sh): Allocate 4 bytes for insn.
1414
1415 2004-01-09  Paul Brook  <paul@codesourcery.com>
1416
1417         * arm-opc.h (arm_opcodes): Move generic mcrr after known
1418         specific opcodes.
1419
1420 2004-01-07  Daniel Jacobowitz  <drow@mvista.com>
1421
1422         * Makefile.am (libopcodes_la_DEPENDENCIES)
1423         (libopcodes_la_LIBADD): Revert 2003-05-17 change.  Add explanatory
1424         comment about the problem.
1425         * Makefile.in: Regenerate.
1426
1427 2004-01-06  Alexandre Oliva  <aoliva@redhat.com>
1428
1429         2003-12-19  Alexandre Oliva  <aoliva@redhat.com>
1430         * frv-asm.c (parse_ulo16, parse_uhi16, parse_d12): Fix some
1431         cut&paste errors in shifting/truncating numerical operands.
1432         2003-08-04  Alexandre Oliva  <aoliva@redhat.com>
1433         * frv-asm.c (parse_ulo16): Parse gotofflo and gotofffuncdesclo.
1434         (parse_uslo16): Likewise.
1435         (parse_uhi16): Parse gotoffhi and gotofffuncdeschi.
1436         (parse_d12): Parse gotoff12 and gotofffuncdesc12.
1437         (parse_s12): Likewise.
1438         2003-08-04  Alexandre Oliva  <aoliva@redhat.com>
1439         * frv-asm.c (parse_ulo16): Parse gotlo and gotfuncdesclo.
1440         (parse_uslo16): Likewise.
1441         (parse_uhi16): Parse gothi and gotfuncdeschi.
1442         (parse_d12): Parse got12 and gotfuncdesc12.
1443         (parse_s12): Likewise.
1444
1445 2004-01-02  Albert Bartoszko  <albar@nt.kegel.com.pl>
1446
1447         * msp430-dis.c (msp430_doubleoperand): Check for an 'add'
1448         instruction which looks similar to an 'rla' instruction.
1449
1450 For older changes see ChangeLog-0203
1451 \f
1452 Local Variables:
1453 mode: change-log
1454 left-margin: 8
1455 fill-column: 74
1456 version-control: never
1457 End: