x86: fix Disp8 handling for AVX512VL VPCMP*{B,W} variants
[deliverable/binutils-gdb.git] / opcodes / ChangeLog
1 2018-01-10 Jan Beulich <jbeulich@suse.com>
2
3 * i386-opc.tbl (vpcmpeqb, vpcmpleb, vpcmpltb, vpcmpneqb,
4 vpcmpnleb, vpcmpnltb, vpcmpequb, vpcmpleub, vpcmpltub,
5 vpcmpnequb, vpcmpnleub, vpcmpnltub, vpcmpeqw, vpcmplew,
6 vpcmpltw, vpcmpneqw, vpcmpnlew, vpcmpnltw, vpcmpequw, vpcmpleuw,
7 vpcmpltuw, vpcmpnequw, vpcmpnleuw, vpcmpnltuw): Adjust
8 Disp8MemShift of AVX512VL forms.
9 * i386-tbl.h: Re-generate.
10
11 2018-01-09 Jim Wilson <jimw@sifive.com>
12
13 * riscv-dis.c (maybe_print_address): If base_reg is zero,
14 then the hi_addr value is zero.
15
16 2018-01-09 James Greenhalgh <james.greenhalgh@arm.com>
17
18 * arm-dis.c (arm_opcodes): Add csdb.
19 (thumb32_opcodes): Add csdb.
20
21 2018-01-09 James Greenhalgh <james.greenhalgh@arm.com>
22
23 * aarch64-tbl.h (aarch64_opcode_table): Add "csdb".
24 * aarch64-asm-2.c: Regenerate.
25 * aarch64-dis-2.c: Regenerate.
26 * aarch64-opc-2.c: Regenerate.
27
28 2018-01-08 H.J. Lu <hongjiu.lu@intel.com>
29
30 PR gas/22681
31 * i386-opc.tbl: Properly encode vmovd with Qword memeory operand.
32 Remove AVX512 vmovd with 64-bit operands.
33 * i386-tbl.h: Regenerated.
34
35 2018-01-05 Jim Wilson <jimw@sifive.com>
36
37 * riscv-dis.c (print_insn_args) <'s'>: Call maybe_print_address for a
38 jalr.
39
40 2018-01-03 Alan Modra <amodra@gmail.com>
41
42 Update year range in copyright notice of all files.
43
44 2018-01-02 Jan Beulich <jbeulich@suse.com>
45
46 * i386-gen.c (operand_type_init): Restore OPERAND_TYPE_REGYMM
47 and OPERAND_TYPE_REGZMM entries.
48
49 For older changes see ChangeLog-2017
50 \f
51 Copyright (C) 2018 Free Software Foundation, Inc.
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55 notice and this notice are preserved.
56
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58 mode: change-log
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