* configure.in (ALL_LINGUAS): Add vi.
[deliverable/binutils-gdb.git] / opcodes / ChangeLog
1 2005-05-05 Nick Clifton <nickc@redhat.com>
2
3 * configure.in (ALL_LINGUAS): Add vi.
4 * configure: Regenerate.
5 * po/vi.po: New.
6
7 2005-04-26 Jerome Guitton <guitton@gnat.com>
8
9 * configure.in: Fix the check for basename declaration.
10 * configure: Regenerate.
11
12 2005-04-19 Alan Modra <amodra@bigpond.net.au>
13
14 * ppc-opc.c (RTO): Define.
15 (powerpc_opcodes <tlbsx, tlbsx., tlbre>): Combine PPC403 and BOOKE
16 entries to suit PPC440.
17
18 2005-04-18 Mark Kettenis <kettenis@gnu.org>
19
20 * i386-dis.c: Insert hyphens into selected VIA PadLock extensions.
21 Add xcrypt-ctr.
22
23 2005-04-14 Nick Clifton <nickc@redhat.com>
24
25 * po/fi.po: New translation: Finnish.
26 * configure.in (ALL_LINGUAS): Add fi.
27 * configure: Regenerate.
28
29 2005-04-14 Alan Modra <amodra@bigpond.net.au>
30
31 * Makefile.am (NO_WERROR): Define.
32 * configure.in: Invoke AM_BINUTILS_WARNINGS.
33 * Makefile.in: Regenerate.
34 * aclocal.m4: Regenerate.
35 * configure: Regenerate.
36
37 2005-04-04 Nick Clifton <nickc@redhat.com>
38
39 * fr30-asm.c: Regenerate.
40 * frv-asm.c: Regenerate.
41 * iq2000-asm.c: Regenerate.
42 * m32r-asm.c: Regenerate.
43 * openrisc-asm.c: Regenerate.
44
45 2005-04-01 Jan Beulich <jbeulich@novell.com>
46
47 * i386-dis.c (PNI_Fixup): Neither mwait nor monitor have any
48 visible operands in Intel mode. The first operand of monitor is
49 %rax in 64-bit mode.
50
51 2005-04-01 Jan Beulich <jbeulich@novell.com>
52
53 * i386-dis.c (INVLPG_Fixup): Decode rdtscp; change code to allow for
54 easier future additions.
55
56 2005-03-31 Jerome Guitton <guitton@gnat.com>
57
58 * configure.in: Check for basename.
59 * configure: Regenerate.
60 * config.in: Ditto.
61
62 2005-03-29 H.J. Lu <hongjiu.lu@intel.com>
63
64 * i386-dis.c (SEG_Fixup): New.
65 (Sv): New.
66 (dis386): Use "Sv" for 0x8c and 0x8e.
67
68 2005-03-21 Jan-Benedict Glaw <jbglaw@lug-owl.de>
69 Nick Clifton <nickc@redhat.com>
70
71 * vax-dis.c: (entry_addr): New varible: An array of user supplied
72 function entry mask addresses.
73 (entry_addr_occupied_slots): New variable: The number of occupied
74 elements in entry_addr.
75 (entry_addr_total_slots): New variable: The total number of
76 elements in entry_addr.
77 (parse_disassembler_options): New function. Fills in the entry_addr
78 array.
79 (free_entry_array): New function. Release the memory used by the
80 entry addr array. Suppressed because there is no way to call it.
81 (is_function_entry): Check if a given address is a function's
82 start address by looking at supplied entry mask addresses and
83 symbol information, if available.
84 (print_insn_vax): Use parse_disassembler_options and is_function_entry.
85
86 2005-03-23 H.J. Lu <hongjiu.lu@intel.com>
87
88 * cris-dis.c (print_with_operands): Use ~31L for long instead
89 of ~31.
90
91 2005-03-20 H.J. Lu <hongjiu.lu@intel.com>
92
93 * mmix-opc.c (O): Revert the last change.
94 (Z): Likewise.
95
96 2005-03-19 H.J. Lu <hongjiu.lu@intel.com>
97
98 * mmix-opc.c (O): Use 24UL instead of 24 for unsigned long.
99 (Z): Likewise.
100
101 2005-03-19 Hans-Peter Nilsson <hp@bitrange.com>
102
103 * mmix-opc.c (O, Z): Force expression as unsigned long.
104
105 2005-03-18 Nick Clifton <nickc@redhat.com>
106
107 * ip2k-asm.c: Regenerate.
108 * op/opcodes.pot: Regenerate.
109
110 2005-03-16 Nick Clifton <nickc@redhat.com>
111 Ben Elliston <bje@au.ibm.com>
112
113 * configure.in (werror): New switch: Add -Werror to the
114 compiler command line. Enabled by default. Disable via
115 --disable-werror.
116 * configure: Regenerate.
117
118 2005-03-16 Alan Modra <amodra@bigpond.net.au>
119
120 * ppc-dis.c (powerpc_dialect): Don't set PPC_OPCODE_ALTIVEC when
121 BOOKE.
122
123 2005-03-15 Alan Modra <amodra@bigpond.net.au>
124
125 * po/es.po: Commit new Spanish translation.
126
127 * po/fr.po: Commit new French translation.
128
129 2005-03-14 Jan-Benedict Glaw <jbglaw@lug-owl.de>
130
131 * vax-dis.c: Fix spelling error
132 (print_insn_vax): Use ".word 0x0012 # Entry mask: r1 r2 >" instead
133 of just "Entry mask: < r1 ... >"
134
135 2005-03-12 Zack Weinberg <zack@codesourcery.com>
136
137 * arm-dis.c (arm_opcodes): Document %E and %V.
138 Add entries for v6T2 ARM instructions:
139 bfc bfi mls strht ldrht ldrsht ldrsbt movw movt rbit ubfx sbfx.
140 (print_insn_arm): Add support for %E and %V.
141 (thumb_opcodes): Add ARMv6K instructions nop, sev, wfe, wfi, yield.
142
143 2005-03-10 Jeff Baker <jbaker@qnx.com>
144 Alan Modra <amodra@bigpond.net.au>
145
146 * ppc-opc.c (insert_sprg, extract_sprg): New Functions.
147 (powerpc_operands <SPRG>): Call the above. Bit field is 5 bits.
148 (SPRG_MASK): Delete.
149 (XSPRG_MASK): Mask off extra bits now part of sprg field.
150 (powerpc_opcodes): Asjust mfsprg and mtsprg to suit new mask. Move
151 mfsprg4..7 after msprg and consolidate.
152
153 2005-03-09 Jan-Benedict Glaw <jbglaw@lug-owl.de>
154
155 * vax-dis.c (entry_mask_bit): New array.
156 (print_insn_vax): Decode function entry mask.
157
158 2005-03-07 Aldy Hernandez <aldyh@redhat.com>
159
160 * ppc-opc.c (powerpc_opcodes): Fix encoding of efscfd.
161
162 2005-03-05 Alan Modra <amodra@bigpond.net.au>
163
164 * po/opcodes.pot: Regenerate.
165
166 2005-03-03 Ramana Radhakrishnan <ramana.radhakrishnan@codito.com>
167
168 * arc-dis.c (a4_decoding_class): New enum.
169 (dsmOneArcInst): Use the enum values for the decoding class.
170 Remove redundant case in the switch for decodingClass value 11.
171
172 2005-03-02 Jan Beulich <jbeulich@novell.com>
173
174 * i386-dis.c (print_insn): Suppress lock prefix printing for cr8...15
175 accesses.
176 (OP_C): Consider lock prefix in non-64-bit modes.
177
178 2005-02-24 Alan Modra <amodra@bigpond.net.au>
179
180 * cris-dis.c (format_hex): Remove ineffective warning fix.
181 * crx-dis.c (make_instruction): Warning fix.
182 * frv-asm.c: Regenerate.
183
184 2005-02-23 Nick Clifton <nickc@redhat.com>
185
186 * cgen-dis.in: Use bfd_byte for buffers that are passed to
187 read_memory.
188
189 * ia64-opc.c (locate_opcode_ent): Initialise opval array.
190
191 * crx-dis.c (make_instruction): Move argument structure into inner
192 scope and ensure that all of its fields are initialised before
193 they are used.
194
195 * fr30-asm.c: Regenerate.
196 * fr30-dis.c: Regenerate.
197 * frv-asm.c: Regenerate.
198 * frv-dis.c: Regenerate.
199 * ip2k-asm.c: Regenerate.
200 * ip2k-dis.c: Regenerate.
201 * iq2000-asm.c: Regenerate.
202 * iq2000-dis.c: Regenerate.
203 * m32r-asm.c: Regenerate.
204 * m32r-dis.c: Regenerate.
205 * openrisc-asm.c: Regenerate.
206 * openrisc-dis.c: Regenerate.
207 * xstormy16-asm.c: Regenerate.
208 * xstormy16-dis.c: Regenerate.
209
210 2005-02-22 Alan Modra <amodra@bigpond.net.au>
211
212 * arc-ext.c: Warning fixes.
213 * arc-ext.h: Likewise.
214 * cgen-opc.c: Likewise.
215 * ia64-gen.c: Likewise.
216 * maxq-dis.c: Likewise.
217 * ns32k-dis.c: Likewise.
218 * w65-dis.c: Likewise.
219 * ia64-asmtab.c: Regenerate.
220
221 2005-02-22 Alan Modra <amodra@bigpond.net.au>
222
223 * fr30-desc.c: Regenerate.
224 * fr30-desc.h: Regenerate.
225 * fr30-opc.c: Regenerate.
226 * fr30-opc.h: Regenerate.
227 * frv-desc.c: Regenerate.
228 * frv-desc.h: Regenerate.
229 * frv-opc.c: Regenerate.
230 * frv-opc.h: Regenerate.
231 * ip2k-desc.c: Regenerate.
232 * ip2k-desc.h: Regenerate.
233 * ip2k-opc.c: Regenerate.
234 * ip2k-opc.h: Regenerate.
235 * iq2000-desc.c: Regenerate.
236 * iq2000-desc.h: Regenerate.
237 * iq2000-opc.c: Regenerate.
238 * iq2000-opc.h: Regenerate.
239 * m32r-desc.c: Regenerate.
240 * m32r-desc.h: Regenerate.
241 * m32r-opc.c: Regenerate.
242 * m32r-opc.h: Regenerate.
243 * m32r-opinst.c: Regenerate.
244 * openrisc-desc.c: Regenerate.
245 * openrisc-desc.h: Regenerate.
246 * openrisc-opc.c: Regenerate.
247 * openrisc-opc.h: Regenerate.
248 * xstormy16-desc.c: Regenerate.
249 * xstormy16-desc.h: Regenerate.
250 * xstormy16-opc.c: Regenerate.
251 * xstormy16-opc.h: Regenerate.
252
253 2005-02-21 Alan Modra <amodra@bigpond.net.au>
254
255 * Makefile.am: Run "make dep-am"
256 * Makefile.in: Regenerate.
257
258 2005-02-15 Nick Clifton <nickc@redhat.com>
259
260 * cgen-dis.in (print_address): Add an ATTRIBUTE_UNUSED to prevent
261 compile time warnings.
262 (print_keyword): Likewise.
263 (default_print_insn): Likewise.
264
265 * fr30-desc.c: Regenerated.
266 * fr30-desc.h: Regenerated.
267 * fr30-dis.c: Regenerated.
268 * fr30-opc.c: Regenerated.
269 * fr30-opc.h: Regenerated.
270 * frv-desc.c: Regenerated.
271 * frv-dis.c: Regenerated.
272 * frv-opc.c: Regenerated.
273 * ip2k-asm.c: Regenerated.
274 * ip2k-desc.c: Regenerated.
275 * ip2k-desc.h: Regenerated.
276 * ip2k-dis.c: Regenerated.
277 * ip2k-opc.c: Regenerated.
278 * ip2k-opc.h: Regenerated.
279 * iq2000-desc.c: Regenerated.
280 * iq2000-dis.c: Regenerated.
281 * iq2000-opc.c: Regenerated.
282 * m32r-asm.c: Regenerated.
283 * m32r-desc.c: Regenerated.
284 * m32r-desc.h: Regenerated.
285 * m32r-dis.c: Regenerated.
286 * m32r-opc.c: Regenerated.
287 * m32r-opc.h: Regenerated.
288 * m32r-opinst.c: Regenerated.
289 * openrisc-desc.c: Regenerated.
290 * openrisc-desc.h: Regenerated.
291 * openrisc-dis.c: Regenerated.
292 * openrisc-opc.c: Regenerated.
293 * openrisc-opc.h: Regenerated.
294 * xstormy16-desc.c: Regenerated.
295 * xstormy16-desc.h: Regenerated.
296 * xstormy16-dis.c: Regenerated.
297 * xstormy16-opc.c: Regenerated.
298 * xstormy16-opc.h: Regenerated.
299
300 2005-02-14 H.J. Lu <hongjiu.lu@intel.com>
301
302 * dis-buf.c (perror_memory): Use sprintf_vma to print out
303 address.
304
305 2005-02-11 Nick Clifton <nickc@redhat.com>
306
307 * iq2000-asm.c: Regenerate.
308
309 * frv-dis.c: Regenerate.
310
311 2005-02-07 Jim Blandy <jimb@redhat.com>
312
313 * Makefile.am (CGEN): Load guile.scm before calling the main
314 application script.
315 * Makefile.in: Regenerated.
316 * cgen.sh: Be prepared for the 'cgen' argument to contain spaces.
317 Simply pass the cgen-opc.scm path to ${cgen} as its first
318 argument; ${cgen} itself now contains the '-s', or whatever is
319 appropriate for the Scheme being used.
320
321 2005-01-31 Andrew Cagney <cagney@gnu.org>
322
323 * configure: Regenerate to track ../gettext.m4.
324
325 2005-01-31 Jan Beulich <jbeulich@novell.com>
326
327 * ia64-gen.c (NELEMS): Define.
328 (shrink): Generate alias with missing second predicate register when
329 opcode has two outputs and these are both predicates.
330 * ia64-opc-i.c (FULL17): Define.
331 (ia64_opcodes_i): Add mov-to-pr alias without second input. Use FULL17
332 here to generate output template.
333 (TBITCM, TNATCM): Undefine after use.
334 * ia64-opc-m.c (ia64_opcodes_i): Add alloc alias without ar.pfs as
335 first input. Add ld16 aliases without ar.csd as second output. Add
336 st16 aliases without ar.csd as second input. Add cmpxchg aliases
337 without ar.ccv as third input. Add cmp8xchg16 aliases without ar.csd/
338 ar.ccv as third/fourth inputs. Consolidate through...
339 (CMPXCHG_acq, CMPXCHG_rel, CMPXCHG_1, CMPXCHG_2, CMPXCHG_4, CMPXCHG_8,
340 CMPXCHGn, CMP8XCHG16, CMPXCHG_ALL): Define.
341 * ia64-asmtab.c: Regenerate.
342
343 2005-01-27 Andrew Cagney <cagney@gnu.org>
344
345 * configure: Regenerate to track ../gettext.m4 change.
346
347 2005-01-25 Alexandre Oliva <aoliva@redhat.com>
348
349 2004-11-10 Alexandre Oliva <aoliva@redhat.com>
350 * frv-asm.c: Rebuilt.
351 * frv-desc.c: Rebuilt.
352 * frv-desc.h: Rebuilt.
353 * frv-dis.c: Rebuilt.
354 * frv-ibld.c: Rebuilt.
355 * frv-opc.c: Rebuilt.
356 * frv-opc.h: Rebuilt.
357
358 2005-01-24 Andrew Cagney <cagney@gnu.org>
359
360 * configure: Regenerate, ../gettext.m4 was updated.
361
362 2005-01-21 Fred Fish <fnf@specifixinc.com>
363
364 * mips-opc.c: Change INSN_ALIAS to INSN2_ALIAS.
365 Change INSN_WRITE_MDMX_ACC to INSN2_WRITE_MDMX_ACC.
366 Change INSN_READ_MDMX_ACC to INSN2_READ_MDMX_ACC.
367 * mips-dis.c: Ditto.
368
369 2005-01-20 Alan Modra <amodra@bigpond.net.au>
370
371 * ppc-opc.c (powerpc_opcodes): Add optional 'l' arg to tlbiel.
372
373 2005-01-19 Fred Fish <fnf@specifixinc.com>
374
375 * mips-dis.c (no_aliases): New disassembly option flag.
376 (set_default_mips_dis_options): Init no_aliases to zero.
377 (parse_mips_dis_option): Handle no-aliases option.
378 (print_insn_mips): Ignore table entries that are aliases
379 if no_aliases is set.
380 (print_insn_mips16): Ditto.
381 * mips-opc.c (mips_builtin_opcodes): Add initializer column for
382 new pinfo2 member and add INSN_ALIAS initializers as needed. Also
383 move WR_MACC and RD_MACC initializers from pinfo to pinfo2.
384 * mips16-opc.c (mips16_opcodes): Ditto.
385
386 2005-01-17 Andrew Stubbs <andrew.stubbs@st.com>
387
388 * sh-opc.h (arch_sh2a_or_sh3e,arch_sh2a_or_sh4): Correct definition.
389 (inheritance diagram): Add missing edge.
390 (arch_sh1_up): Rename arch_sh_up to match external name to make life
391 easier for the testsuite.
392 (arch_sh4_nofp_up): Likewise, rename arch_sh4_nofpu_up.
393 (arch_sh4a_nofp_up): Likewise, rename arch_sh4a_nofpu_up.
394 (arch_sh2a_nofpu_or_sh4_nommu_nofpu_up): Add missing
395 arch_sh2a_or_sh4_up child.
396 (sh_table): Do renaming as above.
397 Correct comment for ldc.l for gas testsuite to read.
398 Remove rogue mul.l from sh1 (duplicate of the one for sh2).
399 Correct comments for movy.w and movy.l for gas testsuite to read.
400 Correct comments for fmov.d and fmov.s for gas testsuite to read.
401
402 2005-01-12 H.J. Lu <hongjiu.lu@intel.com>
403
404 * i386-dis.c (OP_E): Don't ignore scale in SIB for 64 bit mode.
405
406 2005-01-12 H.J. Lu <hongjiu.lu@intel.com>
407
408 * i386-dis.c (OP_E): Ignore scale when index == 0x4 in SIB.
409
410 2005-01-10 Andreas Schwab <schwab@suse.de>
411
412 * disassemble.c (disassemble_init_for_target) <case
413 bfd_arch_ia64>: Set skip_zeroes to 16.
414 <case bfd_arch_tic4x>: Set skip_zeroes to 32.
415
416 2004-12-23 Tomer Levi <Tomer.Levi@nsc.com>
417
418 * crx-opc.c: Mark 'bcop' instruction as RELAXABLE.
419
420 2004-12-14 Svein E. Seldal <Svein.Seldal@solidas.com>
421
422 * avr-dis.c: Prettyprint. Added printing of symbol names in all
423 memory references. Convert avr_operand() to C90 formatting.
424
425 2004-12-05 Tomer Levi <Tomer.Levi@nsc.com>
426
427 * crx-dis.c (print_arg): Use 'info->print_address_func' for address printing.
428
429 2004-11-29 Tomer Levi <Tomer.Levi@nsc.com>
430
431 * crx-opc.c (crx_optab): Mark all rbase_disps* operands as signed.
432 (no_op_insn): Initialize array with instructions that have no
433 operands.
434 * crx-dis.c (make_instruction): Get rid of COP_BRANCH_INS operand swapping.
435
436 2004-11-29 Richard Earnshaw <rearnsha@arm.com>
437
438 * arm-dis.c: Correct top-level comment.
439
440 2004-11-27 Richard Earnshaw <rearnsha@arm.com>
441
442 * arm-opc.h (arm_opcode, thumb_opcode): Add extra field for the
443 architecuture defining the insn.
444 (arm_opcodes, thumb_opcodes): Delete. Move to ...
445 * arm-dis.c (arm_opcodes, thumb_opcodes): Here. Add architecutre
446 field.
447 Also include opcode/arm.h.
448 * Makefile.am (arm-dis.lo): Update dependency list.
449 * Makefile.in: Regenerate.
450
451 2004-11-22 Ravi Ramaseshan <ravi.ramaseshan@codito.com>
452
453 * opcode/arc-opc.c (insert_base): Modify ls_operand[LS_OFFSET] to
454 reflect the change to the short immediate syntax.
455
456 2004-11-19 Alan Modra <amodra@bigpond.net.au>
457
458 * or32-opc.c (debug): Warning fix.
459 * po/POTFILES.in: Regenerate.
460
461 * maxq-dis.c: Formatting.
462 (print_insn): Warning fix.
463
464 2004-11-17 Daniel Jacobowitz <dan@codesourcery.com>
465
466 * arm-dis.c (WORD_ADDRESS): Define.
467 (print_insn): Use it. Correct big-endian end-of-section handling.
468
469 2004-11-08 Inderpreet Singh <inderpreetb@nioda.hcltech.com>
470 Vineet Sharma <vineets@noida.hcltech.com>
471
472 * maxq-dis.c: New file.
473 * disassemble.c (ARCH_maxq): Define.
474 (disassembler): Add 'print_insn_maxq_little' for handling maxq
475 instructions..
476 * configure.in: Add case for bfd_maxq_arch.
477 * configure: Regenerate.
478 * Makefile.am: Add support for maxq-dis.c
479 * Makefile.in: Regenerate.
480 * aclocal.m4: Regenerate.
481
482 2004-11-05 Tomer Levi <Tomer.Levi@nsc.com>
483
484 * crx-opc.c (crx_optab): Rename 'arg_icr' to 'arg_idxr' for Index register
485 mode.
486 * crx-dis.c: Likewise.
487
488 2004-11-04 Hans-Peter Nilsson <hp@axis.com>
489
490 Generally, handle CRISv32.
491 * cris-dis.c (TRACE_CASE): Define as (disdata->trace_case).
492 (struct cris_disasm_data): New type.
493 (format_reg, format_hex, cris_constraint, print_flags)
494 (get_opcode_entry): Add struct cris_disasm_data * parameter. All
495 callers changed.
496 (format_sup_reg, print_insn_crisv32_with_register_prefix)
497 (print_insn_crisv32_without_register_prefix)
498 (print_insn_crisv10_v32_with_register_prefix)
499 (print_insn_crisv10_v32_without_register_prefix)
500 (cris_parse_disassembler_options): New functions.
501 (bytes_to_skip, cris_spec_reg): Add enum cris_disass_family
502 parameter. All callers changed.
503 (get_opcode_entry): Call malloc, not xmalloc. Return NULL on
504 failure.
505 (cris_constraint) <case 'Y', 'U'>: New cases.
506 (bytes_to_skip): Handle 'Y' and 'N' as 's'. Skip size is 4 bytes
507 for constraint 'n'.
508 (print_with_operands) <case 'Y'>: New case.
509 (print_with_operands) <case 'T', 'A', '[', ']', 'd', 'n', 'u'>
510 <case 'N', 'Y', 'Q'>: New cases.
511 (print_insn_cris_generic): Emit "bcc ." for zero and CRISv32.
512 (print_insn_cris_with_register_prefix)
513 (print_insn_cris_without_register_prefix): Call
514 cris_parse_disassembler_options.
515 * cris-opc.c (cris_spec_regs): Mention that this table isn't used
516 for CRISv32 and the size of immediate operands. New v32-only
517 entries for bz, pid, srs, wz, exs, eda, dz, ebp, erp, nrp, ccs and
518 spc. Add v32-only 4-byte entries for p2, p3, p5 and p6. Change
519 ccr, ibr, irp to be v0..v10. Change bar, dccr to be v8..v10.
520 Change brp to be v3..v10.
521 (cris_support_regs): New vector.
522 (cris_opcodes): Update head comment. New format characters '[',
523 ']', space, 'A', 'd', 'N', 'n', 'Q', 'T', 'u', 'U', 'Y'.
524 Add new opcodes for v32 and adjust existing opcodes to accommodate
525 differences to earlier variants.
526 (cris_cond15s): New vector.
527
528 2004-11-04 Jan Beulich <jbeulich@novell.com>
529
530 * i386-dis.c (Eq, Edqw, indirEp, Gdq, I1): Define.
531 (indirEb): Remove.
532 (Mp): Use f_mode rather than none at all.
533 (t_mode, dq_mode, dqw_mode, f_mode, const_1_mode): Define. t_mode
534 replaces what previously was x_mode; x_mode now means 128-bit SSE
535 operands.
536 (dis386): Make far jumps and calls have an 'l' prefix only in AT&T
537 mode. movmskpX's, pextrw's, and pmovmskb's first operands are Gdq.
538 pinsrw's second operand is Edqw.
539 (grps): 1-bit shifts' and rotates' second operands are I1. cmpxchg8b's
540 operand is Eq. movntq's and movntdq's first operands are EM. s[gi]dt,
541 fldenv, frstor, fsave, fstenv all should also have suffixes in Intel
542 mode when an operand size override is present or always suffixing.
543 More instructions will need to be added to this group.
544 (putop): Handle new macro chars 'C' (short/long suffix selector),
545 'I' (Intel mode override for following macro char), and 'J' (for
546 adding the 'l' prefix to far branches in AT&T mode). When an
547 alternative was specified in the template, honor macro character when
548 specified for Intel mode.
549 (OP_E): Handle new *_mode values. Correct pointer specifications for
550 memory operands. Consolidate output of index register.
551 (OP_G): Handle new *_mode values.
552 (OP_I): Handle const_1_mode.
553 (OP_ESreg, OP_DSreg): Generate pointer specifications. Indicate
554 respective opcode prefix bits have been consumed.
555 (OP_EM, OP_EX): Provide some default handling for generating pointer
556 specifications.
557
558 2004-10-28 Tomer Levi <Tomer.Levi@nsc.com>
559
560 * crx-opc.c (REV_COP_INST): New macro, reverse operand order of
561 COP_INST macro.
562
563 2004-10-27 Tomer Levi <Tomer.Levi@nsc.com>
564
565 * crx-dis.c (enum REG_ARG_TYPE): New, replacing COP_ARG_TYPE.
566 (getregliststring): Support HI/LO and user registers.
567 * crx-opc.c (crx_instruction): Update data structure according to the
568 rearrangement done in CRX opcode header file.
569 (crx_regtab): Likewise.
570 (crx_optab): Likewise.
571 (crx_instruction): Reorder load/stor instructions, remove unsupported
572 formats.
573 support new Co-Processor instruction 'cpi'.
574
575 2004-10-27 Nick Clifton <nickc@redhat.com>
576
577 * opcodes/iq2000-asm.c: Regenerate.
578 * opcodes/iq2000-desc.c: Regenerate.
579 * opcodes/iq2000-desc.h: Regenerate.
580 * opcodes/iq2000-dis.c: Regenerate.
581 * opcodes/iq2000-ibld.c: Regenerate.
582 * opcodes/iq2000-opc.c: Regenerate.
583 * opcodes/iq2000-opc.h: Regenerate.
584
585 2004-10-21 Tomer Levi <Tomer.Levi@nsc.com>
586
587 * crx-opc.c (crx_instruction): Replace i3, i4, i5 with us3,
588 us4, us5 (respectively).
589 Remove unsupported 'popa' instruction.
590 Reverse operands order in store co-processor instructions.
591
592 2004-10-15 Alan Modra <amodra@bigpond.net.au>
593
594 * Makefile.am: Run "make dep-am"
595 * Makefile.in: Regenerate.
596
597 2004-10-12 Bob Wilson <bob.wilson@acm.org>
598
599 * xtensa-dis.c: Use ISO C90 formatting.
600
601 2004-10-09 Alan Modra <amodra@bigpond.net.au>
602
603 * ppc-opc.c: Revert 2004-09-09 change.
604
605 2004-10-07 Bob Wilson <bob.wilson@acm.org>
606
607 * xtensa-dis.c (state_names): Delete.
608 (fetch_data): Use xtensa_isa_maxlength.
609 (print_xtensa_operand): Replace operand parameter with opcode/operand
610 pair. Remove print_sr_name parameter. Use new xtensa-isa.h functions.
611 (print_insn_xtensa): Use new xtensa-isa.h functions. Handle multislot
612 instruction bundles. Use xmalloc instead of malloc.
613
614 2004-10-07 David Gibson <david@gibson.dropbear.id.au>
615
616 * ppc-opc.c: Replace literal "0"s with NULLs in pointer
617 initializers.
618
619 2004-10-07 Tomer Levi <Tomer.Levi@nsc.com>
620
621 * crx-opc.c (crx_instruction): Support Co-processor insns.
622 * crx-dis.c (COP_ARG_TYPE): New enum for CO-Processor arguments.
623 (getregliststring): Change function to use the above enum.
624 (print_arg): Handle CO-Processor insns.
625 (crx_cinvs): Add 'b' option to invalidate the branch-target
626 cache.
627
628 2004-10-06 Aldy Hernandez <aldyh@redhat.com>
629
630 * ppc-opc.c (powerpc_opcodes): Add efscfd, efdabs, efdnabs,
631 efdneg, efdadd, efdsub, efdmul, efddiv, efdcmpgt, efdcmplt,
632 efdcmpeq, efdtstgt, efdtstlt, efdtsteq, efdcfsi, efdcfsid,
633 efdcfui, efdcfuid, efdcfsf, efdcfuf, efdctsi, efdctsidz, efdctsiz,
634 efdctui, efdctuidz, efdctuiz, efdctsf, efdctuf, efdctuf, efdcfs.
635
636 2004-10-01 Bill Farmer <Bill@the-farmers.freeserve.co.uk>
637
638 * pdp11-dis.c (print_insn_pdp11): Subtract the SOB's displacement
639 rather than add it.
640
641 2004-09-30 Paul Brook <paul@codesourcery.com>
642
643 * arm-dis.c (print_insn_arm): Handle 'e' for SMI instruction.
644 * arm-opc.h: Document %e. Add ARMv6ZK instructions.
645
646 2004-09-17 H.J. Lu <hongjiu.lu@intel.com>
647
648 * Makefile.am (AUTOMAKE_OPTIONS): Require 1.9.
649 (CONFIG_STATUS_DEPENDENCIES): New.
650 (Makefile): Removed.
651 (config.status): Likewise.
652 * Makefile.in: Regenerated.
653
654 2004-09-17 Alan Modra <amodra@bigpond.net.au>
655
656 * Makefile.am: Run "make dep-am".
657 * Makefile.in: Regenerate.
658 * aclocal.m4: Regenerate.
659 * configure: Regenerate.
660 * po/POTFILES.in: Regenerate.
661 * po/opcodes.pot: Regenerate.
662
663 2004-09-11 Andreas Schwab <schwab@suse.de>
664
665 * configure: Rebuild.
666
667 2004-09-09 Segher Boessenkool <segher@kernel.crashing.org>
668
669 * ppc-opc.c (L): Make this field not optional.
670
671 2004-09-03 Tomer Levi <Tomer.Levi@nsc.com>
672
673 * opc-crx.c: Rename 'popma' to 'popa', remove 'pushma'.
674 Fix parameter to 'm[t|f]csr' insns.
675
676 2004-08-30 Nathanael Nerode <neroden@gcc.gnu.org>
677
678 * configure.in: Autoupdate to autoconf 2.59.
679 * aclocal.m4: Rebuild with aclocal 1.4p6.
680 * configure: Rebuild with autoconf 2.59.
681 * Makefile.in: Rebuild with automake 1.4p6 (picking up
682 bfd changes for autoconf 2.59 on the way).
683 * config.in: Rebuild with autoheader 2.59.
684
685 2004-08-27 Richard Sandiford <rsandifo@redhat.com>
686
687 * frv-desc.[ch], frv-opc.[ch]: Regenerated.
688
689 2004-07-30 Michal Ludvig <mludvig@suse.cz>
690
691 * i386-dis.c (GRPPADLCK): Renamed to GRPPADLCK1
692 (GRPPADLCK2): New define.
693 (twobyte_has_modrm): True for 0xA6.
694 (grps): GRPPADLCK2 for opcode 0xA6.
695
696 2004-07-29 Alexandre Oliva <aoliva@redhat.com>
697
698 Introduce SH2a support.
699 * sh-opc.h (arch_sh2a_base): Renumber.
700 (arch_sh2a_nofpu_base): Remove.
701 (arch_sh_base_mask): Adjust.
702 (arch_opann_mask): New.
703 (arch_sh2a, arch_sh2a_nofpu): Adjust.
704 (arch_sh2a_up, arch_sh2a_nofpu_up): Likewise.
705 (sh_table): Adjust whitespace.
706 2004-02-24 Corinna Vinschen <vinschen@redhat.com>
707 * sh-opc.h (arch_sh2a_nofpu_up): New. Use instead of arch_sh2a_up in
708 instruction list throughout.
709 (arch_sh2a_up): Redefine to include fpu instruction set. Use instead
710 of arch_sh2a in instruction list throughout.
711 (arch_sh2e_up): Accomodate above changes.
712 (arch_sh2_up): Ditto.
713 2004-02-20 Corinna Vinschen <vinschen@redhat.com>
714 * sh-opc.h: Add arch_sh2a_nofpu to arch_sh2_up.
715 2004-02-18 Corinna Vinschen <vinschen@redhat.com>
716 * sh-dis.c (print_insn_sh): Add bfd_mach_sh2a_nofpu handling.
717 * sh-opc.h (arch_sh2a_nofpu): New.
718 (arch_sh2a_up): New, defines sh2a and sh2a_nofpu.
719 (sh_table): Change all arch_sh2a to arch_sh2a_up unless FPU
720 instruction.
721 2004-01-20 DJ Delorie <dj@redhat.com>
722 * sh-dis.c (print_insn_sh): SH2A does not have 'X' fp regs.
723 2003-12-29 DJ Delorie <dj@redhat.com>
724 * sh-opc.c (sh_nibble_type, sh_arg_type, arch_2a, arch_2e_up,
725 sh_opcode_info, sh_table): Add sh2a support.
726 (arch_op32): New, to tag 32-bit opcodes.
727 * sh-dis.c (print_insn_sh): Support sh2a opcodes.
728 2003-12-02 Michael Snyder <msnyder@redhat.com>
729 * sh-opc.h (arch_sh2a): Add.
730 * sh-dis.c (arch_sh2a): Handle.
731 * sh-opc.h (arch_sh2_up): Fix up to include arch_sh2a.
732
733 2004-07-27 Tomer Levi <Tomer.Levi@nsc.com>
734
735 * crx-opc.c: Add popx,pushx insns. Indent code, fix comments.
736
737 2004-07-22 Nick Clifton <nickc@redhat.com>
738
739 PR/280
740 * h8300-dis.c (bfd_h8_disassemble): Do not dump raw bytes for the
741 insns - this is done by objdump itself.
742 * h8500-dis.c (print_insn_h8500): Likewise.
743
744 2004-07-21 Jan Beulich <jbeulich@novell.com>
745
746 * i386-dis.c (OP_E): Show rip-relative addressing in 64-bit mode
747 regardless of address size prefix in effect.
748 (ptr_reg): Size or address registers does not depend on rex64, but
749 on the presence of an address size override.
750 (OP_MMX): Use rex.x only for xmm registers.
751 (OP_EM): Use rex.z only for xmm registers.
752
753 2004-07-20 Maciej W. Rozycki <macro@linux-mips.org>
754
755 * mips-opc.c (mips_builtin_opcodes): Move coprocessor 2
756 move/branch operations to the bottom so that VR5400 multimedia
757 instructions take precedence in disassembly.
758
759 2004-07-20 Maciej W. Rozycki <macro@linux-mips.org>
760
761 * mips-opc.c (mips_builtin_opcodes): Remove the MIPS32
762 ISA-specific "break" encoding.
763
764 2004-07-13 Elvis Chiang <elvisfb@gmail.com>
765
766 * arm-opc.h: Fix typo in comment.
767
768 2004-07-11 Andreas Schwab <schwab@suse.de>
769
770 * m68k-dis.c (m68k_valid_ea): Fix typos in last change.
771
772 2004-07-09 Andreas Schwab <schwab@suse.de>
773
774 * m68k-dis.c (m68k_valid_ea): Check validity of all codes.
775
776 2004-07-07 Tomer Levi <Tomer.Levi@nsc.com>
777
778 * Makefile.am (CFILES): Add crx-dis.c, crx-opc.c.
779 (ALL_MACHINES): Add crx-dis.lo, crx-opc.lo.
780 (crx-dis.lo): New target.
781 (crx-opc.lo): Likewise.
782 * Makefile.in: Regenerate.
783 * configure.in: Handle bfd_crx_arch.
784 * configure: Regenerate.
785 * crx-dis.c: New file.
786 * crx-opc.c: New file.
787 * disassemble.c (ARCH_crx): Define.
788 (disassembler): Handle ARCH_crx.
789
790 2004-06-29 James E Wilson <wilson@specifixinc.com>
791
792 * ia64-opc-a.c (ia64_opcodes_a): Delete mov immediate pseudo for adds.
793 * ia64-asmtab.c: Regnerate.
794
795 2004-06-28 Alan Modra <amodra@bigpond.net.au>
796
797 * ppc-opc.c (insert_fxm): Handle mfocrf and mtocrf.
798 (extract_fxm): Don't test dialect.
799 (XFXFXM_MASK): Include the power4 bit.
800 (XFXM): Add p4 param.
801 (powerpc_opcodes): Add mfocrf and mtocrf. Adjust mtcr.
802
803 2004-06-27 Alexandre Oliva <aoliva@redhat.com>
804
805 2003-07-21 Richard Sandiford <rsandifo@redhat.com>
806 * disassemble.c (disassembler): Handle bfd_mach_h8300sxn.
807
808 2004-06-26 Alan Modra <amodra@bigpond.net.au>
809
810 * ppc-opc.c (BH, XLBH_MASK): Define.
811 (powerpc_opcodes): Allow BH field on bclr, bclrl, bcctr, bcctrl.
812
813 2004-06-24 Alan Modra <amodra@bigpond.net.au>
814
815 * i386-dis.c (x_mode): Comment.
816 (two_source_ops): File scope.
817 (float_mem): Correct fisttpll and fistpll.
818 (float_mem_mode): New table.
819 (dofloat): Use it.
820 (OP_E): Correct intel mode PTR output.
821 (ptr_reg): Use open_char and close_char.
822 (PNI_Fixup): Handle possible suffix on sidt. Use op1out etc. for
823 operands. Set two_source_ops.
824
825 2004-06-15 Alan Modra <amodra@bigpond.net.au>
826
827 * arc-ext.c (build_ARC_extmap): Use bfd_get_section_size
828 instead of _raw_size.
829
830 2004-06-08 Jakub Jelinek <jakub@redhat.com>
831
832 * ia64-gen.c (in_iclass): Handle more postinc st
833 and ld variants.
834 * ia64-asmtab.c: Rebuilt.
835
836 2004-06-01 Martin Schwidefsky <schwidefsky@de.ibm.com>
837
838 * s390-opc.txt: Correct architecture mask for some opcodes.
839 lrv, lrvh, strv, ml, dl, alc, slb rll and mvclu are available
840 in the esa mode as well.
841
842 2004-05-28 Andrew Stubbs <andrew.stubbs@superh.com>
843
844 * sh-dis.c (target_arch): Make unsigned.
845 (print_insn_sh): Replace (most of) switch with a call to
846 sh_get_arch_from_bfd_mach(). Also use new architecture flags system.
847 * sh-opc.h: Redefine architecture flags values.
848 Add sh3-nommu architecture.
849 Reorganise <arch>_up macros so they make more visual sense.
850 (SH_MERGE_ARCH_SET): Define new macro.
851 (SH_VALID_BASE_ARCH_SET): Likewise.
852 (SH_VALID_MMU_ARCH_SET): Likewise.
853 (SH_VALID_CO_ARCH_SET): Likewise.
854 (SH_VALID_ARCH_SET): Likewise.
855 (SH_MERGE_ARCH_SET_VALID): Likewise.
856 (SH_ARCH_SET_HAS_FPU): Likewise.
857 (SH_ARCH_SET_HAS_DSP): Likewise.
858 (SH_ARCH_UNKNOWN_ARCH): Likewise.
859 (sh_get_arch_from_bfd_mach): Add prototype.
860 (sh_get_arch_up_from_bfd_mach): Likewise.
861 (sh_get_bfd_mach_from_arch_set): Likewise.
862 (sh_merge_bfd_arc): Likewise.
863
864 2004-05-24 Peter Barada <peter@the-baradas.com>
865
866 * m68k-dis.c(print_insn_m68k): Strip body of diassembly out
867 into new match_insn_m68k function. Loop over canidate
868 matches and select first that completely matches.
869 * m68k-dis.c(print_insn_arg): Fix 'g' case to only extract 1 bit.
870 * m68k-dis.c(print_insn_arg): Call new function m68k_valid_ea
871 to verify addressing for MAC/EMAC.
872 * m68k-dis.c(print_insn_arg): Use reg_half_names for MAC/EMAC
873 reigster halves since 'fpu' and 'spl' look misleading.
874 * m68k-dis.c(fetch_arg): Fix 'G', 'H', 'I', 'f', 'M', 'N' cases.
875 * m68k-opc.c: Rearragne mac/emac cases to use longest for
876 first, tighten up match masks.
877 * m68k-opc.c: Add 'size' field to struct m68k_opcode. Produce
878 'size' from special case code in print_insn_m68k to
879 determine decode size of insns.
880
881 2004-05-19 Alan Modra <amodra@bigpond.net.au>
882
883 * ppc-opc.c (insert_fxm): Enable two operand mfcr when -many as
884 well as when -mpower4.
885
886 2004-05-13 Nick Clifton <nickc@redhat.com>
887
888 * po/fr.po: Updated French translation.
889
890 2004-05-05 Peter Barada <peter@the-baradas.com>
891
892 * m68k-dis.c(print_insn_m68k): Add new chips, use core
893 variants in arch_mask. Only set m68881/68851 for 68k chips.
894 * m68k-op.c: Switch from ColdFire chips to core variants.
895
896 2004-05-05 Alan Modra <amodra@bigpond.net.au>
897
898 PR 147.
899 * ppc-opc.c (PPCVEC): Remove PPC_OPCODE_PPC.
900
901 2004-04-29 Ben Elliston <bje@au.ibm.com>
902
903 * ppc-opc.c (XCMPL): Renmame to XOPL. Update users.
904 (powerpc_opcodes): Add "dbczl" instruction for PPC970.
905
906 2004-04-22 Kaz Kojima <kkojima@rr.iij4u.or.jp>
907
908 * sh-dis.c (print_insn_sh): Print the value in constant pool
909 as a symbol if it looks like a symbol.
910
911 2004-04-22 Peter Barada <peter@the-baradas.com>
912
913 * m68k-dis.c(print_insn_m68k): Set mfcmac/mcfemac on
914 appropriate ColdFire architectures.
915 (print_insn_m68k): Handle EMAC, MAC/EMAC scalefactor, and MAC/EMAC
916 mask addressing.
917 Add EMAC instructions, fix MAC instructions. Remove
918 macmw/macml/msacmw/msacml instructions since mask addressing now
919 supported.
920
921 2004-04-20 Jakub Jelinek <jakub@redhat.com>
922
923 * sparc-opc.c (fmoviccx, fmovfccx, fmovccx): Define.
924 (fmovicc, fmovfcc, fmovcc): Remove fpsize argument, change opcode to
925 suffix. Use fmov*x macros, create all 3 fpsize variants in one
926 macro. Adjust all users.
927
928 2004-04-15 Anil Paranjpe <anilp1@kpitcummins.com>
929
930 * h8300-dis.c (bfd_h8_disassemble) : Treat "adds" & "subs"
931 separately.
932
933 2004-03-30 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
934
935 * m32r-asm.c: Regenerate.
936
937 2004-03-29 Stan Shebs <shebs@apple.com>
938
939 * mpw-config.in, mpw-make.sed: Remove MPW support files, no longer
940 used.
941
942 2004-03-19 Alan Modra <amodra@bigpond.net.au>
943
944 * aclocal.m4: Regenerate.
945 * config.in: Regenerate.
946 * configure: Regenerate.
947 * po/POTFILES.in: Regenerate.
948 * po/opcodes.pot: Regenerate.
949
950 2004-03-16 Alan Modra <amodra@bigpond.net.au>
951
952 * ppc-dis.c (print_insn_powerpc): Don't print tabs. Handle
953 PPC_OPERANDS_GPR_0.
954 * ppc-opc.c (RA0): Define.
955 (RAQ, RAL, RAM, RAS, RSQ, RTQ, RSO): Use PPC_OPERAND_GPR_0.
956 (RAOPT): Rename from RAO. Update all uses.
957 (powerpc_opcodes): Use RA0 as appropriate.
958
959 2004-03-15 Aldy Hernandez <aldyh@redhat.com>
960
961 * ppc-opc.c (powerpc_opcodes): Add BOOKE versions of mfsprg.
962
963 2004-03-15 Alan Modra <amodra@bigpond.net.au>
964
965 * sparc-dis.c (print_insn_sparc): Update getword prototype.
966
967 2004-03-12 Michal Ludvig <mludvig@suse.cz>
968
969 * i386-dis.c (GRPPLOCK): Delete.
970 (grps): Delete GRPPLOCK entry.
971
972 2004-03-12 Alan Modra <amodra@bigpond.net.au>
973
974 * i386-dis.c (OP_M, OP_0f0e, OP_0fae, NOP_Fixup): New functions.
975 (M, Mp): Use OP_M.
976 (None, PADLOCK_SPECIAL, PADLOCK_0): Delete.
977 (GRPPADLCK): Define.
978 (dis386): Use NOP_Fixup on "nop".
979 (dis386_twobyte): Use GRPPADLCK on opcode 0xa7.
980 (twobyte_has_modrm): Set for 0xa7.
981 (padlock_table): Delete. Move to..
982 (grps): ..here, using OP_0f07. Use OP_Ofae on lfence, mfence
983 and clflush.
984 (print_insn): Revert PADLOCK_SPECIAL code.
985 (OP_E): Delete sfence, lfence, mfence checks.
986
987 2004-03-12 Jakub Jelinek <jakub@redhat.com>
988
989 * i386-dis.c (grps): Use INVLPG_Fixup instead of OP_E for invlpg.
990 (INVLPG_Fixup): New function.
991 (PNI_Fixup): Remove ATTRIBUTE_UNUSED from sizeflag.
992
993 2004-03-12 Michal Ludvig <mludvig@suse.cz>
994
995 * i386-dis.c (PADLOCK_SPECIAL, PADLOCK_0): New defines.
996 (dis386_twobyte): Opcode 0xa7 is PADLOCK_0.
997 (padlock_table): New struct with PadLock instructions.
998 (print_insn): Handle PADLOCK_SPECIAL.
999
1000 2004-03-12 Alan Modra <amodra@bigpond.net.au>
1001
1002 * i386-dis.c (grps): Use clflush by default for 0x0fae/7.
1003 (OP_E): Twiddle clflush to sfence here.
1004
1005 2004-03-08 Nick Clifton <nickc@redhat.com>
1006
1007 * po/de.po: Updated German translation.
1008
1009 2003-03-03 Andrew Stubbs <andrew.stubbs@superh.com>
1010
1011 * sh-dis.c (print_insn_sh): Don't disassemble fp instructions in
1012 nofpu mode. Add BFD type bfd_mach_sh4_nommu_nofpu.
1013 * sh-opc.h: Add sh4_nommu_nofpu architecture and adjust instructions
1014 accordingly.
1015
1016 2004-03-01 Richard Sandiford <rsandifo@redhat.com>
1017
1018 * frv-asm.c: Regenerate.
1019 * frv-desc.c: Regenerate.
1020 * frv-desc.h: Regenerate.
1021 * frv-dis.c: Regenerate.
1022 * frv-ibld.c: Regenerate.
1023 * frv-opc.c: Regenerate.
1024 * frv-opc.h: Regenerate.
1025
1026 2004-03-01 Richard Sandiford <rsandifo@redhat.com>
1027
1028 * frv-desc.c, frv-opc.c: Regenerate.
1029
1030 2004-03-01 Richard Sandiford <rsandifo@redhat.com>
1031
1032 * frv-desc.c, frv-opc.c, frv-opc.h: Regenerate.
1033
1034 2004-02-26 Andrew Stubbs <andrew.stubbs@superh.com>
1035
1036 * sh-opc.h: Move fsca and fsrra instructions from sh4a to sh4.
1037 Also correct mistake in the comment.
1038
1039 2004-02-26 Andrew Stubbs <andrew.stubbs@superh.com>
1040
1041 * sh-dis.c (print_insn_sh): Add REG_N_D nibble type to
1042 ensure that double registers have even numbers.
1043 Add REG_N_B01 for nn01 (binary 01) nibble to ensure
1044 that reserved instruction 0xfffd does not decode the same
1045 as 0xfdfd (ftrv).
1046 * sh-opc.h: Add REG_N_D nibble type and use it whereever
1047 REG_N refers to a double register.
1048 Add REG_N_B01 nibble type and use it instead of REG_NM
1049 in ftrv.
1050 Adjust the bit patterns in a few comments.
1051
1052 2004-02-25 Aldy Hernandez <aldyh@redhat.com>
1053
1054 * ppc-opc.c (powerpc_opcodes): Change mask for dcbt and dcbtst.
1055
1056 2004-02-20 Aldy Hernandez <aldyh@redhat.com>
1057
1058 * ppc-opc.c (powerpc_opcodes): Move mfmcsrr0 before mfdc_dat.
1059
1060 2004-02-20 Aldy Hernandez <aldyh@redhat.com>
1061
1062 * ppc-opc.c (powerpc_opcodes): Add m*ivor35.
1063
1064 2004-02-20 Aldy Hernandez <aldyh@redhat.com>
1065
1066 * ppc-opc.c (powerpc_opcodes): Add mfivor32, mfivor33, mfivor34,
1067 mtivor32, mtivor33, mtivor34.
1068
1069 2004-02-19 Aldy Hernandez <aldyh@redhat.com>
1070
1071 * ppc-opc.c (powerpc_opcodes): Add mfmcar.
1072
1073 2004-02-10 Petko Manolov <petkan@nucleusys.com>
1074
1075 * arm-opc.h Maverick accumulator register opcode fixes.
1076
1077 2004-02-13 Ben Elliston <bje@wasabisystems.com>
1078
1079 * m32r-dis.c: Regenerate.
1080
1081 2004-01-27 Michael Snyder <msnyder@redhat.com>
1082
1083 * sh-opc.h (sh_table): "fsrra", not "fssra".
1084
1085 2004-01-23 Andrew Over <andrew.over@cs.anu.edu.au>
1086
1087 * sparc-opc.c (fdtox, fstox, fqtox, fxtod, fxtos, fxtoq): Tighten
1088 contraints.
1089
1090 2004-01-19 Andrew Over <andrew.over@cs.anu.edu.au>
1091
1092 * sparc-opc.c (sparc_opcodes) <f[dsq]tox, fxto[dsq]>: Fix args.
1093
1094 2004-01-19 Alan Modra <amodra@bigpond.net.au>
1095
1096 * i386-dis.c (OP_E): Print scale factor on intel mode sib when not
1097 1. Don't print scale factor on AT&T mode when index missing.
1098
1099 2004-01-16 Alexandre Oliva <aoliva@redhat.com>
1100
1101 * m10300-opc.c (mov): 8- and 24-bit immediates are zero-extended
1102 when loaded into XR registers.
1103
1104 2004-01-14 Richard Sandiford <rsandifo@redhat.com>
1105
1106 * frv-desc.h: Regenerate.
1107 * frv-desc.c: Regenerate.
1108 * frv-opc.c: Regenerate.
1109
1110 2004-01-13 Michael Snyder <msnyder@redhat.com>
1111
1112 * sh-dis.c (print_insn_sh): Allocate 4 bytes for insn.
1113
1114 2004-01-09 Paul Brook <paul@codesourcery.com>
1115
1116 * arm-opc.h (arm_opcodes): Move generic mcrr after known
1117 specific opcodes.
1118
1119 2004-01-07 Daniel Jacobowitz <drow@mvista.com>
1120
1121 * Makefile.am (libopcodes_la_DEPENDENCIES)
1122 (libopcodes_la_LIBADD): Revert 2003-05-17 change. Add explanatory
1123 comment about the problem.
1124 * Makefile.in: Regenerate.
1125
1126 2004-01-06 Alexandre Oliva <aoliva@redhat.com>
1127
1128 2003-12-19 Alexandre Oliva <aoliva@redhat.com>
1129 * frv-asm.c (parse_ulo16, parse_uhi16, parse_d12): Fix some
1130 cut&paste errors in shifting/truncating numerical operands.
1131 2003-08-04 Alexandre Oliva <aoliva@redhat.com>
1132 * frv-asm.c (parse_ulo16): Parse gotofflo and gotofffuncdesclo.
1133 (parse_uslo16): Likewise.
1134 (parse_uhi16): Parse gotoffhi and gotofffuncdeschi.
1135 (parse_d12): Parse gotoff12 and gotofffuncdesc12.
1136 (parse_s12): Likewise.
1137 2003-08-04 Alexandre Oliva <aoliva@redhat.com>
1138 * frv-asm.c (parse_ulo16): Parse gotlo and gotfuncdesclo.
1139 (parse_uslo16): Likewise.
1140 (parse_uhi16): Parse gothi and gotfuncdeschi.
1141 (parse_d12): Parse got12 and gotfuncdesc12.
1142 (parse_s12): Likewise.
1143
1144 2004-01-02 Albert Bartoszko <albar@nt.kegel.com.pl>
1145
1146 * msp430-dis.c (msp430_doubleoperand): Check for an 'add'
1147 instruction which looks similar to an 'rla' instruction.
1148
1149 For older changes see ChangeLog-0203
1150 \f
1151 Local Variables:
1152 mode: change-log
1153 left-margin: 8
1154 fill-column: 74
1155 version-control: never
1156 End:
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