opcodes/ChangeLog

   1 2012-09-17  Yufeng Zhang  <yufeng.zhang@arm.com>
   2
   3         * aarch64-asm.c (aarch64_ins_imm_half): Remove ATTRIBUTE_UNUSED from
   4         the parameter 'inst'.
   5         (aarch64_ins_addr_simm): Add ATTRIBUTE_UNUSED to the parameter 'inst'.
   6         (convert_mov_to_movewide): Change to assert (0) when
   7         aarch64_wide_constant_p returns FALSE.
   8
   9 2012-09-14  David Edelsohn  <dje.gcc@gmail.com>
  10
  11         * configure: Regenerate.
  12
  13 2012-09-14  Anthony Green  <green@moxielogic.com>
  14
  15         * moxie-dis.c (print_insn_moxie): Branch targets are relative to
  16         the address after the branch instruction.
  17
  18 2012-09-13  Anthony Green  <green@moxielogic.com>
  19
  20         * moxie-dis.c (print_insn_moxie): Handle bi-endian encodings.
  21
  22 2012-09-10  Matthias Klose  <doko@ubuntu.com>
  23
  24         * config.in: Disable sanity check for kfreebsd.
  25
  26 2012-09-10  H.J. Lu  <hongjiu.lu@intel.com>
  27
  28         * configure: Regenerated.
  29
  30 2012-09-04  Sergey A. Guriev <sergey.a.guriev@intel.com>
  31
  32         * ia64-asmtab.h (completer_index): Extend bitfield to full uint.
  33         * ia64-gen.c: Promote completer index type to longlong.
  34         (irf_operand): Add new register recognition.
  35         (in_iclass_mov_x): Add an entry for the new mov_* instruction type.
  36         (lookup_specifier): Add new resource recognition.
  37         (insert_bit_table_ent): Relax abort condition according to the
  38         changed completer index type.
  39         (print_dis_table): Fix printf format for completer index.
  40         * ia64-ic.tbl: Add a new instruction class.
  41         * ia64-opc-i.c (ia64_opcodes_i): Define new I-instructions.
  42         * ia64-opc-m.c (ia64_opcodes_m): Define new M-instructions.
  43         * ia64-opc.h: Define short names for new operand types.
  44         * ia64-raw.tbl: Add new RAW resource for DAHR register.
  45         * ia64-waw.tbl: Add new WAW resource for DAHR register.
  46         * ia64-asmtab.c: Regenerate.
  47
  48 2012-08-29  Peter Bergner  <bergner@vnet.ibm.com>
  49
  50         * ppc-opc.c (VXASHB_MASK): New define.
  51         (powerpc_opcodes) <vsldoi>: Use VXASHB_MASK.
  52
  53 2012-08-28  Peter Bergner  <bergner@vnet.ibm.com>
  54
  55         * ppc-opc.c (UIMM4, UIMM3, UIMM2, VXVA_MASK, VXVB_MASK, VXVAVB_MASK,
  56         VXVDVA_MASK, VXUIMM4_MASK, VXUIMM3_MASK, VXUIMM2_MASK): New defines.
  57         (powerpc_opcodes) <vexptefp, vlogefp, vrefp, vrfim, vrfin, vrfip,
  58         vrfiz, vrsqrtefp, vupkhpx, vupkhsb, vupkhsh, vupklpx, vupklsb,
  59         vupklsh>: Use VXVA_MASK.
  60         <vspltisb, vspltish, vspltisw>: Use VXVB_MASK.
  61         <mfvscr>: Use VXVAVB_MASK.
  62         <mtvscr>: Use VXVDVA_MASK.
  63         <vspltb>: Use VXUIMM4_MASK.
  64         <vsplth>: Use VXUIMM3_MASK.
  65         <vspltw>: Use VXUIMM2_MASK.
  66
  67 2012-08-24  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
  68
  69         * arm-dis.c (neon_opcodes): Add 2 operand sha instructions.
  70
  71 2012-08-24  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
  72
  73         * arm-dis.c (neon_opcodes): Add SHA 3-operand instructions.
  74
  75 2012-08-24  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
  76
  77         * arm-dis.c (neon_opcodes): Handle VMULL.P64.
  78
  79 2012-08-24  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
  80
  81         * arm-dis.c (neon_opcodes): Add support for AES instructions.
  82
  83 2012-08-24  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
  84
  85         * arm-dis.c (coprocessor_opcodes): Add support for HP/DP
  86         conversions.
  87
  88 2012-08-24  Matthew  Gretton-Dann  <matthew.gretton-dann@arm.com>
  89
  90         * arm-dis.c (coprocessor_opcodes): Add VRINT.
  91         (neon_opcodes): Likewise.
  92
  93 2012-08-24  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
  94
  95         * arm-dis.c (coprocessor_opcodes): Add support for new VCVT
  96         variants.
  97         (neon_opcodes): Likewise.
  98
  99 2012-08-24  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 100
 101         * arm-dis.c (coprocessor_opcodes): Add VMAXNM/VMINNM.
 102         (neon_opcodes): Likewise.
 103
 104 2012-08-24  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 105
 106         * arm-dis.c (coprocessor_opcodes): Add VSEL.
 107         (print_insn_coprocessor): Add new %<>c bitfield format
 108         specifier.
 109
 110 2012-08-24  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 111
 112         * arm-dis.c (arm_opcodes): Add LDRA/STRL instructions.
 113         (thumb32_opcodes): Likewise.
 114         (print_arm_insn): Add support for %<>T formatter.
 115
 116 2012-08-24  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 117
 118         * arm-dis.c (arm_opcodes): Add HLT.
 119         (thumb_opcodes): Likewise.
 120
 121 2012-08-24  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 122
 123         * arm-dis.c (thumb32_opcodes): Add DCPS instruction.
 124
 125 2012-08-24  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 126
 127         * arm-dis.c (arm_opcodes): Add SEVL.
 128         (thumb_opcodes): Likewise.
 129         (thumb32_opcodes): Likewise.
 130
 131 2012-08-24  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 132
 133         * arm-dis.c (data_barrier_option): New function.
 134         (print_insn_arm): Use data_barrier_option.
 135         (print_insn_thumb32): Use data_barrier_option.
 136
 137 2012-08-24  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com
 138
 139         * arm-dis.c (COND_UNCOND): New constant.
 140         (print_insn_coprocessor): Add support for %u format specifier.
 141         (print_insn_neon): Likewise.
 142
 143 2012-08-21  David S. Miller  <davem@davemloft.net>
 144
 145         * sparc-opc.c (4-argument crypto instructions): Fix encoding using
 146         F3F4 macro.
 147
 148 2012-08-20  Edmar Wienskoski  <edmar@freescale.com>
 149
 150         * ppc-opc.c (powerpc_opcodes): Changed opcode for vabsdub,
 151         vabsduh, vabsduw, mviwsplt.
 152
 153 2012-08-17  Nagajyothi Eggone  <nagajyothi.eggone@amd.com>
 154
 155         * i386-gen.c (cpu_flag_init): Add CPU_BTVER1_FLAGS and
 156         CPU_BTVER2_FLAGS.
 157
 158         * i386-opc.h: Update CpuPRFCHW comment.
 159
 160         * i386-opc.tbl: Enable prefetch instruction for CpuPRFCHW.
 161         * i386-init.h: Regenerated.
 162         * i386-tbl.h: Likewise.
 163
 164 2012-08-17  Nick Clifton  <nickc@redhat.com>
 165
 166         * po/uk.po: New Ukranian translation.
 167         * configure.in (ALL_LINGUAS): Add uk.
 168         * configure: Regenerate.
 169
 170 2012-08-16  Peter Bergner  <bergner@vnet.ibm.com>
 171
 172         * ppc-opc.c (powerpc_opcodes) <"lswx">: Use RAX for the second and
 173         RBX for the third operand.
 174         <"lswi">: Use RAX for second and NBI for the third operand.
 175
 176 2012-08-15  DJ Delorie  <dj@redhat.com>
 177
 178         * rl78-decode.opc (rl78_decode_opcode): Merge %e and %[01]
 179         operands, so that data addresses can be corrected when not
 180         ES-overridden.
 181         * rl78-decode.c: Regenerate.
 182         * rl78-dis.c (print_insn_rl78): Make order of modifiers
 183         irrelevent.  When the 'e' specifier is used on an operand and no
 184         ES prefix is provided, adjust address to make it absolute.
 185
 186 2012-08-15  Peter Bergner  <bergner@vnet.ibm.com>
 187
 188         * ppc-opc.c <RSQ, RTQ>: Use PPC_OPERAND_GPR.
 189
 190 2012-08-15  Peter Bergner  <bergner@vnet.ibm.com>
 191
 192         * ppc-opc.c <xnop, yield, mdoio, mdoom>: New extended mnemonics.
 193
 194 2012-08-14  Maciej W. Rozycki  <macro@codesourcery.com>
 195
 196         * mips-dis.c (print_insn_args): Add GET_OP and GET_OP_S local
 197         macros, use local variables for info struct member accesses,
 198         update the type of the variable used to hold the instruction
 199         word.
 200         (print_insn_mips, print_mips16_insn_arg): Likewise.
 201         (print_insn_mips16): Add GET_OP and GET_OP_S local macros, use
 202         local variables for info struct member accesses.
 203         (print_insn_micromips): Add GET_OP_S local macro.
 204         (_print_insn_mips): Update the type of the variable used to hold
 205         the instruction word.
 206
 207 2012-08-13  Ian Bolton  <ian.bolton@arm.com>
 208             Laurent Desnogues  <laurent.desnogues@arm.com>
 209             Jim MacArthur  <jim.macarthur@arm.com>
 210             Marcus Shawcroft  <marcus.shawcroft@arm.com>
 211             Nigel Stephens  <nigel.stephens@arm.com>
 212             Ramana Radhakrishnan  <ramana.radhakrishnan@arm.com>
 213             Richard Earnshaw  <rearnsha@arm.com>
 214             Sofiane Naci  <sofiane.naci@arm.com>
 215             Tejas Belagod  <tejas.belagod@arm.com>
 216             Yufeng Zhang  <yufeng.zhang@arm.com>
 217
 218         * Makefile.am: Add AArch64.
 219         * Makefile.in: Regenerate.
 220         * aarch64-asm.c: New file.
 221         * aarch64-asm.h: New file.
 222         * aarch64-dis.c: New file.
 223         * aarch64-dis.h: New file.
 224         * aarch64-gen.c: New file.
 225         * aarch64-opc.c: New file.
 226         * aarch64-opc.h: New file.
 227         * aarch64-tbl.h: New file.
 228         * configure.in: Add AArch64.
 229         * configure: Regenerate.
 230         * disassemble.c: Add AArch64.
 231         * aarch64-asm-2.c: New file (automatically generated).
 232         * aarch64-dis-2.c: New file (automatically generated).
 233         * aarch64-opc-2.c: New file (automatically generated).
 234         * po/POTFILES.in: Regenerate.
 235
 236 2012-08-13  Maciej W. Rozycki  <macro@codesourcery.com>
 237
 238         * micromips-opc.c (micromips_opcodes): Update comment.
 239         * mips-opc.c (mips_builtin_opcodes): Likewise.  Mark coprocessor
 240         instructions for IOCT as appropriate.
 241         * mips-dis.c (print_insn_mips): Replace OPCODE_IS_MEMBER with
 242         opcode_is_member.
 243         * configure.in: Substitute NO_WMISSING_FIELD_INITIALIZERS with
 244         the result of a check for the -Wno-missing-field-initializers
 245         GCC option.
 246         * Makefile.am (NO_WMISSING_FIELD_INITIALIZERS): New variable.
 247         (mips-opc.lo): Pass $(NO_WMISSING_FIELD_INITIALIZERS) to
 248         compilation.
 249         (mips16-opc.lo): Likewise.
 250         (micromips-opc.lo): Likewise.
 251         * aclocal.m4: Regenerate.
 252         * configure: Regenerate.
 253         * Makefile.in: Regenerate.
 254
 255 2012-08-11  Saravanan Ekanathan <saravanan.ekanathan@amd.com>
 256
 257         PR gas/14423
 258         * i386-gen.c (cpu_flag_init): Add CpuFMA in CPU_BDVER2_FLAGS.
 259         * i386-init.h: Regenerated.
 260
 261 2012-08-09  Nick Clifton  <nickc@redhat.com>
 262
 263         * po/vi.po: Updated Vietnamese translation.
 264
 265 2012-08-07  Roland McGrath  <mcgrathr@google.com>
 266
 267         * i386-dis.c (reg_table): Fill out REG_0F0D table with
 268         AMD-reserved cases as "prefetch".
 269         (MOD_0F18_REG_4, MOD_0F18_REG_5): New enum constants.
 270         (MOD_0F18_REG_6, MOD_0F18_REG_7): Likewise.
 271         (reg_table): Use those under REG_0F18.
 272         (mod_table): Add those cases as "nop/reserved".
 273
 274 2012-08-07  Jan Beulich <jbeulich@suse.com>
 275
 276         * i386-opc.tbl: Remove "FIXME" comments from SVME instructions.
 277
 278 2012-08-06  Roland McGrath  <mcgrathr@google.com>
 279
 280         * i386-dis.c (print_insn): Print spaces between multiple excess
 281         prefixes.  Return actual number of excess prefixes consumed,
 282         not always one.
 283
 284         * i386-dis.c (OP_REG): Ignore REX_B for segment register cases.
 285
 286 2012-08-06  Roland McGrath  <mcgrathr@google.com>
 287             Victor Khimenko  <khim@google.com>
 288             H.J. Lu  <hongjiu.lu@intel.com>
 289
 290         * i386-dis.c (OP_sI): In b_T_mode and v_mode, REX_W trumps DFLAG.
 291         (putop): For 'T', 'U', and 'V', treat REX_W like DFLAG.
 292         (intel_operand_size): For stack_v_mode, treat REX_W like DFLAG.
 293         (OP_E_register): Likewise.
 294         (OP_REG): For low 8 whole registers, treat REX_W like DFLAG.
 295
 296 2012-08-02  Jan-Benedict Glaw  <jbglaw@lug-owl.de>
 297
 298         * configure.in: Formatting.
 299         * configure: Regenerate.
 300
 301 2012-08-01  Alan Modra  <amodra@gmail.com>
 302
 303         * h8300-dis.c: Fix printf arg warnings.
 304         * i960-dis.c: Likewise.
 305         * mips-dis.c: Likewise.
 306         * pdp11-dis.c: Likewise.
 307         * sh-dis.c: Likewise.
 308         * v850-dis.c: Likewise.
 309         * configure.in: Formatting.
 310         * configure: Regenerate.
 311         * rl78-decode.c: Regenerate.
 312         * po/POTFILES.in: Regenerate.
 313
 314 2012-07-31  Chao-Ying Fu  <fu@mips.com>
 315             Catherine Moore  <clm@codesourcery.com>
 316             Maciej W. Rozycki  <macro@codesourcery.com>
 317
 318         * micromips-opc.c (WR_a, RD_a, MOD_a): New macros.
 319         (DSP_VOLA): Likewise.
 320         (D32, D33): Likewise.
 321         (micromips_opcodes): Add DSP ASE instructions.
 322         * mips-dis.c (print_insn_micromips) <'2', '3'>: New cases.
 323         <'4', '5', '6', '7', '8', '0', '^', '@'>: Likewise.
 324
 325 2012-07-31  Jan Beulich <jbeulich@suse.com>
 326
 327         * i386-opc.tbl (vmovntdqa): Move up into 256-bit integer AVX2
 328         instruction group. Mark as requiring AVX2.
 329         * i386-tbl.h: Re-generate.
 330
 331 2012-07-30  Nick Clifton  <nickc@redhat.com>
 332
 333         * po/opcodes.pot: Updated template.
 334         * po/es.po: Updated Spanish translation.
 335         * po/fi.po: Updated Finnish translation.
 336
 337 2012-07-27  Mike Frysinger  <vapier@gentoo.org>
 338
 339         * configure.in (BFD_VERSION): Run bfd/configure --version and
 340         parse the output of that.
 341         * configure: Regenerate.
 342
 343 2012-07-25  James Lemke  <jwlemke@codesourcery.com>
 344
 345         * ppc-opc.c (powerpc_opcodes): Add/remove PPCVLE for some 32-bit insns.
 346
 347 2012-07-24  Stephan McCamant  <smcc@cs.berkeley.edu>
 348             Dr David Alan Gilbert  <dave@treblig.org>
 349
 350         PR binutils/13135
 351         * arm-dis.c: Add necessary casts for printing integer values.
 352         Use %s when printing string values.
 353         * hppa-dis.c: Likewise.
 354         * m68k-dis.c: Likewise.
 355         * microblaze-dis.c: Likewise.
 356         * mips-dis.c: Likewise.
 357         * sparc-dis.c: Likewise.
 358
 359 2012-07-19  Michael Zolotukhin  <michael.v.zolotukhin@intel.com>
 360
 361         PR binutils/14355
 362         * i386-dis.c (VEX_LEN_0FXOP_08_CC): New.
 363         (VEX_LEN_0FXOP_08_CD): Likewise.
 364         (VEX_LEN_0FXOP_08_CE): Likewise.
 365         (VEX_LEN_0FXOP_08_CF): Likewise.
 366         (VEX_LEN_0FXOP_08_EC): Likewise.
 367         (VEX_LEN_0FXOP_08_ED): Likewise.
 368         (VEX_LEN_0FXOP_08_EE): Likewise.
 369         (VEX_LEN_0FXOP_08_EF): Likewise.
 370         (xop_table): Fix entries for vpcomb, vpcomw, vpcomd, vpcomq,
 371         vpcomub, vpcomuw, vpcomud, vpcomuq.
 372         (vex_len_table): Add entries for VEX_LEN_0FXOP_08_CC,
 373         VEX_LEN_0FXOP_08_CD, VEX_LEN_0FXOP_08_CE, VEX_LEN_0FXOP_08_CF,
 374         VEX_LEN_0FXOP_08_EC, VEX_LEN_0FXOP_08_ED, VEX_LEN_0FXOP_08_EE,
 375         VEX_LEN_0FXOP_08_EF.
 376
 377 2012-07-16  Michael Zolotukhin  <michael.v.zolotukhin@intel.com>
 378
 379         * i386-dis.c (PREFIX_0F38F6): New.
 380         (prefix_table): Add adcx, adox instructions.
 381         (three_byte_table): Use PREFIX_0F38F6.
 382         (mod_table): Add rdseed instruction.
 383         * i386-gen.c (cpu_flag_init): Add CpuADX, CpuRDSEED, CpuPRFCHW.
 384         (cpu_flags): Likewise.
 385         * i386-opc.h: Add CpuADX, CpuRDSEED, CpuPRFCHW.
 386         (i386_cpu_flags): Add fields cpurdseed, cpuadx, cpuprfchw.
 387         * i386-opc.tbl: Add instrcutions adcx, adox, rdseed. Extend
 388         prefetchw.
 389         * i386-tbl.h: Regenerate.
 390         * i386-init.h: Likewise.
 391
 392 2012-07-05  Thomas Schwinge  <thomas@codesourcery.com>
 393
 394         * mips-dis.c: Remove gratuitous newline.
 395
 396 2012-07-05  Sean Keys  <skeys@ipdatasys.com>
 397
 398         * xgate-dis.c: Removed an IF statement that will
 399         always be false due to overlapping operand masks.
 400         * xgate-opc.c: Corrected 'com' opcode entry and
 401         fixed spacing.
 402
 403 2012-07-02  Roland McGrath  <mcgrathr@google.com>
 404
 405         * i386-opc.tbl: Add RepPrefixOk to nop.
 406         * i386-tbl.h: Regenerate.
 407
 408 2012-06-28  Nick Clifton  <nickc@redhat.com>
 409
 410         * po/vi.po: Updated Vietnamese translation.
 411
 412 2012-06-22  Roland McGrath  <mcgrathr@google.com>
 413
 414         * i386-opc.tbl: Add RepPrefixOk to ret.
 415         * i386-tbl.h: Regenerate.
 416
 417         * i386-opc.h (RepPrefixOk): New enum constant.
 418         (i386_opcode_modifier): New bitfield 'repprefixok'.
 419         * i386-gen.c (opcode_modifiers): Add RepPrefixOk.
 420         * i386-opc.tbl: Add RepPrefixOk to bsf, bsr, and to all
 421         instructions that have IsString.
 422         * i386-tbl.h: Regenerate.
 423
 424 2012-06-11  Andreas Schwab  <schwab@linux-m68k.org>
 425
 426         * ppc-opc.c (lvsl, lvebx, isellt, icbt, ldepx, lwepx, lvsr, lvehx)
 427         (iselgt, lvewx, iseleq, isel, dcbst, dcbstep, dcbfl, dcbf, lbepx)
 428         (lvx, dcbfep, dcbtstls, stvebx, dcbtstlse, stdepx, stwepx, dcbtls)
 429         (stvehx, dcbtlse, stvewx, stbepx, icblc, stvx, dcbtstt, dcbtst)
 430         (dcbtst, dcbtstep, dcbtt, dcbt, dcbt, lhepx, eciwx, dcbtep)
 431         (dcread, lxvdsx, lvxl, dcblc, sthepx, ecowx, dcbi, dcread, icbtls)
 432         (stvxl, lxsdx, lfdepx, stxsdx, stfdepx, dcba, dcbal, lxvw4x)
 433         (tlbivax, lfdpx, lxvd2x, tlbsrx., stxvw4x, tlbsx, tlbsx., stfdpx)
 434         (stfqx, stxvd2x, icbi, icbiep, icread, dcbzep): Change RA to RA0.
 435
 436 2012-05-19  Alan Modra  <amodra@gmail.com>
 437
 438         * ppc-dis.c: Don't include elf32-ppc.h, do include elf/ppc.h.
 439         (get_powerpc_dialect): Detect VLE sections from ELF sh_flags.
 440
 441 2012-05-18  Alan Modra  <amodra@gmail.com>
 442
 443         * ia64-opc.c: Remove #include "ansidecl.h".
 444         * z8kgen.c: Include sysdep.h first.
 445
 446         * arc-dis.c: Include sysdep.h first, remove some redundant includes.
 447         * bfin-dis.c: Likewise.
 448         * i860-dis.c: Likewise.
 449         * ia64-dis.c: Likewise.
 450         * ia64-gen.c: Likewise.
 451         * m68hc11-dis.c: Likewise.
 452         * mmix-dis.c: Likewise.
 453         * msp430-dis.c: Likewise.
 454         * or32-dis.c: Likewise.
 455         * rl78-dis.c: Likewise.
 456         * rx-dis.c: Likewise.
 457         * tic4x-dis.c: Likewise.
 458         * tilegx-opc.c: Likewise.
 459         * tilepro-opc.c: Likewise.
 460         * rx-decode.c: Regenerate.
 461
 462 2012-05-17  James Lemke  <jwlemke@codesourcery.com>
 463
 464         * ppc-opc.c (powerpc_macros): Add entries for e_extlwi to e_clrlslwi.
 465
 466 2012-05-17  James Lemke  <jwlemke@codesourcery.com>
 467
 468         * ppc-opc.c (extract_sprg): Use ALLOW8_SPRG to include VLE.
 469
 470 2012-05-17  Daniel Richard G.  <skunk@iskunk.org>
 471             Nick Clifton  <nickc@redhat.com>
 472
 473         PR 14072
 474         * configure.in: Add check that sysdep.h has been included before
 475         any system header files.
 476         * configure: Regenerate.
 477         * config.in: Regenerate.
 478         * sysdep.h: Generate an error if included before config.h.
 479         * alpha-opc.c: Include sysdep.h before any other header file.
 480         * alpha-dis.c: Likewise.
 481         * avr-dis.c: Likewise.
 482         * cgen-opc.c: Likewise.
 483         * cr16-dis.c: Likewise.
 484         * cris-dis.c: Likewise.
 485         * crx-dis.c: Likewise.
 486         * d10v-dis.c: Likewise.
 487         * d10v-opc.c: Likewise.
 488         * d30v-dis.c: Likewise.
 489         * d30v-opc.c: Likewise.
 490         * h8500-dis.c: Likewise.
 491         * i370-dis.c: Likewise.
 492         * i370-opc.c: Likewise.
 493         * m10200-dis.c: Likewise.
 494         * m10300-dis.c: Likewise.
 495         * micromips-opc.c: Likewise.
 496         * mips-opc.c: Likewise.
 497         * mips61-opc.c: Likewise.
 498         * moxie-dis.c: Likewise.
 499         * or32-opc.c: Likewise.
 500         * pj-dis.c: Likewise.
 501         * ppc-dis.c: Likewise.
 502         * ppc-opc.c: Likewise.
 503         * s390-dis.c: Likewise.
 504         * sh-dis.c: Likewise.
 505         * sh64-dis.c: Likewise.
 506         * sparc-dis.c: Likewise.
 507         * sparc-opc.c: Likewise.
 508         * spu-dis.c: Likewise.
 509         * tic30-dis.c: Likewise.
 510         * tic54x-dis.c: Likewise.
 511         * tic80-dis.c: Likewise.
 512         * tic80-opc.c: Likewise.
 513         * tilegx-dis.c: Likewise.
 514         * tilepro-dis.c: Likewise.
 515         * v850-dis.c: Likewise.
 516         * v850-opc.c: Likewise.
 517         * vax-dis.c: Likewise.
 518         * w65-dis.c: Likewise.
 519         * xgate-dis.c: Likewise.
 520         * xtensa-dis.c: Likewise.
 521         * rl78-decode.opc: Likewise.
 522         * rl78-decode.c: Regenerate.
 523         * rx-decode.opc: Likewise.
 524         * rx-decode.c: Regenerate.
 525
 526 2012-05-17  Alan Modra  <amodra@gmail.com>
 527
 528         * ppc_dis.c: Don't include elf/ppc.h.
 529
 530 2012-05-16  Meador Inge  <meadori@codesourcery.com>
 531
 532         * arm-dis.c (arm_opcodes): Don't disassemble STMFD/LDMIA sp!, {reg}
 533         to PUSH/POP {reg}.
 534
 535 2012-05-15  James Murray <jsm@jsm-net.demon.co.uk>
 536             Stephane Carrez <stcarrez@nerim.fr>
 537
 538         * configure.in: Add S12X and XGATE co-processor support to m68hc11
 539         target.
 540         * disassemble.c: Likewise.
 541         * configure: Regenerate.
 542         * m68hc11-dis.c: Make objdump output more consistent, use hex
 543         instead of decimal and use 0x prefix for hex.
 544         * m68hc11-opc.c: Add S12X and XGATE opcodes.
 545
 546 2012-05-14  James Lemke  <jwlemke@codesourcery.com>
 547
 548         * ppc-dis.c (get_powerpc_dialect): Use is_ppc_vle.
 549         (PPC_OPCD_SEGS, VLE_OPCD_SEGS): New defines.
 550         (vle_opcd_indices): New array.
 551         (lookup_vle): New function.
 552         (disassemble_init_powerpc): Revise for second (VLE) opcode table.
 553         (print_insn_powerpc): Likewise.
 554         * ppc-opc.c: Likewise.
 555
 556 2012-05-14  Catherine Moore  <clm@codesourcery.com>
 557             Maciej W. Rozycki  <macro@codesourcery.com>
 558             Rhonda Wittels  <rhonda@codesourcery.com>
 559             Nathan Froyd <froydnj@codesourcery.com>
 560
 561         * ppc-opc.c (insert_arx, extract_arx): New functions.
 562         (insert_ary, extract_ary): New functions.
 563         (insert_li20, extract_li20): New functions.
 564         (insert_rx, extract_rx): New functions.
 565         (insert_ry, extract_ry): New functions.
 566         (insert_sci8, extract_sci8): New functions.
 567         (insert_sci8n, extract_sci8n): New functions.
 568         (insert_sd4h, extract_sd4h): New functions.
 569         (insert_sd4w, extract_sd4w): New functions.
 570         (insert_vlesi, extract_vlesi): New functions.
 571         (insert_vlensi, extract_vlensi): New functions.
 572         (insert_vleui, extract_vleui): New functions.
 573         (insert_vleil, extract_vleil): New functions.
 574         (BI_MASK, BB_MASK, BT): Use PPC_OPERAND_CR_BIT.
 575         (BI16, BI32, BO32, B8): New.
 576         (B15, B24, CRD32, CRS): New.
 577         (CRD, OBF, BFA, CR, CRFS): Use PPC_OPERAND_CR_REG.
 578         (DB, IMM20, RD, Rx, ARX, RY, RZ): New.
 579         (ARY, SCLSCI8, SCLSCI8N, SE_SD, SE_SDH): New.
 580         (SH6_MASK): Use PPC_OPSHIFT_INV.
 581         (SI8, UI5, OIMM5, UI7, BO16): New.
 582         (VLESIMM, VLENSIMM, VLEUIMM, VLEUIMML): New.
 583         (XT6, XA6, XB6, XB6S, XC6): Use PPC_OPSHIFT_INV.
 584         (ALLOW8_SPRG): New.
 585         (insert_sprg, extract_sprg): Check ALLOW8_SPRG.
 586         (OPVUP, OPVUP_MASK OPVUP): New
 587         (BD8, BD8_MASK, BD8IO, BD8IO_MASK): New.
 588         (EBD8IO, EBD8IO1_MASK, EBD8IO2_MASK, EBD8IO3_MASK): New.
 589         (BD15, BD15_MASK, EBD15, EBD15_MASK, EBD15BI, EBD15BI_MASK): New.
 590         (BD24,BD24_MASK, C_LK, C_LK_MASK, C, C_MASK): New.
 591         (IA16, IA16_MASK, I16A, I16A_MASK, I16L, I16L_MASK): New.
 592         (IM7, IM7_MASK, LI20, LI20_MASK, SCI8, SCI8_MASK): New.
 593         (SCI8BF, SCI8BF_MASK, SD4, SD4_MASK): New.
 594         (SE_IM5, SE_IM5_MASK): New.
 595         (SE_R, SE_R_MASK, SE_RR, SE_RR_MASK): New.
 596         (EX, EX_MASK, BO16F, BO16T, BO32F, BO32T): New.
 597         (BO32DNZ, BO32DZ): New.
 598         (NO371, PPCSPE, PPCISEL, PPCEFS, MULHW): Include PPC_OPCODE_VLE.
 599         (PPCVLE): New.
 600         (powerpc_opcodes): Add new VLE instructions.  Update existing
 601         instruction to include PPCVLE if supported.
 602         * ppc-dis.c (ppc_opts): Add vle entry.
 603         (get_powerpc_dialect): New function.
 604         (powerpc_init_dialect): VLE support.
 605         (print_insn_big_powerpc): Call get_powerpc_dialect.
 606         (print_insn_little_powerpc): Likewise.
 607         (operand_value_powerpc): Handle negative shift counts.
 608         (print_insn_powerpc): Handle 2-byte instruction lengths.
 609
 610 2012-05-11  Daniel Richard G.  <skunk@iskunk.org>
 611
 612         PR binutils/14028
 613         * configure.in: Invoke ACX_HEADER_STRING.
 614         * configure: Regenerate.
 615         * config.in: Regenerate.
 616         * sysdep.h: If STRINGS_WITH_STRING is defined then include both
 617         string.h and strings.h.
 618
 619 2012-05-11  Nick Clifton  <nickc@redhat.com>
 620
 621         PR binutils/14006
 622         * arm-dis.c (print_insn): Fix detection of instruction mode in
 623         files containing multiple executable sections.
 624
 625 2012-05-03  Sean Keys  <skeys@ipdatasys.com>
 626
 627         * Makefile.in, configure: regenerate
 628         * disassemble.c (disassembler): Recognize ARCH_XGATE.
 629         * xgate-dis.c (read_memory, print_insn, print_insn_xgate):
 630         New functions.
 631         * configure.in: Recognize xgate.
 632         * xgate-dis.c, xgate-opc.c: New files for support of xgate
 633         * Makefile.am (CFILES, ALL_MACHINES): New files for disassembly
 634         and opcode generation for xgate.
 635
 636 2012-04-30  DJ Delorie  <dj@redhat.com>
 637
 638         * rx-decode.opc (MOV): Do not sign-extend immediates which are
 639         already the maximum bit size.
 640         * rx-decode.c: Regenerate.
 641
 642 2012-04-27  David S. Miller  <davem@davemloft.net>
 643
 644         * sparc-dis.c (v9a_asr_reg_names): Add 'cfr'.
 645         * sparc-opc.c (sparc_opcodes): Add rd/wr cases for %cfr.
 646
 647         * sparc-opc.c (sparc_opcodes): Add 'wr X, %pause' and 'pause'.
 648         * sparc-dis.c (v9a_asr_reg_names): Add 'pause'.
 649
 650         * sparc-opc.c (CBCOND): New define.
 651         (CBCOND_XCC): Likewise.
 652         (cbcond): New helper macro.
 653         (sparc_opcodes): Add compare-and-branch instructions.
 654
 655         * sparc-dis.c (print_insn_sparc): Handle ')'.
 656         * sparc-opc.c (sparc_opcodes): Add crypto instructions.
 657
 658         * sparc-opc.c (sparc_opcodes): Rework table to put HWCAP values
 659         into new struct sparc_opcode 'hwcaps' field instead of 'flags'.
 660
 661 2012-04-12  David S. Miller  <davem@davemloft.net>
 662
 663         * sparc-dis.c (X_DISP10): Define.
 664         (print_insn_sparc): Handle '='.
 665
 666 2012-04-01  Mike Frysinger  <vapier@gentoo.org>
 667
 668         * bfin-dis.c (fmtconst): Replace decimal handling with a single
 669         sprintf call and the '*' field width.
 670
 671 2012-03-23  Maxim Kuvyrkov  <maxim@codesourcery.com>
 672
 673         * mips-dis.c (mips_arch_choices): Add entry for Broadcom XLP.
 674
 675 2012-03-16  Alan Modra  <amodra@gmail.com>
 676
 677         * ppc-dis.c (PPC_OPC_SEGS, PPC_OP_TO_SEG): Delete.
 678         (powerpc_opcd_indices): Bump array size.
 679         (disassemble_init_powerpc): Set powerpc_opcd_indices entries
 680         corresponding to unused opcodes to following entry.
 681         (lookup_powerpc): New function, extracted and optimised from..
 682         (print_insn_powerpc): ..here.
 683
 684 2012-03-15  Alan Modra  <amodra@gmail.com>
 685             James Lemke  <jwlemke@codesourcery.com>
 686
 687         * disassemble.c (disassemble_init_for_target): Handle ppc init.
 688         * ppc-dis.c (private): New var.
 689         (powerpc_init_dialect): Don't return calloc failure, instead use
 690         private.
 691         (PPC_OPCD_SEGS, PPC_OP_TO_SEG): Define.
 692         (powerpc_opcd_indices): New array.
 693         (disassemble_init_powerpc): New function.
 694         (print_insn_big_powerpc): Don't init dialect here.
 695         (print_insn_little_powerpc): Likewise.
 696         (print_insn_powerpc): Start search using powerpc_opcd_indices.
 697
 698 2012-03-10  Edmar Wienskoski  <edmar@freescale.com>
 699
 700         * ppc-dis.c (ppc_opts): Add entries for "e5500" and "e6500".
 701         * ppc-opc.c (insert_ls, TMR, ESYNC, XSYNCLE_MASK): New.
 702         (PPCVEC2, PPCTMR, E6500): New short names.
 703         (powerpc_opcodes): Add vabsdub, vabsduh, vabsduw, dni, mvidsplt,
 704         mviwsplt, icblq., mftmr, mttmr, dcblq., miso, lvexbx, lvexhx,
 705         lvexwx, stvexbx, stvexhx, stvexwx, lvepx, lvepxl, stvepx, stvepxl,
 706         lvtrx, lvtrxl, lvtlx, lvtlxl, stvfrx, stvfrxl, stvflx, stvflxl,
 707         lvswx, lvswxl, stvswx, stvswxl, lvsm mnemonics. Accept LS, ESYNC
 708         optional operands on sync instruction for E6500 target.
 709
 710 2012-03-08  Andreas Krebbel  <Andreas.Krebbel@de.ibm.com>
 711
 712         * s390-opc.txt: Set instruction type of pku to SS_L2RDRD.
 713
 714 2012-02-27  Alan Modra  <amodra@gmail.com>
 715
 716         * mt-dis.c: Regenerate.
 717
 718 2012-02-27  Alan Modra  <amodra@gmail.com>
 719
 720         * v850-opc.c (extract_v8): Rearrange to make it obvious this
 721         is the inverse of corresponding insert function.
 722         (extract_d22, extract_u9, extract_r4): Likewise.
 723         (extract_d9): Correct sign extension.
 724         (extract_d16_15): Don't assume "long" is 32 bits, and don't
 725         rely on implementation defined behaviour for shift right of
 726         signed types.
 727         (extract_d16_16, extract_d17_16, extract_i9): Likewise.
 728         (extract_d23): Likewise, and correct mask.
 729
 730 2012-02-27  Alan Modra  <amodra@gmail.com>
 731
 732         * crx-dis.c (print_arg): Mask constant to 32 bits.
 733         * crx-opc.c (cst4_map): Use int array.
 734
 735 2012-02-27  Alan Modra  <amodra@gmail.com>
 736
 737         * arc-dis.c (BITS): Don't use shifts to mask off bits.
 738         (FIELDD): Sign extend with xor,sub.
 739
 740 2012-02-25  Walter Lee  <walt@tilera.com>
 741
 742         * tilegx-opc.c: Handle TILEGX_OPC_LD4S_TLS and TILEGX_OPC_LD_TLS.
 743         * tilepro-opc.c: Handle TILEPRO_OPC_LW_TLS and
 744         TILEPRO_OPC_LW_TLS_SN.
 745
 746 2012-02-21  H.J. Lu  <hongjiu.lu@intel.com>
 747
 748         * i386-opc.h (HLEPrefixNone): New.
 749         (HLEPrefixLock): Likewise.
 750         (HLEPrefixAny): Likewise.
 751         (HLEPrefixRelease): Likewise.
 752
 753 2012-02-08  H.J. Lu  <hongjiu.lu@intel.com>
 754
 755         * i386-dis.c (HLE_Fixup1): New.
 756         (HLE_Fixup2): Likewise.
 757         (HLE_Fixup3): Likewise.
 758         (Ebh1): Likewise.
 759         (Evh1): Likewise.
 760         (Ebh2): Likewise.
 761         (Evh2): Likewise.
 762         (Ebh3): Likewise.
 763         (Evh3): Likewise.
 764         (MOD_C6_REG_7): Likewise.
 765         (MOD_C7_REG_7): Likewise.
 766         (RM_C6_REG_7): Likewise.
 767         (RM_C7_REG_7): Likewise.
 768         (XACQUIRE_PREFIX): Likewise.
 769         (XRELEASE_PREFIX): Likewise.
 770         (dis386): Use Ebh1/Evh1 on add, adc, and, btc, btr, bts,
 771         cmpxchg, dec, inc, neg, not, or, sbb, sub, xor and xadd. Use
 772         Ebh2/Evh2 on xchg.  Use Ebh3/Evh3 on mov.
 773         (reg_table): Use Ebh1/Evh1 on add, adc, and, dec, inc, neg,
 774         not, or, sbb, sub and xor.  Use Ebh3/Evh3 on mov.  Use
 775         MOD_C6_REG_7 and MOD_C7_REG_7.
 776         (mod_table): Add MOD_C6_REG_7 and MOD_C7_REG_7.
 777         (rm_table): Add RM_C6_REG_7 and RM_C7_REG_7.  Add xend and
 778         xtest.
 779         (prefix_name): Handle XACQUIRE_PREFIX and XRELEASE_PREFIX.
 780         (CMPXCHG8B_Fixup): Handle HLE prefix on cmpxchg8b.
 781
 782         * i386-gen.c (cpu_flag_init): Add CPU_HLE_FLAGS and
 783         CPU_RTM_FLAGS.
 784         (cpu_flags): Add CpuHLE and CpuRTM.
 785         (opcode_modifiers): Add HLEPrefixOk.
 786
 787         * i386-opc.h (CpuHLE): New.
 788         (CpuRTM): Likewise.
 789         (HLEPrefixOk): Likewise.
 790         (i386_cpu_flags): Add cpuhle and cpurtm.
 791         (i386_opcode_modifier): Add hleprefixok.
 792
 793         * i386-opc.tbl: Add HLEPrefixOk=3 to mov.  Add HLEPrefixOk to
 794         add, adc, and, btc, btr, bts, cmpxchg, dec, inc, neg, not, or,
 795         sbb, sub, xor and xadd.  Add HLEPrefixOk=2 to xchg with memory
 796         operand.  Add xacquire, xrelease, xabort, xbegin, xend and
 797         xtest.
 798         * i386-init.h: Regenerated.
 799         * i386-tbl.h: Likewise.
 800
 801 2012-01-24  DJ Delorie  <dj@redhat.com>
 802
 803         * rl78-decode.opc (rl78_decode_opcode): Add NOT1.
 804         * rl78-decode.c: Regenerate.
 805
 806 2012-01-17  James Murray  <jsm@jsm-net.demon.co.uk>
 807
 808         PR binutils/10173
 809         * cr16-dis.c (print_arg): Test symtab_size not num_symbols.
 810
 811 2012-01-17  Andreas Schwab  <schwab@linux-m68k.org>
 812
 813         * m68k-opc.c (m68k_opcodes): Fix entries for pmove with BADx/BACx
 814         register and move them after pmove with PSR/PCSR register.
 815
 816 2012-01-13  H.J. Lu  <hongjiu.lu@intel.com>
 817
 818         * i386-dis.c (mod_table): Add vmfunc.
 819
 820         * i386-gen.c (cpu_flag_init): Add CPU_VMFUNC_FLAGS.
 821         (cpu_flags): CpuVMFUNC.
 822
 823         * i386-opc.h (CpuVMFUNC): New.
 824         (i386_cpu_flags): Add cpuvmfunc.
 825
 826         * i386-opc.tbl: Add vmfunc.
 827         * i386-init.h: Regenerated.
 828         * i386-tbl.h: Likewise.
 829
 830 For older changes see ChangeLog-2011
 831 \f
 832 Local Variables:
 833 mode: change-log
 834 left-margin: 8
 835 fill-column: 74
 836 version-control: never
 837 End: