1 2005-09-30 Nick Clifton <nickc@redhat.com>
3 * po/ga.po: New Irish translation.
4 * configure.in (ALL_LINGUAS): Add "ga".
5 * configure: Regenerate.
7 2005-09-30 H.J. Lu <hongjiu.lu@intel.com>
9 * Makefile.am: Run "make dep-am".
10 * Makefile.in: Regenerated.
11 * aclocal.m4: Likewise.
12 * configure: Likewise.
14 2005-09-30 Catherine Moore <clm@cm00re.com>
16 * Makefile.am: Bfin support.
17 * Makefile.in: Regenerated.
18 * aclocal.m4: Regenerated.
19 * bfin-dis.c: New file.
20 * configure.in: Bfin support.
21 * configure: Regenerated.
22 * disassemble.c (ARCH_bfin): Define.
23 (disassembler): Add case for bfd_arch_bfin.
25 2005-09-28 Jan Beulich <jbeulich@novell.com>
27 * i386-dis.c (stack_v_mode): Renamed from branch_v_mode.
30 (Ob64, Ov64): Rename to Ob, Ov. Delete unused original definitions.
31 (dis386): Document and use new 'V' meta character. Use it for
32 single-byte push/pop opcode forms. Use stackEv for mod-r/m push/pop
33 opcode forms. Correct typo in 'pop ss'. Replace Ob64/Ov64 by Ob/Ov.
34 (putop): 'q' suffix for 'T' and 'U' meta depends on DFLAG. Mark
35 data prefix as used whenever DFLAG was examined. Handle 'V'.
36 (intel_operand_size): Use stack_v_mode.
37 (OP_E): Use stack_v_mode, but handle only the special case of
38 64-bit mode without operand size override here; fall through to
39 v_mode case otherwise.
40 (OP_REG): Special case rAX_reg ... rDI_reg only when 64-bit mode
41 and no operand size override is present.
42 (OP_J): Use get32s for obtaining the displacement also when rex64
45 2005-09-08 Paul Brook <paul@codesourcery.com>
47 * arm-dis.c (arm_opcodes, thumb32_opcodes): Rename smi to smc.
49 2005-09-06 Chao-ying Fu <fu@mips.com>
51 * mips-opc.c (MT32): New define.
52 (mips_builtin_opcodes): Move "bc0f", "bc0fl", "bc0t", "bc0tl" to the
53 bottom to avoid opcode collision with "mftr" and "mttr".
55 * mips-dis.c (mips_arch_choices): Enable INSN_MT for mips32r2.
56 (print_insn_args): Add supports for +t, +T, !, $, *, &, g operand
59 2005-09-02 Paul Brook <paul@codesourcery.com>
61 * arm-dis.c (coprocessor_opcodes): Add null terminator.
63 2005-09-02 Paul Brook <paul@codesourcery.com>
65 * arm-dis.c (coprocessor_opcodes): New.
66 (arm_opcodes, thumb32_opcodes): Remove coprocessor insns.
67 (print_insn_coprocessor): New function.
68 (print_insn_arm): Use print_insn_coprocessor. Remove coprocessor
70 (print_insn_thumb32): Use print_insn_coprocessor.
72 2005-08-30 Paul Brook <paul@codesourcery.com>
74 * arm-dis.c (thumb_opcodes): Disassemble sub(3) as subs.
76 2005-08-26 Jan Beulich <jbeulich@novell.com>
78 * i386-dis.c (intel_operand_size): New, broken out from OP_E for
80 (OP_E): Call intel_operand_size, move call site out of mode
82 (OP_OFF): Call intel_operand_size if suffix_always. Remove
83 ATTRIBUTE_UNUSED from parameters.
85 (OP_ESreg): Call intel_operand_size.
87 (OP_DIR): Use colon rather than semicolon as separator of far
90 2005-08-25 Chao-ying Fu <fu@mips.com>
92 * mips-opc.c (WR_a, RD_a, MOD_a, DSP_VOLA, D32): New define.
93 (mips_builtin_opcodes): Add DSP instructions.
94 * mips-dis.c (mips_arch_choices): Enable INSN_DSP for mips32, mips32r2,
96 (print_insn_args): Add supports for 3, 4, 5, 6, 7, 8, 9, 0, :, ', @
99 2005-08-23 David Ung <davidu@mips.com>
101 * mips16-opc.c (mips16_opcodes): Add the MIPS16e jalrc/jrc
102 instructions to the table.
104 2005-08-18 Alan Modra <amodra@bigpond.net.au>
106 * a29k-dis.c: Delete.
107 * Makefile.am: Remove a29k support.
108 * configure.in: Likewise.
109 * disassemble.c: Likewise.
110 * Makefile.in: Regenerate.
111 * configure: Regenerate.
112 * po/POTFILES.in: Regenerate.
114 2005-08-15 Daniel Jacobowitz <dan@codesourcery.com>
116 * ppc-dis.c (powerpc_dialect): Handle e300.
117 (print_ppc_disassembler_options): Likewise.
118 * ppc-opc.c (PPCE300): Define.
119 (powerpc_opcodes): Mark icbt as available for the e300.
121 2005-08-13 John David Anglin <dave.anglin@nrc-cnrc.gc.ca>
123 * hppa-dis.c (print_insn_hppa): Don't print '%' before register names.
124 Use "rp" instead of "%r2" in "b,l" insns.
126 2005-08-12 Martin Schwidefsky <schwidefsky@de.ibm.com>
128 * s390-dis.c (print_insn_s390): Print unsigned operands with %u.
129 * s390-mkopc.c (s390_opcode_cpu_val): Add support for cpu type z9-109.
131 * s390-opc.c (I32_16, U32_16, M_16): Add defines 32 bit immediates
132 and 4 bit optional masks.
133 (INSTR_RIL_RI, INSTR_RIL_RU, INSTR_RRF_M0RR, INSTR_RSE_CCRD,
134 INSTR_RSY_CCRD, INSTR_SSF_RRDRD): Add new instruction formats.
135 (MASK_RIL_RI, MASK_RIL_RU, MASK_RRF_M0RR, MASK_RSE_CCRD,
136 MASK_RSY_CCRD, MASK_SSF_RRDRD): Likewise.
137 (s390_opformats): Likewise.
138 * s390-opc.txt: Add new instructions for cpu type z9-109.
140 2005-08-05 John David Anglin <dave.anglin@nrc-crnc.gc.ca>
142 * hppa-dis.c (print_insn_hppa): Prefix 21-bit values with "L%".
144 2005-07-29 Paul Brook <paul@codesourcery.com>
146 * arm-dis.c: Fix disassebly of thumb2 writeback addressing modes.
148 2005-07-29 Paul Brook <paul@codesourcery.com>
150 * arm-dis.c (thumb32_opc): Fix addressing mode for tbh.
151 (print_insn_thumb32): Fix decoding of thumb2 'I' operands.
153 2005-07-25 DJ Delorie <dj@redhat.com>
155 * m32c-asm.c Regenerate.
156 * m32c-dis.c Regenerate.
158 2005-07-20 DJ Delorie <dj@redhat.com>
160 * disassemble.c (disassemble_init_for_target): M32C ISAs are
161 enums, so convert them to bit masks, which attributes are.
163 2005-07-18 Nick Clifton <nickc@redhat.com>
165 * configure.in: Restore alpha ordering to list of arches.
166 * configure: Regenerate.
167 * disassemble.c: Restore alpha ordering to list of arches.
169 2005-07-18 Nick Clifton <nickc@redhat.com>
171 * m32c-asm.c: Regenerate.
172 * m32c-desc.c: Regenerate.
173 * m32c-desc.h: Regenerate.
174 * m32c-dis.c: Regenerate.
175 * m32c-ibld.h: Regenerate.
176 * m32c-opc.c: Regenerate.
177 * m32c-opc.h: Regenerate.
179 2005-07-18 H.J. Lu <hongjiu.lu@intel.com>
181 * i386-dis.c (PNI_Fixup): Update comment.
182 (VMX_Fixup): Properly handle the suffix check.
184 2005-07-16 John David Anglin <dave.anglin@nrc-cnrc.gc.ca>
186 * hppa-dis.c (print_insn_hppa): Add space after 'w' in wide-mode
189 2005-07-16 Alan Modra <amodra@bigpond.net.au>
191 * Makefile.am: Run "make dep-am".
192 (stamp-m32c): Fix cpu dependencies.
193 * Makefile.in: Regenerate.
194 * ip2k-dis.c: Regenerate.
196 2007-07-15 H.J. Lu <hongjiu.lu@intel.com>
198 * i386-dis.c (OP_VMX): New. Handle Intel VMX Instructions.
199 (VMX_Fixup): New. Fix up Intel VMX Instructions.
203 (dis386_twobyte): Updated entries 0x78 and 0x79.
204 (twobyte_has_modrm): Likewise.
205 (grps): Use OP_VMX in the "sgdtIQ" entry. Updated GRP9.
206 (OP_G): Handle m_mode.
208 2005-07-14 Jim Blandy <jimb@redhat.com>
210 Add support for the Renesas M32C and M16C.
211 * m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c: New.
212 * m32c-desc.h, m32c-opc.h: New.
213 * Makefile.am (HFILES): List m32c-desc.h and m32c-opc.h.
214 (CFILES): List m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c,
216 (ALL_MACHINES): List m32c-asm.lo, m32c-desc.lo, m32c-dis.lo,
217 m32c-ibld.lo, m32c-opc.lo.
218 (CLEANFILES): List stamp-m32c.
219 (M32C_DEPS): List stamp-m32c, if CGEN_MAINT.
220 (CGEN_CPUS): Add m32c.
221 (m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c)
222 (m32c-desc.h, m32c-opc.h): Depend on M32C_DEPS.
223 (m32c_opc_h): New variable.
224 (stamp-m32c, m32c-asm.lo, m32c-desc.lo, m32c-dis.lo, m32c-ibld.lo)
225 (m32c-opc.lo): New rules.
226 * Makefile.in: Regenerated.
227 * configure.in: Add case for bfd_m32c_arch.
228 * configure: Regenerated.
229 * disassemble.c (ARCH_m32c): New.
230 [ARCH_m32c]: #include "m32c-desc.h".
231 (disassembler) [ARCH_m32c]: Add case for bfd_arch_m32c.
232 (disassemble_init_for_target) [ARCH_m32c]: Same.
234 * cgen-ops.h, cgen-types.h: New files.
235 * Makefile.am (HFILES): List them.
236 * Makefile.in: Regenerated.
238 2005-07-07 Kaveh R. Ghazi <ghazi@caip.rutgers.edu>
240 * arc-dis.c, arm-dis.c, cris-dis.c, crx-dis.c, d10v-dis.c,
241 d30v-dis.c, fr30-dis.c, h8300-dis.c, h8500-dis.c, i860-dis.c,
242 ia64-dis.c, ip2k-dis.c, m10200-dis.c, m10300-dis.c,
243 m88k-dis.c, mcore-dis.c, mips-dis.c, ms1-dis.c, or32-dis.c,
244 ppc-dis.c, sh64-dis.c, sparc-dis.c, tic4x-dis.c, tic80-dis.c,
245 v850-dis.c: Fix format bugs.
246 * ia64-gen.c (fail, warn): Add format attribute.
247 * or32-opc.c (debug): Likewise.
249 2005-07-07 Khem Raj <kraj@mvista.com>
251 * arm-dis.c (opcode32 arm_opcodes): Fix ARM VFP fadds instruction
254 2005-07-06 Alan Modra <amodra@bigpond.net.au>
256 * Makefile.am (stamp-m32r): Fix path to cpu files.
257 (stamp-m32r, stamp-iq2000): Likewise.
258 * Makefile.in: Regenerate.
259 * m32r-asm.c: Regenerate.
260 * po/POTFILES.in: Remove arm-opc.h. Add ms1-asm.c, ms1-desc.c,
261 ms1-desc.h, ms1-dis.c, ms1-ibld.c, ms1-opc.c, ms1-opc.h.
263 2005-07-05 Nick Clifton <nickc@redhat.com>
265 * iq2000-asm.c: Regenerate.
266 * ms1-asm.c: Regenerate.
268 2005-07-05 Jan Beulich <jbeulich@novell.com>
270 * i386-dis.c (SVME_Fixup): New.
271 (grps): Use it for the lidt entry.
272 (PNI_Fixup): Call OP_M rather than OP_E.
273 (INVLPG_Fixup): Likewise.
275 2005-07-04 H.J. Lu <hongjiu.lu@intel.com>
277 * tic30-dis.c (cnvt_tmsfloat_ieee): Use HUGE_VALF if defined.
279 2005-07-01 Nick Clifton <nickc@redhat.com>
281 * a29k-dis.c: Update to ISO C90 style function declarations and
283 * alpha-opc.c: Likewise.
284 * arc-dis.c: Likewise.
285 * arc-opc.c: Likewise.
286 * avr-dis.c: Likewise.
287 * cgen-asm.in: Likewise.
288 * cgen-dis.in: Likewise.
289 * cgen-ibld.in: Likewise.
290 * cgen-opc.c: Likewise.
291 * cris-dis.c: Likewise.
292 * d10v-dis.c: Likewise.
293 * d30v-dis.c: Likewise.
294 * d30v-opc.c: Likewise.
295 * dis-buf.c: Likewise.
296 * dlx-dis.c: Likewise.
297 * h8300-dis.c: Likewise.
298 * h8500-dis.c: Likewise.
299 * hppa-dis.c: Likewise.
300 * i370-dis.c: Likewise.
301 * i370-opc.c: Likewise.
302 * m10200-dis.c: Likewise.
303 * m10300-dis.c: Likewise.
304 * m68k-dis.c: Likewise.
305 * m88k-dis.c: Likewise.
306 * mips-dis.c: Likewise.
307 * mmix-dis.c: Likewise.
308 * msp430-dis.c: Likewise.
309 * ns32k-dis.c: Likewise.
310 * or32-dis.c: Likewise.
311 * or32-opc.c: Likewise.
312 * pdp11-dis.c: Likewise.
313 * pj-dis.c: Likewise.
314 * s390-dis.c: Likewise.
315 * sh-dis.c: Likewise.
316 * sh64-dis.c: Likewise.
317 * sparc-dis.c: Likewise.
318 * sparc-opc.c: Likewise.
319 * sysdep.h: Likewise.
320 * tic30-dis.c: Likewise.
321 * tic4x-dis.c: Likewise.
322 * tic80-dis.c: Likewise.
323 * v850-dis.c: Likewise.
324 * v850-opc.c: Likewise.
325 * vax-dis.c: Likewise.
326 * w65-dis.c: Likewise.
327 * z8kgen.c: Likewise.
329 * fr30-*: Regenerate.
331 * ip2k-*: Regenerate.
332 * iq2000-*: Regenerate.
333 * m32r-*: Regenerate.
335 * openrisc-*: Regenerate.
336 * xstormy16-*: Regenerate.
338 2005-06-23 Ben Elliston <bje@gnu.org>
340 * m68k-dis.c: Use ISC C90.
341 * m68k-opc.c: Formatting fixes.
343 2005-06-16 David Ung <davidu@mips.com>
345 * mips16-opc.c (mips16_opcodes): Add the following MIPS16e
346 instructions to the table; seb/seh/sew/zeb/zeh/zew.
348 2005-06-15 Dave Brolley <brolley@redhat.com>
350 Contribute Morpho ms1 on behalf of Red Hat
351 * ms1-asm.c, ms1-desc.c, ms1-dis.c, ms1-ibld.c, ms1-opc.c,
352 ms1-opc.h: New files, Morpho ms1 target.
354 2004-05-14 Stan Cox <scox@redhat.com>
356 * disassemble.c (ARCH_ms1): Define.
357 (disassembler): Handle bfd_arch_ms1
359 2004-05-13 Michael Snyder <msnyder@redhat.com>
361 * Makefile.am, Makefile.in: Add ms1 target.
362 * configure.in: Ditto.
364 2005-06-08 Zack Weinberg <zack@codesourcery.com>
366 * arm-opc.h: Delete; fold contents into ...
367 * arm-dis.c: ... here. Move includes of internal COFF headers
368 next to includes of internal ELF headers.
369 (streq, WORD_ADDRESS, BDISP, BDISP23): Delete, unused.
370 (struct arm_opcode): Rename struct opcode32. Make 'assembler' const.
371 (struct thumb_opcode): Rename struct opcode16. Make 'assembler' const.
372 (arm_conditional, arm_fp_const, arm_shift, arm_regname, regnames)
373 (iwmmxt_wwnames, iwmmxt_wwssnames):
375 (regnames): Remove iWMMXt coprocessor register sets.
376 (iwmmxt_regnames, iwmmxt_cregnames): New statics.
377 (get_arm_regnames): Adjust fourth argument to match above changes.
378 (set_iwmmxt_regnames): Delete.
379 (print_insn_arm): Constify 'c'. Use ISO syntax for function
380 pointer calls. Expand sole use of BDISP. Use iwmmxt_regnames
381 and iwmmxt_cregnames, not set_iwmmxt_regnames.
382 (print_insn_thumb16, print_insn_thumb32): Constify 'c'. Use
383 ISO syntax for function pointer calls.
385 2005-06-07 Zack Weinberg <zack@codesourcery.com>
387 * arm-dis.c: Split up the comments describing the format codes, so
388 that the ARM and 16-bit Thumb opcode tables each have comments
389 preceding them that describe all the codes, and only the codes,
390 valid in those tables. (32-bit Thumb table is already like this.)
391 Reorder the lists in all three comments to match the order in
392 which the codes are implemented.
393 Remove all forward declarations of static functions. Convert all
394 function definitions to ISO C format.
395 (print_insn_arm, print_insn_thumb16, print_insn_thumb32):
397 (print_insn_thumb16): Remove unused case 'I'.
398 (print_insn): Update for changed calling convention of subroutines.
400 2005-05-25 Jan Beulich <jbeulich@novell.com>
402 * i386-dis.c (OP_E): In Intel mode, display 32-bit displacements in
403 hex (but retain it being displayed as signed). Remove redundant
404 checks. Add handling of displacements for 16-bit addressing in Intel
407 2005-05-25 Jan Beulich <jbeulich@novell.com>
409 * i386-dis.c (prefix_name): Remove pointless mode_64bit check.
410 (OP_E): Remove redundant REX_EXTZ handling. Remove pointless
411 masking of 'rm' in 16-bit memory address handling.
413 2005-05-19 Anton Blanchard <anton@samba.org>
415 * ppc-dis.c (powerpc_dialect): Handle "-Mpower5".
416 (print_ppc_disassembler_options): Document it.
417 * ppc-opc.c (SVC_LEV): Define.
418 (LEV): Allow optional operand.
420 (powerpc_opcodes): Extend "sc". Adjust "svc" and "svcl". Add
421 "hrfid", "popcntb", "fsqrtes", "fsqrtes.", "fre" and "fre.".
423 2005-05-19 Kelley Cook <kcook@gcc.gnu.org>
425 * Makefile.in: Regenerate.
427 2005-05-17 Zack Weinberg <zack@codesourcery.com>
429 * arm-dis.c (thumb_opcodes): Add disassembly for V6T2 16-bit
430 instructions. Adjust disassembly of some opcodes to match
432 (thumb32_opcodes): New table.
433 (print_insn_thumb): Rename print_insn_thumb16; don't handle
434 two-halfword branches here.
435 (print_insn_thumb32): New function.
436 (print_insn): Choose among print_insn_arm, print_insn_thumb16,
437 and print_insn_thumb32. Be consistent about order of
438 halfwords when printing 32-bit instructions.
440 2005-05-07 H.J. Lu <hongjiu.lu@intel.com>
443 * i386-dis.c (branch_v_mode): New.
444 (indirEv): Use branch_v_mode instead of v_mode.
445 (OP_E): Handle branch_v_mode.
447 2005-05-07 H.J. Lu <hongjiu.lu@intel.com>
449 * d10v-dis.c (dis_2_short): Support 64bit host.
451 2005-05-07 Nick Clifton <nickc@redhat.com>
453 * po/nl.po: Updated translation.
455 2005-05-07 Nick Clifton <nickc@redhat.com>
457 * Update the address and phone number of the FSF organization in
458 the GPL notices in the following files:
459 a29k-dis.c, aclocal.m4, alpha-dis.c, alpha-opc.c, arc-dis.c,
460 arc-dis.h, arc-ext.c, arc-ext.h, arc-opc.c, arm-dis.c, arm-opc.h,
461 avr-dis.c, cgen-asm.c, cgen-asm.in, cgen-dis.c, cgen-dis.in,
462 cgen-ibld.in, cgen-opc.c, cgen.sh, cris-dis.c, cris-opc.c,
463 crx-dis.c, crx-opc.c, d10v-dis.c, d10v-opc.c, d30v-dis.c,
464 d30v-opc.c, dis-buf.c, dis-init.c, disassemble.c, dlx-dis.c,
465 fr30-asm.c, fr30-desc.c, fr30-desc.h, fr30-dis.c, fr30-ibld.c,
466 fr30-opc.c, fr30-opc.h, frv-asm.c, frv-desc.c, frv-desc.h,
467 frv-dis.c, frv-ibld.c, frv-opc.c, frv-opc.h, h8300-dis.c,
468 h8500-dis.c, h8500-opc.h, hppa-dis.c, i370-dis.c, i370-opc.c,
469 i386-dis.c, i860-dis.c, i960-dis.c, ia64-asmtab.h, ia64-dis.c,
470 ia64-gen.c, ia64-opc-a.c, ia64-opc-b.c, ia64-opc-d.c,
471 ia64-opc-f.c, ia64-opc-i.c, ia64-opc-m.c, ia64-opc-x.c,
472 ia64-opc.c, ia64-opc.h, ip2k-asm.c, ip2k-desc.c, ip2k-desc.h,
473 ip2k-dis.c, ip2k-ibld.c, ip2k-opc.c, ip2k-opc.h, iq2000-asm.c,
474 iq2000-desc.c, iq2000-desc.h, iq2000-dis.c, iq2000-ibld.c,
475 iq2000-opc.c, iq2000-opc.h, m10200-dis.c, m10200-opc.c,
476 m10300-dis.c, m10300-opc.c, m32r-asm.c, m32r-desc.c, m32r-desc.h,
477 m32r-dis.c, m32r-ibld.c, m32r-opc.c, m32r-opc.h, m32r-opinst.c,
478 m68hc11-dis.c, m68hc11-opc.c, m68k-dis.c, m68k-opc.c, m88k-dis.c,
479 maxq-dis.c, mcore-dis.c, mcore-opc.h, mips-dis.c, mips-opc.c,
480 mips16-opc.c, mmix-dis.c, mmix-opc.c, msp430-dis.c, ns32k-dis.c,
481 openrisc-asm.c, openrisc-desc.c, openrisc-desc.h, openrisc-dis.c,
482 openrisc-ibld.c, openrisc-opc.c, openrisc-opc.h, opintl.h,
483 or32-dis.c, or32-opc.c, pdp11-dis.c, pdp11-opc.c, pj-dis.c,
484 pj-opc.c, ppc-dis.c, ppc-opc.c, s390-dis.c, s390-mkopc.c,
485 s390-opc.c, sh-dis.c, sh-opc.h, sh64-dis.c, sh64-opc.c,
486 sh64-opc.h, sparc-dis.c, sparc-opc.c, sysdep.h, tic30-dis.c,
487 tic4x-dis.c, tic54x-dis.c, tic54x-opc.c, tic80-dis.c, tic80-opc.c,
488 v850-dis.c, v850-opc.c, vax-dis.c, w65-dis.c, w65-opc.h,
489 xstormy16-asm.c, xstormy16-desc.c, xstormy16-desc.h,
490 xstormy16-dis.c, xstormy16-ibld.c, xstormy16-opc.c,
491 xstormy16-opc.h, xtensa-dis.c, z8k-dis.c, z8kgen.c
493 2005-05-05 James E Wilson <wilson@specifixinc.com>
495 * ia64-opc.c: Include sysdep.h before libiberty.h.
497 2005-05-05 Nick Clifton <nickc@redhat.com>
499 * configure.in (ALL_LINGUAS): Add vi.
500 * configure: Regenerate.
503 2005-04-26 Jerome Guitton <guitton@gnat.com>
505 * configure.in: Fix the check for basename declaration.
506 * configure: Regenerate.
508 2005-04-19 Alan Modra <amodra@bigpond.net.au>
510 * ppc-opc.c (RTO): Define.
511 (powerpc_opcodes <tlbsx, tlbsx., tlbre>): Combine PPC403 and BOOKE
512 entries to suit PPC440.
514 2005-04-18 Mark Kettenis <kettenis@gnu.org>
516 * i386-dis.c: Insert hyphens into selected VIA PadLock extensions.
519 2005-04-14 Nick Clifton <nickc@redhat.com>
521 * po/fi.po: New translation: Finnish.
522 * configure.in (ALL_LINGUAS): Add fi.
523 * configure: Regenerate.
525 2005-04-14 Alan Modra <amodra@bigpond.net.au>
527 * Makefile.am (NO_WERROR): Define.
528 * configure.in: Invoke AM_BINUTILS_WARNINGS.
529 * Makefile.in: Regenerate.
530 * aclocal.m4: Regenerate.
531 * configure: Regenerate.
533 2005-04-04 Nick Clifton <nickc@redhat.com>
535 * fr30-asm.c: Regenerate.
536 * frv-asm.c: Regenerate.
537 * iq2000-asm.c: Regenerate.
538 * m32r-asm.c: Regenerate.
539 * openrisc-asm.c: Regenerate.
541 2005-04-01 Jan Beulich <jbeulich@novell.com>
543 * i386-dis.c (PNI_Fixup): Neither mwait nor monitor have any
544 visible operands in Intel mode. The first operand of monitor is
547 2005-04-01 Jan Beulich <jbeulich@novell.com>
549 * i386-dis.c (INVLPG_Fixup): Decode rdtscp; change code to allow for
550 easier future additions.
552 2005-03-31 Jerome Guitton <guitton@gnat.com>
554 * configure.in: Check for basename.
555 * configure: Regenerate.
558 2005-03-29 H.J. Lu <hongjiu.lu@intel.com>
560 * i386-dis.c (SEG_Fixup): New.
562 (dis386): Use "Sv" for 0x8c and 0x8e.
564 2005-03-21 Jan-Benedict Glaw <jbglaw@lug-owl.de>
565 Nick Clifton <nickc@redhat.com>
567 * vax-dis.c: (entry_addr): New varible: An array of user supplied
568 function entry mask addresses.
569 (entry_addr_occupied_slots): New variable: The number of occupied
570 elements in entry_addr.
571 (entry_addr_total_slots): New variable: The total number of
572 elements in entry_addr.
573 (parse_disassembler_options): New function. Fills in the entry_addr
575 (free_entry_array): New function. Release the memory used by the
576 entry addr array. Suppressed because there is no way to call it.
577 (is_function_entry): Check if a given address is a function's
578 start address by looking at supplied entry mask addresses and
579 symbol information, if available.
580 (print_insn_vax): Use parse_disassembler_options and is_function_entry.
582 2005-03-23 H.J. Lu <hongjiu.lu@intel.com>
584 * cris-dis.c (print_with_operands): Use ~31L for long instead
587 2005-03-20 H.J. Lu <hongjiu.lu@intel.com>
589 * mmix-opc.c (O): Revert the last change.
592 2005-03-19 H.J. Lu <hongjiu.lu@intel.com>
594 * mmix-opc.c (O): Use 24UL instead of 24 for unsigned long.
597 2005-03-19 Hans-Peter Nilsson <hp@bitrange.com>
599 * mmix-opc.c (O, Z): Force expression as unsigned long.
601 2005-03-18 Nick Clifton <nickc@redhat.com>
603 * ip2k-asm.c: Regenerate.
604 * op/opcodes.pot: Regenerate.
606 2005-03-16 Nick Clifton <nickc@redhat.com>
607 Ben Elliston <bje@au.ibm.com>
609 * configure.in (werror): New switch: Add -Werror to the
610 compiler command line. Enabled by default. Disable via
612 * configure: Regenerate.
614 2005-03-16 Alan Modra <amodra@bigpond.net.au>
616 * ppc-dis.c (powerpc_dialect): Don't set PPC_OPCODE_ALTIVEC when
619 2005-03-15 Alan Modra <amodra@bigpond.net.au>
621 * po/es.po: Commit new Spanish translation.
623 * po/fr.po: Commit new French translation.
625 2005-03-14 Jan-Benedict Glaw <jbglaw@lug-owl.de>
627 * vax-dis.c: Fix spelling error
628 (print_insn_vax): Use ".word 0x0012 # Entry mask: r1 r2 >" instead
629 of just "Entry mask: < r1 ... >"
631 2005-03-12 Zack Weinberg <zack@codesourcery.com>
633 * arm-dis.c (arm_opcodes): Document %E and %V.
634 Add entries for v6T2 ARM instructions:
635 bfc bfi mls strht ldrht ldrsht ldrsbt movw movt rbit ubfx sbfx.
636 (print_insn_arm): Add support for %E and %V.
637 (thumb_opcodes): Add ARMv6K instructions nop, sev, wfe, wfi, yield.
639 2005-03-10 Jeff Baker <jbaker@qnx.com>
640 Alan Modra <amodra@bigpond.net.au>
642 * ppc-opc.c (insert_sprg, extract_sprg): New Functions.
643 (powerpc_operands <SPRG>): Call the above. Bit field is 5 bits.
645 (XSPRG_MASK): Mask off extra bits now part of sprg field.
646 (powerpc_opcodes): Asjust mfsprg and mtsprg to suit new mask. Move
647 mfsprg4..7 after msprg and consolidate.
649 2005-03-09 Jan-Benedict Glaw <jbglaw@lug-owl.de>
651 * vax-dis.c (entry_mask_bit): New array.
652 (print_insn_vax): Decode function entry mask.
654 2005-03-07 Aldy Hernandez <aldyh@redhat.com>
656 * ppc-opc.c (powerpc_opcodes): Fix encoding of efscfd.
658 2005-03-05 Alan Modra <amodra@bigpond.net.au>
660 * po/opcodes.pot: Regenerate.
662 2005-03-03 Ramana Radhakrishnan <ramana.radhakrishnan@codito.com>
664 * arc-dis.c (a4_decoding_class): New enum.
665 (dsmOneArcInst): Use the enum values for the decoding class.
666 Remove redundant case in the switch for decodingClass value 11.
668 2005-03-02 Jan Beulich <jbeulich@novell.com>
670 * i386-dis.c (print_insn): Suppress lock prefix printing for cr8...15
672 (OP_C): Consider lock prefix in non-64-bit modes.
674 2005-02-24 Alan Modra <amodra@bigpond.net.au>
676 * cris-dis.c (format_hex): Remove ineffective warning fix.
677 * crx-dis.c (make_instruction): Warning fix.
678 * frv-asm.c: Regenerate.
680 2005-02-23 Nick Clifton <nickc@redhat.com>
682 * cgen-dis.in: Use bfd_byte for buffers that are passed to
685 * ia64-opc.c (locate_opcode_ent): Initialise opval array.
687 * crx-dis.c (make_instruction): Move argument structure into inner
688 scope and ensure that all of its fields are initialised before
691 * fr30-asm.c: Regenerate.
692 * fr30-dis.c: Regenerate.
693 * frv-asm.c: Regenerate.
694 * frv-dis.c: Regenerate.
695 * ip2k-asm.c: Regenerate.
696 * ip2k-dis.c: Regenerate.
697 * iq2000-asm.c: Regenerate.
698 * iq2000-dis.c: Regenerate.
699 * m32r-asm.c: Regenerate.
700 * m32r-dis.c: Regenerate.
701 * openrisc-asm.c: Regenerate.
702 * openrisc-dis.c: Regenerate.
703 * xstormy16-asm.c: Regenerate.
704 * xstormy16-dis.c: Regenerate.
706 2005-02-22 Alan Modra <amodra@bigpond.net.au>
708 * arc-ext.c: Warning fixes.
709 * arc-ext.h: Likewise.
710 * cgen-opc.c: Likewise.
711 * ia64-gen.c: Likewise.
712 * maxq-dis.c: Likewise.
713 * ns32k-dis.c: Likewise.
714 * w65-dis.c: Likewise.
715 * ia64-asmtab.c: Regenerate.
717 2005-02-22 Alan Modra <amodra@bigpond.net.au>
719 * fr30-desc.c: Regenerate.
720 * fr30-desc.h: Regenerate.
721 * fr30-opc.c: Regenerate.
722 * fr30-opc.h: Regenerate.
723 * frv-desc.c: Regenerate.
724 * frv-desc.h: Regenerate.
725 * frv-opc.c: Regenerate.
726 * frv-opc.h: Regenerate.
727 * ip2k-desc.c: Regenerate.
728 * ip2k-desc.h: Regenerate.
729 * ip2k-opc.c: Regenerate.
730 * ip2k-opc.h: Regenerate.
731 * iq2000-desc.c: Regenerate.
732 * iq2000-desc.h: Regenerate.
733 * iq2000-opc.c: Regenerate.
734 * iq2000-opc.h: Regenerate.
735 * m32r-desc.c: Regenerate.
736 * m32r-desc.h: Regenerate.
737 * m32r-opc.c: Regenerate.
738 * m32r-opc.h: Regenerate.
739 * m32r-opinst.c: Regenerate.
740 * openrisc-desc.c: Regenerate.
741 * openrisc-desc.h: Regenerate.
742 * openrisc-opc.c: Regenerate.
743 * openrisc-opc.h: Regenerate.
744 * xstormy16-desc.c: Regenerate.
745 * xstormy16-desc.h: Regenerate.
746 * xstormy16-opc.c: Regenerate.
747 * xstormy16-opc.h: Regenerate.
749 2005-02-21 Alan Modra <amodra@bigpond.net.au>
751 * Makefile.am: Run "make dep-am"
752 * Makefile.in: Regenerate.
754 2005-02-15 Nick Clifton <nickc@redhat.com>
756 * cgen-dis.in (print_address): Add an ATTRIBUTE_UNUSED to prevent
757 compile time warnings.
758 (print_keyword): Likewise.
759 (default_print_insn): Likewise.
761 * fr30-desc.c: Regenerated.
762 * fr30-desc.h: Regenerated.
763 * fr30-dis.c: Regenerated.
764 * fr30-opc.c: Regenerated.
765 * fr30-opc.h: Regenerated.
766 * frv-desc.c: Regenerated.
767 * frv-dis.c: Regenerated.
768 * frv-opc.c: Regenerated.
769 * ip2k-asm.c: Regenerated.
770 * ip2k-desc.c: Regenerated.
771 * ip2k-desc.h: Regenerated.
772 * ip2k-dis.c: Regenerated.
773 * ip2k-opc.c: Regenerated.
774 * ip2k-opc.h: Regenerated.
775 * iq2000-desc.c: Regenerated.
776 * iq2000-dis.c: Regenerated.
777 * iq2000-opc.c: Regenerated.
778 * m32r-asm.c: Regenerated.
779 * m32r-desc.c: Regenerated.
780 * m32r-desc.h: Regenerated.
781 * m32r-dis.c: Regenerated.
782 * m32r-opc.c: Regenerated.
783 * m32r-opc.h: Regenerated.
784 * m32r-opinst.c: Regenerated.
785 * openrisc-desc.c: Regenerated.
786 * openrisc-desc.h: Regenerated.
787 * openrisc-dis.c: Regenerated.
788 * openrisc-opc.c: Regenerated.
789 * openrisc-opc.h: Regenerated.
790 * xstormy16-desc.c: Regenerated.
791 * xstormy16-desc.h: Regenerated.
792 * xstormy16-dis.c: Regenerated.
793 * xstormy16-opc.c: Regenerated.
794 * xstormy16-opc.h: Regenerated.
796 2005-02-14 H.J. Lu <hongjiu.lu@intel.com>
798 * dis-buf.c (perror_memory): Use sprintf_vma to print out
801 2005-02-11 Nick Clifton <nickc@redhat.com>
803 * iq2000-asm.c: Regenerate.
805 * frv-dis.c: Regenerate.
807 2005-02-07 Jim Blandy <jimb@redhat.com>
809 * Makefile.am (CGEN): Load guile.scm before calling the main
811 * Makefile.in: Regenerated.
812 * cgen.sh: Be prepared for the 'cgen' argument to contain spaces.
813 Simply pass the cgen-opc.scm path to ${cgen} as its first
814 argument; ${cgen} itself now contains the '-s', or whatever is
815 appropriate for the Scheme being used.
817 2005-01-31 Andrew Cagney <cagney@gnu.org>
819 * configure: Regenerate to track ../gettext.m4.
821 2005-01-31 Jan Beulich <jbeulich@novell.com>
823 * ia64-gen.c (NELEMS): Define.
824 (shrink): Generate alias with missing second predicate register when
825 opcode has two outputs and these are both predicates.
826 * ia64-opc-i.c (FULL17): Define.
827 (ia64_opcodes_i): Add mov-to-pr alias without second input. Use FULL17
828 here to generate output template.
829 (TBITCM, TNATCM): Undefine after use.
830 * ia64-opc-m.c (ia64_opcodes_i): Add alloc alias without ar.pfs as
831 first input. Add ld16 aliases without ar.csd as second output. Add
832 st16 aliases without ar.csd as second input. Add cmpxchg aliases
833 without ar.ccv as third input. Add cmp8xchg16 aliases without ar.csd/
834 ar.ccv as third/fourth inputs. Consolidate through...
835 (CMPXCHG_acq, CMPXCHG_rel, CMPXCHG_1, CMPXCHG_2, CMPXCHG_4, CMPXCHG_8,
836 CMPXCHGn, CMP8XCHG16, CMPXCHG_ALL): Define.
837 * ia64-asmtab.c: Regenerate.
839 2005-01-27 Andrew Cagney <cagney@gnu.org>
841 * configure: Regenerate to track ../gettext.m4 change.
843 2005-01-25 Alexandre Oliva <aoliva@redhat.com>
845 2004-11-10 Alexandre Oliva <aoliva@redhat.com>
846 * frv-asm.c: Rebuilt.
847 * frv-desc.c: Rebuilt.
848 * frv-desc.h: Rebuilt.
849 * frv-dis.c: Rebuilt.
850 * frv-ibld.c: Rebuilt.
851 * frv-opc.c: Rebuilt.
852 * frv-opc.h: Rebuilt.
854 2005-01-24 Andrew Cagney <cagney@gnu.org>
856 * configure: Regenerate, ../gettext.m4 was updated.
858 2005-01-21 Fred Fish <fnf@specifixinc.com>
860 * mips-opc.c: Change INSN_ALIAS to INSN2_ALIAS.
861 Change INSN_WRITE_MDMX_ACC to INSN2_WRITE_MDMX_ACC.
862 Change INSN_READ_MDMX_ACC to INSN2_READ_MDMX_ACC.
865 2005-01-20 Alan Modra <amodra@bigpond.net.au>
867 * ppc-opc.c (powerpc_opcodes): Add optional 'l' arg to tlbiel.
869 2005-01-19 Fred Fish <fnf@specifixinc.com>
871 * mips-dis.c (no_aliases): New disassembly option flag.
872 (set_default_mips_dis_options): Init no_aliases to zero.
873 (parse_mips_dis_option): Handle no-aliases option.
874 (print_insn_mips): Ignore table entries that are aliases
875 if no_aliases is set.
876 (print_insn_mips16): Ditto.
877 * mips-opc.c (mips_builtin_opcodes): Add initializer column for
878 new pinfo2 member and add INSN_ALIAS initializers as needed. Also
879 move WR_MACC and RD_MACC initializers from pinfo to pinfo2.
880 * mips16-opc.c (mips16_opcodes): Ditto.
882 2005-01-17 Andrew Stubbs <andrew.stubbs@st.com>
884 * sh-opc.h (arch_sh2a_or_sh3e,arch_sh2a_or_sh4): Correct definition.
885 (inheritance diagram): Add missing edge.
886 (arch_sh1_up): Rename arch_sh_up to match external name to make life
887 easier for the testsuite.
888 (arch_sh4_nofp_up): Likewise, rename arch_sh4_nofpu_up.
889 (arch_sh4a_nofp_up): Likewise, rename arch_sh4a_nofpu_up.
890 (arch_sh2a_nofpu_or_sh4_nommu_nofpu_up): Add missing
891 arch_sh2a_or_sh4_up child.
892 (sh_table): Do renaming as above.
893 Correct comment for ldc.l for gas testsuite to read.
894 Remove rogue mul.l from sh1 (duplicate of the one for sh2).
895 Correct comments for movy.w and movy.l for gas testsuite to read.
896 Correct comments for fmov.d and fmov.s for gas testsuite to read.
898 2005-01-12 H.J. Lu <hongjiu.lu@intel.com>
900 * i386-dis.c (OP_E): Don't ignore scale in SIB for 64 bit mode.
902 2005-01-12 H.J. Lu <hongjiu.lu@intel.com>
904 * i386-dis.c (OP_E): Ignore scale when index == 0x4 in SIB.
906 2005-01-10 Andreas Schwab <schwab@suse.de>
908 * disassemble.c (disassemble_init_for_target) <case
909 bfd_arch_ia64>: Set skip_zeroes to 16.
910 <case bfd_arch_tic4x>: Set skip_zeroes to 32.
912 2004-12-23 Tomer Levi <Tomer.Levi@nsc.com>
914 * crx-opc.c: Mark 'bcop' instruction as RELAXABLE.
916 2004-12-14 Svein E. Seldal <Svein.Seldal@solidas.com>
918 * avr-dis.c: Prettyprint. Added printing of symbol names in all
919 memory references. Convert avr_operand() to C90 formatting.
921 2004-12-05 Tomer Levi <Tomer.Levi@nsc.com>
923 * crx-dis.c (print_arg): Use 'info->print_address_func' for address printing.
925 2004-11-29 Tomer Levi <Tomer.Levi@nsc.com>
927 * crx-opc.c (crx_optab): Mark all rbase_disps* operands as signed.
928 (no_op_insn): Initialize array with instructions that have no
930 * crx-dis.c (make_instruction): Get rid of COP_BRANCH_INS operand swapping.
932 2004-11-29 Richard Earnshaw <rearnsha@arm.com>
934 * arm-dis.c: Correct top-level comment.
936 2004-11-27 Richard Earnshaw <rearnsha@arm.com>
938 * arm-opc.h (arm_opcode, thumb_opcode): Add extra field for the
939 architecuture defining the insn.
940 (arm_opcodes, thumb_opcodes): Delete. Move to ...
941 * arm-dis.c (arm_opcodes, thumb_opcodes): Here. Add architecutre
943 Also include opcode/arm.h.
944 * Makefile.am (arm-dis.lo): Update dependency list.
945 * Makefile.in: Regenerate.
947 2004-11-22 Ravi Ramaseshan <ravi.ramaseshan@codito.com>
949 * opcode/arc-opc.c (insert_base): Modify ls_operand[LS_OFFSET] to
950 reflect the change to the short immediate syntax.
952 2004-11-19 Alan Modra <amodra@bigpond.net.au>
954 * or32-opc.c (debug): Warning fix.
955 * po/POTFILES.in: Regenerate.
957 * maxq-dis.c: Formatting.
958 (print_insn): Warning fix.
960 2004-11-17 Daniel Jacobowitz <dan@codesourcery.com>
962 * arm-dis.c (WORD_ADDRESS): Define.
963 (print_insn): Use it. Correct big-endian end-of-section handling.
965 2004-11-08 Inderpreet Singh <inderpreetb@nioda.hcltech.com>
966 Vineet Sharma <vineets@noida.hcltech.com>
968 * maxq-dis.c: New file.
969 * disassemble.c (ARCH_maxq): Define.
970 (disassembler): Add 'print_insn_maxq_little' for handling maxq
972 * configure.in: Add case for bfd_maxq_arch.
973 * configure: Regenerate.
974 * Makefile.am: Add support for maxq-dis.c
975 * Makefile.in: Regenerate.
976 * aclocal.m4: Regenerate.
978 2004-11-05 Tomer Levi <Tomer.Levi@nsc.com>
980 * crx-opc.c (crx_optab): Rename 'arg_icr' to 'arg_idxr' for Index register
982 * crx-dis.c: Likewise.
984 2004-11-04 Hans-Peter Nilsson <hp@axis.com>
986 Generally, handle CRISv32.
987 * cris-dis.c (TRACE_CASE): Define as (disdata->trace_case).
988 (struct cris_disasm_data): New type.
989 (format_reg, format_hex, cris_constraint, print_flags)
990 (get_opcode_entry): Add struct cris_disasm_data * parameter. All
992 (format_sup_reg, print_insn_crisv32_with_register_prefix)
993 (print_insn_crisv32_without_register_prefix)
994 (print_insn_crisv10_v32_with_register_prefix)
995 (print_insn_crisv10_v32_without_register_prefix)
996 (cris_parse_disassembler_options): New functions.
997 (bytes_to_skip, cris_spec_reg): Add enum cris_disass_family
998 parameter. All callers changed.
999 (get_opcode_entry): Call malloc, not xmalloc. Return NULL on
1001 (cris_constraint) <case 'Y', 'U'>: New cases.
1002 (bytes_to_skip): Handle 'Y' and 'N' as 's'. Skip size is 4 bytes
1004 (print_with_operands) <case 'Y'>: New case.
1005 (print_with_operands) <case 'T', 'A', '[', ']', 'd', 'n', 'u'>
1006 <case 'N', 'Y', 'Q'>: New cases.
1007 (print_insn_cris_generic): Emit "bcc ." for zero and CRISv32.
1008 (print_insn_cris_with_register_prefix)
1009 (print_insn_cris_without_register_prefix): Call
1010 cris_parse_disassembler_options.
1011 * cris-opc.c (cris_spec_regs): Mention that this table isn't used
1012 for CRISv32 and the size of immediate operands. New v32-only
1013 entries for bz, pid, srs, wz, exs, eda, dz, ebp, erp, nrp, ccs and
1014 spc. Add v32-only 4-byte entries for p2, p3, p5 and p6. Change
1015 ccr, ibr, irp to be v0..v10. Change bar, dccr to be v8..v10.
1016 Change brp to be v3..v10.
1017 (cris_support_regs): New vector.
1018 (cris_opcodes): Update head comment. New format characters '[',
1019 ']', space, 'A', 'd', 'N', 'n', 'Q', 'T', 'u', 'U', 'Y'.
1020 Add new opcodes for v32 and adjust existing opcodes to accommodate
1021 differences to earlier variants.
1022 (cris_cond15s): New vector.
1024 2004-11-04 Jan Beulich <jbeulich@novell.com>
1026 * i386-dis.c (Eq, Edqw, indirEp, Gdq, I1): Define.
1028 (Mp): Use f_mode rather than none at all.
1029 (t_mode, dq_mode, dqw_mode, f_mode, const_1_mode): Define. t_mode
1030 replaces what previously was x_mode; x_mode now means 128-bit SSE
1032 (dis386): Make far jumps and calls have an 'l' prefix only in AT&T
1033 mode. movmskpX's, pextrw's, and pmovmskb's first operands are Gdq.
1034 pinsrw's second operand is Edqw.
1035 (grps): 1-bit shifts' and rotates' second operands are I1. cmpxchg8b's
1036 operand is Eq. movntq's and movntdq's first operands are EM. s[gi]dt,
1037 fldenv, frstor, fsave, fstenv all should also have suffixes in Intel
1038 mode when an operand size override is present or always suffixing.
1039 More instructions will need to be added to this group.
1040 (putop): Handle new macro chars 'C' (short/long suffix selector),
1041 'I' (Intel mode override for following macro char), and 'J' (for
1042 adding the 'l' prefix to far branches in AT&T mode). When an
1043 alternative was specified in the template, honor macro character when
1044 specified for Intel mode.
1045 (OP_E): Handle new *_mode values. Correct pointer specifications for
1046 memory operands. Consolidate output of index register.
1047 (OP_G): Handle new *_mode values.
1048 (OP_I): Handle const_1_mode.
1049 (OP_ESreg, OP_DSreg): Generate pointer specifications. Indicate
1050 respective opcode prefix bits have been consumed.
1051 (OP_EM, OP_EX): Provide some default handling for generating pointer
1054 2004-10-28 Tomer Levi <Tomer.Levi@nsc.com>
1056 * crx-opc.c (REV_COP_INST): New macro, reverse operand order of
1059 2004-10-27 Tomer Levi <Tomer.Levi@nsc.com>
1061 * crx-dis.c (enum REG_ARG_TYPE): New, replacing COP_ARG_TYPE.
1062 (getregliststring): Support HI/LO and user registers.
1063 * crx-opc.c (crx_instruction): Update data structure according to the
1064 rearrangement done in CRX opcode header file.
1065 (crx_regtab): Likewise.
1066 (crx_optab): Likewise.
1067 (crx_instruction): Reorder load/stor instructions, remove unsupported
1069 support new Co-Processor instruction 'cpi'.
1071 2004-10-27 Nick Clifton <nickc@redhat.com>
1073 * opcodes/iq2000-asm.c: Regenerate.
1074 * opcodes/iq2000-desc.c: Regenerate.
1075 * opcodes/iq2000-desc.h: Regenerate.
1076 * opcodes/iq2000-dis.c: Regenerate.
1077 * opcodes/iq2000-ibld.c: Regenerate.
1078 * opcodes/iq2000-opc.c: Regenerate.
1079 * opcodes/iq2000-opc.h: Regenerate.
1081 2004-10-21 Tomer Levi <Tomer.Levi@nsc.com>
1083 * crx-opc.c (crx_instruction): Replace i3, i4, i5 with us3,
1084 us4, us5 (respectively).
1085 Remove unsupported 'popa' instruction.
1086 Reverse operands order in store co-processor instructions.
1088 2004-10-15 Alan Modra <amodra@bigpond.net.au>
1090 * Makefile.am: Run "make dep-am"
1091 * Makefile.in: Regenerate.
1093 2004-10-12 Bob Wilson <bob.wilson@acm.org>
1095 * xtensa-dis.c: Use ISO C90 formatting.
1097 2004-10-09 Alan Modra <amodra@bigpond.net.au>
1099 * ppc-opc.c: Revert 2004-09-09 change.
1101 2004-10-07 Bob Wilson <bob.wilson@acm.org>
1103 * xtensa-dis.c (state_names): Delete.
1104 (fetch_data): Use xtensa_isa_maxlength.
1105 (print_xtensa_operand): Replace operand parameter with opcode/operand
1106 pair. Remove print_sr_name parameter. Use new xtensa-isa.h functions.
1107 (print_insn_xtensa): Use new xtensa-isa.h functions. Handle multislot
1108 instruction bundles. Use xmalloc instead of malloc.
1110 2004-10-07 David Gibson <david@gibson.dropbear.id.au>
1112 * ppc-opc.c: Replace literal "0"s with NULLs in pointer
1115 2004-10-07 Tomer Levi <Tomer.Levi@nsc.com>
1117 * crx-opc.c (crx_instruction): Support Co-processor insns.
1118 * crx-dis.c (COP_ARG_TYPE): New enum for CO-Processor arguments.
1119 (getregliststring): Change function to use the above enum.
1120 (print_arg): Handle CO-Processor insns.
1121 (crx_cinvs): Add 'b' option to invalidate the branch-target
1124 2004-10-06 Aldy Hernandez <aldyh@redhat.com>
1126 * ppc-opc.c (powerpc_opcodes): Add efscfd, efdabs, efdnabs,
1127 efdneg, efdadd, efdsub, efdmul, efddiv, efdcmpgt, efdcmplt,
1128 efdcmpeq, efdtstgt, efdtstlt, efdtsteq, efdcfsi, efdcfsid,
1129 efdcfui, efdcfuid, efdcfsf, efdcfuf, efdctsi, efdctsidz, efdctsiz,
1130 efdctui, efdctuidz, efdctuiz, efdctsf, efdctuf, efdctuf, efdcfs.
1132 2004-10-01 Bill Farmer <Bill@the-farmers.freeserve.co.uk>
1134 * pdp11-dis.c (print_insn_pdp11): Subtract the SOB's displacement
1137 2004-09-30 Paul Brook <paul@codesourcery.com>
1139 * arm-dis.c (print_insn_arm): Handle 'e' for SMI instruction.
1140 * arm-opc.h: Document %e. Add ARMv6ZK instructions.
1142 2004-09-17 H.J. Lu <hongjiu.lu@intel.com>
1144 * Makefile.am (AUTOMAKE_OPTIONS): Require 1.9.
1145 (CONFIG_STATUS_DEPENDENCIES): New.
1146 (Makefile): Removed.
1147 (config.status): Likewise.
1148 * Makefile.in: Regenerated.
1150 2004-09-17 Alan Modra <amodra@bigpond.net.au>
1152 * Makefile.am: Run "make dep-am".
1153 * Makefile.in: Regenerate.
1154 * aclocal.m4: Regenerate.
1155 * configure: Regenerate.
1156 * po/POTFILES.in: Regenerate.
1157 * po/opcodes.pot: Regenerate.
1159 2004-09-11 Andreas Schwab <schwab@suse.de>
1161 * configure: Rebuild.
1163 2004-09-09 Segher Boessenkool <segher@kernel.crashing.org>
1165 * ppc-opc.c (L): Make this field not optional.
1167 2004-09-03 Tomer Levi <Tomer.Levi@nsc.com>
1169 * opc-crx.c: Rename 'popma' to 'popa', remove 'pushma'.
1170 Fix parameter to 'm[t|f]csr' insns.
1172 2004-08-30 Nathanael Nerode <neroden@gcc.gnu.org>
1174 * configure.in: Autoupdate to autoconf 2.59.
1175 * aclocal.m4: Rebuild with aclocal 1.4p6.
1176 * configure: Rebuild with autoconf 2.59.
1177 * Makefile.in: Rebuild with automake 1.4p6 (picking up
1178 bfd changes for autoconf 2.59 on the way).
1179 * config.in: Rebuild with autoheader 2.59.
1181 2004-08-27 Richard Sandiford <rsandifo@redhat.com>
1183 * frv-desc.[ch], frv-opc.[ch]: Regenerated.
1185 2004-07-30 Michal Ludvig <mludvig@suse.cz>
1187 * i386-dis.c (GRPPADLCK): Renamed to GRPPADLCK1
1188 (GRPPADLCK2): New define.
1189 (twobyte_has_modrm): True for 0xA6.
1190 (grps): GRPPADLCK2 for opcode 0xA6.
1192 2004-07-29 Alexandre Oliva <aoliva@redhat.com>
1194 Introduce SH2a support.
1195 * sh-opc.h (arch_sh2a_base): Renumber.
1196 (arch_sh2a_nofpu_base): Remove.
1197 (arch_sh_base_mask): Adjust.
1198 (arch_opann_mask): New.
1199 (arch_sh2a, arch_sh2a_nofpu): Adjust.
1200 (arch_sh2a_up, arch_sh2a_nofpu_up): Likewise.
1201 (sh_table): Adjust whitespace.
1202 2004-02-24 Corinna Vinschen <vinschen@redhat.com>
1203 * sh-opc.h (arch_sh2a_nofpu_up): New. Use instead of arch_sh2a_up in
1204 instruction list throughout.
1205 (arch_sh2a_up): Redefine to include fpu instruction set. Use instead
1206 of arch_sh2a in instruction list throughout.
1207 (arch_sh2e_up): Accomodate above changes.
1208 (arch_sh2_up): Ditto.
1209 2004-02-20 Corinna Vinschen <vinschen@redhat.com>
1210 * sh-opc.h: Add arch_sh2a_nofpu to arch_sh2_up.
1211 2004-02-18 Corinna Vinschen <vinschen@redhat.com>
1212 * sh-dis.c (print_insn_sh): Add bfd_mach_sh2a_nofpu handling.
1213 * sh-opc.h (arch_sh2a_nofpu): New.
1214 (arch_sh2a_up): New, defines sh2a and sh2a_nofpu.
1215 (sh_table): Change all arch_sh2a to arch_sh2a_up unless FPU
1217 2004-01-20 DJ Delorie <dj@redhat.com>
1218 * sh-dis.c (print_insn_sh): SH2A does not have 'X' fp regs.
1219 2003-12-29 DJ Delorie <dj@redhat.com>
1220 * sh-opc.c (sh_nibble_type, sh_arg_type, arch_2a, arch_2e_up,
1221 sh_opcode_info, sh_table): Add sh2a support.
1222 (arch_op32): New, to tag 32-bit opcodes.
1223 * sh-dis.c (print_insn_sh): Support sh2a opcodes.
1224 2003-12-02 Michael Snyder <msnyder@redhat.com>
1225 * sh-opc.h (arch_sh2a): Add.
1226 * sh-dis.c (arch_sh2a): Handle.
1227 * sh-opc.h (arch_sh2_up): Fix up to include arch_sh2a.
1229 2004-07-27 Tomer Levi <Tomer.Levi@nsc.com>
1231 * crx-opc.c: Add popx,pushx insns. Indent code, fix comments.
1233 2004-07-22 Nick Clifton <nickc@redhat.com>
1236 * h8300-dis.c (bfd_h8_disassemble): Do not dump raw bytes for the
1237 insns - this is done by objdump itself.
1238 * h8500-dis.c (print_insn_h8500): Likewise.
1240 2004-07-21 Jan Beulich <jbeulich@novell.com>
1242 * i386-dis.c (OP_E): Show rip-relative addressing in 64-bit mode
1243 regardless of address size prefix in effect.
1244 (ptr_reg): Size or address registers does not depend on rex64, but
1245 on the presence of an address size override.
1246 (OP_MMX): Use rex.x only for xmm registers.
1247 (OP_EM): Use rex.z only for xmm registers.
1249 2004-07-20 Maciej W. Rozycki <macro@linux-mips.org>
1251 * mips-opc.c (mips_builtin_opcodes): Move coprocessor 2
1252 move/branch operations to the bottom so that VR5400 multimedia
1253 instructions take precedence in disassembly.
1255 2004-07-20 Maciej W. Rozycki <macro@linux-mips.org>
1257 * mips-opc.c (mips_builtin_opcodes): Remove the MIPS32
1258 ISA-specific "break" encoding.
1260 2004-07-13 Elvis Chiang <elvisfb@gmail.com>
1262 * arm-opc.h: Fix typo in comment.
1264 2004-07-11 Andreas Schwab <schwab@suse.de>
1266 * m68k-dis.c (m68k_valid_ea): Fix typos in last change.
1268 2004-07-09 Andreas Schwab <schwab@suse.de>
1270 * m68k-dis.c (m68k_valid_ea): Check validity of all codes.
1272 2004-07-07 Tomer Levi <Tomer.Levi@nsc.com>
1274 * Makefile.am (CFILES): Add crx-dis.c, crx-opc.c.
1275 (ALL_MACHINES): Add crx-dis.lo, crx-opc.lo.
1276 (crx-dis.lo): New target.
1277 (crx-opc.lo): Likewise.
1278 * Makefile.in: Regenerate.
1279 * configure.in: Handle bfd_crx_arch.
1280 * configure: Regenerate.
1281 * crx-dis.c: New file.
1282 * crx-opc.c: New file.
1283 * disassemble.c (ARCH_crx): Define.
1284 (disassembler): Handle ARCH_crx.
1286 2004-06-29 James E Wilson <wilson@specifixinc.com>
1288 * ia64-opc-a.c (ia64_opcodes_a): Delete mov immediate pseudo for adds.
1289 * ia64-asmtab.c: Regnerate.
1291 2004-06-28 Alan Modra <amodra@bigpond.net.au>
1293 * ppc-opc.c (insert_fxm): Handle mfocrf and mtocrf.
1294 (extract_fxm): Don't test dialect.
1295 (XFXFXM_MASK): Include the power4 bit.
1296 (XFXM): Add p4 param.
1297 (powerpc_opcodes): Add mfocrf and mtocrf. Adjust mtcr.
1299 2004-06-27 Alexandre Oliva <aoliva@redhat.com>
1301 2003-07-21 Richard Sandiford <rsandifo@redhat.com>
1302 * disassemble.c (disassembler): Handle bfd_mach_h8300sxn.
1304 2004-06-26 Alan Modra <amodra@bigpond.net.au>
1306 * ppc-opc.c (BH, XLBH_MASK): Define.
1307 (powerpc_opcodes): Allow BH field on bclr, bclrl, bcctr, bcctrl.
1309 2004-06-24 Alan Modra <amodra@bigpond.net.au>
1311 * i386-dis.c (x_mode): Comment.
1312 (two_source_ops): File scope.
1313 (float_mem): Correct fisttpll and fistpll.
1314 (float_mem_mode): New table.
1316 (OP_E): Correct intel mode PTR output.
1317 (ptr_reg): Use open_char and close_char.
1318 (PNI_Fixup): Handle possible suffix on sidt. Use op1out etc. for
1319 operands. Set two_source_ops.
1321 2004-06-15 Alan Modra <amodra@bigpond.net.au>
1323 * arc-ext.c (build_ARC_extmap): Use bfd_get_section_size
1324 instead of _raw_size.
1326 2004-06-08 Jakub Jelinek <jakub@redhat.com>
1328 * ia64-gen.c (in_iclass): Handle more postinc st
1330 * ia64-asmtab.c: Rebuilt.
1332 2004-06-01 Martin Schwidefsky <schwidefsky@de.ibm.com>
1334 * s390-opc.txt: Correct architecture mask for some opcodes.
1335 lrv, lrvh, strv, ml, dl, alc, slb rll and mvclu are available
1336 in the esa mode as well.
1338 2004-05-28 Andrew Stubbs <andrew.stubbs@superh.com>
1340 * sh-dis.c (target_arch): Make unsigned.
1341 (print_insn_sh): Replace (most of) switch with a call to
1342 sh_get_arch_from_bfd_mach(). Also use new architecture flags system.
1343 * sh-opc.h: Redefine architecture flags values.
1344 Add sh3-nommu architecture.
1345 Reorganise <arch>_up macros so they make more visual sense.
1346 (SH_MERGE_ARCH_SET): Define new macro.
1347 (SH_VALID_BASE_ARCH_SET): Likewise.
1348 (SH_VALID_MMU_ARCH_SET): Likewise.
1349 (SH_VALID_CO_ARCH_SET): Likewise.
1350 (SH_VALID_ARCH_SET): Likewise.
1351 (SH_MERGE_ARCH_SET_VALID): Likewise.
1352 (SH_ARCH_SET_HAS_FPU): Likewise.
1353 (SH_ARCH_SET_HAS_DSP): Likewise.
1354 (SH_ARCH_UNKNOWN_ARCH): Likewise.
1355 (sh_get_arch_from_bfd_mach): Add prototype.
1356 (sh_get_arch_up_from_bfd_mach): Likewise.
1357 (sh_get_bfd_mach_from_arch_set): Likewise.
1358 (sh_merge_bfd_arc): Likewise.
1360 2004-05-24 Peter Barada <peter@the-baradas.com>
1362 * m68k-dis.c(print_insn_m68k): Strip body of diassembly out
1363 into new match_insn_m68k function. Loop over canidate
1364 matches and select first that completely matches.
1365 * m68k-dis.c(print_insn_arg): Fix 'g' case to only extract 1 bit.
1366 * m68k-dis.c(print_insn_arg): Call new function m68k_valid_ea
1367 to verify addressing for MAC/EMAC.
1368 * m68k-dis.c(print_insn_arg): Use reg_half_names for MAC/EMAC
1369 reigster halves since 'fpu' and 'spl' look misleading.
1370 * m68k-dis.c(fetch_arg): Fix 'G', 'H', 'I', 'f', 'M', 'N' cases.
1371 * m68k-opc.c: Rearragne mac/emac cases to use longest for
1372 first, tighten up match masks.
1373 * m68k-opc.c: Add 'size' field to struct m68k_opcode. Produce
1374 'size' from special case code in print_insn_m68k to
1375 determine decode size of insns.
1377 2004-05-19 Alan Modra <amodra@bigpond.net.au>
1379 * ppc-opc.c (insert_fxm): Enable two operand mfcr when -many as
1380 well as when -mpower4.
1382 2004-05-13 Nick Clifton <nickc@redhat.com>
1384 * po/fr.po: Updated French translation.
1386 2004-05-05 Peter Barada <peter@the-baradas.com>
1388 * m68k-dis.c(print_insn_m68k): Add new chips, use core
1389 variants in arch_mask. Only set m68881/68851 for 68k chips.
1390 * m68k-op.c: Switch from ColdFire chips to core variants.
1392 2004-05-05 Alan Modra <amodra@bigpond.net.au>
1395 * ppc-opc.c (PPCVEC): Remove PPC_OPCODE_PPC.
1397 2004-04-29 Ben Elliston <bje@au.ibm.com>
1399 * ppc-opc.c (XCMPL): Renmame to XOPL. Update users.
1400 (powerpc_opcodes): Add "dbczl" instruction for PPC970.
1402 2004-04-22 Kaz Kojima <kkojima@rr.iij4u.or.jp>
1404 * sh-dis.c (print_insn_sh): Print the value in constant pool
1405 as a symbol if it looks like a symbol.
1407 2004-04-22 Peter Barada <peter@the-baradas.com>
1409 * m68k-dis.c(print_insn_m68k): Set mfcmac/mcfemac on
1410 appropriate ColdFire architectures.
1411 (print_insn_m68k): Handle EMAC, MAC/EMAC scalefactor, and MAC/EMAC
1413 Add EMAC instructions, fix MAC instructions. Remove
1414 macmw/macml/msacmw/msacml instructions since mask addressing now
1417 2004-04-20 Jakub Jelinek <jakub@redhat.com>
1419 * sparc-opc.c (fmoviccx, fmovfccx, fmovccx): Define.
1420 (fmovicc, fmovfcc, fmovcc): Remove fpsize argument, change opcode to
1421 suffix. Use fmov*x macros, create all 3 fpsize variants in one
1422 macro. Adjust all users.
1424 2004-04-15 Anil Paranjpe <anilp1@kpitcummins.com>
1426 * h8300-dis.c (bfd_h8_disassemble) : Treat "adds" & "subs"
1429 2004-03-30 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
1431 * m32r-asm.c: Regenerate.
1433 2004-03-29 Stan Shebs <shebs@apple.com>
1435 * mpw-config.in, mpw-make.sed: Remove MPW support files, no longer
1438 2004-03-19 Alan Modra <amodra@bigpond.net.au>
1440 * aclocal.m4: Regenerate.
1441 * config.in: Regenerate.
1442 * configure: Regenerate.
1443 * po/POTFILES.in: Regenerate.
1444 * po/opcodes.pot: Regenerate.
1446 2004-03-16 Alan Modra <amodra@bigpond.net.au>
1448 * ppc-dis.c (print_insn_powerpc): Don't print tabs. Handle
1450 * ppc-opc.c (RA0): Define.
1451 (RAQ, RAL, RAM, RAS, RSQ, RTQ, RSO): Use PPC_OPERAND_GPR_0.
1452 (RAOPT): Rename from RAO. Update all uses.
1453 (powerpc_opcodes): Use RA0 as appropriate.
1455 2004-03-15 Aldy Hernandez <aldyh@redhat.com>
1457 * ppc-opc.c (powerpc_opcodes): Add BOOKE versions of mfsprg.
1459 2004-03-15 Alan Modra <amodra@bigpond.net.au>
1461 * sparc-dis.c (print_insn_sparc): Update getword prototype.
1463 2004-03-12 Michal Ludvig <mludvig@suse.cz>
1465 * i386-dis.c (GRPPLOCK): Delete.
1466 (grps): Delete GRPPLOCK entry.
1468 2004-03-12 Alan Modra <amodra@bigpond.net.au>
1470 * i386-dis.c (OP_M, OP_0f0e, OP_0fae, NOP_Fixup): New functions.
1472 (None, PADLOCK_SPECIAL, PADLOCK_0): Delete.
1473 (GRPPADLCK): Define.
1474 (dis386): Use NOP_Fixup on "nop".
1475 (dis386_twobyte): Use GRPPADLCK on opcode 0xa7.
1476 (twobyte_has_modrm): Set for 0xa7.
1477 (padlock_table): Delete. Move to..
1478 (grps): ..here, using OP_0f07. Use OP_Ofae on lfence, mfence
1480 (print_insn): Revert PADLOCK_SPECIAL code.
1481 (OP_E): Delete sfence, lfence, mfence checks.
1483 2004-03-12 Jakub Jelinek <jakub@redhat.com>
1485 * i386-dis.c (grps): Use INVLPG_Fixup instead of OP_E for invlpg.
1486 (INVLPG_Fixup): New function.
1487 (PNI_Fixup): Remove ATTRIBUTE_UNUSED from sizeflag.
1489 2004-03-12 Michal Ludvig <mludvig@suse.cz>
1491 * i386-dis.c (PADLOCK_SPECIAL, PADLOCK_0): New defines.
1492 (dis386_twobyte): Opcode 0xa7 is PADLOCK_0.
1493 (padlock_table): New struct with PadLock instructions.
1494 (print_insn): Handle PADLOCK_SPECIAL.
1496 2004-03-12 Alan Modra <amodra@bigpond.net.au>
1498 * i386-dis.c (grps): Use clflush by default for 0x0fae/7.
1499 (OP_E): Twiddle clflush to sfence here.
1501 2004-03-08 Nick Clifton <nickc@redhat.com>
1503 * po/de.po: Updated German translation.
1505 2003-03-03 Andrew Stubbs <andrew.stubbs@superh.com>
1507 * sh-dis.c (print_insn_sh): Don't disassemble fp instructions in
1508 nofpu mode. Add BFD type bfd_mach_sh4_nommu_nofpu.
1509 * sh-opc.h: Add sh4_nommu_nofpu architecture and adjust instructions
1512 2004-03-01 Richard Sandiford <rsandifo@redhat.com>
1514 * frv-asm.c: Regenerate.
1515 * frv-desc.c: Regenerate.
1516 * frv-desc.h: Regenerate.
1517 * frv-dis.c: Regenerate.
1518 * frv-ibld.c: Regenerate.
1519 * frv-opc.c: Regenerate.
1520 * frv-opc.h: Regenerate.
1522 2004-03-01 Richard Sandiford <rsandifo@redhat.com>
1524 * frv-desc.c, frv-opc.c: Regenerate.
1526 2004-03-01 Richard Sandiford <rsandifo@redhat.com>
1528 * frv-desc.c, frv-opc.c, frv-opc.h: Regenerate.
1530 2004-02-26 Andrew Stubbs <andrew.stubbs@superh.com>
1532 * sh-opc.h: Move fsca and fsrra instructions from sh4a to sh4.
1533 Also correct mistake in the comment.
1535 2004-02-26 Andrew Stubbs <andrew.stubbs@superh.com>
1537 * sh-dis.c (print_insn_sh): Add REG_N_D nibble type to
1538 ensure that double registers have even numbers.
1539 Add REG_N_B01 for nn01 (binary 01) nibble to ensure
1540 that reserved instruction 0xfffd does not decode the same
1542 * sh-opc.h: Add REG_N_D nibble type and use it whereever
1543 REG_N refers to a double register.
1544 Add REG_N_B01 nibble type and use it instead of REG_NM
1546 Adjust the bit patterns in a few comments.
1548 2004-02-25 Aldy Hernandez <aldyh@redhat.com>
1550 * ppc-opc.c (powerpc_opcodes): Change mask for dcbt and dcbtst.
1552 2004-02-20 Aldy Hernandez <aldyh@redhat.com>
1554 * ppc-opc.c (powerpc_opcodes): Move mfmcsrr0 before mfdc_dat.
1556 2004-02-20 Aldy Hernandez <aldyh@redhat.com>
1558 * ppc-opc.c (powerpc_opcodes): Add m*ivor35.
1560 2004-02-20 Aldy Hernandez <aldyh@redhat.com>
1562 * ppc-opc.c (powerpc_opcodes): Add mfivor32, mfivor33, mfivor34,
1563 mtivor32, mtivor33, mtivor34.
1565 2004-02-19 Aldy Hernandez <aldyh@redhat.com>
1567 * ppc-opc.c (powerpc_opcodes): Add mfmcar.
1569 2004-02-10 Petko Manolov <petkan@nucleusys.com>
1571 * arm-opc.h Maverick accumulator register opcode fixes.
1573 2004-02-13 Ben Elliston <bje@wasabisystems.com>
1575 * m32r-dis.c: Regenerate.
1577 2004-01-27 Michael Snyder <msnyder@redhat.com>
1579 * sh-opc.h (sh_table): "fsrra", not "fssra".
1581 2004-01-23 Andrew Over <andrew.over@cs.anu.edu.au>
1583 * sparc-opc.c (fdtox, fstox, fqtox, fxtod, fxtos, fxtoq): Tighten
1586 2004-01-19 Andrew Over <andrew.over@cs.anu.edu.au>
1588 * sparc-opc.c (sparc_opcodes) <f[dsq]tox, fxto[dsq]>: Fix args.
1590 2004-01-19 Alan Modra <amodra@bigpond.net.au>
1592 * i386-dis.c (OP_E): Print scale factor on intel mode sib when not
1593 1. Don't print scale factor on AT&T mode when index missing.
1595 2004-01-16 Alexandre Oliva <aoliva@redhat.com>
1597 * m10300-opc.c (mov): 8- and 24-bit immediates are zero-extended
1598 when loaded into XR registers.
1600 2004-01-14 Richard Sandiford <rsandifo@redhat.com>
1602 * frv-desc.h: Regenerate.
1603 * frv-desc.c: Regenerate.
1604 * frv-opc.c: Regenerate.
1606 2004-01-13 Michael Snyder <msnyder@redhat.com>
1608 * sh-dis.c (print_insn_sh): Allocate 4 bytes for insn.
1610 2004-01-09 Paul Brook <paul@codesourcery.com>
1612 * arm-opc.h (arm_opcodes): Move generic mcrr after known
1615 2004-01-07 Daniel Jacobowitz <drow@mvista.com>
1617 * Makefile.am (libopcodes_la_DEPENDENCIES)
1618 (libopcodes_la_LIBADD): Revert 2003-05-17 change. Add explanatory
1619 comment about the problem.
1620 * Makefile.in: Regenerate.
1622 2004-01-06 Alexandre Oliva <aoliva@redhat.com>
1624 2003-12-19 Alexandre Oliva <aoliva@redhat.com>
1625 * frv-asm.c (parse_ulo16, parse_uhi16, parse_d12): Fix some
1626 cut&paste errors in shifting/truncating numerical operands.
1627 2003-08-04 Alexandre Oliva <aoliva@redhat.com>
1628 * frv-asm.c (parse_ulo16): Parse gotofflo and gotofffuncdesclo.
1629 (parse_uslo16): Likewise.
1630 (parse_uhi16): Parse gotoffhi and gotofffuncdeschi.
1631 (parse_d12): Parse gotoff12 and gotofffuncdesc12.
1632 (parse_s12): Likewise.
1633 2003-08-04 Alexandre Oliva <aoliva@redhat.com>
1634 * frv-asm.c (parse_ulo16): Parse gotlo and gotfuncdesclo.
1635 (parse_uslo16): Likewise.
1636 (parse_uhi16): Parse gothi and gotfuncdeschi.
1637 (parse_d12): Parse got12 and gotfuncdesc12.
1638 (parse_s12): Likewise.
1640 2004-01-02 Albert Bartoszko <albar@nt.kegel.com.pl>
1642 * msp430-dis.c (msp430_doubleoperand): Check for an 'add'
1643 instruction which looks similar to an 'rla' instruction.
1645 For older changes see ChangeLog-0203
1651 version-control: never