opcodes/ChangeLog

   1 2015-04-15  H.J. Lu  <hongjiu.lu@intel.com>
   2
   3         * i386-dis.c (PREFIX_UD_SHIFT): Removed.
   4         (PREFIX_UD_REPZ): Likewise.
   5         (PREFIX_UD_REPNZ): Likewise.
   6         (PREFIX_UD_DATA): Likewise.
   7         (PREFIX_UD_ADDR): Likewise.
   8         (PREFIX_UD_LOCK): Likewise.
   9
  10 2015-04-15  H.J. Lu  <hongjiu.lu@intel.com>
  11
  12         * i386-dis.c (prefix_requirement): Removed.
  13         (print_insn): Don't set prefix_requirement.  Check
  14         dp->prefix_requirement instead of prefix_requirement.
  15
  16 2015-04-15  H.J. Lu  <hongjiu.lu@intel.com>
  17
  18         PR binutils/17898
  19         * i386-dis.c (PREFIX_0FC7_REG_6): Renamed to ...
  20         (PREFIX_MOD_0_0FC7_REG_6): This.
  21         (PREFIX_MOD_3_0FC7_REG_6): New.
  22         (PREFIX_MOD_3_0FC7_REG_7): Likewise.
  23         (prefix_table): Replace PREFIX_0FC7_REG_6 with
  24         PREFIX_MOD_0_0FC7_REG_6.  Add PREFIX_MOD_3_0FC7_REG_6 and
  25         PREFIX_MOD_3_0FC7_REG_7.
  26         (mod_table): Replace PREFIX_0FC7_REG_6 with
  27         PREFIX_MOD_0_0FC7_REG_6.  Use PREFIX_MOD_3_0FC7_REG_6 and
  28         PREFIX_MOD_3_0FC7_REG_7.
  29
  30 2015-04-15  H.J. Lu  <hongjiu.lu@intel.com>
  31
  32         * i386-dis.c (PREFIX_MANDATORY_REPZ): Removed.
  33         (PREFIX_MANDATORY_REPNZ): Likewise.
  34         (PREFIX_MANDATORY_DATA): Likewise.
  35         (PREFIX_MANDATORY_ADDR): Likewise.
  36         (PREFIX_MANDATORY_LOCK): Likewise.
  37         (PREFIX_MANDATORY): Likewise.
  38         (PREFIX_UD_SHIFT): Set to 8
  39         (PREFIX_UD_REPZ): Updated.
  40         (PREFIX_UD_REPNZ): Likewise.
  41         (PREFIX_UD_DATA): Likewise.
  42         (PREFIX_UD_ADDR): Likewise.
  43         (PREFIX_UD_LOCK): Likewise.
  44         (PREFIX_IGNORED_SHIFT): New.
  45         (PREFIX_IGNORED_REPZ): Likewise.
  46         (PREFIX_IGNORED_REPNZ): Likewise.
  47         (PREFIX_IGNORED_DATA): Likewise.
  48         (PREFIX_IGNORED_ADDR): Likewise.
  49         (PREFIX_IGNORED_LOCK): Likewise.
  50         (PREFIX_OPCODE): Likewise.
  51         (PREFIX_IGNORED): Likewise.
  52         (Bad_Opcode): Replace PREFIX_MANDATORY with 0.
  53         (dis386_twobyte): Replace PREFIX_MANDATORY with PREFIX_OPCODE.
  54         (three_byte_table): Likewise.
  55         (mod_table): Likewise.
  56         (mandatory_prefix): Renamed to ...
  57         (prefix_requirement): This.
  58         (prefix_table): Replace PREFIX_MANDATORY with PREFIX_OPCODE.
  59         Update PREFIX_90 entry.
  60         (get_valid_dis386): Check prefix_requirement to see if a prefix
  61         should be ignored.
  62         (print_insn): Replace mandatory_prefix with prefix_requirement.
  63
  64 2015-04-15  Renlin Li  <renlin.li@arm.com>
  65
  66         * arm-dis.c (thumb32_opcodes): Define 'D' format control code,
  67         use it for ssat and ssat16.
  68         (print_insn_thumb32): Add handle case for 'D' control code.
  69
  70 2015-04-06  Ilya Tocar  <ilya.tocar@intel.com>
  71             H.J. Lu  <hongjiu.lu@intel.com>
  72
  73         * i386-dis-evex.h (evex_table): Fill prefix_requirement field.
  74         * i386-dis.c (PREFIX_MANDATORY_REPZ, PREFIX_MANDATORY_REPNZ,
  75         PREFIX_MANDATORY_DATA, PREFIX_MANDATORY_ADDR, PREFIX_MANDATORY_LOCK,
  76         PREFIX_UD_SHIFT, PREFIX_UD_REPZ, REFIX_UD_REPNZ, PREFIX_UD_DATA,
  77         PREFIX_UD_ADDR, PREFIX_UD_LOCK, PREFIX_MANDATORY): Define.
  78         (Bad_Opcode, FLOAT, DIS386, DIS386_PREFIX, THREE_BYTE_TABLE_PREFIX):
  79         Fill prefix_requirement field.
  80         (struct dis386): Add prefix_requirement field.
  81         (dis386): Fill prefix_requirement field.
  82         (dis386_twobyte): Ditto.
  83         (twobyte_has_mandatory_prefix_: Remove.
  84         (reg_table): Fill prefix_requirement field.
  85         (prefix_table): Ditto.
  86         (x86_64_table): Ditto.
  87         (three_byte_table): Ditto.
  88         (xop_table): Ditto.
  89         (vex_table): Ditto.
  90         (vex_len_table): Ditto.
  91         (vex_w_table): Ditto.
  92         (mod_table): Ditto.
  93         (bad_opcode): Ditto.
  94         (print_insn): Use prefix_requirement.
  95         (FGRPd9_2, FGRPd9_4, FGRPd9_5, FGRPd9_6, FGRPd9_7, FGRPda_5, FGRPdb_4,
  96         FGRPde_3, FGRPdf_4): Fill prefix_requirement field.
  97         (float_reg): Ditto.
  98
  99 2015-03-30  Mike Frysinger  <vapier@gentoo.org>
 100
 101         * d10v-opc.c (d10v_reg_name_cnt): Convert old style prototype.
 102
 103 2015-03-29  H.J. Lu  <hongjiu.lu@intel.com>
 104
 105         * Makefile.in: Regenerated.
 106
 107 2015-03-25  Anton Blanchard  <anton@samba.org>
 108
 109         * ppc-dis.c (disassemble_init_powerpc): Only initialise
 110         powerpc_opcd_indices and vle_opcd_indices once.
 111
 112 2015-03-25  Anton Blanchard  <anton@samba.org>
 113
 114         * ppc-opc.c (powerpc_opcodes): Add slbfee.
 115
 116 2015-03-24  Terry Guo  <terry.guo@arm.com>
 117
 118         * arm-dis.c (opcode32): Updated to use new arm feature struct.
 119         (opcode16): Likewise.
 120         (coprocessor_opcodes): Replace bit with feature struct.
 121         (neon_opcodes): Likewise.
 122         (arm_opcodes): Likewise.
 123         (thumb_opcodes): Likewise.
 124         (thumb32_opcodes): Likewise.
 125         (print_insn_coprocessor): Likewise.
 126         (print_insn_arm): Likewise.
 127         (select_arm_features): Follow new feature struct.
 128
 129 2015-03-17  Ganesh Gopalasubramanian  <Ganesh.Gopalasubramanian@amd.com>
 130
 131         * i386-dis.c (rm_table): Add clzero.
 132         * i386-gen.c (cpu_flag_init): Add new CPU_ZNVER1_FLAGS.
 133         Add CPU_CLZERO_FLAGS.
 134         (cpu_flags): Add CpuCLZERO.
 135         * i386-opc.h: Add CpuCLZERO.
 136         * i386-opc.tbl: Add clzero.
 137         * i386-init.h: Re-generated.
 138         * i386-tbl.h: Re-generated.
 139
 140 2015-03-13  Andrew Bennett  <andrew.bennett@imgtec.com>
 141
 142         * mips-opc.c (decode_mips_operand): Fix constraint issues
 143         with u and y operands.
 144
 145 2015-03-13  Andrew Bennett  <andrew.bennett@imgtec.com>
 146
 147         * mips-opc.c (mips_builtin_opcodes): Add evp and dvp instructions.
 148
 149 2015-03-10  Andreas Krebbel  <krebbel@linux.vnet.ibm.com>
 150
 151         * s390-opc.c: Add new IBM z13 instructions.
 152         * s390-opc.txt: Likewise.
 153
 154 2015-03-10  Renlin Li  <renlin.li@arm.com>
 155
 156         * aarch64-tbl.h (aarch64_opcode_table): Remove strub, ldurb, ldursb,
 157         stur, ldur, sturh, ldurh, ldursh, ldursw, prfum F_HAS_ALIAS flag and
 158         related alias.
 159         * aarch64-asm-2.c: Regenerate.
 160         * aarch64-dis-2.c: Likewise.
 161         * aarch64-opc-2.c: Likewise.
 162
 163 2015-03-03  Jiong Wang  <jiong.wang@arm.com>
 164
 165         * arm-dis.c (arm_symbol_is_valid): Skip ARM private symbols.
 166
 167 2015-02-25  Oleg Endo  <olegendo@gcc.gnu.org>
 168
 169         * sh-opc.h (clrs, sets): Mark as arch_sh3_nommu_up instead of
 170         arch_sh_up.
 171         (pref): Mark as arch_sh2a_nofpu_or_sh3_nommu_up instead of
 172         arch_sh2a_nofpu_or_sh4_nommu_nofpu_up.
 173
 174 2015-02-23  Vinay  <Vinay.G@kpit.com>
 175
 176         * rl78-decode.opc (MOV): Added space between two operands for
 177         'mov' instruction in index addressing mode.
 178         * rl78-decode.c: Regenerate.
 179
 180 2015-02-19  Pedro Alves  <palves@redhat.com>
 181
 182         * microblaze-dis.h [__cplusplus]: Wrap in extern "C".
 183
 184 2015-02-10  Pedro Alves  <palves@redhat.com>
 185             Tom Tromey  <tromey@redhat.com>
 186
 187         * microblaze-opcm.h (or, and, xor): Rename to microblaze_or,
 188         microblaze_and, microblaze_xor.
 189         * microblaze-opc.h (opcodes): Adjust.
 190
 191 2015-01-28  James Bowman  <james.bowman@ftdichip.com>
 192
 193         * Makefile.am: Add FT32 files.
 194         * configure.ac: Handle FT32.
 195         * disassemble.c (disassembler): Call print_insn_ft32.
 196         * ft32-dis.c: New file.
 197         * ft32-opc.c: New file.
 198         * Makefile.in: Regenerate.
 199         * configure: Regenerate.
 200         * po/POTFILES.in: Regenerate.
 201
 202 2015-01-28 Kuan-Lin Chen <kuanlinchentw@gmail.com>
 203
 204         * nds32-asm.c (keyword_sr): Add new system registers.
 205
 206 2015-01-16  Andreas Krebbel  <krebbel@linux.vnet.ibm.com>
 207
 208         * s390-dis.c (s390_extract_operand): Support vector register
 209         operands.
 210         (s390_print_insn_with_opcode): Support new operands types and add
 211         new handling of optional operands.
 212         * s390-mkopc.c (s390_opcode_mode_val, s390_opcode_cpu_val): Remove
 213         and include opcode/s390.h instead.
 214         (struct op_struct): New field `flags'.
 215         (insertOpcode, insertExpandedMnemonic): New parameter `flags'.
 216         (dumpTable): Dump flags.
 217         (main): Parse flags from the s390-opc.txt file.  Add z13 as cpu
 218         string.
 219         * s390-opc.c: Add new operands types, instruction formats, and
 220         instruction masks.
 221         (s390_opformats): Add new formats for .insn.
 222         * s390-opc.txt: Add new instructions.
 223
 224 2015-01-01  Alan Modra  <amodra@gmail.com>
 225
 226         Update year range in copyright notice of all files.
 227
 228 For older changes see ChangeLog-2014
 229 \f
 230 Copyright (C) 2015 Free Software Foundation, Inc.
 231
 232 Copying and distribution of this file, with or without modification,
 233 are permitted in any medium without royalty provided the copyright
 234 notice and this notice are preserved.
 235
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 237 mode: change-log
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 241 End: