opcodes/ChangeLog

   1 2005-07-07  Kaveh R. Ghazi  <ghazi@caip.rutgers.edu>
   2
   3         * arc-dis.c, arm-dis.c, cris-dis.c, crx-dis.c, d10v-dis.c,
   4         d30v-dis.c, fr30-dis.c, h8300-dis.c, h8500-dis.c, i860-dis.c,
   5         ia64-dis.c, ip2k-dis.c, m10200-dis.c, m10300-dis.c,
   6         m88k-dis.c, mcore-dis.c, mips-dis.c, ms1-dis.c, or32-dis.c,
   7         ppc-dis.c, sh64-dis.c, sparc-dis.c, tic4x-dis.c, tic80-dis.c,
   8         v850-dis.c: Fix format bugs.
   9         * ia64-gen.c (fail, warn): Add format attribute.
  10         * or32-opc.c (debug): Likewise.
  11
  12 2005-07-07  Khem Raj  <kraj@mvista.com>
  13
  14         * arm-dis.c (opcode32 arm_opcodes): Fix ARM VFP fadds instruction
  15         disassembly pattern.
  16
  17 2005-07-06  Alan Modra  <amodra@bigpond.net.au>
  18
  19         * Makefile.am (stamp-m32r): Fix path to cpu files.
  20         (stamp-m32r, stamp-iq2000): Likewise.
  21         * Makefile.in: Regenerate.
  22         * m32r-asm.c: Regenerate.
  23         * po/POTFILES.in: Remove arm-opc.h.  Add ms1-asm.c, ms1-desc.c,
  24         ms1-desc.h, ms1-dis.c, ms1-ibld.c, ms1-opc.c, ms1-opc.h.
  25
  26 2005-07-05  Nick Clifton  <nickc@redhat.com>
  27
  28         * iq2000-asm.c: Regenerate.
  29         * ms1-asm.c: Regenerate.
  30
  31 2005-07-05  Jan Beulich  <jbeulich@novell.com>
  32
  33         * i386-dis.c (SVME_Fixup): New.
  34         (grps): Use it for the lidt entry.
  35         (PNI_Fixup): Call OP_M rather than OP_E.
  36         (INVLPG_Fixup): Likewise.
  37
  38 2005-07-04  H.J. Lu  <hongjiu.lu@intel.com>
  39
  40         * tic30-dis.c (cnvt_tmsfloat_ieee): Use HUGE_VALF if defined.
  41
  42 2005-07-01  Nick Clifton  <nickc@redhat.com>
  43
  44         * a29k-dis.c: Update to ISO C90 style function declarations and
  45         fix formatting.
  46         * alpha-opc.c: Likewise.
  47         * arc-dis.c: Likewise.
  48         * arc-opc.c: Likewise.
  49         * avr-dis.c: Likewise.
  50         * cgen-asm.in: Likewise.
  51         * cgen-dis.in: Likewise.
  52         * cgen-ibld.in: Likewise.
  53         * cgen-opc.c: Likewise.
  54         * cris-dis.c: Likewise.
  55         * d10v-dis.c: Likewise.
  56         * d30v-dis.c: Likewise.
  57         * d30v-opc.c: Likewise.
  58         * dis-buf.c: Likewise.
  59         * dlx-dis.c: Likewise.
  60         * h8300-dis.c: Likewise.
  61         * h8500-dis.c: Likewise.
  62         * hppa-dis.c: Likewise.
  63         * i370-dis.c: Likewise.
  64         * i370-opc.c: Likewise.
  65         * m10200-dis.c: Likewise.
  66         * m10300-dis.c: Likewise.
  67         * m68k-dis.c: Likewise.
  68         * m88k-dis.c: Likewise.
  69         * mips-dis.c: Likewise.
  70         * mmix-dis.c: Likewise.
  71         * msp430-dis.c: Likewise.
  72         * ns32k-dis.c: Likewise.
  73         * or32-dis.c: Likewise.
  74         * or32-opc.c: Likewise.
  75         * pdp11-dis.c: Likewise.
  76         * pj-dis.c: Likewise.
  77         * s390-dis.c: Likewise.
  78         * sh-dis.c: Likewise.
  79         * sh64-dis.c: Likewise.
  80         * sparc-dis.c: Likewise.
  81         * sparc-opc.c: Likewise.
  82         * sysdep.h: Likewise.
  83         * tic30-dis.c: Likewise.
  84         * tic4x-dis.c: Likewise.
  85         * tic80-dis.c: Likewise.
  86         * v850-dis.c: Likewise.
  87         * v850-opc.c: Likewise.
  88         * vax-dis.c: Likewise.
  89         * w65-dis.c: Likewise.
  90         * z8kgen.c: Likewise.
  91
  92         * fr30-*: Regenerate.
  93         * frv-*: Regenerate.
  94         * ip2k-*: Regenerate.
  95         * iq2000-*: Regenerate.
  96         * m32r-*: Regenerate.
  97         * ms1-*: Regenerate.
  98         * openrisc-*: Regenerate.
  99         * xstormy16-*: Regenerate.
 100
 101 2005-06-23  Ben Elliston  <bje@gnu.org>
 102
 103         * m68k-dis.c: Use ISC C90.
 104         * m68k-opc.c: Formatting fixes.
 105
 106 2005-06-16  David Ung  <davidu@mips.com>
 107
 108         * mips16-opc.c (mips16_opcodes): Add the following MIPS16e
 109         instructions to the table; seb/seh/sew/zeb/zeh/zew.
 110
 111 2005-06-15  Dave Brolley  <brolley@redhat.com>
 112
 113         Contribute Morpho ms1 on behalf of Red Hat
 114         * ms1-asm.c, ms1-desc.c, ms1-dis.c, ms1-ibld.c, ms1-opc.c,
 115         ms1-opc.h: New files, Morpho ms1 target.
 116
 117         2004-05-14  Stan Cox  <scox@redhat.com>
 118
 119         * disassemble.c (ARCH_ms1): Define.
 120         (disassembler): Handle bfd_arch_ms1
 121
 122         2004-05-13  Michael Snyder  <msnyder@redhat.com>
 123
 124         * Makefile.am, Makefile.in: Add ms1 target.
 125         * configure.in: Ditto.
 126
 127 2005-06-08  Zack Weinberg  <zack@codesourcery.com>
 128
 129         * arm-opc.h: Delete; fold contents into ...
 130         * arm-dis.c: ... here.  Move includes of internal COFF headers
 131         next to includes of internal ELF headers.
 132         (streq, WORD_ADDRESS, BDISP, BDISP23): Delete, unused.
 133         (struct arm_opcode): Rename struct opcode32.  Make 'assembler' const.
 134         (struct thumb_opcode): Rename struct opcode16.  Make 'assembler' const.
 135         (arm_conditional, arm_fp_const, arm_shift, arm_regname, regnames)
 136         (iwmmxt_wwnames, iwmmxt_wwssnames):
 137         Make const.
 138         (regnames): Remove iWMMXt coprocessor register sets.
 139         (iwmmxt_regnames, iwmmxt_cregnames): New statics.
 140         (get_arm_regnames): Adjust fourth argument to match above changes.
 141         (set_iwmmxt_regnames): Delete.
 142         (print_insn_arm): Constify 'c'.  Use ISO syntax for function
 143         pointer calls.  Expand sole use of BDISP.  Use iwmmxt_regnames
 144         and iwmmxt_cregnames, not set_iwmmxt_regnames.
 145         (print_insn_thumb16, print_insn_thumb32): Constify 'c'.  Use
 146         ISO syntax for function pointer calls.
 147
 148 2005-06-07  Zack Weinberg  <zack@codesourcery.com>
 149
 150         * arm-dis.c: Split up the comments describing the format codes, so
 151         that the ARM and 16-bit Thumb opcode tables each have comments
 152         preceding them that describe all the codes, and only the codes,
 153         valid in those tables.  (32-bit Thumb table is already like this.)
 154         Reorder the lists in all three comments to match the order in
 155         which the codes are implemented.
 156         Remove all forward declarations of static functions.  Convert all
 157         function definitions to ISO C format.
 158         (print_insn_arm, print_insn_thumb16, print_insn_thumb32):
 159         Return nothing.
 160         (print_insn_thumb16): Remove unused case 'I'.
 161         (print_insn): Update for changed calling convention of subroutines.
 162
 163 2005-05-25  Jan Beulich  <jbeulich@novell.com>
 164
 165         * i386-dis.c (OP_E): In Intel mode, display 32-bit displacements in
 166         hex (but retain it being displayed as signed). Remove redundant
 167         checks. Add handling of displacements for 16-bit addressing in Intel
 168         mode.
 169
 170 2005-05-25  Jan Beulich  <jbeulich@novell.com>
 171
 172         * i386-dis.c (prefix_name): Remove pointless mode_64bit check.
 173         (OP_E): Remove redundant REX_EXTZ handling. Remove pointless
 174         masking of 'rm' in 16-bit memory address handling.
 175
 176 2005-05-19  Anton Blanchard  <anton@samba.org>
 177
 178         * ppc-dis.c (powerpc_dialect): Handle "-Mpower5".
 179         (print_ppc_disassembler_options): Document it.
 180         * ppc-opc.c (SVC_LEV): Define.
 181         (LEV): Allow optional operand.
 182         (POWER5): Define.
 183         (powerpc_opcodes): Extend "sc".  Adjust "svc" and "svcl".  Add
 184         "hrfid", "popcntb", "fsqrtes", "fsqrtes.", "fre" and "fre.".
 185
 186 2005-05-19  Kelley Cook  <kcook@gcc.gnu.org>
 187
 188         * Makefile.in:  Regenerate.
 189
 190 2005-05-17  Zack Weinberg  <zack@codesourcery.com>
 191
 192         * arm-dis.c (thumb_opcodes): Add disassembly for V6T2 16-bit
 193         instructions.  Adjust disassembly of some opcodes to match
 194         unified syntax.
 195         (thumb32_opcodes): New table.
 196         (print_insn_thumb): Rename print_insn_thumb16; don't handle
 197         two-halfword branches here.
 198         (print_insn_thumb32): New function.
 199         (print_insn): Choose among print_insn_arm, print_insn_thumb16,
 200         and print_insn_thumb32.  Be consistent about order of
 201         halfwords when printing 32-bit instructions.
 202
 203 2005-05-07  H.J. Lu  <hongjiu.lu@intel.com>
 204
 205         PR 843
 206         * i386-dis.c (branch_v_mode): New.
 207         (indirEv): Use branch_v_mode instead of v_mode.
 208         (OP_E): Handle branch_v_mode.
 209
 210 2005-05-07  H.J. Lu  <hongjiu.lu@intel.com>
 211
 212         * d10v-dis.c (dis_2_short): Support 64bit host.
 213
 214 2005-05-07  Nick Clifton  <nickc@redhat.com>
 215
 216         * po/nl.po: Updated translation.
 217
 218 2005-05-07  Nick Clifton  <nickc@redhat.com>
 219
 220         * Update the address and phone number of the FSF organization in
 221         the GPL notices in the following files:
 222         a29k-dis.c, aclocal.m4, alpha-dis.c, alpha-opc.c, arc-dis.c,
 223         arc-dis.h, arc-ext.c, arc-ext.h, arc-opc.c, arm-dis.c, arm-opc.h,
 224         avr-dis.c, cgen-asm.c, cgen-asm.in, cgen-dis.c, cgen-dis.in,
 225         cgen-ibld.in, cgen-opc.c, cgen.sh, cris-dis.c, cris-opc.c,
 226         crx-dis.c, crx-opc.c, d10v-dis.c, d10v-opc.c, d30v-dis.c,
 227         d30v-opc.c, dis-buf.c, dis-init.c, disassemble.c, dlx-dis.c,
 228         fr30-asm.c, fr30-desc.c, fr30-desc.h, fr30-dis.c, fr30-ibld.c,
 229         fr30-opc.c, fr30-opc.h, frv-asm.c, frv-desc.c, frv-desc.h,
 230         frv-dis.c, frv-ibld.c, frv-opc.c, frv-opc.h, h8300-dis.c,
 231         h8500-dis.c, h8500-opc.h, hppa-dis.c, i370-dis.c, i370-opc.c,
 232         i386-dis.c, i860-dis.c, i960-dis.c, ia64-asmtab.h, ia64-dis.c,
 233         ia64-gen.c, ia64-opc-a.c, ia64-opc-b.c, ia64-opc-d.c,
 234         ia64-opc-f.c, ia64-opc-i.c, ia64-opc-m.c, ia64-opc-x.c,
 235         ia64-opc.c, ia64-opc.h, ip2k-asm.c, ip2k-desc.c, ip2k-desc.h,
 236         ip2k-dis.c, ip2k-ibld.c, ip2k-opc.c, ip2k-opc.h, iq2000-asm.c,
 237         iq2000-desc.c, iq2000-desc.h, iq2000-dis.c, iq2000-ibld.c,
 238         iq2000-opc.c, iq2000-opc.h, m10200-dis.c, m10200-opc.c,
 239         m10300-dis.c, m10300-opc.c, m32r-asm.c, m32r-desc.c, m32r-desc.h,
 240         m32r-dis.c, m32r-ibld.c, m32r-opc.c, m32r-opc.h, m32r-opinst.c,
 241         m68hc11-dis.c, m68hc11-opc.c, m68k-dis.c, m68k-opc.c, m88k-dis.c,
 242         maxq-dis.c, mcore-dis.c, mcore-opc.h, mips-dis.c, mips-opc.c,
 243         mips16-opc.c, mmix-dis.c, mmix-opc.c, msp430-dis.c, ns32k-dis.c,
 244         openrisc-asm.c, openrisc-desc.c, openrisc-desc.h, openrisc-dis.c,
 245         openrisc-ibld.c, openrisc-opc.c, openrisc-opc.h, opintl.h,
 246         or32-dis.c, or32-opc.c, pdp11-dis.c, pdp11-opc.c, pj-dis.c,
 247         pj-opc.c, ppc-dis.c, ppc-opc.c, s390-dis.c, s390-mkopc.c,
 248         s390-opc.c, sh-dis.c, sh-opc.h, sh64-dis.c, sh64-opc.c,
 249         sh64-opc.h, sparc-dis.c, sparc-opc.c, sysdep.h, tic30-dis.c,
 250         tic4x-dis.c, tic54x-dis.c, tic54x-opc.c, tic80-dis.c, tic80-opc.c,
 251         v850-dis.c, v850-opc.c, vax-dis.c, w65-dis.c, w65-opc.h,
 252         xstormy16-asm.c, xstormy16-desc.c, xstormy16-desc.h,
 253         xstormy16-dis.c, xstormy16-ibld.c, xstormy16-opc.c,
 254         xstormy16-opc.h, xtensa-dis.c, z8k-dis.c, z8kgen.c
 255
 256 2005-05-05  James E Wilson  <wilson@specifixinc.com>
 257
 258         * ia64-opc.c: Include sysdep.h before libiberty.h.
 259
 260 2005-05-05  Nick Clifton  <nickc@redhat.com>
 261
 262         * configure.in (ALL_LINGUAS): Add vi.
 263         * configure: Regenerate.
 264         * po/vi.po: New.
 265
 266 2005-04-26  Jerome Guitton  <guitton@gnat.com>
 267
 268         * configure.in: Fix the check for basename declaration.
 269         * configure: Regenerate.
 270
 271 2005-04-19  Alan Modra  <amodra@bigpond.net.au>
 272
 273         * ppc-opc.c (RTO): Define.
 274         (powerpc_opcodes <tlbsx, tlbsx., tlbre>): Combine PPC403 and BOOKE
 275         entries to suit PPC440.
 276
 277 2005-04-18  Mark Kettenis  <kettenis@gnu.org>
 278
 279         * i386-dis.c: Insert hyphens into selected VIA PadLock extensions.
 280         Add xcrypt-ctr.
 281
 282 2005-04-14  Nick Clifton  <nickc@redhat.com>
 283
 284         * po/fi.po: New translation: Finnish.
 285         * configure.in (ALL_LINGUAS): Add fi.
 286         * configure: Regenerate.
 287
 288 2005-04-14  Alan Modra  <amodra@bigpond.net.au>
 289
 290         * Makefile.am (NO_WERROR): Define.
 291         * configure.in: Invoke AM_BINUTILS_WARNINGS.
 292         * Makefile.in: Regenerate.
 293         * aclocal.m4: Regenerate.
 294         * configure: Regenerate.
 295
 296 2005-04-04  Nick Clifton  <nickc@redhat.com>
 297
 298         * fr30-asm.c: Regenerate.
 299         * frv-asm.c: Regenerate.
 300         * iq2000-asm.c: Regenerate.
 301         * m32r-asm.c: Regenerate.
 302         * openrisc-asm.c: Regenerate.
 303
 304 2005-04-01  Jan Beulich  <jbeulich@novell.com>
 305
 306         * i386-dis.c (PNI_Fixup): Neither mwait nor monitor have any
 307         visible operands in Intel mode. The first operand of monitor is
 308         %rax in 64-bit mode.
 309
 310 2005-04-01  Jan Beulich  <jbeulich@novell.com>
 311
 312         * i386-dis.c (INVLPG_Fixup): Decode rdtscp; change code to allow for
 313         easier future additions.
 314
 315 2005-03-31  Jerome Guitton  <guitton@gnat.com>
 316
 317         * configure.in: Check for basename.
 318         * configure: Regenerate.
 319         * config.in: Ditto.
 320
 321 2005-03-29  H.J. Lu  <hongjiu.lu@intel.com>
 322
 323         * i386-dis.c (SEG_Fixup): New.
 324         (Sv): New.
 325         (dis386): Use "Sv" for 0x8c and 0x8e.
 326
 327 2005-03-21  Jan-Benedict Glaw  <jbglaw@lug-owl.de>
 328             Nick Clifton  <nickc@redhat.com>
 329
 330         * vax-dis.c: (entry_addr): New varible:  An array of user supplied
 331         function entry mask addresses.
 332         (entry_addr_occupied_slots): New variable: The number of occupied
 333         elements in entry_addr.
 334         (entry_addr_total_slots): New variable: The total number of
 335         elements in entry_addr.
 336         (parse_disassembler_options): New function.  Fills in the entry_addr
 337         array.
 338         (free_entry_array): New function.  Release the memory used by the
 339         entry addr array.  Suppressed because there is no way to call it.
 340         (is_function_entry): Check if a given address is a function's
 341         start address by looking at supplied entry mask addresses and
 342         symbol information, if available.
 343         (print_insn_vax): Use parse_disassembler_options and is_function_entry.
 344
 345 2005-03-23  H.J. Lu  <hongjiu.lu@intel.com>
 346
 347         * cris-dis.c (print_with_operands): Use ~31L for long instead
 348         of ~31.
 349
 350 2005-03-20  H.J. Lu  <hongjiu.lu@intel.com>
 351
 352         * mmix-opc.c (O): Revert the last change.
 353         (Z): Likewise.
 354
 355 2005-03-19  H.J. Lu  <hongjiu.lu@intel.com>
 356
 357         * mmix-opc.c (O): Use 24UL instead of 24 for unsigned long.
 358         (Z): Likewise.
 359
 360 2005-03-19  Hans-Peter Nilsson  <hp@bitrange.com>
 361
 362         * mmix-opc.c (O, Z): Force expression as unsigned long.
 363
 364 2005-03-18  Nick Clifton  <nickc@redhat.com>
 365
 366         * ip2k-asm.c: Regenerate.
 367         * op/opcodes.pot: Regenerate.
 368
 369 2005-03-16  Nick Clifton  <nickc@redhat.com>
 370             Ben Elliston  <bje@au.ibm.com>
 371
 372         * configure.in (werror): New switch: Add -Werror to the
 373         compiler command line.  Enabled by default.  Disable via
 374         --disable-werror.
 375         * configure: Regenerate.
 376
 377 2005-03-16  Alan Modra  <amodra@bigpond.net.au>
 378
 379         * ppc-dis.c (powerpc_dialect): Don't set PPC_OPCODE_ALTIVEC when
 380         BOOKE.
 381
 382 2005-03-15  Alan Modra  <amodra@bigpond.net.au>
 383
 384         * po/es.po: Commit new Spanish translation.
 385
 386         * po/fr.po: Commit new French translation.
 387
 388 2005-03-14  Jan-Benedict Glaw  <jbglaw@lug-owl.de>
 389
 390         * vax-dis.c: Fix spelling error
 391         (print_insn_vax): Use ".word 0x0012 # Entry mask: r1 r2 >" instead
 392         of just "Entry mask: < r1 ... >"
 393
 394 2005-03-12  Zack Weinberg  <zack@codesourcery.com>
 395
 396         * arm-dis.c (arm_opcodes): Document %E and %V.
 397         Add entries for v6T2 ARM instructions:
 398         bfc bfi mls strht ldrht ldrsht ldrsbt movw movt rbit ubfx sbfx.
 399         (print_insn_arm): Add support for %E and %V.
 400         (thumb_opcodes): Add ARMv6K instructions nop, sev, wfe, wfi, yield.
 401
 402 2005-03-10  Jeff Baker  <jbaker@qnx.com>
 403             Alan Modra  <amodra@bigpond.net.au>
 404
 405         * ppc-opc.c (insert_sprg, extract_sprg): New Functions.
 406         (powerpc_operands <SPRG>): Call the above.  Bit field is 5 bits.
 407         (SPRG_MASK): Delete.
 408         (XSPRG_MASK): Mask off extra bits now part of sprg field.
 409         (powerpc_opcodes): Asjust mfsprg and mtsprg to suit new mask.  Move
 410         mfsprg4..7 after msprg and consolidate.
 411
 412 2005-03-09  Jan-Benedict Glaw  <jbglaw@lug-owl.de>
 413
 414         * vax-dis.c (entry_mask_bit): New array.
 415         (print_insn_vax): Decode function entry mask.
 416
 417 2005-03-07  Aldy Hernandez  <aldyh@redhat.com>
 418
 419         * ppc-opc.c (powerpc_opcodes): Fix encoding of efscfd.
 420
 421 2005-03-05  Alan Modra  <amodra@bigpond.net.au>
 422
 423         * po/opcodes.pot: Regenerate.
 424
 425 2005-03-03  Ramana Radhakrishnan  <ramana.radhakrishnan@codito.com>
 426
 427         * arc-dis.c (a4_decoding_class): New enum.
 428         (dsmOneArcInst): Use the enum values for the decoding class.
 429         Remove redundant case in the switch for decodingClass value 11.
 430
 431 2005-03-02  Jan Beulich  <jbeulich@novell.com>
 432
 433         * i386-dis.c (print_insn): Suppress lock prefix printing for cr8...15
 434         accesses.
 435         (OP_C): Consider lock prefix in non-64-bit modes.
 436
 437 2005-02-24  Alan Modra  <amodra@bigpond.net.au>
 438
 439         * cris-dis.c (format_hex): Remove ineffective warning fix.
 440         * crx-dis.c (make_instruction): Warning fix.
 441         * frv-asm.c: Regenerate.
 442
 443 2005-02-23  Nick Clifton  <nickc@redhat.com>
 444
 445         * cgen-dis.in: Use bfd_byte for buffers that are passed to
 446         read_memory.
 447
 448         * ia64-opc.c (locate_opcode_ent): Initialise opval array.
 449
 450         * crx-dis.c (make_instruction): Move argument structure into inner
 451         scope and ensure that all of its fields are initialised before
 452         they are used.
 453
 454         * fr30-asm.c: Regenerate.
 455         * fr30-dis.c: Regenerate.
 456         * frv-asm.c: Regenerate.
 457         * frv-dis.c: Regenerate.
 458         * ip2k-asm.c: Regenerate.
 459         * ip2k-dis.c: Regenerate.
 460         * iq2000-asm.c: Regenerate.
 461         * iq2000-dis.c: Regenerate.
 462         * m32r-asm.c: Regenerate.
 463         * m32r-dis.c: Regenerate.
 464         * openrisc-asm.c: Regenerate.
 465         * openrisc-dis.c: Regenerate.
 466         * xstormy16-asm.c: Regenerate.
 467         * xstormy16-dis.c: Regenerate.
 468
 469 2005-02-22  Alan Modra  <amodra@bigpond.net.au>
 470
 471         * arc-ext.c: Warning fixes.
 472         * arc-ext.h: Likewise.
 473         * cgen-opc.c: Likewise.
 474         * ia64-gen.c: Likewise.
 475         * maxq-dis.c: Likewise.
 476         * ns32k-dis.c: Likewise.
 477         * w65-dis.c: Likewise.
 478         * ia64-asmtab.c: Regenerate.
 479
 480 2005-02-22  Alan Modra  <amodra@bigpond.net.au>
 481
 482         * fr30-desc.c: Regenerate.
 483         * fr30-desc.h: Regenerate.
 484         * fr30-opc.c: Regenerate.
 485         * fr30-opc.h: Regenerate.
 486         * frv-desc.c: Regenerate.
 487         * frv-desc.h: Regenerate.
 488         * frv-opc.c: Regenerate.
 489         * frv-opc.h: Regenerate.
 490         * ip2k-desc.c: Regenerate.
 491         * ip2k-desc.h: Regenerate.
 492         * ip2k-opc.c: Regenerate.
 493         * ip2k-opc.h: Regenerate.
 494         * iq2000-desc.c: Regenerate.
 495         * iq2000-desc.h: Regenerate.
 496         * iq2000-opc.c: Regenerate.
 497         * iq2000-opc.h: Regenerate.
 498         * m32r-desc.c: Regenerate.
 499         * m32r-desc.h: Regenerate.
 500         * m32r-opc.c: Regenerate.
 501         * m32r-opc.h: Regenerate.
 502         * m32r-opinst.c: Regenerate.
 503         * openrisc-desc.c: Regenerate.
 504         * openrisc-desc.h: Regenerate.
 505         * openrisc-opc.c: Regenerate.
 506         * openrisc-opc.h: Regenerate.
 507         * xstormy16-desc.c: Regenerate.
 508         * xstormy16-desc.h: Regenerate.
 509         * xstormy16-opc.c: Regenerate.
 510         * xstormy16-opc.h: Regenerate.
 511
 512 2005-02-21  Alan Modra  <amodra@bigpond.net.au>
 513
 514         * Makefile.am: Run "make dep-am"
 515         * Makefile.in: Regenerate.
 516
 517 2005-02-15  Nick Clifton  <nickc@redhat.com>
 518
 519         * cgen-dis.in (print_address): Add an ATTRIBUTE_UNUSED to prevent
 520         compile time warnings.
 521         (print_keyword): Likewise.
 522         (default_print_insn): Likewise.
 523
 524         * fr30-desc.c: Regenerated.
 525         * fr30-desc.h: Regenerated.
 526         * fr30-dis.c: Regenerated.
 527         * fr30-opc.c: Regenerated.
 528         * fr30-opc.h: Regenerated.
 529         * frv-desc.c: Regenerated.
 530         * frv-dis.c: Regenerated.
 531         * frv-opc.c: Regenerated.
 532         * ip2k-asm.c: Regenerated.
 533         * ip2k-desc.c: Regenerated.
 534         * ip2k-desc.h: Regenerated.
 535         * ip2k-dis.c: Regenerated.
 536         * ip2k-opc.c: Regenerated.
 537         * ip2k-opc.h: Regenerated.
 538         * iq2000-desc.c: Regenerated.
 539         * iq2000-dis.c: Regenerated.
 540         * iq2000-opc.c: Regenerated.
 541         * m32r-asm.c: Regenerated.
 542         * m32r-desc.c: Regenerated.
 543         * m32r-desc.h: Regenerated.
 544         * m32r-dis.c: Regenerated.
 545         * m32r-opc.c: Regenerated.
 546         * m32r-opc.h: Regenerated.
 547         * m32r-opinst.c: Regenerated.
 548         * openrisc-desc.c: Regenerated.
 549         * openrisc-desc.h: Regenerated.
 550         * openrisc-dis.c: Regenerated.
 551         * openrisc-opc.c: Regenerated.
 552         * openrisc-opc.h: Regenerated.
 553         * xstormy16-desc.c: Regenerated.
 554         * xstormy16-desc.h: Regenerated.
 555         * xstormy16-dis.c: Regenerated.
 556         * xstormy16-opc.c: Regenerated.
 557         * xstormy16-opc.h: Regenerated.
 558
 559 2005-02-14  H.J. Lu  <hongjiu.lu@intel.com>
 560
 561         * dis-buf.c (perror_memory): Use sprintf_vma to print out
 562         address.
 563
 564 2005-02-11  Nick Clifton  <nickc@redhat.com>
 565
 566         * iq2000-asm.c: Regenerate.
 567
 568         * frv-dis.c: Regenerate.
 569
 570 2005-02-07  Jim Blandy  <jimb@redhat.com>
 571
 572         * Makefile.am (CGEN): Load guile.scm before calling the main
 573         application script.
 574         * Makefile.in: Regenerated.
 575         * cgen.sh: Be prepared for the 'cgen' argument to contain spaces.
 576         Simply pass the cgen-opc.scm path to ${cgen} as its first
 577         argument; ${cgen} itself now contains the '-s', or whatever is
 578         appropriate for the Scheme being used.
 579
 580 2005-01-31  Andrew Cagney  <cagney@gnu.org>
 581
 582         * configure: Regenerate to track ../gettext.m4.
 583
 584 2005-01-31  Jan Beulich  <jbeulich@novell.com>
 585
 586         * ia64-gen.c (NELEMS): Define.
 587         (shrink): Generate alias with missing second predicate register when
 588         opcode has two outputs and these are both predicates.
 589         * ia64-opc-i.c (FULL17): Define.
 590         (ia64_opcodes_i): Add mov-to-pr alias without second input. Use FULL17
 591         here to generate output template.
 592         (TBITCM, TNATCM): Undefine after use.
 593         * ia64-opc-m.c (ia64_opcodes_i): Add alloc alias without ar.pfs as
 594         first input. Add ld16 aliases without ar.csd as second output. Add
 595         st16 aliases without ar.csd as second input. Add cmpxchg aliases
 596         without ar.ccv as third input. Add cmp8xchg16 aliases without ar.csd/
 597         ar.ccv as third/fourth inputs. Consolidate through...
 598         (CMPXCHG_acq, CMPXCHG_rel, CMPXCHG_1, CMPXCHG_2, CMPXCHG_4, CMPXCHG_8,
 599         CMPXCHGn, CMP8XCHG16, CMPXCHG_ALL): Define.
 600         * ia64-asmtab.c: Regenerate.
 601
 602 2005-01-27  Andrew Cagney  <cagney@gnu.org>
 603
 604         * configure: Regenerate to track ../gettext.m4 change.
 605
 606 2005-01-25  Alexandre Oliva  <aoliva@redhat.com>
 607
 608         2004-11-10  Alexandre Oliva  <aoliva@redhat.com>
 609         * frv-asm.c: Rebuilt.
 610         * frv-desc.c: Rebuilt.
 611         * frv-desc.h: Rebuilt.
 612         * frv-dis.c: Rebuilt.
 613         * frv-ibld.c: Rebuilt.
 614         * frv-opc.c: Rebuilt.
 615         * frv-opc.h: Rebuilt.
 616
 617 2005-01-24  Andrew Cagney  <cagney@gnu.org>
 618
 619         * configure: Regenerate, ../gettext.m4 was updated.
 620
 621 2005-01-21  Fred Fish  <fnf@specifixinc.com>
 622
 623         * mips-opc.c:  Change INSN_ALIAS to INSN2_ALIAS.
 624         Change INSN_WRITE_MDMX_ACC to INSN2_WRITE_MDMX_ACC.
 625         Change INSN_READ_MDMX_ACC to INSN2_READ_MDMX_ACC.
 626         * mips-dis.c: Ditto.
 627
 628 2005-01-20  Alan Modra  <amodra@bigpond.net.au>
 629
 630         * ppc-opc.c (powerpc_opcodes): Add optional 'l' arg to tlbiel.
 631
 632 2005-01-19  Fred Fish  <fnf@specifixinc.com>
 633
 634         * mips-dis.c (no_aliases): New disassembly option flag.
 635         (set_default_mips_dis_options): Init no_aliases to zero.
 636         (parse_mips_dis_option): Handle no-aliases option.
 637         (print_insn_mips): Ignore table entries that are aliases
 638         if no_aliases is set.
 639         (print_insn_mips16): Ditto.
 640         * mips-opc.c (mips_builtin_opcodes): Add initializer column for
 641         new pinfo2 member and add INSN_ALIAS initializers as needed.  Also
 642         move WR_MACC and RD_MACC initializers from pinfo to pinfo2.
 643         * mips16-opc.c (mips16_opcodes): Ditto.
 644
 645 2005-01-17  Andrew Stubbs  <andrew.stubbs@st.com>
 646
 647         * sh-opc.h (arch_sh2a_or_sh3e,arch_sh2a_or_sh4): Correct definition.
 648         (inheritance diagram): Add missing edge.
 649         (arch_sh1_up): Rename arch_sh_up to match external name to make life
 650         easier for the testsuite.
 651         (arch_sh4_nofp_up): Likewise, rename arch_sh4_nofpu_up.
 652         (arch_sh4a_nofp_up): Likewise, rename arch_sh4a_nofpu_up.
 653         (arch_sh2a_nofpu_or_sh4_nommu_nofpu_up): Add missing
 654         arch_sh2a_or_sh4_up child.
 655         (sh_table): Do renaming as above.
 656         Correct comment for ldc.l for gas testsuite to read.
 657         Remove rogue mul.l from sh1 (duplicate of the one for sh2).
 658         Correct comments for movy.w and movy.l for gas testsuite to read.
 659         Correct comments for fmov.d and fmov.s for gas testsuite to read.
 660
 661 2005-01-12  H.J. Lu  <hongjiu.lu@intel.com>
 662
 663         * i386-dis.c (OP_E): Don't ignore scale in SIB for 64 bit mode.
 664
 665 2005-01-12  H.J. Lu  <hongjiu.lu@intel.com>
 666
 667         * i386-dis.c (OP_E): Ignore scale when index == 0x4 in SIB.
 668
 669 2005-01-10  Andreas Schwab  <schwab@suse.de>
 670
 671         * disassemble.c (disassemble_init_for_target) <case
 672         bfd_arch_ia64>: Set skip_zeroes to 16.
 673         <case bfd_arch_tic4x>: Set skip_zeroes to 32.
 674
 675 2004-12-23  Tomer Levi  <Tomer.Levi@nsc.com>
 676
 677         * crx-opc.c: Mark 'bcop' instruction as RELAXABLE.
 678
 679 2004-12-14  Svein E. Seldal  <Svein.Seldal@solidas.com>
 680
 681         * avr-dis.c: Prettyprint. Added printing of symbol names in all
 682         memory references. Convert avr_operand() to C90 formatting.
 683
 684 2004-12-05  Tomer Levi  <Tomer.Levi@nsc.com>
 685
 686         * crx-dis.c (print_arg): Use 'info->print_address_func' for address printing.
 687
 688 2004-11-29  Tomer Levi  <Tomer.Levi@nsc.com>
 689
 690         * crx-opc.c (crx_optab): Mark all rbase_disps* operands as signed.
 691         (no_op_insn): Initialize array with instructions that have no
 692         operands.
 693         * crx-dis.c (make_instruction): Get rid of COP_BRANCH_INS operand swapping.
 694
 695 2004-11-29  Richard Earnshaw  <rearnsha@arm.com>
 696
 697         * arm-dis.c: Correct top-level comment.
 698
 699 2004-11-27  Richard Earnshaw  <rearnsha@arm.com>
 700
 701         * arm-opc.h (arm_opcode, thumb_opcode): Add extra field for the
 702         architecuture defining the insn.
 703         (arm_opcodes, thumb_opcodes): Delete.  Move to ...
 704         * arm-dis.c (arm_opcodes, thumb_opcodes): Here.  Add architecutre
 705         field.
 706         Also include opcode/arm.h.
 707         * Makefile.am (arm-dis.lo): Update dependency list.
 708         * Makefile.in: Regenerate.
 709
 710 2004-11-22  Ravi Ramaseshan  <ravi.ramaseshan@codito.com>
 711
 712         * opcode/arc-opc.c (insert_base): Modify ls_operand[LS_OFFSET] to
 713         reflect the change to the short immediate syntax.
 714
 715 2004-11-19  Alan Modra  <amodra@bigpond.net.au>
 716
 717         * or32-opc.c (debug): Warning fix.
 718         * po/POTFILES.in: Regenerate.
 719
 720         * maxq-dis.c: Formatting.
 721         (print_insn): Warning fix.
 722
 723 2004-11-17  Daniel Jacobowitz  <dan@codesourcery.com>
 724
 725         * arm-dis.c (WORD_ADDRESS): Define.
 726         (print_insn): Use it.  Correct big-endian end-of-section handling.
 727
 728 2004-11-08  Inderpreet Singh   <inderpreetb@nioda.hcltech.com>
 729             Vineet Sharma      <vineets@noida.hcltech.com>
 730
 731         * maxq-dis.c: New file.
 732         * disassemble.c (ARCH_maxq): Define.
 733         (disassembler): Add 'print_insn_maxq_little' for handling maxq
 734         instructions..
 735         * configure.in: Add case for bfd_maxq_arch.
 736         * configure: Regenerate.
 737         * Makefile.am: Add support for maxq-dis.c
 738         * Makefile.in: Regenerate.
 739         * aclocal.m4: Regenerate.
 740
 741 2004-11-05  Tomer Levi  <Tomer.Levi@nsc.com>
 742
 743         * crx-opc.c (crx_optab): Rename 'arg_icr' to 'arg_idxr' for Index register
 744         mode.
 745         * crx-dis.c: Likewise.
 746
 747 2004-11-04  Hans-Peter Nilsson  <hp@axis.com>
 748
 749         Generally, handle CRISv32.
 750         * cris-dis.c (TRACE_CASE): Define as (disdata->trace_case).
 751         (struct cris_disasm_data): New type.
 752         (format_reg, format_hex, cris_constraint, print_flags)
 753         (get_opcode_entry): Add struct cris_disasm_data * parameter.  All
 754         callers changed.
 755         (format_sup_reg, print_insn_crisv32_with_register_prefix)
 756         (print_insn_crisv32_without_register_prefix)
 757         (print_insn_crisv10_v32_with_register_prefix)
 758         (print_insn_crisv10_v32_without_register_prefix)
 759         (cris_parse_disassembler_options): New functions.
 760         (bytes_to_skip, cris_spec_reg): Add enum cris_disass_family
 761         parameter.  All callers changed.
 762         (get_opcode_entry): Call malloc, not xmalloc.  Return NULL on
 763         failure.
 764         (cris_constraint) <case 'Y', 'U'>: New cases.
 765         (bytes_to_skip): Handle 'Y' and 'N' as 's'.  Skip size is 4 bytes
 766         for constraint 'n'.
 767         (print_with_operands) <case 'Y'>: New case.
 768         (print_with_operands) <case 'T', 'A', '[', ']', 'd', 'n', 'u'>
 769         <case 'N', 'Y', 'Q'>: New cases.
 770         (print_insn_cris_generic): Emit "bcc ." for zero and CRISv32.
 771         (print_insn_cris_with_register_prefix)
 772         (print_insn_cris_without_register_prefix): Call
 773         cris_parse_disassembler_options.
 774         * cris-opc.c (cris_spec_regs): Mention that this table isn't used
 775         for CRISv32 and the size of immediate operands.  New v32-only
 776         entries for bz, pid, srs, wz, exs, eda, dz, ebp, erp, nrp, ccs and
 777         spc.  Add v32-only 4-byte entries for p2, p3, p5 and p6.  Change
 778         ccr, ibr, irp to be v0..v10.  Change bar, dccr to be v8..v10.
 779         Change brp to be v3..v10.
 780         (cris_support_regs): New vector.
 781         (cris_opcodes): Update head comment.  New format characters '[',
 782         ']', space, 'A', 'd', 'N', 'n', 'Q', 'T', 'u', 'U', 'Y'.
 783         Add new opcodes for v32 and adjust existing opcodes to accommodate
 784         differences to earlier variants.
 785         (cris_cond15s): New vector.
 786
 787 2004-11-04 Jan Beulich <jbeulich@novell.com>
 788
 789         * i386-dis.c (Eq, Edqw, indirEp, Gdq, I1): Define.
 790         (indirEb): Remove.
 791         (Mp): Use f_mode rather than none at all.
 792         (t_mode, dq_mode, dqw_mode, f_mode, const_1_mode): Define. t_mode
 793         replaces what previously was x_mode; x_mode now means 128-bit SSE
 794         operands.
 795         (dis386): Make far jumps and calls have an 'l' prefix only in AT&T
 796         mode. movmskpX's, pextrw's, and pmovmskb's first operands are Gdq.
 797         pinsrw's second operand is Edqw.
 798         (grps): 1-bit shifts' and rotates' second operands are I1. cmpxchg8b's
 799         operand is Eq. movntq's and movntdq's first operands are EM. s[gi]dt,
 800         fldenv, frstor, fsave, fstenv all should also have suffixes in Intel
 801         mode when an operand size override is present or always suffixing.
 802         More instructions will need to be added to this group.
 803         (putop): Handle new macro chars 'C' (short/long suffix selector),
 804         'I' (Intel mode override for following macro char), and 'J' (for
 805         adding the 'l' prefix to far branches in AT&T mode). When an
 806         alternative was specified in the template, honor macro character when
 807         specified for Intel mode.
 808         (OP_E): Handle new *_mode values. Correct pointer specifications for
 809         memory operands. Consolidate output of index register.
 810         (OP_G): Handle new *_mode values.
 811         (OP_I): Handle const_1_mode.
 812         (OP_ESreg, OP_DSreg): Generate pointer specifications. Indicate
 813         respective opcode prefix bits have been consumed.
 814         (OP_EM, OP_EX): Provide some default handling for generating pointer
 815         specifications.
 816
 817 2004-10-28  Tomer Levi  <Tomer.Levi@nsc.com>
 818
 819         * crx-opc.c (REV_COP_INST): New macro, reverse operand order of
 820         COP_INST macro.
 821
 822 2004-10-27  Tomer Levi  <Tomer.Levi@nsc.com>
 823
 824         * crx-dis.c (enum REG_ARG_TYPE): New, replacing COP_ARG_TYPE.
 825         (getregliststring): Support HI/LO and user registers.
 826         * crx-opc.c (crx_instruction): Update data structure according to the
 827         rearrangement done in CRX opcode header file.
 828         (crx_regtab):  Likewise.
 829         (crx_optab):  Likewise.
 830         (crx_instruction): Reorder load/stor instructions, remove unsupported
 831         formats.
 832         support new Co-Processor instruction 'cpi'.
 833
 834 2004-10-27  Nick Clifton  <nickc@redhat.com>
 835
 836         * opcodes/iq2000-asm.c: Regenerate.
 837         * opcodes/iq2000-desc.c: Regenerate.
 838         * opcodes/iq2000-desc.h: Regenerate.
 839         * opcodes/iq2000-dis.c: Regenerate.
 840         * opcodes/iq2000-ibld.c: Regenerate.
 841         * opcodes/iq2000-opc.c: Regenerate.
 842         * opcodes/iq2000-opc.h: Regenerate.
 843
 844 2004-10-21  Tomer Levi  <Tomer.Levi@nsc.com>
 845
 846         * crx-opc.c (crx_instruction): Replace i3, i4, i5 with us3,
 847         us4, us5 (respectively).
 848         Remove unsupported 'popa' instruction.
 849         Reverse operands order in store co-processor instructions.
 850
 851 2004-10-15  Alan Modra  <amodra@bigpond.net.au>
 852
 853         * Makefile.am: Run "make dep-am"
 854         * Makefile.in: Regenerate.
 855
 856 2004-10-12  Bob Wilson  <bob.wilson@acm.org>
 857
 858         * xtensa-dis.c: Use ISO C90 formatting.
 859
 860 2004-10-09  Alan Modra  <amodra@bigpond.net.au>
 861
 862         * ppc-opc.c: Revert 2004-09-09 change.
 863
 864 2004-10-07  Bob Wilson  <bob.wilson@acm.org>
 865
 866         * xtensa-dis.c (state_names): Delete.
 867         (fetch_data): Use xtensa_isa_maxlength.
 868         (print_xtensa_operand): Replace operand parameter with opcode/operand
 869         pair.  Remove print_sr_name parameter.  Use new xtensa-isa.h functions.
 870         (print_insn_xtensa): Use new xtensa-isa.h functions.  Handle multislot
 871         instruction bundles.  Use xmalloc instead of malloc.
 872
 873 2004-10-07  David Gibson  <david@gibson.dropbear.id.au>
 874
 875         * ppc-opc.c: Replace literal "0"s with NULLs in pointer
 876         initializers.
 877
 878 2004-10-07  Tomer Levi  <Tomer.Levi@nsc.com>
 879
 880         * crx-opc.c (crx_instruction): Support Co-processor insns.
 881         * crx-dis.c (COP_ARG_TYPE): New enum for CO-Processor arguments.
 882         (getregliststring): Change function to use the above enum.
 883         (print_arg): Handle CO-Processor insns.
 884         (crx_cinvs): Add 'b' option to invalidate the branch-target
 885         cache.
 886
 887 2004-10-06  Aldy Hernandez  <aldyh@redhat.com>
 888
 889         * ppc-opc.c (powerpc_opcodes): Add efscfd, efdabs, efdnabs,
 890         efdneg, efdadd, efdsub, efdmul, efddiv, efdcmpgt, efdcmplt,
 891         efdcmpeq, efdtstgt, efdtstlt, efdtsteq, efdcfsi, efdcfsid,
 892         efdcfui, efdcfuid, efdcfsf, efdcfuf, efdctsi, efdctsidz, efdctsiz,
 893         efdctui, efdctuidz, efdctuiz, efdctsf, efdctuf, efdctuf, efdcfs.
 894
 895 2004-10-01  Bill Farmer  <Bill@the-farmers.freeserve.co.uk>
 896
 897         * pdp11-dis.c (print_insn_pdp11): Subtract the SOB's displacement
 898         rather than add it.
 899
 900 2004-09-30  Paul Brook  <paul@codesourcery.com>
 901
 902         * arm-dis.c (print_insn_arm): Handle 'e' for SMI instruction.
 903         * arm-opc.h: Document %e.  Add ARMv6ZK instructions.
 904
 905 2004-09-17  H.J. Lu  <hongjiu.lu@intel.com>
 906
 907         * Makefile.am (AUTOMAKE_OPTIONS): Require 1.9.
 908         (CONFIG_STATUS_DEPENDENCIES): New.
 909         (Makefile): Removed.
 910         (config.status): Likewise.
 911         * Makefile.in: Regenerated.
 912
 913 2004-09-17  Alan Modra  <amodra@bigpond.net.au>
 914
 915         * Makefile.am: Run "make dep-am".
 916         * Makefile.in: Regenerate.
 917         * aclocal.m4: Regenerate.
 918         * configure: Regenerate.
 919         * po/POTFILES.in: Regenerate.
 920         * po/opcodes.pot: Regenerate.
 921
 922 2004-09-11  Andreas Schwab  <schwab@suse.de>
 923
 924         * configure: Rebuild.
 925
 926 2004-09-09  Segher Boessenkool  <segher@kernel.crashing.org>
 927
 928         * ppc-opc.c (L): Make this field not optional.
 929
 930 2004-09-03  Tomer Levi  <Tomer.Levi@nsc.com>
 931
 932         * opc-crx.c: Rename 'popma' to 'popa', remove 'pushma'.
 933         Fix parameter to 'm[t|f]csr' insns.
 934
 935 2004-08-30  Nathanael Nerode  <neroden@gcc.gnu.org>
 936
 937         * configure.in: Autoupdate to autoconf 2.59.
 938         * aclocal.m4: Rebuild with aclocal 1.4p6.
 939         * configure: Rebuild with autoconf 2.59.
 940         * Makefile.in: Rebuild with automake 1.4p6 (picking up
 941         bfd changes for autoconf 2.59 on the way).
 942         * config.in: Rebuild with autoheader 2.59.
 943
 944 2004-08-27  Richard Sandiford  <rsandifo@redhat.com>
 945
 946         * frv-desc.[ch], frv-opc.[ch]: Regenerated.
 947
 948 2004-07-30  Michal Ludvig  <mludvig@suse.cz>
 949
 950         * i386-dis.c (GRPPADLCK): Renamed to GRPPADLCK1
 951         (GRPPADLCK2): New define.
 952         (twobyte_has_modrm): True for 0xA6.
 953         (grps): GRPPADLCK2 for opcode 0xA6.
 954
 955 2004-07-29  Alexandre Oliva  <aoliva@redhat.com>
 956
 957         Introduce SH2a support.
 958         * sh-opc.h (arch_sh2a_base): Renumber.
 959         (arch_sh2a_nofpu_base): Remove.
 960         (arch_sh_base_mask): Adjust.
 961         (arch_opann_mask): New.
 962         (arch_sh2a, arch_sh2a_nofpu): Adjust.
 963         (arch_sh2a_up, arch_sh2a_nofpu_up): Likewise.
 964         (sh_table): Adjust whitespace.
 965         2004-02-24  Corinna Vinschen  <vinschen@redhat.com>
 966         * sh-opc.h (arch_sh2a_nofpu_up): New.  Use instead of arch_sh2a_up in
 967         instruction list throughout.
 968         (arch_sh2a_up): Redefine to include fpu instruction set.  Use instead
 969         of arch_sh2a in instruction list throughout.
 970         (arch_sh2e_up): Accomodate above changes.
 971         (arch_sh2_up): Ditto.
 972         2004-02-20  Corinna Vinschen  <vinschen@redhat.com>
 973         * sh-opc.h: Add arch_sh2a_nofpu to arch_sh2_up.
 974         2004-02-18  Corinna Vinschen  <vinschen@redhat.com>
 975         * sh-dis.c (print_insn_sh): Add bfd_mach_sh2a_nofpu handling.
 976         * sh-opc.h (arch_sh2a_nofpu): New.
 977         (arch_sh2a_up): New, defines sh2a and sh2a_nofpu.
 978         (sh_table): Change all arch_sh2a to arch_sh2a_up unless FPU
 979         instruction.
 980         2004-01-20  DJ Delorie  <dj@redhat.com>
 981         * sh-dis.c (print_insn_sh): SH2A does not have 'X' fp regs.
 982         2003-12-29  DJ Delorie  <dj@redhat.com>
 983         * sh-opc.c (sh_nibble_type, sh_arg_type, arch_2a, arch_2e_up,
 984         sh_opcode_info, sh_table): Add sh2a support.
 985         (arch_op32): New, to tag 32-bit opcodes.
 986         * sh-dis.c (print_insn_sh): Support sh2a opcodes.
 987         2003-12-02  Michael Snyder  <msnyder@redhat.com>
 988         * sh-opc.h (arch_sh2a): Add.
 989         * sh-dis.c (arch_sh2a): Handle.
 990         * sh-opc.h (arch_sh2_up): Fix up to include arch_sh2a.
 991
 992 2004-07-27  Tomer Levi  <Tomer.Levi@nsc.com>
 993
 994         * crx-opc.c: Add popx,pushx insns. Indent code, fix comments.
 995
 996 2004-07-22  Nick Clifton  <nickc@redhat.com>
 997
 998         PR/280
 999         * h8300-dis.c (bfd_h8_disassemble): Do not dump raw bytes for the
1000         insns - this is done by objdump itself.
1001         * h8500-dis.c (print_insn_h8500): Likewise.
1002
1003 2004-07-21  Jan Beulich <jbeulich@novell.com>
1004
1005         * i386-dis.c (OP_E): Show rip-relative addressing in 64-bit mode
1006         regardless of address size prefix in effect.
1007         (ptr_reg): Size or address registers does not depend on rex64, but
1008         on the presence of an address size override.
1009         (OP_MMX): Use rex.x only for xmm registers.
1010         (OP_EM): Use rex.z only for xmm registers.
1011
1012 2004-07-20  Maciej W. Rozycki  <macro@linux-mips.org>
1013
1014         * mips-opc.c (mips_builtin_opcodes): Move coprocessor 2
1015         move/branch operations to the bottom so that VR5400 multimedia
1016         instructions take precedence in disassembly.
1017
1018 2004-07-20  Maciej W. Rozycki  <macro@linux-mips.org>
1019
1020         * mips-opc.c (mips_builtin_opcodes): Remove the MIPS32
1021         ISA-specific "break" encoding.
1022
1023 2004-07-13  Elvis Chiang  <elvisfb@gmail.com>
1024
1025         * arm-opc.h: Fix typo in comment.
1026
1027 2004-07-11  Andreas Schwab  <schwab@suse.de>
1028
1029         * m68k-dis.c (m68k_valid_ea): Fix typos in last change.
1030
1031 2004-07-09  Andreas Schwab  <schwab@suse.de>
1032
1033         * m68k-dis.c (m68k_valid_ea): Check validity of all codes.
1034
1035 2004-07-07  Tomer Levi  <Tomer.Levi@nsc.com>
1036
1037         * Makefile.am (CFILES): Add crx-dis.c, crx-opc.c.
1038         (ALL_MACHINES): Add crx-dis.lo, crx-opc.lo.
1039         (crx-dis.lo): New target.
1040         (crx-opc.lo): Likewise.
1041         * Makefile.in: Regenerate.
1042         * configure.in: Handle bfd_crx_arch.
1043         * configure: Regenerate.
1044         * crx-dis.c: New file.
1045         * crx-opc.c: New file.
1046         * disassemble.c (ARCH_crx): Define.
1047         (disassembler): Handle ARCH_crx.
1048
1049 2004-06-29  James E Wilson  <wilson@specifixinc.com>
1050
1051         * ia64-opc-a.c (ia64_opcodes_a): Delete mov immediate pseudo for adds.
1052         * ia64-asmtab.c: Regnerate.
1053
1054 2004-06-28  Alan Modra  <amodra@bigpond.net.au>
1055
1056         * ppc-opc.c (insert_fxm): Handle mfocrf and mtocrf.
1057         (extract_fxm): Don't test dialect.
1058         (XFXFXM_MASK): Include the power4 bit.
1059         (XFXM): Add p4 param.
1060         (powerpc_opcodes): Add mfocrf and mtocrf.  Adjust mtcr.
1061
1062 2004-06-27  Alexandre Oliva  <aoliva@redhat.com>
1063
1064         2003-07-21  Richard Sandiford  <rsandifo@redhat.com>
1065         * disassemble.c (disassembler): Handle bfd_mach_h8300sxn.
1066
1067 2004-06-26  Alan Modra  <amodra@bigpond.net.au>
1068
1069         * ppc-opc.c (BH, XLBH_MASK): Define.
1070         (powerpc_opcodes): Allow BH field on bclr, bclrl, bcctr, bcctrl.
1071
1072 2004-06-24  Alan Modra  <amodra@bigpond.net.au>
1073
1074         * i386-dis.c (x_mode): Comment.
1075         (two_source_ops): File scope.
1076         (float_mem): Correct fisttpll and fistpll.
1077         (float_mem_mode): New table.
1078         (dofloat): Use it.
1079         (OP_E): Correct intel mode PTR output.
1080         (ptr_reg): Use open_char and close_char.
1081         (PNI_Fixup): Handle possible suffix on sidt.  Use op1out etc. for
1082         operands.  Set two_source_ops.
1083
1084 2004-06-15  Alan Modra  <amodra@bigpond.net.au>
1085
1086         * arc-ext.c (build_ARC_extmap): Use bfd_get_section_size
1087         instead of _raw_size.
1088
1089 2004-06-08  Jakub Jelinek  <jakub@redhat.com>
1090
1091         * ia64-gen.c (in_iclass): Handle more postinc st
1092         and ld variants.
1093         * ia64-asmtab.c: Rebuilt.
1094
1095 2004-06-01  Martin Schwidefsky  <schwidefsky@de.ibm.com>
1096
1097         * s390-opc.txt: Correct architecture mask for some opcodes.
1098         lrv, lrvh, strv, ml, dl, alc, slb rll and mvclu are available
1099         in the esa mode as well.
1100
1101 2004-05-28  Andrew Stubbs <andrew.stubbs@superh.com>
1102
1103         * sh-dis.c (target_arch): Make unsigned.
1104         (print_insn_sh): Replace (most of) switch with a call to
1105         sh_get_arch_from_bfd_mach(). Also use new architecture flags system.
1106         * sh-opc.h: Redefine architecture flags values.
1107         Add sh3-nommu architecture.
1108         Reorganise <arch>_up macros so they make more visual sense.
1109         (SH_MERGE_ARCH_SET): Define new macro.
1110         (SH_VALID_BASE_ARCH_SET): Likewise.
1111         (SH_VALID_MMU_ARCH_SET): Likewise.
1112         (SH_VALID_CO_ARCH_SET): Likewise.
1113         (SH_VALID_ARCH_SET): Likewise.
1114         (SH_MERGE_ARCH_SET_VALID): Likewise.
1115         (SH_ARCH_SET_HAS_FPU): Likewise.
1116         (SH_ARCH_SET_HAS_DSP): Likewise.
1117         (SH_ARCH_UNKNOWN_ARCH): Likewise.
1118         (sh_get_arch_from_bfd_mach): Add prototype.
1119         (sh_get_arch_up_from_bfd_mach): Likewise.
1120         (sh_get_bfd_mach_from_arch_set): Likewise.
1121         (sh_merge_bfd_arc): Likewise.
1122
1123 2004-05-24  Peter Barada  <peter@the-baradas.com>
1124
1125         * m68k-dis.c(print_insn_m68k): Strip body of diassembly out
1126         into new match_insn_m68k function.  Loop over canidate
1127         matches and select first that completely matches.
1128         * m68k-dis.c(print_insn_arg): Fix 'g' case to only extract 1 bit.
1129         * m68k-dis.c(print_insn_arg): Call new function m68k_valid_ea
1130         to verify addressing for MAC/EMAC.
1131         * m68k-dis.c(print_insn_arg): Use reg_half_names for MAC/EMAC
1132         reigster halves since 'fpu' and 'spl' look misleading.
1133         * m68k-dis.c(fetch_arg): Fix 'G', 'H', 'I', 'f', 'M', 'N' cases.
1134         * m68k-opc.c: Rearragne mac/emac cases to use longest for
1135         first, tighten up match masks.
1136         * m68k-opc.c: Add 'size' field to struct m68k_opcode.  Produce
1137         'size' from special case code in print_insn_m68k to
1138         determine decode size of insns.
1139
1140 2004-05-19  Alan Modra  <amodra@bigpond.net.au>
1141
1142         * ppc-opc.c (insert_fxm): Enable two operand mfcr when -many as
1143         well as when -mpower4.
1144
1145 2004-05-13  Nick Clifton  <nickc@redhat.com>
1146
1147         * po/fr.po: Updated French translation.
1148
1149 2004-05-05  Peter Barada  <peter@the-baradas.com>
1150
1151         * m68k-dis.c(print_insn_m68k): Add new chips, use core
1152         variants in arch_mask.  Only set m68881/68851 for 68k chips.
1153         * m68k-op.c: Switch from ColdFire chips to core variants.
1154
1155 2004-05-05  Alan Modra  <amodra@bigpond.net.au>
1156
1157         PR 147.
1158         * ppc-opc.c (PPCVEC): Remove PPC_OPCODE_PPC.
1159
1160 2004-04-29  Ben Elliston  <bje@au.ibm.com>
1161
1162         * ppc-opc.c (XCMPL): Renmame to XOPL. Update users.
1163         (powerpc_opcodes): Add "dbczl" instruction for PPC970.
1164
1165 2004-04-22  Kaz Kojima  <kkojima@rr.iij4u.or.jp>
1166
1167         * sh-dis.c (print_insn_sh): Print the value in constant pool
1168         as a symbol if it looks like a symbol.
1169
1170 2004-04-22  Peter Barada <peter@the-baradas.com>
1171
1172         * m68k-dis.c(print_insn_m68k): Set mfcmac/mcfemac on
1173         appropriate ColdFire architectures.
1174         (print_insn_m68k): Handle EMAC, MAC/EMAC scalefactor, and MAC/EMAC
1175         mask addressing.
1176         Add EMAC instructions, fix MAC instructions. Remove
1177         macmw/macml/msacmw/msacml instructions since mask addressing now
1178         supported.
1179
1180 2004-04-20  Jakub Jelinek  <jakub@redhat.com>
1181
1182         * sparc-opc.c (fmoviccx, fmovfccx, fmovccx): Define.
1183         (fmovicc, fmovfcc, fmovcc): Remove fpsize argument, change opcode to
1184         suffix.  Use fmov*x macros, create all 3 fpsize variants in one
1185         macro.  Adjust all users.
1186
1187 2004-04-15  Anil Paranjpe  <anilp1@kpitcummins.com>
1188
1189         * h8300-dis.c (bfd_h8_disassemble) : Treat "adds" & "subs"
1190         separately.
1191
1192 2004-03-30  Kazuhiro Inaoka  <inaoka.kazuhiro@renesas.com>
1193
1194         * m32r-asm.c: Regenerate.
1195
1196 2004-03-29  Stan Shebs  <shebs@apple.com>
1197
1198         * mpw-config.in, mpw-make.sed: Remove MPW support files, no longer
1199         used.
1200
1201 2004-03-19  Alan Modra  <amodra@bigpond.net.au>
1202
1203         * aclocal.m4: Regenerate.
1204         * config.in: Regenerate.
1205         * configure: Regenerate.
1206         * po/POTFILES.in: Regenerate.
1207         * po/opcodes.pot: Regenerate.
1208
1209 2004-03-16  Alan Modra  <amodra@bigpond.net.au>
1210
1211         * ppc-dis.c (print_insn_powerpc): Don't print tabs.  Handle
1212         PPC_OPERANDS_GPR_0.
1213         * ppc-opc.c (RA0): Define.
1214         (RAQ, RAL, RAM, RAS, RSQ, RTQ, RSO): Use PPC_OPERAND_GPR_0.
1215         (RAOPT): Rename from RAO.  Update all uses.
1216         (powerpc_opcodes): Use RA0 as appropriate.
1217
1218 2004-03-15  Aldy Hernandez  <aldyh@redhat.com>
1219
1220         * ppc-opc.c (powerpc_opcodes): Add BOOKE versions of mfsprg.
1221
1222 2004-03-15  Alan Modra  <amodra@bigpond.net.au>
1223
1224         * sparc-dis.c (print_insn_sparc): Update getword prototype.
1225
1226 2004-03-12  Michal Ludvig  <mludvig@suse.cz>
1227
1228         * i386-dis.c (GRPPLOCK): Delete.
1229         (grps): Delete GRPPLOCK entry.
1230
1231 2004-03-12  Alan Modra  <amodra@bigpond.net.au>
1232
1233         * i386-dis.c (OP_M, OP_0f0e, OP_0fae, NOP_Fixup): New functions.
1234         (M, Mp): Use OP_M.
1235         (None, PADLOCK_SPECIAL, PADLOCK_0): Delete.
1236         (GRPPADLCK): Define.
1237         (dis386): Use NOP_Fixup on "nop".
1238         (dis386_twobyte): Use GRPPADLCK on opcode 0xa7.
1239         (twobyte_has_modrm): Set for 0xa7.
1240         (padlock_table): Delete.  Move to..
1241         (grps): ..here, using OP_0f07.  Use OP_Ofae on lfence, mfence
1242         and clflush.
1243         (print_insn): Revert PADLOCK_SPECIAL code.
1244         (OP_E): Delete sfence, lfence, mfence checks.
1245
1246 2004-03-12  Jakub Jelinek  <jakub@redhat.com>
1247
1248         * i386-dis.c (grps): Use INVLPG_Fixup instead of OP_E for invlpg.
1249         (INVLPG_Fixup): New function.
1250         (PNI_Fixup): Remove ATTRIBUTE_UNUSED from sizeflag.
1251
1252 2004-03-12  Michal Ludvig  <mludvig@suse.cz>
1253
1254         * i386-dis.c (PADLOCK_SPECIAL, PADLOCK_0): New defines.
1255         (dis386_twobyte): Opcode 0xa7 is PADLOCK_0.
1256         (padlock_table): New struct with PadLock instructions.
1257         (print_insn): Handle PADLOCK_SPECIAL.
1258
1259 2004-03-12  Alan Modra  <amodra@bigpond.net.au>
1260
1261         * i386-dis.c (grps): Use clflush by default for 0x0fae/7.
1262         (OP_E): Twiddle clflush to sfence here.
1263
1264 2004-03-08  Nick Clifton  <nickc@redhat.com>
1265
1266         * po/de.po: Updated German translation.
1267
1268 2003-03-03  Andrew Stubbs  <andrew.stubbs@superh.com>
1269
1270         * sh-dis.c (print_insn_sh): Don't disassemble fp instructions in
1271         nofpu mode.  Add BFD type bfd_mach_sh4_nommu_nofpu.
1272         * sh-opc.h: Add sh4_nommu_nofpu architecture and adjust instructions
1273         accordingly.
1274
1275 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
1276
1277         * frv-asm.c: Regenerate.
1278         * frv-desc.c: Regenerate.
1279         * frv-desc.h: Regenerate.
1280         * frv-dis.c: Regenerate.
1281         * frv-ibld.c: Regenerate.
1282         * frv-opc.c: Regenerate.
1283         * frv-opc.h: Regenerate.
1284
1285 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
1286
1287         * frv-desc.c, frv-opc.c: Regenerate.
1288
1289 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
1290
1291         * frv-desc.c, frv-opc.c, frv-opc.h: Regenerate.
1292
1293 2004-02-26  Andrew Stubbs  <andrew.stubbs@superh.com>
1294
1295         * sh-opc.h: Move fsca and fsrra instructions from sh4a to sh4.
1296         Also correct mistake in the comment.
1297
1298 2004-02-26  Andrew Stubbs <andrew.stubbs@superh.com>
1299
1300         * sh-dis.c (print_insn_sh): Add REG_N_D nibble type to
1301         ensure that double registers have even numbers.
1302         Add REG_N_B01 for nn01 (binary 01) nibble to ensure
1303         that reserved instruction 0xfffd does not decode the same
1304         as 0xfdfd (ftrv).
1305         * sh-opc.h: Add REG_N_D nibble type and use it whereever
1306         REG_N refers to a double register.
1307         Add REG_N_B01 nibble type and use it instead of REG_NM
1308         in ftrv.
1309         Adjust the bit patterns in a few comments.
1310
1311 2004-02-25  Aldy Hernandez  <aldyh@redhat.com>
1312
1313         * ppc-opc.c (powerpc_opcodes): Change mask for dcbt and dcbtst.
1314
1315 2004-02-20  Aldy Hernandez  <aldyh@redhat.com>
1316
1317         * ppc-opc.c (powerpc_opcodes): Move mfmcsrr0 before mfdc_dat.
1318
1319 2004-02-20  Aldy Hernandez  <aldyh@redhat.com>
1320
1321         * ppc-opc.c (powerpc_opcodes): Add m*ivor35.
1322
1323 2004-02-20  Aldy Hernandez  <aldyh@redhat.com>
1324
1325         * ppc-opc.c (powerpc_opcodes): Add mfivor32, mfivor33, mfivor34,
1326         mtivor32, mtivor33, mtivor34.
1327
1328 2004-02-19  Aldy Hernandez  <aldyh@redhat.com>
1329
1330         * ppc-opc.c (powerpc_opcodes): Add mfmcar.
1331
1332 2004-02-10  Petko Manolov  <petkan@nucleusys.com>
1333
1334         * arm-opc.h Maverick accumulator register opcode fixes.
1335
1336 2004-02-13  Ben Elliston  <bje@wasabisystems.com>
1337
1338         * m32r-dis.c: Regenerate.
1339
1340 2004-01-27  Michael Snyder  <msnyder@redhat.com>
1341
1342         * sh-opc.h (sh_table): "fsrra", not "fssra".
1343
1344 2004-01-23  Andrew Over <andrew.over@cs.anu.edu.au>
1345
1346         * sparc-opc.c (fdtox, fstox, fqtox, fxtod, fxtos, fxtoq): Tighten
1347         contraints.
1348
1349 2004-01-19  Andrew Over  <andrew.over@cs.anu.edu.au>
1350
1351         * sparc-opc.c (sparc_opcodes) <f[dsq]tox, fxto[dsq]>: Fix args.
1352
1353 2004-01-19  Alan Modra  <amodra@bigpond.net.au>
1354
1355         * i386-dis.c (OP_E): Print scale factor on intel mode sib when not
1356         1.  Don't print scale factor on AT&T mode when index missing.
1357
1358 2004-01-16  Alexandre Oliva  <aoliva@redhat.com>
1359
1360         * m10300-opc.c (mov): 8- and 24-bit immediates are zero-extended
1361         when loaded into XR registers.
1362
1363 2004-01-14  Richard Sandiford  <rsandifo@redhat.com>
1364
1365         * frv-desc.h: Regenerate.
1366         * frv-desc.c: Regenerate.
1367         * frv-opc.c: Regenerate.
1368
1369 2004-01-13  Michael Snyder  <msnyder@redhat.com>
1370
1371         * sh-dis.c (print_insn_sh): Allocate 4 bytes for insn.
1372
1373 2004-01-09  Paul Brook  <paul@codesourcery.com>
1374
1375         * arm-opc.h (arm_opcodes): Move generic mcrr after known
1376         specific opcodes.
1377
1378 2004-01-07  Daniel Jacobowitz  <drow@mvista.com>
1379
1380         * Makefile.am (libopcodes_la_DEPENDENCIES)
1381         (libopcodes_la_LIBADD): Revert 2003-05-17 change.  Add explanatory
1382         comment about the problem.
1383         * Makefile.in: Regenerate.
1384
1385 2004-01-06  Alexandre Oliva  <aoliva@redhat.com>
1386
1387         2003-12-19  Alexandre Oliva  <aoliva@redhat.com>
1388         * frv-asm.c (parse_ulo16, parse_uhi16, parse_d12): Fix some
1389         cut&paste errors in shifting/truncating numerical operands.
1390         2003-08-04  Alexandre Oliva  <aoliva@redhat.com>
1391         * frv-asm.c (parse_ulo16): Parse gotofflo and gotofffuncdesclo.
1392         (parse_uslo16): Likewise.
1393         (parse_uhi16): Parse gotoffhi and gotofffuncdeschi.
1394         (parse_d12): Parse gotoff12 and gotofffuncdesc12.
1395         (parse_s12): Likewise.
1396         2003-08-04  Alexandre Oliva  <aoliva@redhat.com>
1397         * frv-asm.c (parse_ulo16): Parse gotlo and gotfuncdesclo.
1398         (parse_uslo16): Likewise.
1399         (parse_uhi16): Parse gothi and gotfuncdeschi.
1400         (parse_d12): Parse got12 and gotfuncdesc12.
1401         (parse_s12): Likewise.
1402
1403 2004-01-02  Albert Bartoszko  <albar@nt.kegel.com.pl>
1404
1405         * msp430-dis.c (msp430_doubleoperand): Check for an 'add'
1406         instruction which looks similar to an 'rla' instruction.
1407
1408 For older changes see ChangeLog-0203
1409 \f
1410 Local Variables:
1411 mode: change-log
1412 left-margin: 8
1413 fill-column: 74
1414 version-control: never
1415 End: