opcodes/ChangeLog

   1 2016-03-21  Andrew Burgess  <andrew.burgess@embecosm.com>
   2
   3         * arc-opc.c (arc_flag_classes): Convert all flag classes to use
   4         the new class enum values.
   5
   6 2016-03-21  Andrew Burgess  <andrew.burgess@embecosm.com>
   7
   8         * arc-dis.c (print_insn_arc): Handle nps400.
   9
  10 2016-03-21  Andrew Burgess  <andrew.burgess@embecosm.com>
  11
  12         * arc-opc.c (BASE): Delete.
  13
  14 2016-03-18  Nick Clifton  <nickc@redhat.com>
  15
  16         PR target/19721
  17         * aarch64-tbl.h (aarch64_opcode_table): Fix type of second operand
  18         of MOV insn that aliases an ORR insn.
  19
  20 2016-03-16  Jiong Wang  <jiong.wang@arm.com>
  21
  22         * arm-dis.c (neon_opcodes): Support new FP16 instructions.
  23
  24 2016-03-07  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
  25
  26         * mcore-opc.h: Add const qualifiers.
  27         * microblaze-opc.h (struct op_code_struct): Likewise.
  28         * sh-opc.h: Likewise.
  29         * tic4x-dis.c (tic4x_print_indirect): Likewise.
  30         (tic4x_print_op): Likewise.
  31
  32 2016-03-02  Alan Modra  <amodra@gmail.com>
  33
  34         * or1k-desc.h: Regenerate.
  35         * fr30-ibld.c: Regenerate.
  36         * rl78-decode.c: Regenerate.
  37
  38 2016-03-01  Nick Clifton  <nickc@redhat.com>
  39
  40         PR target/19747
  41         * rl78-dis.c (print_insn_rl78_common): Fix typo.
  42
  43 2016-02-24  Renlin Li  <renlin.li@arm.com>
  44
  45         * arm-dis.c (coprocessor_opcodes): Add fp16 instruction entries.
  46         (print_insn_coprocessor): Support fp16 instructions.
  47
  48 2016-02-24  Renlin Li  <renlin.li@arm.com>
  49
  50         * arm-dis.c (print_insn_coprocessor): Fix mask for vsel, vmaxnm,
  51         vminnm, vrint(mpna).
  52
  53 2016-02-24  Renlin Li  <renlin.li@arm.com>
  54
  55         * arm-dis.c (print_insn_coprocessor): Check co-processor number for
  56         cpd/cpd2, mcr/mcr2, mrc/mrc2, ldc/ldc2, stc/stc2.
  57
  58 2016-02-15  H.J. Lu  <hongjiu.lu@intel.com>
  59
  60         * i386-dis.c (print_insn): Parenthesize expression to prevent
  61         truncated addresses.
  62         (OP_J): Likewise.
  63
  64 2016-02-10  Claudiu Zissulescu  <claziss@synopsys.com>
  65             Janek van Oirschot  <jvanoirs@synopsys.com>
  66
  67         * arc-opc.c (arc_relax_opcodes, arc_num_relax_opcodes): New
  68         variable.
  69
  70 2016-02-04  Nick Clifton  <nickc@redhat.com>
  71
  72         PR target/19561
  73         * msp430-dis.c (print_insn_msp430): Add a special case for
  74         decoding an RRC instruction with the ZC bit set in the extension
  75         word.
  76
  77 2016-02-02  Andrew Burgess  <andrew.burgess@embecosm.com>
  78
  79         * cgen-ibld.in (insert_normal): Rework calculation of shift.
  80         * epiphany-ibld.c: Regenerate.
  81         * fr30-ibld.c: Regenerate.
  82         * frv-ibld.c: Regenerate.
  83         * ip2k-ibld.c: Regenerate.
  84         * iq2000-ibld.c: Regenerate.
  85         * lm32-ibld.c: Regenerate.
  86         * m32c-ibld.c: Regenerate.
  87         * m32r-ibld.c: Regenerate.
  88         * mep-ibld.c: Regenerate.
  89         * mt-ibld.c: Regenerate.
  90         * or1k-ibld.c: Regenerate.
  91         * xc16x-ibld.c: Regenerate.
  92         * xstormy16-ibld.c: Regenerate.
  93
  94 2016-02-02  Andrew Burgess  <andrew.burgess@embecosm.com>
  95
  96         * epiphany-dis.c: Regenerated from latest cpu files.
  97
  98 2016-02-01  Michael McConville  <mmcco@mykolab.com>
  99
 100         * cgen-dis.c (count_decodable_bits): Use unsigned value for mask
 101         test bit.
 102
 103 2016-01-25  Renlin Li  <renlin.li@arm.com>
 104
 105         * arm-dis.c (mapping_symbol_for_insn): New function.
 106         (find_ifthen_state): Call mapping_symbol_for_insn().
 107
 108 2016-01-20  Matthew Wahab  <matthew.wahab@arm.com>
 109
 110         * aarch64-opc.c (operand_general_constraint_met_p): Check validity
 111         of MSR UAO immediate operand.
 112
 113 2016-01-18  Maciej W. Rozycki  <macro@imgtec.com>
 114
 115         * mips-dis.c (print_insn_micromips): Remove 48-bit microMIPS
 116         instruction support.
 117
 118 2016-01-17  Alan Modra  <amodra@gmail.com>
 119
 120         * configure: Regenerate.
 121
 122 2016-01-14  Nick Clifton  <nickc@redhat.com>
 123
 124         * rl78-decode.opc (rl78_decode_opcode): Add 's' operand to movw
 125         instructions that can support stack pointer operations.
 126         * rl78-decode.c: Regenerate.
 127         * rl78-dis.c: Fix display of stack pointer in MOVW based
 128         instructions.
 129
 130 2016-01-14  Matthew Wahab  <matthew.wahab@arm.com>
 131
 132         * aarch64-opc.c (aarch64_sys_reg_supported_p): Merge conditionals
 133         testing for RAS support.  Add checks for erxfr_el1, erxctlr_el1,
 134         erxtatus_el1 and erxaddr_el1.
 135
 136 2016-01-12  Matthew Wahab  <matthew.wahab@arm.com>
 137
 138         * arm-dis.c (arm_opcodes): Add "esb".
 139         (thumb_opcodes): Likewise.
 140
 141 2016-01-11  Peter Bergner <bergner@vnet.ibm.com>
 142
 143         * ppc-opc.c <xscmpnedp>: Delete.
 144         <xvcmpnedp>: Likewise.
 145         <xvcmpnedp.>: Likewise.
 146         <xvcmpnesp>: Likewise.
 147         <xvcmpnesp.>: Likewise.
 148
 149 2016-01-08  Andreas Schwab  <schwab@linux-m68k.org>
 150
 151         PR gas/13050
 152         * m68k-opc.c (moveb, movew): For ISA_B/C only allow #,d(An) in
 153         addition to ISA_A.
 154
 155 2016-01-01  Alan Modra  <amodra@gmail.com>
 156
 157         Update year range in copyright notice of all files.
 158
 159 For older changes see ChangeLog-2015
 160 \f
 161 Copyright (C) 2016 Free Software Foundation, Inc.
 162
 163 Copying and distribution of this file, with or without modification,
 164 are permitted in any medium without royalty provided the copyright
 165 notice and this notice are preserved.
 166
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