opcodes/ChangeLog

   1 2005-05-19  Anton Blanchard  <anton@samba.org>
   2
   3         * ppc-dis.c (powerpc_dialect): Handle "-Mpower5".
   4         (print_ppc_disassembler_options): Document it.
   5         * ppc-opc.c (SVC_LEV): Define.
   6         (LEV): Allow optional operand.
   7         (POWER5): Define.
   8         (powerpc_opcodes): Extend "sc".  Adjust "svc" and "svcl".  Add
   9         "hrfid", "popcntb", "fsqrtes", "fsqrtes.", "fre" and "fre.".
  10
  11 2005-05-19  Kelley Cook  <kcook@gcc.gnu.org>
  12
  13         * Makefile.in:  Regenerate.
  14
  15 2005-05-17  Zack Weinberg  <zack@codesourcery.com>
  16
  17         * arm-dis.c (thumb_opcodes): Add disassembly for V6T2 16-bit
  18         instructions.  Adjust disassembly of some opcodes to match
  19         unified syntax.
  20         (thumb32_opcodes): New table.
  21         (print_insn_thumb): Rename print_insn_thumb16; don't handle
  22         two-halfword branches here.
  23         (print_insn_thumb32): New function.
  24         (print_insn): Choose among print_insn_arm, print_insn_thumb16,
  25         and print_insn_thumb32.  Be consistent about order of
  26         halfwords when printing 32-bit instructions.
  27
  28 2005-05-07  H.J. Lu  <hongjiu.lu@intel.com>
  29
  30         PR 843
  31         * i386-dis.c (branch_v_mode): New.
  32         (indirEv): Use branch_v_mode instead of v_mode.
  33         (OP_E): Handle branch_v_mode.
  34
  35 2005-05-07  H.J. Lu  <hongjiu.lu@intel.com>
  36
  37         * d10v-dis.c (dis_2_short): Support 64bit host.
  38
  39 2005-05-07  Nick Clifton  <nickc@redhat.com>
  40
  41         * po/nl.po: Updated translation.
  42
  43 2005-05-07  Nick Clifton  <nickc@redhat.com>
  44
  45         * Update the address and phone number of the FSF organization in
  46         the GPL notices in the following files:
  47         a29k-dis.c, aclocal.m4, alpha-dis.c, alpha-opc.c, arc-dis.c,
  48         arc-dis.h, arc-ext.c, arc-ext.h, arc-opc.c, arm-dis.c, arm-opc.h,
  49         avr-dis.c, cgen-asm.c, cgen-asm.in, cgen-dis.c, cgen-dis.in,
  50         cgen-ibld.in, cgen-opc.c, cgen.sh, cris-dis.c, cris-opc.c,
  51         crx-dis.c, crx-opc.c, d10v-dis.c, d10v-opc.c, d30v-dis.c,
  52         d30v-opc.c, dis-buf.c, dis-init.c, disassemble.c, dlx-dis.c,
  53         fr30-asm.c, fr30-desc.c, fr30-desc.h, fr30-dis.c, fr30-ibld.c,
  54         fr30-opc.c, fr30-opc.h, frv-asm.c, frv-desc.c, frv-desc.h,
  55         frv-dis.c, frv-ibld.c, frv-opc.c, frv-opc.h, h8300-dis.c,
  56         h8500-dis.c, h8500-opc.h, hppa-dis.c, i370-dis.c, i370-opc.c,
  57         i386-dis.c, i860-dis.c, i960-dis.c, ia64-asmtab.h, ia64-dis.c,
  58         ia64-gen.c, ia64-opc-a.c, ia64-opc-b.c, ia64-opc-d.c,
  59         ia64-opc-f.c, ia64-opc-i.c, ia64-opc-m.c, ia64-opc-x.c,
  60         ia64-opc.c, ia64-opc.h, ip2k-asm.c, ip2k-desc.c, ip2k-desc.h,
  61         ip2k-dis.c, ip2k-ibld.c, ip2k-opc.c, ip2k-opc.h, iq2000-asm.c,
  62         iq2000-desc.c, iq2000-desc.h, iq2000-dis.c, iq2000-ibld.c,
  63         iq2000-opc.c, iq2000-opc.h, m10200-dis.c, m10200-opc.c,
  64         m10300-dis.c, m10300-opc.c, m32r-asm.c, m32r-desc.c, m32r-desc.h,
  65         m32r-dis.c, m32r-ibld.c, m32r-opc.c, m32r-opc.h, m32r-opinst.c,
  66         m68hc11-dis.c, m68hc11-opc.c, m68k-dis.c, m68k-opc.c, m88k-dis.c,
  67         maxq-dis.c, mcore-dis.c, mcore-opc.h, mips-dis.c, mips-opc.c,
  68         mips16-opc.c, mmix-dis.c, mmix-opc.c, msp430-dis.c, ns32k-dis.c,
  69         openrisc-asm.c, openrisc-desc.c, openrisc-desc.h, openrisc-dis.c,
  70         openrisc-ibld.c, openrisc-opc.c, openrisc-opc.h, opintl.h,
  71         or32-dis.c, or32-opc.c, pdp11-dis.c, pdp11-opc.c, pj-dis.c,
  72         pj-opc.c, ppc-dis.c, ppc-opc.c, s390-dis.c, s390-mkopc.c,
  73         s390-opc.c, sh-dis.c, sh-opc.h, sh64-dis.c, sh64-opc.c,
  74         sh64-opc.h, sparc-dis.c, sparc-opc.c, sysdep.h, tic30-dis.c,
  75         tic4x-dis.c, tic54x-dis.c, tic54x-opc.c, tic80-dis.c, tic80-opc.c,
  76         v850-dis.c, v850-opc.c, vax-dis.c, w65-dis.c, w65-opc.h,
  77         xstormy16-asm.c, xstormy16-desc.c, xstormy16-desc.h,
  78         xstormy16-dis.c, xstormy16-ibld.c, xstormy16-opc.c,
  79         xstormy16-opc.h, xtensa-dis.c, z8k-dis.c, z8kgen.c
  80
  81 2005-05-05  James E Wilson  <wilson@specifixinc.com>
  82
  83         * ia64-opc.c: Include sysdep.h before libiberty.h.
  84
  85 2005-05-05  Nick Clifton  <nickc@redhat.com>
  86
  87         * configure.in (ALL_LINGUAS): Add vi.
  88         * configure: Regenerate.
  89         * po/vi.po: New.
  90
  91 2005-04-26  Jerome Guitton  <guitton@gnat.com>
  92
  93         * configure.in: Fix the check for basename declaration.
  94         * configure: Regenerate.
  95
  96 2005-04-19  Alan Modra  <amodra@bigpond.net.au>
  97
  98         * ppc-opc.c (RTO): Define.
  99         (powerpc_opcodes <tlbsx, tlbsx., tlbre>): Combine PPC403 and BOOKE
 100         entries to suit PPC440.
 101
 102 2005-04-18  Mark Kettenis  <kettenis@gnu.org>
 103
 104         * i386-dis.c: Insert hyphens into selected VIA PadLock extensions.
 105         Add xcrypt-ctr.
 106
 107 2005-04-14  Nick Clifton  <nickc@redhat.com>
 108
 109         * po/fi.po: New translation: Finnish.
 110         * configure.in (ALL_LINGUAS): Add fi.
 111         * configure: Regenerate.
 112
 113 2005-04-14  Alan Modra  <amodra@bigpond.net.au>
 114
 115         * Makefile.am (NO_WERROR): Define.
 116         * configure.in: Invoke AM_BINUTILS_WARNINGS.
 117         * Makefile.in: Regenerate.
 118         * aclocal.m4: Regenerate.
 119         * configure: Regenerate.
 120
 121 2005-04-04  Nick Clifton  <nickc@redhat.com>
 122
 123         * fr30-asm.c: Regenerate.
 124         * frv-asm.c: Regenerate.
 125         * iq2000-asm.c: Regenerate.
 126         * m32r-asm.c: Regenerate.
 127         * openrisc-asm.c: Regenerate.
 128
 129 2005-04-01  Jan Beulich  <jbeulich@novell.com>
 130
 131         * i386-dis.c (PNI_Fixup): Neither mwait nor monitor have any
 132         visible operands in Intel mode. The first operand of monitor is
 133         %rax in 64-bit mode.
 134
 135 2005-04-01  Jan Beulich  <jbeulich@novell.com>
 136
 137         * i386-dis.c (INVLPG_Fixup): Decode rdtscp; change code to allow for
 138         easier future additions.
 139
 140 2005-03-31  Jerome Guitton  <guitton@gnat.com>
 141
 142         * configure.in: Check for basename.
 143         * configure: Regenerate.
 144         * config.in: Ditto.
 145
 146 2005-03-29  H.J. Lu  <hongjiu.lu@intel.com>
 147
 148         * i386-dis.c (SEG_Fixup): New.
 149         (Sv): New.
 150         (dis386): Use "Sv" for 0x8c and 0x8e.
 151
 152 2005-03-21  Jan-Benedict Glaw  <jbglaw@lug-owl.de>
 153             Nick Clifton  <nickc@redhat.com>
 154
 155         * vax-dis.c: (entry_addr): New varible:  An array of user supplied
 156         function entry mask addresses.
 157         (entry_addr_occupied_slots): New variable: The number of occupied
 158         elements in entry_addr.
 159         (entry_addr_total_slots): New variable: The total number of
 160         elements in entry_addr.
 161         (parse_disassembler_options): New function.  Fills in the entry_addr
 162         array.
 163         (free_entry_array): New function.  Release the memory used by the
 164         entry addr array.  Suppressed because there is no way to call it.
 165         (is_function_entry): Check if a given address is a function's
 166         start address by looking at supplied entry mask addresses and
 167         symbol information, if available.
 168         (print_insn_vax): Use parse_disassembler_options and is_function_entry.
 169
 170 2005-03-23  H.J. Lu  <hongjiu.lu@intel.com>
 171
 172         * cris-dis.c (print_with_operands): Use ~31L for long instead
 173         of ~31.
 174
 175 2005-03-20  H.J. Lu  <hongjiu.lu@intel.com>
 176
 177         * mmix-opc.c (O): Revert the last change.
 178         (Z): Likewise.
 179
 180 2005-03-19  H.J. Lu  <hongjiu.lu@intel.com>
 181
 182         * mmix-opc.c (O): Use 24UL instead of 24 for unsigned long.
 183         (Z): Likewise.
 184
 185 2005-03-19  Hans-Peter Nilsson  <hp@bitrange.com>
 186
 187         * mmix-opc.c (O, Z): Force expression as unsigned long.
 188
 189 2005-03-18  Nick Clifton  <nickc@redhat.com>
 190
 191         * ip2k-asm.c: Regenerate.
 192         * op/opcodes.pot: Regenerate.
 193
 194 2005-03-16  Nick Clifton  <nickc@redhat.com>
 195             Ben Elliston  <bje@au.ibm.com>
 196
 197         * configure.in (werror): New switch: Add -Werror to the
 198         compiler command line.  Enabled by default.  Disable via
 199         --disable-werror.
 200         * configure: Regenerate.
 201
 202 2005-03-16  Alan Modra  <amodra@bigpond.net.au>
 203
 204         * ppc-dis.c (powerpc_dialect): Don't set PPC_OPCODE_ALTIVEC when
 205         BOOKE.
 206
 207 2005-03-15  Alan Modra  <amodra@bigpond.net.au>
 208
 209         * po/es.po: Commit new Spanish translation.
 210
 211         * po/fr.po: Commit new French translation.
 212
 213 2005-03-14  Jan-Benedict Glaw  <jbglaw@lug-owl.de>
 214
 215         * vax-dis.c: Fix spelling error
 216         (print_insn_vax): Use ".word 0x0012 # Entry mask: r1 r2 >" instead
 217         of just "Entry mask: < r1 ... >"
 218
 219 2005-03-12  Zack Weinberg  <zack@codesourcery.com>
 220
 221         * arm-dis.c (arm_opcodes): Document %E and %V.
 222         Add entries for v6T2 ARM instructions:
 223         bfc bfi mls strht ldrht ldrsht ldrsbt movw movt rbit ubfx sbfx.
 224         (print_insn_arm): Add support for %E and %V.
 225         (thumb_opcodes): Add ARMv6K instructions nop, sev, wfe, wfi, yield.
 226
 227 2005-03-10  Jeff Baker  <jbaker@qnx.com>
 228             Alan Modra  <amodra@bigpond.net.au>
 229
 230         * ppc-opc.c (insert_sprg, extract_sprg): New Functions.
 231         (powerpc_operands <SPRG>): Call the above.  Bit field is 5 bits.
 232         (SPRG_MASK): Delete.
 233         (XSPRG_MASK): Mask off extra bits now part of sprg field.
 234         (powerpc_opcodes): Asjust mfsprg and mtsprg to suit new mask.  Move
 235         mfsprg4..7 after msprg and consolidate.
 236
 237 2005-03-09  Jan-Benedict Glaw  <jbglaw@lug-owl.de>
 238
 239         * vax-dis.c (entry_mask_bit): New array.
 240         (print_insn_vax): Decode function entry mask.
 241
 242 2005-03-07  Aldy Hernandez  <aldyh@redhat.com>
 243
 244         * ppc-opc.c (powerpc_opcodes): Fix encoding of efscfd.
 245
 246 2005-03-05  Alan Modra  <amodra@bigpond.net.au>
 247
 248         * po/opcodes.pot: Regenerate.
 249
 250 2005-03-03  Ramana Radhakrishnan  <ramana.radhakrishnan@codito.com>
 251
 252         * arc-dis.c (a4_decoding_class): New enum.
 253         (dsmOneArcInst): Use the enum values for the decoding class.
 254         Remove redundant case in the switch for decodingClass value 11.
 255
 256 2005-03-02  Jan Beulich  <jbeulich@novell.com>
 257
 258         * i386-dis.c (print_insn): Suppress lock prefix printing for cr8...15
 259         accesses.
 260         (OP_C): Consider lock prefix in non-64-bit modes.
 261
 262 2005-02-24  Alan Modra  <amodra@bigpond.net.au>
 263
 264         * cris-dis.c (format_hex): Remove ineffective warning fix.
 265         * crx-dis.c (make_instruction): Warning fix.
 266         * frv-asm.c: Regenerate.
 267
 268 2005-02-23  Nick Clifton  <nickc@redhat.com>
 269
 270         * cgen-dis.in: Use bfd_byte for buffers that are passed to
 271         read_memory.
 272
 273         * ia64-opc.c (locate_opcode_ent): Initialise opval array.
 274
 275         * crx-dis.c (make_instruction): Move argument structure into inner
 276         scope and ensure that all of its fields are initialised before
 277         they are used.
 278
 279         * fr30-asm.c: Regenerate.
 280         * fr30-dis.c: Regenerate.
 281         * frv-asm.c: Regenerate.
 282         * frv-dis.c: Regenerate.
 283         * ip2k-asm.c: Regenerate.
 284         * ip2k-dis.c: Regenerate.
 285         * iq2000-asm.c: Regenerate.
 286         * iq2000-dis.c: Regenerate.
 287         * m32r-asm.c: Regenerate.
 288         * m32r-dis.c: Regenerate.
 289         * openrisc-asm.c: Regenerate.
 290         * openrisc-dis.c: Regenerate.
 291         * xstormy16-asm.c: Regenerate.
 292         * xstormy16-dis.c: Regenerate.
 293
 294 2005-02-22  Alan Modra  <amodra@bigpond.net.au>
 295
 296         * arc-ext.c: Warning fixes.
 297         * arc-ext.h: Likewise.
 298         * cgen-opc.c: Likewise.
 299         * ia64-gen.c: Likewise.
 300         * maxq-dis.c: Likewise.
 301         * ns32k-dis.c: Likewise.
 302         * w65-dis.c: Likewise.
 303         * ia64-asmtab.c: Regenerate.
 304
 305 2005-02-22  Alan Modra  <amodra@bigpond.net.au>
 306
 307         * fr30-desc.c: Regenerate.
 308         * fr30-desc.h: Regenerate.
 309         * fr30-opc.c: Regenerate.
 310         * fr30-opc.h: Regenerate.
 311         * frv-desc.c: Regenerate.
 312         * frv-desc.h: Regenerate.
 313         * frv-opc.c: Regenerate.
 314         * frv-opc.h: Regenerate.
 315         * ip2k-desc.c: Regenerate.
 316         * ip2k-desc.h: Regenerate.
 317         * ip2k-opc.c: Regenerate.
 318         * ip2k-opc.h: Regenerate.
 319         * iq2000-desc.c: Regenerate.
 320         * iq2000-desc.h: Regenerate.
 321         * iq2000-opc.c: Regenerate.
 322         * iq2000-opc.h: Regenerate.
 323         * m32r-desc.c: Regenerate.
 324         * m32r-desc.h: Regenerate.
 325         * m32r-opc.c: Regenerate.
 326         * m32r-opc.h: Regenerate.
 327         * m32r-opinst.c: Regenerate.
 328         * openrisc-desc.c: Regenerate.
 329         * openrisc-desc.h: Regenerate.
 330         * openrisc-opc.c: Regenerate.
 331         * openrisc-opc.h: Regenerate.
 332         * xstormy16-desc.c: Regenerate.
 333         * xstormy16-desc.h: Regenerate.
 334         * xstormy16-opc.c: Regenerate.
 335         * xstormy16-opc.h: Regenerate.
 336
 337 2005-02-21  Alan Modra  <amodra@bigpond.net.au>
 338
 339         * Makefile.am: Run "make dep-am"
 340         * Makefile.in: Regenerate.
 341
 342 2005-02-15  Nick Clifton  <nickc@redhat.com>
 343
 344         * cgen-dis.in (print_address): Add an ATTRIBUTE_UNUSED to prevent
 345         compile time warnings.
 346         (print_keyword): Likewise.
 347         (default_print_insn): Likewise.
 348
 349         * fr30-desc.c: Regenerated.
 350         * fr30-desc.h: Regenerated.
 351         * fr30-dis.c: Regenerated.
 352         * fr30-opc.c: Regenerated.
 353         * fr30-opc.h: Regenerated.
 354         * frv-desc.c: Regenerated.
 355         * frv-dis.c: Regenerated.
 356         * frv-opc.c: Regenerated.
 357         * ip2k-asm.c: Regenerated.
 358         * ip2k-desc.c: Regenerated.
 359         * ip2k-desc.h: Regenerated.
 360         * ip2k-dis.c: Regenerated.
 361         * ip2k-opc.c: Regenerated.
 362         * ip2k-opc.h: Regenerated.
 363         * iq2000-desc.c: Regenerated.
 364         * iq2000-dis.c: Regenerated.
 365         * iq2000-opc.c: Regenerated.
 366         * m32r-asm.c: Regenerated.
 367         * m32r-desc.c: Regenerated.
 368         * m32r-desc.h: Regenerated.
 369         * m32r-dis.c: Regenerated.
 370         * m32r-opc.c: Regenerated.
 371         * m32r-opc.h: Regenerated.
 372         * m32r-opinst.c: Regenerated.
 373         * openrisc-desc.c: Regenerated.
 374         * openrisc-desc.h: Regenerated.
 375         * openrisc-dis.c: Regenerated.
 376         * openrisc-opc.c: Regenerated.
 377         * openrisc-opc.h: Regenerated.
 378         * xstormy16-desc.c: Regenerated.
 379         * xstormy16-desc.h: Regenerated.
 380         * xstormy16-dis.c: Regenerated.
 381         * xstormy16-opc.c: Regenerated.
 382         * xstormy16-opc.h: Regenerated.
 383
 384 2005-02-14  H.J. Lu  <hongjiu.lu@intel.com>
 385
 386         * dis-buf.c (perror_memory): Use sprintf_vma to print out
 387         address.
 388
 389 2005-02-11  Nick Clifton  <nickc@redhat.com>
 390
 391         * iq2000-asm.c: Regenerate.
 392
 393         * frv-dis.c: Regenerate.
 394
 395 2005-02-07  Jim Blandy  <jimb@redhat.com>
 396
 397         * Makefile.am (CGEN): Load guile.scm before calling the main
 398         application script.
 399         * Makefile.in: Regenerated.
 400         * cgen.sh: Be prepared for the 'cgen' argument to contain spaces.
 401         Simply pass the cgen-opc.scm path to ${cgen} as its first
 402         argument; ${cgen} itself now contains the '-s', or whatever is
 403         appropriate for the Scheme being used.
 404
 405 2005-01-31  Andrew Cagney  <cagney@gnu.org>
 406
 407         * configure: Regenerate to track ../gettext.m4.
 408
 409 2005-01-31  Jan Beulich  <jbeulich@novell.com>
 410
 411         * ia64-gen.c (NELEMS): Define.
 412         (shrink): Generate alias with missing second predicate register when
 413         opcode has two outputs and these are both predicates.
 414         * ia64-opc-i.c (FULL17): Define.
 415         (ia64_opcodes_i): Add mov-to-pr alias without second input. Use FULL17
 416         here to generate output template.
 417         (TBITCM, TNATCM): Undefine after use.
 418         * ia64-opc-m.c (ia64_opcodes_i): Add alloc alias without ar.pfs as
 419         first input. Add ld16 aliases without ar.csd as second output. Add
 420         st16 aliases without ar.csd as second input. Add cmpxchg aliases
 421         without ar.ccv as third input. Add cmp8xchg16 aliases without ar.csd/
 422         ar.ccv as third/fourth inputs. Consolidate through...
 423         (CMPXCHG_acq, CMPXCHG_rel, CMPXCHG_1, CMPXCHG_2, CMPXCHG_4, CMPXCHG_8,
 424         CMPXCHGn, CMP8XCHG16, CMPXCHG_ALL): Define.
 425         * ia64-asmtab.c: Regenerate.
 426
 427 2005-01-27  Andrew Cagney  <cagney@gnu.org>
 428
 429         * configure: Regenerate to track ../gettext.m4 change.
 430
 431 2005-01-25  Alexandre Oliva  <aoliva@redhat.com>
 432
 433         2004-11-10  Alexandre Oliva  <aoliva@redhat.com>
 434         * frv-asm.c: Rebuilt.
 435         * frv-desc.c: Rebuilt.
 436         * frv-desc.h: Rebuilt.
 437         * frv-dis.c: Rebuilt.
 438         * frv-ibld.c: Rebuilt.
 439         * frv-opc.c: Rebuilt.
 440         * frv-opc.h: Rebuilt.
 441
 442 2005-01-24  Andrew Cagney  <cagney@gnu.org>
 443
 444         * configure: Regenerate, ../gettext.m4 was updated.
 445
 446 2005-01-21  Fred Fish  <fnf@specifixinc.com>
 447
 448         * mips-opc.c:  Change INSN_ALIAS to INSN2_ALIAS.
 449         Change INSN_WRITE_MDMX_ACC to INSN2_WRITE_MDMX_ACC.
 450         Change INSN_READ_MDMX_ACC to INSN2_READ_MDMX_ACC.
 451         * mips-dis.c: Ditto.
 452
 453 2005-01-20  Alan Modra  <amodra@bigpond.net.au>
 454
 455         * ppc-opc.c (powerpc_opcodes): Add optional 'l' arg to tlbiel.
 456
 457 2005-01-19  Fred Fish  <fnf@specifixinc.com>
 458
 459         * mips-dis.c (no_aliases): New disassembly option flag.
 460         (set_default_mips_dis_options): Init no_aliases to zero.
 461         (parse_mips_dis_option): Handle no-aliases option.
 462         (print_insn_mips): Ignore table entries that are aliases
 463         if no_aliases is set.
 464         (print_insn_mips16): Ditto.
 465         * mips-opc.c (mips_builtin_opcodes): Add initializer column for
 466         new pinfo2 member and add INSN_ALIAS initializers as needed.  Also
 467         move WR_MACC and RD_MACC initializers from pinfo to pinfo2.
 468         * mips16-opc.c (mips16_opcodes): Ditto.
 469
 470 2005-01-17  Andrew Stubbs  <andrew.stubbs@st.com>
 471
 472         * sh-opc.h (arch_sh2a_or_sh3e,arch_sh2a_or_sh4): Correct definition.
 473         (inheritance diagram): Add missing edge.
 474         (arch_sh1_up): Rename arch_sh_up to match external name to make life
 475         easier for the testsuite.
 476         (arch_sh4_nofp_up): Likewise, rename arch_sh4_nofpu_up.
 477         (arch_sh4a_nofp_up): Likewise, rename arch_sh4a_nofpu_up.
 478         (arch_sh2a_nofpu_or_sh4_nommu_nofpu_up): Add missing
 479         arch_sh2a_or_sh4_up child.
 480         (sh_table): Do renaming as above.
 481         Correct comment for ldc.l for gas testsuite to read.
 482         Remove rogue mul.l from sh1 (duplicate of the one for sh2).
 483         Correct comments for movy.w and movy.l for gas testsuite to read.
 484         Correct comments for fmov.d and fmov.s for gas testsuite to read.
 485
 486 2005-01-12  H.J. Lu  <hongjiu.lu@intel.com>
 487
 488         * i386-dis.c (OP_E): Don't ignore scale in SIB for 64 bit mode.
 489
 490 2005-01-12  H.J. Lu  <hongjiu.lu@intel.com>
 491
 492         * i386-dis.c (OP_E): Ignore scale when index == 0x4 in SIB.
 493
 494 2005-01-10  Andreas Schwab  <schwab@suse.de>
 495
 496         * disassemble.c (disassemble_init_for_target) <case
 497         bfd_arch_ia64>: Set skip_zeroes to 16.
 498         <case bfd_arch_tic4x>: Set skip_zeroes to 32.
 499
 500 2004-12-23  Tomer Levi  <Tomer.Levi@nsc.com>
 501
 502         * crx-opc.c: Mark 'bcop' instruction as RELAXABLE.
 503
 504 2004-12-14  Svein E. Seldal  <Svein.Seldal@solidas.com>
 505
 506         * avr-dis.c: Prettyprint. Added printing of symbol names in all
 507         memory references. Convert avr_operand() to C90 formatting.
 508
 509 2004-12-05  Tomer Levi  <Tomer.Levi@nsc.com>
 510
 511         * crx-dis.c (print_arg): Use 'info->print_address_func' for address printing.
 512
 513 2004-11-29  Tomer Levi  <Tomer.Levi@nsc.com>
 514
 515         * crx-opc.c (crx_optab): Mark all rbase_disps* operands as signed.
 516         (no_op_insn): Initialize array with instructions that have no
 517         operands.
 518         * crx-dis.c (make_instruction): Get rid of COP_BRANCH_INS operand swapping.
 519
 520 2004-11-29  Richard Earnshaw  <rearnsha@arm.com>
 521
 522         * arm-dis.c: Correct top-level comment.
 523
 524 2004-11-27  Richard Earnshaw  <rearnsha@arm.com>
 525
 526         * arm-opc.h (arm_opcode, thumb_opcode): Add extra field for the
 527         architecuture defining the insn.
 528         (arm_opcodes, thumb_opcodes): Delete.  Move to ...
 529         * arm-dis.c (arm_opcodes, thumb_opcodes): Here.  Add architecutre
 530         field.
 531         Also include opcode/arm.h.
 532         * Makefile.am (arm-dis.lo): Update dependency list.
 533         * Makefile.in: Regenerate.
 534
 535 2004-11-22  Ravi Ramaseshan  <ravi.ramaseshan@codito.com>
 536
 537         * opcode/arc-opc.c (insert_base): Modify ls_operand[LS_OFFSET] to
 538         reflect the change to the short immediate syntax.
 539
 540 2004-11-19  Alan Modra  <amodra@bigpond.net.au>
 541
 542         * or32-opc.c (debug): Warning fix.
 543         * po/POTFILES.in: Regenerate.
 544
 545         * maxq-dis.c: Formatting.
 546         (print_insn): Warning fix.
 547
 548 2004-11-17  Daniel Jacobowitz  <dan@codesourcery.com>
 549
 550         * arm-dis.c (WORD_ADDRESS): Define.
 551         (print_insn): Use it.  Correct big-endian end-of-section handling.
 552
 553 2004-11-08  Inderpreet Singh   <inderpreetb@nioda.hcltech.com>
 554             Vineet Sharma      <vineets@noida.hcltech.com>
 555
 556         * maxq-dis.c: New file.
 557         * disassemble.c (ARCH_maxq): Define.
 558         (disassembler): Add 'print_insn_maxq_little' for handling maxq
 559         instructions..
 560         * configure.in: Add case for bfd_maxq_arch.
 561         * configure: Regenerate.
 562         * Makefile.am: Add support for maxq-dis.c
 563         * Makefile.in: Regenerate.
 564         * aclocal.m4: Regenerate.
 565
 566 2004-11-05  Tomer Levi  <Tomer.Levi@nsc.com>
 567
 568         * crx-opc.c (crx_optab): Rename 'arg_icr' to 'arg_idxr' for Index register
 569         mode.
 570         * crx-dis.c: Likewise.
 571
 572 2004-11-04  Hans-Peter Nilsson  <hp@axis.com>
 573
 574         Generally, handle CRISv32.
 575         * cris-dis.c (TRACE_CASE): Define as (disdata->trace_case).
 576         (struct cris_disasm_data): New type.
 577         (format_reg, format_hex, cris_constraint, print_flags)
 578         (get_opcode_entry): Add struct cris_disasm_data * parameter.  All
 579         callers changed.
 580         (format_sup_reg, print_insn_crisv32_with_register_prefix)
 581         (print_insn_crisv32_without_register_prefix)
 582         (print_insn_crisv10_v32_with_register_prefix)
 583         (print_insn_crisv10_v32_without_register_prefix)
 584         (cris_parse_disassembler_options): New functions.
 585         (bytes_to_skip, cris_spec_reg): Add enum cris_disass_family
 586         parameter.  All callers changed.
 587         (get_opcode_entry): Call malloc, not xmalloc.  Return NULL on
 588         failure.
 589         (cris_constraint) <case 'Y', 'U'>: New cases.
 590         (bytes_to_skip): Handle 'Y' and 'N' as 's'.  Skip size is 4 bytes
 591         for constraint 'n'.
 592         (print_with_operands) <case 'Y'>: New case.
 593         (print_with_operands) <case 'T', 'A', '[', ']', 'd', 'n', 'u'>
 594         <case 'N', 'Y', 'Q'>: New cases.
 595         (print_insn_cris_generic): Emit "bcc ." for zero and CRISv32.
 596         (print_insn_cris_with_register_prefix)
 597         (print_insn_cris_without_register_prefix): Call
 598         cris_parse_disassembler_options.
 599         * cris-opc.c (cris_spec_regs): Mention that this table isn't used
 600         for CRISv32 and the size of immediate operands.  New v32-only
 601         entries for bz, pid, srs, wz, exs, eda, dz, ebp, erp, nrp, ccs and
 602         spc.  Add v32-only 4-byte entries for p2, p3, p5 and p6.  Change
 603         ccr, ibr, irp to be v0..v10.  Change bar, dccr to be v8..v10.
 604         Change brp to be v3..v10.
 605         (cris_support_regs): New vector.
 606         (cris_opcodes): Update head comment.  New format characters '[',
 607         ']', space, 'A', 'd', 'N', 'n', 'Q', 'T', 'u', 'U', 'Y'.
 608         Add new opcodes for v32 and adjust existing opcodes to accommodate
 609         differences to earlier variants.
 610         (cris_cond15s): New vector.
 611
 612 2004-11-04 Jan Beulich <jbeulich@novell.com>
 613
 614         * i386-dis.c (Eq, Edqw, indirEp, Gdq, I1): Define.
 615         (indirEb): Remove.
 616         (Mp): Use f_mode rather than none at all.
 617         (t_mode, dq_mode, dqw_mode, f_mode, const_1_mode): Define. t_mode
 618         replaces what previously was x_mode; x_mode now means 128-bit SSE
 619         operands.
 620         (dis386): Make far jumps and calls have an 'l' prefix only in AT&T
 621         mode. movmskpX's, pextrw's, and pmovmskb's first operands are Gdq.
 622         pinsrw's second operand is Edqw.
 623         (grps): 1-bit shifts' and rotates' second operands are I1. cmpxchg8b's
 624         operand is Eq. movntq's and movntdq's first operands are EM. s[gi]dt,
 625         fldenv, frstor, fsave, fstenv all should also have suffixes in Intel
 626         mode when an operand size override is present or always suffixing.
 627         More instructions will need to be added to this group.
 628         (putop): Handle new macro chars 'C' (short/long suffix selector),
 629         'I' (Intel mode override for following macro char), and 'J' (for
 630         adding the 'l' prefix to far branches in AT&T mode). When an
 631         alternative was specified in the template, honor macro character when
 632         specified for Intel mode.
 633         (OP_E): Handle new *_mode values. Correct pointer specifications for
 634         memory operands. Consolidate output of index register.
 635         (OP_G): Handle new *_mode values.
 636         (OP_I): Handle const_1_mode.
 637         (OP_ESreg, OP_DSreg): Generate pointer specifications. Indicate
 638         respective opcode prefix bits have been consumed.
 639         (OP_EM, OP_EX): Provide some default handling for generating pointer
 640         specifications.
 641
 642 2004-10-28  Tomer Levi  <Tomer.Levi@nsc.com>
 643
 644         * crx-opc.c (REV_COP_INST): New macro, reverse operand order of
 645         COP_INST macro.
 646
 647 2004-10-27  Tomer Levi  <Tomer.Levi@nsc.com>
 648
 649         * crx-dis.c (enum REG_ARG_TYPE): New, replacing COP_ARG_TYPE.
 650         (getregliststring): Support HI/LO and user registers.
 651         * crx-opc.c (crx_instruction): Update data structure according to the
 652         rearrangement done in CRX opcode header file.
 653         (crx_regtab):  Likewise.
 654         (crx_optab):  Likewise.
 655         (crx_instruction): Reorder load/stor instructions, remove unsupported
 656         formats.
 657         support new Co-Processor instruction 'cpi'.
 658
 659 2004-10-27  Nick Clifton  <nickc@redhat.com>
 660
 661         * opcodes/iq2000-asm.c: Regenerate.
 662         * opcodes/iq2000-desc.c: Regenerate.
 663         * opcodes/iq2000-desc.h: Regenerate.
 664         * opcodes/iq2000-dis.c: Regenerate.
 665         * opcodes/iq2000-ibld.c: Regenerate.
 666         * opcodes/iq2000-opc.c: Regenerate.
 667         * opcodes/iq2000-opc.h: Regenerate.
 668
 669 2004-10-21  Tomer Levi  <Tomer.Levi@nsc.com>
 670
 671         * crx-opc.c (crx_instruction): Replace i3, i4, i5 with us3,
 672         us4, us5 (respectively).
 673         Remove unsupported 'popa' instruction.
 674         Reverse operands order in store co-processor instructions.
 675
 676 2004-10-15  Alan Modra  <amodra@bigpond.net.au>
 677
 678         * Makefile.am: Run "make dep-am"
 679         * Makefile.in: Regenerate.
 680
 681 2004-10-12  Bob Wilson  <bob.wilson@acm.org>
 682
 683         * xtensa-dis.c: Use ISO C90 formatting.
 684
 685 2004-10-09  Alan Modra  <amodra@bigpond.net.au>
 686
 687         * ppc-opc.c: Revert 2004-09-09 change.
 688
 689 2004-10-07  Bob Wilson  <bob.wilson@acm.org>
 690
 691         * xtensa-dis.c (state_names): Delete.
 692         (fetch_data): Use xtensa_isa_maxlength.
 693         (print_xtensa_operand): Replace operand parameter with opcode/operand
 694         pair.  Remove print_sr_name parameter.  Use new xtensa-isa.h functions.
 695         (print_insn_xtensa): Use new xtensa-isa.h functions.  Handle multislot
 696         instruction bundles.  Use xmalloc instead of malloc.
 697
 698 2004-10-07  David Gibson  <david@gibson.dropbear.id.au>
 699
 700         * ppc-opc.c: Replace literal "0"s with NULLs in pointer
 701         initializers.
 702
 703 2004-10-07  Tomer Levi  <Tomer.Levi@nsc.com>
 704
 705         * crx-opc.c (crx_instruction): Support Co-processor insns.
 706         * crx-dis.c (COP_ARG_TYPE): New enum for CO-Processor arguments.
 707         (getregliststring): Change function to use the above enum.
 708         (print_arg): Handle CO-Processor insns.
 709         (crx_cinvs): Add 'b' option to invalidate the branch-target
 710         cache.
 711
 712 2004-10-06  Aldy Hernandez  <aldyh@redhat.com>
 713
 714         * ppc-opc.c (powerpc_opcodes): Add efscfd, efdabs, efdnabs,
 715         efdneg, efdadd, efdsub, efdmul, efddiv, efdcmpgt, efdcmplt,
 716         efdcmpeq, efdtstgt, efdtstlt, efdtsteq, efdcfsi, efdcfsid,
 717         efdcfui, efdcfuid, efdcfsf, efdcfuf, efdctsi, efdctsidz, efdctsiz,
 718         efdctui, efdctuidz, efdctuiz, efdctsf, efdctuf, efdctuf, efdcfs.
 719
 720 2004-10-01  Bill Farmer  <Bill@the-farmers.freeserve.co.uk>
 721
 722         * pdp11-dis.c (print_insn_pdp11): Subtract the SOB's displacement
 723         rather than add it.
 724
 725 2004-09-30  Paul Brook  <paul@codesourcery.com>
 726
 727         * arm-dis.c (print_insn_arm): Handle 'e' for SMI instruction.
 728         * arm-opc.h: Document %e.  Add ARMv6ZK instructions.
 729
 730 2004-09-17  H.J. Lu  <hongjiu.lu@intel.com>
 731
 732         * Makefile.am (AUTOMAKE_OPTIONS): Require 1.9.
 733         (CONFIG_STATUS_DEPENDENCIES): New.
 734         (Makefile): Removed.
 735         (config.status): Likewise.
 736         * Makefile.in: Regenerated.
 737
 738 2004-09-17  Alan Modra  <amodra@bigpond.net.au>
 739
 740         * Makefile.am: Run "make dep-am".
 741         * Makefile.in: Regenerate.
 742         * aclocal.m4: Regenerate.
 743         * configure: Regenerate.
 744         * po/POTFILES.in: Regenerate.
 745         * po/opcodes.pot: Regenerate.
 746
 747 2004-09-11  Andreas Schwab  <schwab@suse.de>
 748
 749         * configure: Rebuild.
 750
 751 2004-09-09  Segher Boessenkool  <segher@kernel.crashing.org>
 752
 753         * ppc-opc.c (L): Make this field not optional.
 754
 755 2004-09-03  Tomer Levi  <Tomer.Levi@nsc.com>
 756
 757         * opc-crx.c: Rename 'popma' to 'popa', remove 'pushma'.
 758         Fix parameter to 'm[t|f]csr' insns.
 759
 760 2004-08-30  Nathanael Nerode  <neroden@gcc.gnu.org>
 761
 762         * configure.in: Autoupdate to autoconf 2.59.
 763         * aclocal.m4: Rebuild with aclocal 1.4p6.
 764         * configure: Rebuild with autoconf 2.59.
 765         * Makefile.in: Rebuild with automake 1.4p6 (picking up
 766         bfd changes for autoconf 2.59 on the way).
 767         * config.in: Rebuild with autoheader 2.59.
 768
 769 2004-08-27  Richard Sandiford  <rsandifo@redhat.com>
 770
 771         * frv-desc.[ch], frv-opc.[ch]: Regenerated.
 772
 773 2004-07-30  Michal Ludvig  <mludvig@suse.cz>
 774
 775         * i386-dis.c (GRPPADLCK): Renamed to GRPPADLCK1
 776         (GRPPADLCK2): New define.
 777         (twobyte_has_modrm): True for 0xA6.
 778         (grps): GRPPADLCK2 for opcode 0xA6.
 779
 780 2004-07-29  Alexandre Oliva  <aoliva@redhat.com>
 781
 782         Introduce SH2a support.
 783         * sh-opc.h (arch_sh2a_base): Renumber.
 784         (arch_sh2a_nofpu_base): Remove.
 785         (arch_sh_base_mask): Adjust.
 786         (arch_opann_mask): New.
 787         (arch_sh2a, arch_sh2a_nofpu): Adjust.
 788         (arch_sh2a_up, arch_sh2a_nofpu_up): Likewise.
 789         (sh_table): Adjust whitespace.
 790         2004-02-24  Corinna Vinschen  <vinschen@redhat.com>
 791         * sh-opc.h (arch_sh2a_nofpu_up): New.  Use instead of arch_sh2a_up in
 792         instruction list throughout.
 793         (arch_sh2a_up): Redefine to include fpu instruction set.  Use instead
 794         of arch_sh2a in instruction list throughout.
 795         (arch_sh2e_up): Accomodate above changes.
 796         (arch_sh2_up): Ditto.
 797         2004-02-20  Corinna Vinschen  <vinschen@redhat.com>
 798         * sh-opc.h: Add arch_sh2a_nofpu to arch_sh2_up.
 799         2004-02-18  Corinna Vinschen  <vinschen@redhat.com>
 800         * sh-dis.c (print_insn_sh): Add bfd_mach_sh2a_nofpu handling.
 801         * sh-opc.h (arch_sh2a_nofpu): New.
 802         (arch_sh2a_up): New, defines sh2a and sh2a_nofpu.
 803         (sh_table): Change all arch_sh2a to arch_sh2a_up unless FPU
 804         instruction.
 805         2004-01-20  DJ Delorie  <dj@redhat.com>
 806         * sh-dis.c (print_insn_sh): SH2A does not have 'X' fp regs.
 807         2003-12-29  DJ Delorie  <dj@redhat.com>
 808         * sh-opc.c (sh_nibble_type, sh_arg_type, arch_2a, arch_2e_up,
 809         sh_opcode_info, sh_table): Add sh2a support.
 810         (arch_op32): New, to tag 32-bit opcodes.
 811         * sh-dis.c (print_insn_sh): Support sh2a opcodes.
 812         2003-12-02  Michael Snyder  <msnyder@redhat.com>
 813         * sh-opc.h (arch_sh2a): Add.
 814         * sh-dis.c (arch_sh2a): Handle.
 815         * sh-opc.h (arch_sh2_up): Fix up to include arch_sh2a.
 816
 817 2004-07-27  Tomer Levi  <Tomer.Levi@nsc.com>
 818
 819         * crx-opc.c: Add popx,pushx insns. Indent code, fix comments.
 820
 821 2004-07-22  Nick Clifton  <nickc@redhat.com>
 822
 823         PR/280
 824         * h8300-dis.c (bfd_h8_disassemble): Do not dump raw bytes for the
 825         insns - this is done by objdump itself.
 826         * h8500-dis.c (print_insn_h8500): Likewise.
 827
 828 2004-07-21  Jan Beulich <jbeulich@novell.com>
 829
 830         * i386-dis.c (OP_E): Show rip-relative addressing in 64-bit mode
 831         regardless of address size prefix in effect.
 832         (ptr_reg): Size or address registers does not depend on rex64, but
 833         on the presence of an address size override.
 834         (OP_MMX): Use rex.x only for xmm registers.
 835         (OP_EM): Use rex.z only for xmm registers.
 836
 837 2004-07-20  Maciej W. Rozycki  <macro@linux-mips.org>
 838
 839         * mips-opc.c (mips_builtin_opcodes): Move coprocessor 2
 840         move/branch operations to the bottom so that VR5400 multimedia
 841         instructions take precedence in disassembly.
 842
 843 2004-07-20  Maciej W. Rozycki  <macro@linux-mips.org>
 844
 845         * mips-opc.c (mips_builtin_opcodes): Remove the MIPS32
 846         ISA-specific "break" encoding.
 847
 848 2004-07-13  Elvis Chiang  <elvisfb@gmail.com>
 849
 850         * arm-opc.h: Fix typo in comment.
 851
 852 2004-07-11  Andreas Schwab  <schwab@suse.de>
 853
 854         * m68k-dis.c (m68k_valid_ea): Fix typos in last change.
 855
 856 2004-07-09  Andreas Schwab  <schwab@suse.de>
 857
 858         * m68k-dis.c (m68k_valid_ea): Check validity of all codes.
 859
 860 2004-07-07  Tomer Levi  <Tomer.Levi@nsc.com>
 861
 862         * Makefile.am (CFILES): Add crx-dis.c, crx-opc.c.
 863         (ALL_MACHINES): Add crx-dis.lo, crx-opc.lo.
 864         (crx-dis.lo): New target.
 865         (crx-opc.lo): Likewise.
 866         * Makefile.in: Regenerate.
 867         * configure.in: Handle bfd_crx_arch.
 868         * configure: Regenerate.
 869         * crx-dis.c: New file.
 870         * crx-opc.c: New file.
 871         * disassemble.c (ARCH_crx): Define.
 872         (disassembler): Handle ARCH_crx.
 873
 874 2004-06-29  James E Wilson  <wilson@specifixinc.com>
 875
 876         * ia64-opc-a.c (ia64_opcodes_a): Delete mov immediate pseudo for adds.
 877         * ia64-asmtab.c: Regnerate.
 878
 879 2004-06-28  Alan Modra  <amodra@bigpond.net.au>
 880
 881         * ppc-opc.c (insert_fxm): Handle mfocrf and mtocrf.
 882         (extract_fxm): Don't test dialect.
 883         (XFXFXM_MASK): Include the power4 bit.
 884         (XFXM): Add p4 param.
 885         (powerpc_opcodes): Add mfocrf and mtocrf.  Adjust mtcr.
 886
 887 2004-06-27  Alexandre Oliva  <aoliva@redhat.com>
 888
 889         2003-07-21  Richard Sandiford  <rsandifo@redhat.com>
 890         * disassemble.c (disassembler): Handle bfd_mach_h8300sxn.
 891
 892 2004-06-26  Alan Modra  <amodra@bigpond.net.au>
 893
 894         * ppc-opc.c (BH, XLBH_MASK): Define.
 895         (powerpc_opcodes): Allow BH field on bclr, bclrl, bcctr, bcctrl.
 896
 897 2004-06-24  Alan Modra  <amodra@bigpond.net.au>
 898
 899         * i386-dis.c (x_mode): Comment.
 900         (two_source_ops): File scope.
 901         (float_mem): Correct fisttpll and fistpll.
 902         (float_mem_mode): New table.
 903         (dofloat): Use it.
 904         (OP_E): Correct intel mode PTR output.
 905         (ptr_reg): Use open_char and close_char.
 906         (PNI_Fixup): Handle possible suffix on sidt.  Use op1out etc. for
 907         operands.  Set two_source_ops.
 908
 909 2004-06-15  Alan Modra  <amodra@bigpond.net.au>
 910
 911         * arc-ext.c (build_ARC_extmap): Use bfd_get_section_size
 912         instead of _raw_size.
 913
 914 2004-06-08  Jakub Jelinek  <jakub@redhat.com>
 915
 916         * ia64-gen.c (in_iclass): Handle more postinc st
 917         and ld variants.
 918         * ia64-asmtab.c: Rebuilt.
 919
 920 2004-06-01  Martin Schwidefsky  <schwidefsky@de.ibm.com>
 921
 922         * s390-opc.txt: Correct architecture mask for some opcodes.
 923         lrv, lrvh, strv, ml, dl, alc, slb rll and mvclu are available
 924         in the esa mode as well.
 925
 926 2004-05-28  Andrew Stubbs <andrew.stubbs@superh.com>
 927
 928         * sh-dis.c (target_arch): Make unsigned.
 929         (print_insn_sh): Replace (most of) switch with a call to
 930         sh_get_arch_from_bfd_mach(). Also use new architecture flags system.
 931         * sh-opc.h: Redefine architecture flags values.
 932         Add sh3-nommu architecture.
 933         Reorganise <arch>_up macros so they make more visual sense.
 934         (SH_MERGE_ARCH_SET): Define new macro.
 935         (SH_VALID_BASE_ARCH_SET): Likewise.
 936         (SH_VALID_MMU_ARCH_SET): Likewise.
 937         (SH_VALID_CO_ARCH_SET): Likewise.
 938         (SH_VALID_ARCH_SET): Likewise.
 939         (SH_MERGE_ARCH_SET_VALID): Likewise.
 940         (SH_ARCH_SET_HAS_FPU): Likewise.
 941         (SH_ARCH_SET_HAS_DSP): Likewise.
 942         (SH_ARCH_UNKNOWN_ARCH): Likewise.
 943         (sh_get_arch_from_bfd_mach): Add prototype.
 944         (sh_get_arch_up_from_bfd_mach): Likewise.
 945         (sh_get_bfd_mach_from_arch_set): Likewise.
 946         (sh_merge_bfd_arc): Likewise.
 947
 948 2004-05-24  Peter Barada  <peter@the-baradas.com>
 949
 950         * m68k-dis.c(print_insn_m68k): Strip body of diassembly out
 951         into new match_insn_m68k function.  Loop over canidate
 952         matches and select first that completely matches.
 953         * m68k-dis.c(print_insn_arg): Fix 'g' case to only extract 1 bit.
 954         * m68k-dis.c(print_insn_arg): Call new function m68k_valid_ea
 955         to verify addressing for MAC/EMAC.
 956         * m68k-dis.c(print_insn_arg): Use reg_half_names for MAC/EMAC
 957         reigster halves since 'fpu' and 'spl' look misleading.
 958         * m68k-dis.c(fetch_arg): Fix 'G', 'H', 'I', 'f', 'M', 'N' cases.
 959         * m68k-opc.c: Rearragne mac/emac cases to use longest for
 960         first, tighten up match masks.
 961         * m68k-opc.c: Add 'size' field to struct m68k_opcode.  Produce
 962         'size' from special case code in print_insn_m68k to
 963         determine decode size of insns.
 964
 965 2004-05-19  Alan Modra  <amodra@bigpond.net.au>
 966
 967         * ppc-opc.c (insert_fxm): Enable two operand mfcr when -many as
 968         well as when -mpower4.
 969
 970 2004-05-13  Nick Clifton  <nickc@redhat.com>
 971
 972         * po/fr.po: Updated French translation.
 973
 974 2004-05-05  Peter Barada  <peter@the-baradas.com>
 975
 976         * m68k-dis.c(print_insn_m68k): Add new chips, use core
 977         variants in arch_mask.  Only set m68881/68851 for 68k chips.
 978         * m68k-op.c: Switch from ColdFire chips to core variants.
 979
 980 2004-05-05  Alan Modra  <amodra@bigpond.net.au>
 981
 982         PR 147.
 983         * ppc-opc.c (PPCVEC): Remove PPC_OPCODE_PPC.
 984
 985 2004-04-29  Ben Elliston  <bje@au.ibm.com>
 986
 987         * ppc-opc.c (XCMPL): Renmame to XOPL. Update users.
 988         (powerpc_opcodes): Add "dbczl" instruction for PPC970.
 989
 990 2004-04-22  Kaz Kojima  <kkojima@rr.iij4u.or.jp>
 991
 992         * sh-dis.c (print_insn_sh): Print the value in constant pool
 993         as a symbol if it looks like a symbol.
 994
 995 2004-04-22  Peter Barada <peter@the-baradas.com>
 996
 997         * m68k-dis.c(print_insn_m68k): Set mfcmac/mcfemac on
 998         appropriate ColdFire architectures.
 999         (print_insn_m68k): Handle EMAC, MAC/EMAC scalefactor, and MAC/EMAC
1000         mask addressing.
1001         Add EMAC instructions, fix MAC instructions. Remove
1002         macmw/macml/msacmw/msacml instructions since mask addressing now
1003         supported.
1004
1005 2004-04-20  Jakub Jelinek  <jakub@redhat.com>
1006
1007         * sparc-opc.c (fmoviccx, fmovfccx, fmovccx): Define.
1008         (fmovicc, fmovfcc, fmovcc): Remove fpsize argument, change opcode to
1009         suffix.  Use fmov*x macros, create all 3 fpsize variants in one
1010         macro.  Adjust all users.
1011
1012 2004-04-15  Anil Paranjpe  <anilp1@kpitcummins.com>
1013
1014         * h8300-dis.c (bfd_h8_disassemble) : Treat "adds" & "subs"
1015         separately.
1016
1017 2004-03-30  Kazuhiro Inaoka  <inaoka.kazuhiro@renesas.com>
1018
1019         * m32r-asm.c: Regenerate.
1020
1021 2004-03-29  Stan Shebs  <shebs@apple.com>
1022
1023         * mpw-config.in, mpw-make.sed: Remove MPW support files, no longer
1024         used.
1025
1026 2004-03-19  Alan Modra  <amodra@bigpond.net.au>
1027
1028         * aclocal.m4: Regenerate.
1029         * config.in: Regenerate.
1030         * configure: Regenerate.
1031         * po/POTFILES.in: Regenerate.
1032         * po/opcodes.pot: Regenerate.
1033
1034 2004-03-16  Alan Modra  <amodra@bigpond.net.au>
1035
1036         * ppc-dis.c (print_insn_powerpc): Don't print tabs.  Handle
1037         PPC_OPERANDS_GPR_0.
1038         * ppc-opc.c (RA0): Define.
1039         (RAQ, RAL, RAM, RAS, RSQ, RTQ, RSO): Use PPC_OPERAND_GPR_0.
1040         (RAOPT): Rename from RAO.  Update all uses.
1041         (powerpc_opcodes): Use RA0 as appropriate.
1042
1043 2004-03-15  Aldy Hernandez  <aldyh@redhat.com>
1044
1045         * ppc-opc.c (powerpc_opcodes): Add BOOKE versions of mfsprg.
1046
1047 2004-03-15  Alan Modra  <amodra@bigpond.net.au>
1048
1049         * sparc-dis.c (print_insn_sparc): Update getword prototype.
1050
1051 2004-03-12  Michal Ludvig  <mludvig@suse.cz>
1052
1053         * i386-dis.c (GRPPLOCK): Delete.
1054         (grps): Delete GRPPLOCK entry.
1055
1056 2004-03-12  Alan Modra  <amodra@bigpond.net.au>
1057
1058         * i386-dis.c (OP_M, OP_0f0e, OP_0fae, NOP_Fixup): New functions.
1059         (M, Mp): Use OP_M.
1060         (None, PADLOCK_SPECIAL, PADLOCK_0): Delete.
1061         (GRPPADLCK): Define.
1062         (dis386): Use NOP_Fixup on "nop".
1063         (dis386_twobyte): Use GRPPADLCK on opcode 0xa7.
1064         (twobyte_has_modrm): Set for 0xa7.
1065         (padlock_table): Delete.  Move to..
1066         (grps): ..here, using OP_0f07.  Use OP_Ofae on lfence, mfence
1067         and clflush.
1068         (print_insn): Revert PADLOCK_SPECIAL code.
1069         (OP_E): Delete sfence, lfence, mfence checks.
1070
1071 2004-03-12  Jakub Jelinek  <jakub@redhat.com>
1072
1073         * i386-dis.c (grps): Use INVLPG_Fixup instead of OP_E for invlpg.
1074         (INVLPG_Fixup): New function.
1075         (PNI_Fixup): Remove ATTRIBUTE_UNUSED from sizeflag.
1076
1077 2004-03-12  Michal Ludvig  <mludvig@suse.cz>
1078
1079         * i386-dis.c (PADLOCK_SPECIAL, PADLOCK_0): New defines.
1080         (dis386_twobyte): Opcode 0xa7 is PADLOCK_0.
1081         (padlock_table): New struct with PadLock instructions.
1082         (print_insn): Handle PADLOCK_SPECIAL.
1083
1084 2004-03-12  Alan Modra  <amodra@bigpond.net.au>
1085
1086         * i386-dis.c (grps): Use clflush by default for 0x0fae/7.
1087         (OP_E): Twiddle clflush to sfence here.
1088
1089 2004-03-08  Nick Clifton  <nickc@redhat.com>
1090
1091         * po/de.po: Updated German translation.
1092
1093 2003-03-03  Andrew Stubbs  <andrew.stubbs@superh.com>
1094
1095         * sh-dis.c (print_insn_sh): Don't disassemble fp instructions in
1096         nofpu mode.  Add BFD type bfd_mach_sh4_nommu_nofpu.
1097         * sh-opc.h: Add sh4_nommu_nofpu architecture and adjust instructions
1098         accordingly.
1099
1100 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
1101
1102         * frv-asm.c: Regenerate.
1103         * frv-desc.c: Regenerate.
1104         * frv-desc.h: Regenerate.
1105         * frv-dis.c: Regenerate.
1106         * frv-ibld.c: Regenerate.
1107         * frv-opc.c: Regenerate.
1108         * frv-opc.h: Regenerate.
1109
1110 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
1111
1112         * frv-desc.c, frv-opc.c: Regenerate.
1113
1114 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
1115
1116         * frv-desc.c, frv-opc.c, frv-opc.h: Regenerate.
1117
1118 2004-02-26  Andrew Stubbs  <andrew.stubbs@superh.com>
1119
1120         * sh-opc.h: Move fsca and fsrra instructions from sh4a to sh4.
1121         Also correct mistake in the comment.
1122
1123 2004-02-26  Andrew Stubbs <andrew.stubbs@superh.com>
1124
1125         * sh-dis.c (print_insn_sh): Add REG_N_D nibble type to
1126         ensure that double registers have even numbers.
1127         Add REG_N_B01 for nn01 (binary 01) nibble to ensure
1128         that reserved instruction 0xfffd does not decode the same
1129         as 0xfdfd (ftrv).
1130         * sh-opc.h: Add REG_N_D nibble type and use it whereever
1131         REG_N refers to a double register.
1132         Add REG_N_B01 nibble type and use it instead of REG_NM
1133         in ftrv.
1134         Adjust the bit patterns in a few comments.
1135
1136 2004-02-25  Aldy Hernandez  <aldyh@redhat.com>
1137
1138         * ppc-opc.c (powerpc_opcodes): Change mask for dcbt and dcbtst.
1139
1140 2004-02-20  Aldy Hernandez  <aldyh@redhat.com>
1141
1142         * ppc-opc.c (powerpc_opcodes): Move mfmcsrr0 before mfdc_dat.
1143
1144 2004-02-20  Aldy Hernandez  <aldyh@redhat.com>
1145
1146         * ppc-opc.c (powerpc_opcodes): Add m*ivor35.
1147
1148 2004-02-20  Aldy Hernandez  <aldyh@redhat.com>
1149
1150         * ppc-opc.c (powerpc_opcodes): Add mfivor32, mfivor33, mfivor34,
1151         mtivor32, mtivor33, mtivor34.
1152
1153 2004-02-19  Aldy Hernandez  <aldyh@redhat.com>
1154
1155         * ppc-opc.c (powerpc_opcodes): Add mfmcar.
1156
1157 2004-02-10  Petko Manolov  <petkan@nucleusys.com>
1158
1159         * arm-opc.h Maverick accumulator register opcode fixes.
1160
1161 2004-02-13  Ben Elliston  <bje@wasabisystems.com>
1162
1163         * m32r-dis.c: Regenerate.
1164
1165 2004-01-27  Michael Snyder  <msnyder@redhat.com>
1166
1167         * sh-opc.h (sh_table): "fsrra", not "fssra".
1168
1169 2004-01-23  Andrew Over <andrew.over@cs.anu.edu.au>
1170
1171         * sparc-opc.c (fdtox, fstox, fqtox, fxtod, fxtos, fxtoq): Tighten
1172         contraints.
1173
1174 2004-01-19  Andrew Over  <andrew.over@cs.anu.edu.au>
1175
1176         * sparc-opc.c (sparc_opcodes) <f[dsq]tox, fxto[dsq]>: Fix args.
1177
1178 2004-01-19  Alan Modra  <amodra@bigpond.net.au>
1179
1180         * i386-dis.c (OP_E): Print scale factor on intel mode sib when not
1181         1.  Don't print scale factor on AT&T mode when index missing.
1182
1183 2004-01-16  Alexandre Oliva  <aoliva@redhat.com>
1184
1185         * m10300-opc.c (mov): 8- and 24-bit immediates are zero-extended
1186         when loaded into XR registers.
1187
1188 2004-01-14  Richard Sandiford  <rsandifo@redhat.com>
1189
1190         * frv-desc.h: Regenerate.
1191         * frv-desc.c: Regenerate.
1192         * frv-opc.c: Regenerate.
1193
1194 2004-01-13  Michael Snyder  <msnyder@redhat.com>
1195
1196         * sh-dis.c (print_insn_sh): Allocate 4 bytes for insn.
1197
1198 2004-01-09  Paul Brook  <paul@codesourcery.com>
1199
1200         * arm-opc.h (arm_opcodes): Move generic mcrr after known
1201         specific opcodes.
1202
1203 2004-01-07  Daniel Jacobowitz  <drow@mvista.com>
1204
1205         * Makefile.am (libopcodes_la_DEPENDENCIES)
1206         (libopcodes_la_LIBADD): Revert 2003-05-17 change.  Add explanatory
1207         comment about the problem.
1208         * Makefile.in: Regenerate.
1209
1210 2004-01-06  Alexandre Oliva  <aoliva@redhat.com>
1211
1212         2003-12-19  Alexandre Oliva  <aoliva@redhat.com>
1213         * frv-asm.c (parse_ulo16, parse_uhi16, parse_d12): Fix some
1214         cut&paste errors in shifting/truncating numerical operands.
1215         2003-08-04  Alexandre Oliva  <aoliva@redhat.com>
1216         * frv-asm.c (parse_ulo16): Parse gotofflo and gotofffuncdesclo.
1217         (parse_uslo16): Likewise.
1218         (parse_uhi16): Parse gotoffhi and gotofffuncdeschi.
1219         (parse_d12): Parse gotoff12 and gotofffuncdesc12.
1220         (parse_s12): Likewise.
1221         2003-08-04  Alexandre Oliva  <aoliva@redhat.com>
1222         * frv-asm.c (parse_ulo16): Parse gotlo and gotfuncdesclo.
1223         (parse_uslo16): Likewise.
1224         (parse_uhi16): Parse gothi and gotfuncdeschi.
1225         (parse_d12): Parse got12 and gotfuncdesc12.
1226         (parse_s12): Likewise.
1227
1228 2004-01-02  Albert Bartoszko  <albar@nt.kegel.com.pl>
1229
1230         * msp430-dis.c (msp430_doubleoperand): Check for an 'add'
1231         instruction which looks similar to an 'rla' instruction.
1232
1233 For older changes see ChangeLog-0203
1234 \f
1235 Local Variables:
1236 mode: change-log
1237 left-margin: 8
1238 fill-column: 74
1239 version-control: never
1240 End: