* m32c.cpu (f-dsp-8-s24): Mask high byte after shifting it.
[deliverable/binutils-gdb.git] / opcodes / ChangeLog
1 2010-07-03 DJ Delorie <dj@delorie.com>
2
3 * m32c-ibld.c: Regenerate.
4
5 2010-07-03 Alan Modra <amodra@gmail.com>
6
7 * ppc-opc.c (PWR2COM): Define.
8 (PPCPWR2): Add PPC_OPCODE_COMMON.
9 (powerpc_opcodes): Add "subc", "subco", "subco.", "fcir", "fcir.",
10 "fcirz", "fcirz." to -mcom opcodes. Remove "mfsri", "dclst",
11 "rac" from -mcom.
12
13 2010-07-01 H.J. Lu <hongjiu.lu@intel.com>
14
15 AVX Programming Reference (June, 2010)
16 * i386-dis.c (PREFIX_0FAE_REG_0): New.
17 (PREFIX_0FAE_REG_1): Likewise.
18 (PREFIX_0FAE_REG_2): Likewise.
19 (PREFIX_0FAE_REG_3): Likewise.
20 (PREFIX_VEX_3813): Likewise.
21 (PREFIX_VEX_3A1D): Likewise.
22 (prefix_table): Add PREFIX_0FAE_REG_0, PREFIX_0FAE_REG_1,
23 PREFIX_0FAE_REG_2, PREFIX_0FAE_REG_3, PREFIX_VEX_3813 and
24 PREFIX_VEX_3A1D.
25 (vex_table): Add PREFIX_VEX_3813 and PREFIX_VEX_3A1D.
26 (mod_table): Add PREFIX_0FAE_REG_0, PREFIX_0FAE_REG_1,
27 PREFIX_0FAE_REG_2, PREFIX_0FAE_REG_3 xsaveopt and rdrnd.
28
29 * i386-gen.c (cpu_flag_init): Add CPU_XSAVEOPT_FLAGS,
30 CPU_FSGSBASE_FLAGS, CPU_RDRND_FLAGS and CPU_F16C_FLAGS.
31 (cpu_flags): Add CpuXsaveopt, CpuFSGSBase, CpuRdRnd and CpuF16C.
32
33 * i386-opc.h (CpuXsaveopt): New.
34 (CpuFSGSBase):Likewise.
35 (CpuRdRnd): Likewise.
36 (CpuF16C): Likewise.
37 (i386_cpu_flags): Add cpuxsaveopt, cpufsgsbase, cpurdrnd and
38 cpuf16c.
39
40 * i386-opc.tbl: Add xsaveopt, rdfsbase, rdgsbase, rdrnd,
41 wrfsbase, wrgsbase, vcvtph2ps and vcvtps2ph.
42 * i386-init.h: Regenerated.
43 * i386-tbl.h: Likewise.
44
45 2010-07-01 Sebastian Andrzej Siewior <bigeasy@linutronix.de>
46
47 * ppc-opc.c (powerpc_opcodes): Revert deprecation of mfocrf, mtcrf
48 and mtocrf on EFS.
49
50 2010-06-29 Alan Modra <amodra@gmail.com>
51
52 * maxq-dis.c: Delete file.
53 * Makefile.am: Remove references to maxq.
54 * configure.in: Likewise.
55 * disassemble.c: Likewise.
56 * Makefile.in: Regenerate.
57 * configure: Regenerate.
58 * po/POTFILES.in: Regenerate.
59
60 2010-06-29 Alan Modra <amodra@gmail.com>
61
62 * mep-dis.c: Regenerate.
63
64 2010-06-28 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
65
66 * arm-disc.c (parse_insn_neon): Fix Neon alignment syntax.
67
68 2010-06-27 Alan Modra <amodra@gmail.com>
69
70 * arc-dis.c (arc_sprintf): Delete set but unused variables.
71 (decodeInstr): Likewise.
72 * dlx-dis.c (print_insn_dlx): Likewise.
73 * h8300-dis.c (bfd_h8_disassemble_init): Likewise.
74 * maxq-dis.c (check_move, print_insn): Likewise.
75 * mep-dis.c (mep_examine_ivc2_insns): Likewise.
76 * msp430-dis.c (msp430_branchinstr): Likewise.
77 * bfin-dis.c (_print_insn_bfin): Avoid set but unused warning.
78 * cgen-asm.in (parse_insn_normal, _cgen_assemble_insn): Likewise.
79 * sparc-dis.c (print_insn_sparc): Likewise.
80 * fr30-asm.c: Regenerate.
81 * frv-asm.c: Regenerate.
82 * ip2k-asm.c: Regenerate.
83 * iq2000-asm.c: Regenerate.
84 * lm32-asm.c: Regenerate.
85 * m32c-asm.c: Regenerate.
86 * m32r-asm.c: Regenerate.
87 * mep-asm.c: Regenerate.
88 * mt-asm.c: Regenerate.
89 * openrisc-asm.c: Regenerate.
90 * xc16x-asm.c: Regenerate.
91 * xstormy16-asm.c: Regenerate.
92
93 2010-06-16 Vincent Rivière <vincent.riviere@freesbee.fr>
94
95 PR gas/11673
96 * m68k-opc.c (m68k_opcodes): Remove move.l for isab and later.
97
98 2010-06-16 Vincent Rivière <vincent.riviere@freesbee.fr>
99
100 PR binutils/11676
101 * m68k-dis.c (print_insn_arg): Prefix float constants with #0e.
102
103 2010-06-14 Sebastian Andrzej Siewior <bigeasy@linutronix.de>
104
105 * ppc-dis.c (ppc_opts): Remove PPC_OPCODE_E500MC from e500 and
106 e500x2. Add PPC_OPCODE_E500 to e500 and e500x2
107 * ppc-opc.c (powerpc_opcodes): Deprecate all opcodes on EFS which
108 touch floating point regs and are enabled by COM, PPC or PPCCOM.
109 Treat sync as msync on e500. Treat eieio as mbar 1 on e500.
110 Treat lwsync as msync on e500.
111
112 2010-06-07 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
113
114 * arm-dis.c (thumb-opcodes): Add disassembly for movs.
115
116 2010-05-28 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
117
118 * arm-dis.c (print_insn_neon): Ensure disassembly of Neon
119 constants is the same on 32-bit and 64-bit hosts.
120
121 2010-05-27 Jason Duerstock <jason.duerstock+binutils@gmail.com>
122
123 * m68k-dis.c (print_insn_m68k): Emit undefined instructions as
124 .short directives so that they can be reassembled.
125
126 2010-05-26 Catherine Moore <clm@codesourcery.com>
127 David Ung <davidu@mips.com>
128
129 * mips-opc.c: Change membership to I1 for instructions ssnop and
130 ehb.
131
132 2010-05-26 H.J. Lu <hongjiu.lu@intel.com>
133
134 * i386-dis.c (sib): New.
135 (get_sib): Likewise.
136 (print_insn): Call get_sib.
137 OP_E_memory): Use sib.
138
139 2010-05-26 Catherine Moore <clm@codesoourcery.com>
140
141 * mips-dis.c (mips_arch): Remove INSN_MIPS16.
142 * mips-opc.c (I16): Remove.
143 (mips_builtin_op): Reclassify jalx.
144
145 2010-05-19 Alan Modra <amodra@gmail.com>
146
147 * ppc-opc.c (powerpc_opcodes): Enable divdeu, devweu, divde,
148 divwe, divdeuo, divweuo, divdeo, divweo for A2. Add icswepx.
149
150 2010-05-13 Alan Modra <amodra@gmail.com>
151
152 * ppc-opc.c (powerpc_opcodes): Correct wclr encoding.
153
154 2010-05-11 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
155
156 * arm-dis.c (thumb_opcodes): Update ldmia entry to use new %W
157 format.
158 (print_insn_thumb16): Add support for new %W format.
159
160 2010-05-07 Tristan Gingold <gingold@adacore.com>
161
162 * Makefile.in: Regenerate with automake 1.11.1.
163 * aclocal.m4: Ditto.
164
165 2010-05-05 Nick Clifton <nickc@redhat.com>
166
167 * po/es.po: Updated Spanish translation.
168
169 2010-04-22 Nick Clifton <nickc@redhat.com>
170
171 * po/opcodes.pot: Updated by the Translation project.
172 * po/vi.po: Updated Vietnamese translation.
173
174 2010-04-16 H.J. Lu <hongjiu.lu@intel.com>
175
176 * i386-dis.c (get_valid_dis386): Return bad_opcode on unknown
177 bits in opcode.
178
179 2010-04-09 Nick Clifton <nickc@redhat.com>
180
181 * i386-dis.c (print_insn): Remove unused variable op.
182 (OP_sI): Remove unused variable mask.
183
184 2010-04-07 Alan Modra <amodra@gmail.com>
185
186 * configure: Regenerate.
187
188 2010-04-06 Peter Bergner <bergner@vnet.ibm.com>
189
190 * ppc-opc.c (RBOPT): New define.
191 ("dccci"): Enable for PPCA2. Make operands optional.
192 ("iccci"): Likewise. Do not deprecate for PPC476.
193
194 2010-04-02 Masaki Muranaka <monaka@monami-software.com>
195
196 * cr16-opc.c (cr16_instruction): Fix typo in comment.
197
198 2010-03-25 Joseph Myers <joseph@codesourcery.com>
199
200 * Makefile.am (TARGET_LIBOPCODES_CFILES): Add tic6x-dis.c.
201 * Makefile.in: Regenerate.
202 * configure.in (bfd_tic6x_arch): New.
203 * configure: Regenerate.
204 * disassemble.c (ARCH_tic6x): Define if ARCH_all.
205 (disassembler): Handle TI C6X.
206 * tic6x-dis.c: New.
207
208 2010-03-24 Mike Frysinger <vapier@gentoo.org>
209
210 * bfin-dis.c (decode_regs_hi): Change REG_LH2 typo to REG_MH2.
211
212 2010-03-23 Joseph Myers <joseph@codesourcery.com>
213
214 * dis-buf.c (buffer_read_memory): Give error for reading just
215 before the start of memory.
216
217 2010-03-22 Sebastian Pop <sebastian.pop@amd.com>
218 Quentin Neill <quentin.neill@amd.com>
219
220 * i386-dis.c (OP_LWP_I): Removed.
221 (reg_table): Do not use OP_LWP_I, use Iq.
222 (OP_LWPCB_E): Remove use of names16.
223 (OP_LWP_E): Same.
224 * i386-opc.tbl: Removed 16bit LWP insns. 32bit LWP insns
225 should not set the Vex.length bit.
226 * i386-tbl.h: Regenerated.
227
228 2010-02-25 Edmar Wienskoski <edmar@freescale.com>
229
230 * ppc-dis.c (ppc_opts): Add PPC_OPCODE_E500MC for "e500mc64".
231
232 2010-02-24 Nick Clifton <nickc@redhat.com>
233
234 PR binutils/6773
235 * arm-dis.c (arm_opcodes): Replace <prefix>addsubx with
236 <prefix>asx. Replace <prefix>subaddx with <prefix>sax.
237 (thumb32_opcodes): Likewise.
238
239 2010-02-15 Nick Clifton <nickc@redhat.com>
240
241 * po/vi.po: Updated Vietnamese translation.
242
243 2010-02-12 Doug Evans <dje@sebabeach.org>
244
245 * lm32-opinst.c: Regenerate.
246
247 2010-02-11 Doug Evans <dje@sebabeach.org>
248
249 * cgen-dis.in (print_normal): Delete CGEN_PRINT_NORMAL.
250 (print_address): Delete CGEN_PRINT_ADDRESS.
251 * fr30-dis.c, * frv-dis.c, * ip2k-dis.c, * iq2000-dis.c,
252 * lm32-dis.c, * m32c-dis.c, * m32r-desc.c, * m32r-desc.h,
253 * m32r-dis.c, * mep-dis.c, * mt-dis.c, * openrisc-dis.c,
254 * xc16x-dis.c, * xstormy16-dis.c: Regenerate.
255
256 * fr30-desc.c, * fr30-desc.h, * fr30-opc.c,
257 * frv-desc.c, * frv-desc.h, * frv-opc.c,
258 * ip2k-desc.c, * ip2k-desc.h, * ip2k-opc.c,
259 * iq2000-desc.c, * iq2000-desc.h, * iq2000-opc.c,
260 * lm32-desc.c, * lm32-desc.h, * lm32-opc.c, * lm32-opinst.c,
261 * m32c-desc.c, * m32c-desc.h, * m32c-opc.c,
262 * m32r-desc.c, * m32r-desc.h, * m32r-opc.c, * m32r-opinst.c,
263 * mep-desc.c, * mep-desc.h, * mep-opc.c,
264 * mt-desc.c, * mt-desc.h, * mt-opc.c,
265 * openrisc-desc.c, * openrisc-desc.h, * openrisc-opc.c,
266 * xc16x-desc.c, * xc16x-desc.h, * xc16x-opc.c,
267 * xstormy16-desc.c, * xstormy16-desc.h, * xstormy16-opc.c: Regenerate.
268
269 2010-02-11 H.J. Lu <hongjiu.lu@intel.com>
270
271 * i386-dis.c: Update copyright.
272 * i386-gen.c: Likewise.
273 * i386-opc.h: Likewise.
274 * i386-opc.tbl: Likewise.
275
276 2010-02-10 Quentin Neill <quentin.neill@amd.com>
277 Sebastian Pop <sebastian.pop@amd.com>
278
279 * i386-dis.c (OP_EX_VexImmW): Reintroduced
280 function to handle 5th imm8 operand.
281 (PREFIX_VEX_3A48): Added.
282 (PREFIX_VEX_3A49): Added.
283 (VEX_W_3A48_P_2): Added.
284 (VEX_W_3A49_P_2): Added.
285 (prefix table): Added entries for PREFIX_VEX_3A48
286 and PREFIX_VEX_3A49.
287 (vex table): Added entries for VEX_W_3A48_P_2 and
288 and VEX_W_3A49_P_2.
289 * i386-gen.c (operand_type_init): Added OPERAND_TYPE_VEC_IMM4
290 for Vec_Imm4 operands.
291 * i386-opc.h (enum): Added Vec_Imm4.
292 (i386_operand_type): Added vec_imm4.
293 * i386-opc.tbl: Add entries for vpermilp[ds].
294 * i386-init.h: Regenerated.
295 * i386-tbl.h: Regenerated.
296
297 2010-02-10 Richard Sandiford <r.sandiford@uk.ibm.com>
298
299 * ppc-dis.c (ppc_opts): Add "pwr4", "pwr5", "pwr5x", "pwr6"
300 and "pwr7". Move "a2" into alphabetical order.
301
302 2010-02-08 Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
303
304 * ppc-dis.c (ppc_opts): Add titan entry.
305 * ppc-opc.c (TITAN, MULHW): Define.
306 (powerpc_opcodes): Support AppliedMicro Titan core (APM83xxx).
307
308 2010-02-03 Quentin Neill <quentin.neill@amd.com>
309
310 * i386-gen.c (cpu_flag_init): Rename CPU_AMDFAM15_FLAGS
311 to CPU_BDVER1_FLAGS
312 * i386-init.h: Regenerated.
313
314 2010-02-03 Anthony Green <green@moxielogic.com>
315
316 * moxie-opc.c (moxie_form1_opc_info): Move "nop" from 0x00 to
317 0x0f, and make 0x00 an illegal instruction.
318
319 2010-01-29 Daniel Jacobowitz <dan@codesourcery.com>
320
321 * opcodes/arm-dis.c (struct arm_private_data): New.
322 (print_insn_coprocessor, print_insn_arm): Update to use struct
323 arm_private_data.
324 (is_mapping_symbol, get_map_sym_type): New functions.
325 (get_sym_code_type): Check the symbol's section. Do not check
326 mapping symbols.
327 (print_insn): Default to disassembling ARM mode code. Check
328 for mapping symbols separately from other symbols. Use
329 struct arm_private_data.
330
331 2010-01-28 H.J. Lu <hongjiu.lu@intel.com>
332
333 * i386-dis.c (EXVexWdqScalar): New.
334 (vex_scalar_w_dq_mode): Likewise.
335 (prefix_table): Update entries for PREFIX_VEX_3899,
336 PREFIX_VEX_389B, PREFIX_VEX_389D, PREFIX_VEX_389F,
337 PREFIX_VEX_38A9, PREFIX_VEX_38AB, PREFIX_VEX_38AD,
338 PREFIX_VEX_38AF, PREFIX_VEX_38B9, PREFIX_VEX_38BB,
339 PREFIX_VEX_38BD and PREFIX_VEX_38BF.
340 (intel_operand_size): Handle vex_scalar_w_dq_mode.
341 (OP_EX): Likewise.
342
343 2010-01-27 H.J. Lu <hongjiu.lu@intel.com>
344
345 * i386-dis.c (XMScalar): New.
346 (EXdScalar): Likewise.
347 (EXqScalar): Likewise.
348 (EXqScalarS): Likewise.
349 (VexScalar): Likewise.
350 (EXdVexScalarS): Likewise.
351 (EXqVexScalarS): Likewise.
352 (XMVexScalar): Likewise.
353 (scalar_mode): Likewise.
354 (d_scalar_mode): Likewise.
355 (d_scalar_swap_mode): Likewise.
356 (q_scalar_mode): Likewise.
357 (q_scalar_swap_mode): Likewise.
358 (vex_scalar_mode): Likewise.
359 (vex_len_table): Duplcate entries for VEX_LEN_10_P_1,
360 VEX_LEN_10_P_3, VEX_LEN_11_P_1, VEX_LEN_11_P_3, VEX_LEN_2A_P_1,
361 VEX_LEN_2A_P_3, VEX_LEN_2C_P_3, VEX_LEN_2D_P_1, VEX_LEN_2E_P_0,
362 VEX_LEN_2E_P_2, VEX_LEN_2F_P_2, VEX_LEN_51_P_1, VEX_LEN_51_P_3,
363 VEX_LEN_52_P_1, VEX_LEN_53_P_1, VEX_LEN_58_P_1, VEX_LEN_58_P_3,
364 VEX_LEN_59_P_1, VEX_LEN_5A_P_1, VEX_LEN_5A_P_3, VEX_LEN_5C_P_1,
365 VEX_LEN_5C_P_3, VEX_LEN_5D_P_1, VEX_LEN_5D_P_3, VEX_LEN_5E_P_1,
366 VEX_LEN_5E_P_3, VEX_LEN_5F_P_1, VEX_LEN_5F_P_3, VEX_LEN_6E_P_2,
367 VEX_LEN_7E_P_1, VEX_LEN_7E_P_2, VEX_LEN_D6_P_2, VEX_LEN_C2_P_1,
368 VEX_LEN_C2_P_3, VEX_LEN_3A0A_P_2 and VEX_LEN_3A0B_P_2.
369 (vex_w_table): Update entries for VEX_W_10_P_1, VEX_W_10_P_3,
370 VEX_W_11_P_1, VEX_W_11_P_3, VEX_W_2E_P_0, VEX_W_2E_P_2,
371 VEX_W_2F_P_0, VEX_W_2F_P_2, VEX_W_51_P_1, VEX_W_51_P_3,
372 VEX_W_52_P_1, VEX_W_53_P_1, VEX_W_58_P_1, VEX_W_58_P_3,
373 VEX_W_59_P_1, VEX_W_59_P_3, VEX_W_5A_P_1, VEX_W_5A_P_3,
374 VEX_W_5C_P_1, VEX_W_5C_P_3, VEX_W_5D_P_1, VEX_W_5D_P_3,
375 VEX_W_5E_P_1, VEX_W_5E_P_3, VEX_W_5F_P_1, VEX_W_5F_P_3,
376 VEX_W_7E_P_1, VEX_W_D6_P_2 VEX_W_C2_P_1, VEX_W_C2_P_3,
377 VEX_W_3A0A_P_2 and VEX_W_3A0B_P_2.
378 (intel_operand_size): Handle d_scalar_mode, d_scalar_swap_mode,
379 q_scalar_mode, q_scalar_swap_mode.
380 (OP_XMM): Handle scalar_mode.
381 (OP_EX): Handle d_scalar_mode, d_scalar_swap_mode, q_scalar_mode
382 and q_scalar_swap_mode.
383 (OP_VEX): Handle vex_scalar_mode.
384
385 2010-01-24 H.J. Lu <hongjiu.lu@intel.com>
386
387 * i386-dis.c (prefix_table): Remove trailing { Bad_Opcode }.
388
389 2010-01-24 H.J. Lu <hongjiu.lu@intel.com>
390
391 * i386-dis.c (vex_len_table): Remove trailing { Bad_Opcode }.
392
393 2010-01-24 H.J. Lu <hongjiu.lu@intel.com>
394
395 * i386-dis.c (prefix_table): Remove trailing { Bad_Opcode }.
396
397 2010-01-24 H.J. Lu <hongjiu.lu@intel.com>
398
399 * i386-dis.c (Bad_Opcode): New.
400 (bad_opcode): Likewise.
401 (dis386): Replace { "(bad)", { XX } } with { Bad_Opcode }.
402 (dis386_twobyte): Likewise.
403 (reg_table): Likewise.
404 (prefix_table): Likewise.
405 (x86_64_table): Likewise.
406 (vex_len_table): Likewise.
407 (vex_w_table): Likewise.
408 (mod_table): Likewise.
409 (rm_table): Likewise.
410 (float_reg): Likewise.
411 (reg_table): Remove trailing "(bad)" entries.
412 (prefix_table): Likewise.
413 (x86_64_table): Likewise.
414 (vex_len_table): Likewise.
415 (vex_w_table): Likewise.
416 (mod_table): Likewise.
417 (rm_table): Likewise.
418 (get_valid_dis386): Handle bytemode 0.
419
420 2010-01-23 H.J. Lu <hongjiu.lu@intel.com>
421
422 * i386-opc.h (VEXScalar): New.
423
424 * i386-opc.tbl: Replace "Vex" with "Vex=3" on AVX scalar
425 instructions.
426 * i386-tbl.h: Regenerated.
427
428 2010-01-21 H.J. Lu <hongjiu.lu@intel.com>
429
430 * i386-dis.c (mod_table): Use FXSAVE on xsave and xrstor.
431
432 * i386-opc.tbl: Add xsave64 and xrstor64.
433 * i386-tbl.h: Regenerated.
434
435 2010-01-20 Nick Clifton <nickc@redhat.com>
436
437 PR 11170
438 * arm-dis.c (print_arm_address): Do not ignore negative bit in PC
439 based post-indexed addressing.
440
441 2010-01-15 Sebastian Pop <sebastian.pop@amd.com>
442
443 * i386-opc.tbl: Support all the possible aliases for VPCOM* insns.
444 * i386-tbl.h: Regenerated.
445
446 2010-01-14 H.J. Lu <hongjiu.lu@intel.com>
447
448 * i386-opc.h (VexVVVV): Replace VEX.DNS with VEX.NDS in
449 comments.
450
451 2010-01-14 H.J. Lu <hongjiu.lu@intel.com>
452
453 * i386-dis.c (names_mm): New.
454 (intel_names_mm): Likewise.
455 (att_names_mm): Likewise.
456 (names_xmm): Likewise.
457 (intel_names_xmm): Likewise.
458 (att_names_xmm): Likewise.
459 (names_ymm): Likewise.
460 (intel_names_ymm): Likewise.
461 (att_names_ymm): Likewise.
462 (print_insn): Set names_mm, names_xmm and names_ymm.
463 (OP_MMX): Use names_mm, names_xmm and names_ymm.
464 (OP_XMM): Likewise.
465 (OP_EM): Likewise.
466 (OP_EMC): Likewise.
467 (OP_MXC): Likewise.
468 (OP_EX): Likewise.
469 (XMM_Fixup): Likewise.
470 (OP_VEX): Likewise.
471 (OP_EX_VexReg): Likewise.
472 (OP_Vex_2src): Likewise.
473 (OP_Vex_2src_1): Likewise.
474 (OP_Vex_2src_2): Likewise.
475 (OP_REG_VexI4): Likewise.
476
477 2010-01-13 H.J. Lu <hongjiu.lu@intel.com>
478
479 * i386-dis.c (print_insn): Update comments.
480
481 2010-01-12 H.J. Lu <hongjiu.lu@intel.com>
482
483 * i386-dis.c (rex_original): Removed.
484 (ckprefix): Remove rex_original.
485 (print_insn): Update comments.
486
487 2010-01-09 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
488
489 * Makefile.in: Regenerate.
490 * configure: Regenerate.
491
492 2010-01-07 Doug Evans <dje@sebabeach.org>
493
494 * cgen-ibld.in (insert_normal, extract_normal): Minor cleanup.
495 * fr30-ibld.c, * frv-ibld.c, * ip2k-ibld.c, * iq2000-ibld.c,
496 * lm32-ibld.c, * m32c-ibld.c, * m32r-ibld.c, * mep-ibld.c,
497 * mt-ibld.c, * openrisc-ibld.c, * xc16x-ibld.c,
498 * xstormy16-ibld.c: Regenerate.
499
500 2010-01-06 Quentin Neill <quentin.neill@amd.com>
501
502 * i386-gen.c (cpu_flag_init): Add new CPU_AMDFAM15_FLAGS.
503 * i386-init.h: Regenerated.
504
505 2010-01-06 Daniel Gutson <dgutson@codesourcery.com>
506
507 * arm-dis.c (print_insn): Fixed search for next symbol and data
508 dumping condition, and the initial mapping symbol state.
509
510 2010-01-05 Doug Evans <dje@sebabeach.org>
511
512 * cgen-ibld.in: #include "cgen/basic-modes.h".
513 * fr30-ibld.c, * frv-ibld.c, * ip2k-ibld.c, * iq2000-ibld.c,
514 * lm32-ibld.c, * m32c-ibld.c, * m32r-ibld.c, * mep-ibld.c,
515 * mt-ibld.c, * openrisc-ibld.c, * xc16x-ibld.c,
516 * xstormy16-ibld.c: Regenerate.
517
518 2010-01-04 Nick Clifton <nickc@redhat.com>
519
520 PR 11123
521 * arm-dis.c (print_insn_coprocessor): Initialise value.
522
523 2010-01-04 Edmar Wienskoski <edmar@freescale.com>
524
525 * ppc-dis.c (ppc_opts): Add entry for "e500mc64".
526
527 2010-01-02 Doug Evans <dje@sebabeach.org>
528
529 * cgen-asm.in: Update copyright year.
530 * cgen-dis.in: Update copyright year.
531 * cgen-ibld.in: Update copyright year.
532 * fr30-asm.c, * fr30-desc.c, * fr30-desc.h, * fr30-dis.c,
533 * fr30-ibld.c, * fr30-opc.c, * fr30-opc.h, * frv-asm.c, * frv-desc.c,
534 * frv-desc.h, * frv-dis.c, * frv-ibld.c, * frv-opc.c, * frv-opc.h,
535 * ip2k-asm.c, * ip2k-desc.c, * ip2k-desc.h, * ip2k-dis.c,
536 * ip2k-ibld.c, * ip2k-opc.c, * ip2k-opc.h, * iq2000-asm.c,
537 * iq2000-desc.c, * iq2000-desc.h, * iq2000-dis.c, * iq2000-ibld.c,
538 * iq2000-opc.c, * iq2000-opc.h, * lm32-asm.c, * lm32-desc.c,
539 * lm32-desc.h, * lm32-dis.c, * lm32-ibld.c, * lm32-opc.c, * lm32-opc.h,
540 * lm32-opinst.c, * m32c-asm.c, * m32c-desc.c, * m32c-desc.h,
541 * m32c-dis.c, * m32c-ibld.c, * m32c-opc.c, * m32c-opc.h, * m32r-asm.c,
542 * m32r-desc.c, * m32r-desc.h, * m32r-dis.c, * m32r-ibld.c,
543 * m32r-opc.c, * m32r-opc.h, * m32r-opinst.c, * mep-asm.c, * mep-desc.c,
544 * mep-desc.h, * mep-dis.c, * mep-ibld.c, * mep-opc.c, * mep-opc.h,
545 * mt-asm.c, * mt-desc.c, * mt-desc.h, * mt-dis.c, * mt-ibld.c,
546 * mt-opc.c, * mt-opc.h, * openrisc-asm.c, * openrisc-desc.c,
547 * openrisc-desc.h, * openrisc-dis.c, * openrisc-ibld.c,
548 * openrisc-opc.c, * openrisc-opc.h, * xc16x-asm.c, * xc16x-desc.c,
549 * xc16x-desc.h, * xc16x-dis.c, * xc16x-ibld.c, * xc16x-opc.c,
550 * xc16x-opc.h, * xstormy16-asm.c, * xstormy16-desc.c,
551 * xstormy16-desc.h, * xstormy16-dis.c, * xstormy16-ibld.c,
552 * xstormy16-opc.c, * xstormy16-opc.h: Regenerate.
553
554 For older changes see ChangeLog-2009
555 \f
556 Local Variables:
557 mode: change-log
558 left-margin: 8
559 fill-column: 74
560 version-control: never
561 End:
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