opcodes/ChangeLog

   1 2005-05-25  Jan Beulich  <jbeulich@novell.com>
   2
   3         * i386-dis.c (prefix_name): Remove pointless mode_64bit check.
   4         (OP_E): Remove redundant REX_EXTZ handling. Remove pointless
   5         masking of 'rm' in 16-bit memory address handling.
   6
   7 2005-05-19  Anton Blanchard  <anton@samba.org>
   8
   9         * ppc-dis.c (powerpc_dialect): Handle "-Mpower5".
  10         (print_ppc_disassembler_options): Document it.
  11         * ppc-opc.c (SVC_LEV): Define.
  12         (LEV): Allow optional operand.
  13         (POWER5): Define.
  14         (powerpc_opcodes): Extend "sc".  Adjust "svc" and "svcl".  Add
  15         "hrfid", "popcntb", "fsqrtes", "fsqrtes.", "fre" and "fre.".
  16
  17 2005-05-19  Kelley Cook  <kcook@gcc.gnu.org>
  18
  19         * Makefile.in:  Regenerate.
  20
  21 2005-05-17  Zack Weinberg  <zack@codesourcery.com>
  22
  23         * arm-dis.c (thumb_opcodes): Add disassembly for V6T2 16-bit
  24         instructions.  Adjust disassembly of some opcodes to match
  25         unified syntax.
  26         (thumb32_opcodes): New table.
  27         (print_insn_thumb): Rename print_insn_thumb16; don't handle
  28         two-halfword branches here.
  29         (print_insn_thumb32): New function.
  30         (print_insn): Choose among print_insn_arm, print_insn_thumb16,
  31         and print_insn_thumb32.  Be consistent about order of
  32         halfwords when printing 32-bit instructions.
  33
  34 2005-05-07  H.J. Lu  <hongjiu.lu@intel.com>
  35
  36         PR 843
  37         * i386-dis.c (branch_v_mode): New.
  38         (indirEv): Use branch_v_mode instead of v_mode.
  39         (OP_E): Handle branch_v_mode.
  40
  41 2005-05-07  H.J. Lu  <hongjiu.lu@intel.com>
  42
  43         * d10v-dis.c (dis_2_short): Support 64bit host.
  44
  45 2005-05-07  Nick Clifton  <nickc@redhat.com>
  46
  47         * po/nl.po: Updated translation.
  48
  49 2005-05-07  Nick Clifton  <nickc@redhat.com>
  50
  51         * Update the address and phone number of the FSF organization in
  52         the GPL notices in the following files:
  53         a29k-dis.c, aclocal.m4, alpha-dis.c, alpha-opc.c, arc-dis.c,
  54         arc-dis.h, arc-ext.c, arc-ext.h, arc-opc.c, arm-dis.c, arm-opc.h,
  55         avr-dis.c, cgen-asm.c, cgen-asm.in, cgen-dis.c, cgen-dis.in,
  56         cgen-ibld.in, cgen-opc.c, cgen.sh, cris-dis.c, cris-opc.c,
  57         crx-dis.c, crx-opc.c, d10v-dis.c, d10v-opc.c, d30v-dis.c,
  58         d30v-opc.c, dis-buf.c, dis-init.c, disassemble.c, dlx-dis.c,
  59         fr30-asm.c, fr30-desc.c, fr30-desc.h, fr30-dis.c, fr30-ibld.c,
  60         fr30-opc.c, fr30-opc.h, frv-asm.c, frv-desc.c, frv-desc.h,
  61         frv-dis.c, frv-ibld.c, frv-opc.c, frv-opc.h, h8300-dis.c,
  62         h8500-dis.c, h8500-opc.h, hppa-dis.c, i370-dis.c, i370-opc.c,
  63         i386-dis.c, i860-dis.c, i960-dis.c, ia64-asmtab.h, ia64-dis.c,
  64         ia64-gen.c, ia64-opc-a.c, ia64-opc-b.c, ia64-opc-d.c,
  65         ia64-opc-f.c, ia64-opc-i.c, ia64-opc-m.c, ia64-opc-x.c,
  66         ia64-opc.c, ia64-opc.h, ip2k-asm.c, ip2k-desc.c, ip2k-desc.h,
  67         ip2k-dis.c, ip2k-ibld.c, ip2k-opc.c, ip2k-opc.h, iq2000-asm.c,
  68         iq2000-desc.c, iq2000-desc.h, iq2000-dis.c, iq2000-ibld.c,
  69         iq2000-opc.c, iq2000-opc.h, m10200-dis.c, m10200-opc.c,
  70         m10300-dis.c, m10300-opc.c, m32r-asm.c, m32r-desc.c, m32r-desc.h,
  71         m32r-dis.c, m32r-ibld.c, m32r-opc.c, m32r-opc.h, m32r-opinst.c,
  72         m68hc11-dis.c, m68hc11-opc.c, m68k-dis.c, m68k-opc.c, m88k-dis.c,
  73         maxq-dis.c, mcore-dis.c, mcore-opc.h, mips-dis.c, mips-opc.c,
  74         mips16-opc.c, mmix-dis.c, mmix-opc.c, msp430-dis.c, ns32k-dis.c,
  75         openrisc-asm.c, openrisc-desc.c, openrisc-desc.h, openrisc-dis.c,
  76         openrisc-ibld.c, openrisc-opc.c, openrisc-opc.h, opintl.h,
  77         or32-dis.c, or32-opc.c, pdp11-dis.c, pdp11-opc.c, pj-dis.c,
  78         pj-opc.c, ppc-dis.c, ppc-opc.c, s390-dis.c, s390-mkopc.c,
  79         s390-opc.c, sh-dis.c, sh-opc.h, sh64-dis.c, sh64-opc.c,
  80         sh64-opc.h, sparc-dis.c, sparc-opc.c, sysdep.h, tic30-dis.c,
  81         tic4x-dis.c, tic54x-dis.c, tic54x-opc.c, tic80-dis.c, tic80-opc.c,
  82         v850-dis.c, v850-opc.c, vax-dis.c, w65-dis.c, w65-opc.h,
  83         xstormy16-asm.c, xstormy16-desc.c, xstormy16-desc.h,
  84         xstormy16-dis.c, xstormy16-ibld.c, xstormy16-opc.c,
  85         xstormy16-opc.h, xtensa-dis.c, z8k-dis.c, z8kgen.c
  86
  87 2005-05-05  James E Wilson  <wilson@specifixinc.com>
  88
  89         * ia64-opc.c: Include sysdep.h before libiberty.h.
  90
  91 2005-05-05  Nick Clifton  <nickc@redhat.com>
  92
  93         * configure.in (ALL_LINGUAS): Add vi.
  94         * configure: Regenerate.
  95         * po/vi.po: New.
  96
  97 2005-04-26  Jerome Guitton  <guitton@gnat.com>
  98
  99         * configure.in: Fix the check for basename declaration.
 100         * configure: Regenerate.
 101
 102 2005-04-19  Alan Modra  <amodra@bigpond.net.au>
 103
 104         * ppc-opc.c (RTO): Define.
 105         (powerpc_opcodes <tlbsx, tlbsx., tlbre>): Combine PPC403 and BOOKE
 106         entries to suit PPC440.
 107
 108 2005-04-18  Mark Kettenis  <kettenis@gnu.org>
 109
 110         * i386-dis.c: Insert hyphens into selected VIA PadLock extensions.
 111         Add xcrypt-ctr.
 112
 113 2005-04-14  Nick Clifton  <nickc@redhat.com>
 114
 115         * po/fi.po: New translation: Finnish.
 116         * configure.in (ALL_LINGUAS): Add fi.
 117         * configure: Regenerate.
 118
 119 2005-04-14  Alan Modra  <amodra@bigpond.net.au>
 120
 121         * Makefile.am (NO_WERROR): Define.
 122         * configure.in: Invoke AM_BINUTILS_WARNINGS.
 123         * Makefile.in: Regenerate.
 124         * aclocal.m4: Regenerate.
 125         * configure: Regenerate.
 126
 127 2005-04-04  Nick Clifton  <nickc@redhat.com>
 128
 129         * fr30-asm.c: Regenerate.
 130         * frv-asm.c: Regenerate.
 131         * iq2000-asm.c: Regenerate.
 132         * m32r-asm.c: Regenerate.
 133         * openrisc-asm.c: Regenerate.
 134
 135 2005-04-01  Jan Beulich  <jbeulich@novell.com>
 136
 137         * i386-dis.c (PNI_Fixup): Neither mwait nor monitor have any
 138         visible operands in Intel mode. The first operand of monitor is
 139         %rax in 64-bit mode.
 140
 141 2005-04-01  Jan Beulich  <jbeulich@novell.com>
 142
 143         * i386-dis.c (INVLPG_Fixup): Decode rdtscp; change code to allow for
 144         easier future additions.
 145
 146 2005-03-31  Jerome Guitton  <guitton@gnat.com>
 147
 148         * configure.in: Check for basename.
 149         * configure: Regenerate.
 150         * config.in: Ditto.
 151
 152 2005-03-29  H.J. Lu  <hongjiu.lu@intel.com>
 153
 154         * i386-dis.c (SEG_Fixup): New.
 155         (Sv): New.
 156         (dis386): Use "Sv" for 0x8c and 0x8e.
 157
 158 2005-03-21  Jan-Benedict Glaw  <jbglaw@lug-owl.de>
 159             Nick Clifton  <nickc@redhat.com>
 160
 161         * vax-dis.c: (entry_addr): New varible:  An array of user supplied
 162         function entry mask addresses.
 163         (entry_addr_occupied_slots): New variable: The number of occupied
 164         elements in entry_addr.
 165         (entry_addr_total_slots): New variable: The total number of
 166         elements in entry_addr.
 167         (parse_disassembler_options): New function.  Fills in the entry_addr
 168         array.
 169         (free_entry_array): New function.  Release the memory used by the
 170         entry addr array.  Suppressed because there is no way to call it.
 171         (is_function_entry): Check if a given address is a function's
 172         start address by looking at supplied entry mask addresses and
 173         symbol information, if available.
 174         (print_insn_vax): Use parse_disassembler_options and is_function_entry.
 175
 176 2005-03-23  H.J. Lu  <hongjiu.lu@intel.com>
 177
 178         * cris-dis.c (print_with_operands): Use ~31L for long instead
 179         of ~31.
 180
 181 2005-03-20  H.J. Lu  <hongjiu.lu@intel.com>
 182
 183         * mmix-opc.c (O): Revert the last change.
 184         (Z): Likewise.
 185
 186 2005-03-19  H.J. Lu  <hongjiu.lu@intel.com>
 187
 188         * mmix-opc.c (O): Use 24UL instead of 24 for unsigned long.
 189         (Z): Likewise.
 190
 191 2005-03-19  Hans-Peter Nilsson  <hp@bitrange.com>
 192
 193         * mmix-opc.c (O, Z): Force expression as unsigned long.
 194
 195 2005-03-18  Nick Clifton  <nickc@redhat.com>
 196
 197         * ip2k-asm.c: Regenerate.
 198         * op/opcodes.pot: Regenerate.
 199
 200 2005-03-16  Nick Clifton  <nickc@redhat.com>
 201             Ben Elliston  <bje@au.ibm.com>
 202
 203         * configure.in (werror): New switch: Add -Werror to the
 204         compiler command line.  Enabled by default.  Disable via
 205         --disable-werror.
 206         * configure: Regenerate.
 207
 208 2005-03-16  Alan Modra  <amodra@bigpond.net.au>
 209
 210         * ppc-dis.c (powerpc_dialect): Don't set PPC_OPCODE_ALTIVEC when
 211         BOOKE.
 212
 213 2005-03-15  Alan Modra  <amodra@bigpond.net.au>
 214
 215         * po/es.po: Commit new Spanish translation.
 216
 217         * po/fr.po: Commit new French translation.
 218
 219 2005-03-14  Jan-Benedict Glaw  <jbglaw@lug-owl.de>
 220
 221         * vax-dis.c: Fix spelling error
 222         (print_insn_vax): Use ".word 0x0012 # Entry mask: r1 r2 >" instead
 223         of just "Entry mask: < r1 ... >"
 224
 225 2005-03-12  Zack Weinberg  <zack@codesourcery.com>
 226
 227         * arm-dis.c (arm_opcodes): Document %E and %V.
 228         Add entries for v6T2 ARM instructions:
 229         bfc bfi mls strht ldrht ldrsht ldrsbt movw movt rbit ubfx sbfx.
 230         (print_insn_arm): Add support for %E and %V.
 231         (thumb_opcodes): Add ARMv6K instructions nop, sev, wfe, wfi, yield.
 232
 233 2005-03-10  Jeff Baker  <jbaker@qnx.com>
 234             Alan Modra  <amodra@bigpond.net.au>
 235
 236         * ppc-opc.c (insert_sprg, extract_sprg): New Functions.
 237         (powerpc_operands <SPRG>): Call the above.  Bit field is 5 bits.
 238         (SPRG_MASK): Delete.
 239         (XSPRG_MASK): Mask off extra bits now part of sprg field.
 240         (powerpc_opcodes): Asjust mfsprg and mtsprg to suit new mask.  Move
 241         mfsprg4..7 after msprg and consolidate.
 242
 243 2005-03-09  Jan-Benedict Glaw  <jbglaw@lug-owl.de>
 244
 245         * vax-dis.c (entry_mask_bit): New array.
 246         (print_insn_vax): Decode function entry mask.
 247
 248 2005-03-07  Aldy Hernandez  <aldyh@redhat.com>
 249
 250         * ppc-opc.c (powerpc_opcodes): Fix encoding of efscfd.
 251
 252 2005-03-05  Alan Modra  <amodra@bigpond.net.au>
 253
 254         * po/opcodes.pot: Regenerate.
 255
 256 2005-03-03  Ramana Radhakrishnan  <ramana.radhakrishnan@codito.com>
 257
 258         * arc-dis.c (a4_decoding_class): New enum.
 259         (dsmOneArcInst): Use the enum values for the decoding class.
 260         Remove redundant case in the switch for decodingClass value 11.
 261
 262 2005-03-02  Jan Beulich  <jbeulich@novell.com>
 263
 264         * i386-dis.c (print_insn): Suppress lock prefix printing for cr8...15
 265         accesses.
 266         (OP_C): Consider lock prefix in non-64-bit modes.
 267
 268 2005-02-24  Alan Modra  <amodra@bigpond.net.au>
 269
 270         * cris-dis.c (format_hex): Remove ineffective warning fix.
 271         * crx-dis.c (make_instruction): Warning fix.
 272         * frv-asm.c: Regenerate.
 273
 274 2005-02-23  Nick Clifton  <nickc@redhat.com>
 275
 276         * cgen-dis.in: Use bfd_byte for buffers that are passed to
 277         read_memory.
 278
 279         * ia64-opc.c (locate_opcode_ent): Initialise opval array.
 280
 281         * crx-dis.c (make_instruction): Move argument structure into inner
 282         scope and ensure that all of its fields are initialised before
 283         they are used.
 284
 285         * fr30-asm.c: Regenerate.
 286         * fr30-dis.c: Regenerate.
 287         * frv-asm.c: Regenerate.
 288         * frv-dis.c: Regenerate.
 289         * ip2k-asm.c: Regenerate.
 290         * ip2k-dis.c: Regenerate.
 291         * iq2000-asm.c: Regenerate.
 292         * iq2000-dis.c: Regenerate.
 293         * m32r-asm.c: Regenerate.
 294         * m32r-dis.c: Regenerate.
 295         * openrisc-asm.c: Regenerate.
 296         * openrisc-dis.c: Regenerate.
 297         * xstormy16-asm.c: Regenerate.
 298         * xstormy16-dis.c: Regenerate.
 299
 300 2005-02-22  Alan Modra  <amodra@bigpond.net.au>
 301
 302         * arc-ext.c: Warning fixes.
 303         * arc-ext.h: Likewise.
 304         * cgen-opc.c: Likewise.
 305         * ia64-gen.c: Likewise.
 306         * maxq-dis.c: Likewise.
 307         * ns32k-dis.c: Likewise.
 308         * w65-dis.c: Likewise.
 309         * ia64-asmtab.c: Regenerate.
 310
 311 2005-02-22  Alan Modra  <amodra@bigpond.net.au>
 312
 313         * fr30-desc.c: Regenerate.
 314         * fr30-desc.h: Regenerate.
 315         * fr30-opc.c: Regenerate.
 316         * fr30-opc.h: Regenerate.
 317         * frv-desc.c: Regenerate.
 318         * frv-desc.h: Regenerate.
 319         * frv-opc.c: Regenerate.
 320         * frv-opc.h: Regenerate.
 321         * ip2k-desc.c: Regenerate.
 322         * ip2k-desc.h: Regenerate.
 323         * ip2k-opc.c: Regenerate.
 324         * ip2k-opc.h: Regenerate.
 325         * iq2000-desc.c: Regenerate.
 326         * iq2000-desc.h: Regenerate.
 327         * iq2000-opc.c: Regenerate.
 328         * iq2000-opc.h: Regenerate.
 329         * m32r-desc.c: Regenerate.
 330         * m32r-desc.h: Regenerate.
 331         * m32r-opc.c: Regenerate.
 332         * m32r-opc.h: Regenerate.
 333         * m32r-opinst.c: Regenerate.
 334         * openrisc-desc.c: Regenerate.
 335         * openrisc-desc.h: Regenerate.
 336         * openrisc-opc.c: Regenerate.
 337         * openrisc-opc.h: Regenerate.
 338         * xstormy16-desc.c: Regenerate.
 339         * xstormy16-desc.h: Regenerate.
 340         * xstormy16-opc.c: Regenerate.
 341         * xstormy16-opc.h: Regenerate.
 342
 343 2005-02-21  Alan Modra  <amodra@bigpond.net.au>
 344
 345         * Makefile.am: Run "make dep-am"
 346         * Makefile.in: Regenerate.
 347
 348 2005-02-15  Nick Clifton  <nickc@redhat.com>
 349
 350         * cgen-dis.in (print_address): Add an ATTRIBUTE_UNUSED to prevent
 351         compile time warnings.
 352         (print_keyword): Likewise.
 353         (default_print_insn): Likewise.
 354
 355         * fr30-desc.c: Regenerated.
 356         * fr30-desc.h: Regenerated.
 357         * fr30-dis.c: Regenerated.
 358         * fr30-opc.c: Regenerated.
 359         * fr30-opc.h: Regenerated.
 360         * frv-desc.c: Regenerated.
 361         * frv-dis.c: Regenerated.
 362         * frv-opc.c: Regenerated.
 363         * ip2k-asm.c: Regenerated.
 364         * ip2k-desc.c: Regenerated.
 365         * ip2k-desc.h: Regenerated.
 366         * ip2k-dis.c: Regenerated.
 367         * ip2k-opc.c: Regenerated.
 368         * ip2k-opc.h: Regenerated.
 369         * iq2000-desc.c: Regenerated.
 370         * iq2000-dis.c: Regenerated.
 371         * iq2000-opc.c: Regenerated.
 372         * m32r-asm.c: Regenerated.
 373         * m32r-desc.c: Regenerated.
 374         * m32r-desc.h: Regenerated.
 375         * m32r-dis.c: Regenerated.
 376         * m32r-opc.c: Regenerated.
 377         * m32r-opc.h: Regenerated.
 378         * m32r-opinst.c: Regenerated.
 379         * openrisc-desc.c: Regenerated.
 380         * openrisc-desc.h: Regenerated.
 381         * openrisc-dis.c: Regenerated.
 382         * openrisc-opc.c: Regenerated.
 383         * openrisc-opc.h: Regenerated.
 384         * xstormy16-desc.c: Regenerated.
 385         * xstormy16-desc.h: Regenerated.
 386         * xstormy16-dis.c: Regenerated.
 387         * xstormy16-opc.c: Regenerated.
 388         * xstormy16-opc.h: Regenerated.
 389
 390 2005-02-14  H.J. Lu  <hongjiu.lu@intel.com>
 391
 392         * dis-buf.c (perror_memory): Use sprintf_vma to print out
 393         address.
 394
 395 2005-02-11  Nick Clifton  <nickc@redhat.com>
 396
 397         * iq2000-asm.c: Regenerate.
 398
 399         * frv-dis.c: Regenerate.
 400
 401 2005-02-07  Jim Blandy  <jimb@redhat.com>
 402
 403         * Makefile.am (CGEN): Load guile.scm before calling the main
 404         application script.
 405         * Makefile.in: Regenerated.
 406         * cgen.sh: Be prepared for the 'cgen' argument to contain spaces.
 407         Simply pass the cgen-opc.scm path to ${cgen} as its first
 408         argument; ${cgen} itself now contains the '-s', or whatever is
 409         appropriate for the Scheme being used.
 410
 411 2005-01-31  Andrew Cagney  <cagney@gnu.org>
 412
 413         * configure: Regenerate to track ../gettext.m4.
 414
 415 2005-01-31  Jan Beulich  <jbeulich@novell.com>
 416
 417         * ia64-gen.c (NELEMS): Define.
 418         (shrink): Generate alias with missing second predicate register when
 419         opcode has two outputs and these are both predicates.
 420         * ia64-opc-i.c (FULL17): Define.
 421         (ia64_opcodes_i): Add mov-to-pr alias without second input. Use FULL17
 422         here to generate output template.
 423         (TBITCM, TNATCM): Undefine after use.
 424         * ia64-opc-m.c (ia64_opcodes_i): Add alloc alias without ar.pfs as
 425         first input. Add ld16 aliases without ar.csd as second output. Add
 426         st16 aliases without ar.csd as second input. Add cmpxchg aliases
 427         without ar.ccv as third input. Add cmp8xchg16 aliases without ar.csd/
 428         ar.ccv as third/fourth inputs. Consolidate through...
 429         (CMPXCHG_acq, CMPXCHG_rel, CMPXCHG_1, CMPXCHG_2, CMPXCHG_4, CMPXCHG_8,
 430         CMPXCHGn, CMP8XCHG16, CMPXCHG_ALL): Define.
 431         * ia64-asmtab.c: Regenerate.
 432
 433 2005-01-27  Andrew Cagney  <cagney@gnu.org>
 434
 435         * configure: Regenerate to track ../gettext.m4 change.
 436
 437 2005-01-25  Alexandre Oliva  <aoliva@redhat.com>
 438
 439         2004-11-10  Alexandre Oliva  <aoliva@redhat.com>
 440         * frv-asm.c: Rebuilt.
 441         * frv-desc.c: Rebuilt.
 442         * frv-desc.h: Rebuilt.
 443         * frv-dis.c: Rebuilt.
 444         * frv-ibld.c: Rebuilt.
 445         * frv-opc.c: Rebuilt.
 446         * frv-opc.h: Rebuilt.
 447
 448 2005-01-24  Andrew Cagney  <cagney@gnu.org>
 449
 450         * configure: Regenerate, ../gettext.m4 was updated.
 451
 452 2005-01-21  Fred Fish  <fnf@specifixinc.com>
 453
 454         * mips-opc.c:  Change INSN_ALIAS to INSN2_ALIAS.
 455         Change INSN_WRITE_MDMX_ACC to INSN2_WRITE_MDMX_ACC.
 456         Change INSN_READ_MDMX_ACC to INSN2_READ_MDMX_ACC.
 457         * mips-dis.c: Ditto.
 458
 459 2005-01-20  Alan Modra  <amodra@bigpond.net.au>
 460
 461         * ppc-opc.c (powerpc_opcodes): Add optional 'l' arg to tlbiel.
 462
 463 2005-01-19  Fred Fish  <fnf@specifixinc.com>
 464
 465         * mips-dis.c (no_aliases): New disassembly option flag.
 466         (set_default_mips_dis_options): Init no_aliases to zero.
 467         (parse_mips_dis_option): Handle no-aliases option.
 468         (print_insn_mips): Ignore table entries that are aliases
 469         if no_aliases is set.
 470         (print_insn_mips16): Ditto.
 471         * mips-opc.c (mips_builtin_opcodes): Add initializer column for
 472         new pinfo2 member and add INSN_ALIAS initializers as needed.  Also
 473         move WR_MACC and RD_MACC initializers from pinfo to pinfo2.
 474         * mips16-opc.c (mips16_opcodes): Ditto.
 475
 476 2005-01-17  Andrew Stubbs  <andrew.stubbs@st.com>
 477
 478         * sh-opc.h (arch_sh2a_or_sh3e,arch_sh2a_or_sh4): Correct definition.
 479         (inheritance diagram): Add missing edge.
 480         (arch_sh1_up): Rename arch_sh_up to match external name to make life
 481         easier for the testsuite.
 482         (arch_sh4_nofp_up): Likewise, rename arch_sh4_nofpu_up.
 483         (arch_sh4a_nofp_up): Likewise, rename arch_sh4a_nofpu_up.
 484         (arch_sh2a_nofpu_or_sh4_nommu_nofpu_up): Add missing
 485         arch_sh2a_or_sh4_up child.
 486         (sh_table): Do renaming as above.
 487         Correct comment for ldc.l for gas testsuite to read.
 488         Remove rogue mul.l from sh1 (duplicate of the one for sh2).
 489         Correct comments for movy.w and movy.l for gas testsuite to read.
 490         Correct comments for fmov.d and fmov.s for gas testsuite to read.
 491
 492 2005-01-12  H.J. Lu  <hongjiu.lu@intel.com>
 493
 494         * i386-dis.c (OP_E): Don't ignore scale in SIB for 64 bit mode.
 495
 496 2005-01-12  H.J. Lu  <hongjiu.lu@intel.com>
 497
 498         * i386-dis.c (OP_E): Ignore scale when index == 0x4 in SIB.
 499
 500 2005-01-10  Andreas Schwab  <schwab@suse.de>
 501
 502         * disassemble.c (disassemble_init_for_target) <case
 503         bfd_arch_ia64>: Set skip_zeroes to 16.
 504         <case bfd_arch_tic4x>: Set skip_zeroes to 32.
 505
 506 2004-12-23  Tomer Levi  <Tomer.Levi@nsc.com>
 507
 508         * crx-opc.c: Mark 'bcop' instruction as RELAXABLE.
 509
 510 2004-12-14  Svein E. Seldal  <Svein.Seldal@solidas.com>
 511
 512         * avr-dis.c: Prettyprint. Added printing of symbol names in all
 513         memory references. Convert avr_operand() to C90 formatting.
 514
 515 2004-12-05  Tomer Levi  <Tomer.Levi@nsc.com>
 516
 517         * crx-dis.c (print_arg): Use 'info->print_address_func' for address printing.
 518
 519 2004-11-29  Tomer Levi  <Tomer.Levi@nsc.com>
 520
 521         * crx-opc.c (crx_optab): Mark all rbase_disps* operands as signed.
 522         (no_op_insn): Initialize array with instructions that have no
 523         operands.
 524         * crx-dis.c (make_instruction): Get rid of COP_BRANCH_INS operand swapping.
 525
 526 2004-11-29  Richard Earnshaw  <rearnsha@arm.com>
 527
 528         * arm-dis.c: Correct top-level comment.
 529
 530 2004-11-27  Richard Earnshaw  <rearnsha@arm.com>
 531
 532         * arm-opc.h (arm_opcode, thumb_opcode): Add extra field for the
 533         architecuture defining the insn.
 534         (arm_opcodes, thumb_opcodes): Delete.  Move to ...
 535         * arm-dis.c (arm_opcodes, thumb_opcodes): Here.  Add architecutre
 536         field.
 537         Also include opcode/arm.h.
 538         * Makefile.am (arm-dis.lo): Update dependency list.
 539         * Makefile.in: Regenerate.
 540
 541 2004-11-22  Ravi Ramaseshan  <ravi.ramaseshan@codito.com>
 542
 543         * opcode/arc-opc.c (insert_base): Modify ls_operand[LS_OFFSET] to
 544         reflect the change to the short immediate syntax.
 545
 546 2004-11-19  Alan Modra  <amodra@bigpond.net.au>
 547
 548         * or32-opc.c (debug): Warning fix.
 549         * po/POTFILES.in: Regenerate.
 550
 551         * maxq-dis.c: Formatting.
 552         (print_insn): Warning fix.
 553
 554 2004-11-17  Daniel Jacobowitz  <dan@codesourcery.com>
 555
 556         * arm-dis.c (WORD_ADDRESS): Define.
 557         (print_insn): Use it.  Correct big-endian end-of-section handling.
 558
 559 2004-11-08  Inderpreet Singh   <inderpreetb@nioda.hcltech.com>
 560             Vineet Sharma      <vineets@noida.hcltech.com>
 561
 562         * maxq-dis.c: New file.
 563         * disassemble.c (ARCH_maxq): Define.
 564         (disassembler): Add 'print_insn_maxq_little' for handling maxq
 565         instructions..
 566         * configure.in: Add case for bfd_maxq_arch.
 567         * configure: Regenerate.
 568         * Makefile.am: Add support for maxq-dis.c
 569         * Makefile.in: Regenerate.
 570         * aclocal.m4: Regenerate.
 571
 572 2004-11-05  Tomer Levi  <Tomer.Levi@nsc.com>
 573
 574         * crx-opc.c (crx_optab): Rename 'arg_icr' to 'arg_idxr' for Index register
 575         mode.
 576         * crx-dis.c: Likewise.
 577
 578 2004-11-04  Hans-Peter Nilsson  <hp@axis.com>
 579
 580         Generally, handle CRISv32.
 581         * cris-dis.c (TRACE_CASE): Define as (disdata->trace_case).
 582         (struct cris_disasm_data): New type.
 583         (format_reg, format_hex, cris_constraint, print_flags)
 584         (get_opcode_entry): Add struct cris_disasm_data * parameter.  All
 585         callers changed.
 586         (format_sup_reg, print_insn_crisv32_with_register_prefix)
 587         (print_insn_crisv32_without_register_prefix)
 588         (print_insn_crisv10_v32_with_register_prefix)
 589         (print_insn_crisv10_v32_without_register_prefix)
 590         (cris_parse_disassembler_options): New functions.
 591         (bytes_to_skip, cris_spec_reg): Add enum cris_disass_family
 592         parameter.  All callers changed.
 593         (get_opcode_entry): Call malloc, not xmalloc.  Return NULL on
 594         failure.
 595         (cris_constraint) <case 'Y', 'U'>: New cases.
 596         (bytes_to_skip): Handle 'Y' and 'N' as 's'.  Skip size is 4 bytes
 597         for constraint 'n'.
 598         (print_with_operands) <case 'Y'>: New case.
 599         (print_with_operands) <case 'T', 'A', '[', ']', 'd', 'n', 'u'>
 600         <case 'N', 'Y', 'Q'>: New cases.
 601         (print_insn_cris_generic): Emit "bcc ." for zero and CRISv32.
 602         (print_insn_cris_with_register_prefix)
 603         (print_insn_cris_without_register_prefix): Call
 604         cris_parse_disassembler_options.
 605         * cris-opc.c (cris_spec_regs): Mention that this table isn't used
 606         for CRISv32 and the size of immediate operands.  New v32-only
 607         entries for bz, pid, srs, wz, exs, eda, dz, ebp, erp, nrp, ccs and
 608         spc.  Add v32-only 4-byte entries for p2, p3, p5 and p6.  Change
 609         ccr, ibr, irp to be v0..v10.  Change bar, dccr to be v8..v10.
 610         Change brp to be v3..v10.
 611         (cris_support_regs): New vector.
 612         (cris_opcodes): Update head comment.  New format characters '[',
 613         ']', space, 'A', 'd', 'N', 'n', 'Q', 'T', 'u', 'U', 'Y'.
 614         Add new opcodes for v32 and adjust existing opcodes to accommodate
 615         differences to earlier variants.
 616         (cris_cond15s): New vector.
 617
 618 2004-11-04 Jan Beulich <jbeulich@novell.com>
 619
 620         * i386-dis.c (Eq, Edqw, indirEp, Gdq, I1): Define.
 621         (indirEb): Remove.
 622         (Mp): Use f_mode rather than none at all.
 623         (t_mode, dq_mode, dqw_mode, f_mode, const_1_mode): Define. t_mode
 624         replaces what previously was x_mode; x_mode now means 128-bit SSE
 625         operands.
 626         (dis386): Make far jumps and calls have an 'l' prefix only in AT&T
 627         mode. movmskpX's, pextrw's, and pmovmskb's first operands are Gdq.
 628         pinsrw's second operand is Edqw.
 629         (grps): 1-bit shifts' and rotates' second operands are I1. cmpxchg8b's
 630         operand is Eq. movntq's and movntdq's first operands are EM. s[gi]dt,
 631         fldenv, frstor, fsave, fstenv all should also have suffixes in Intel
 632         mode when an operand size override is present or always suffixing.
 633         More instructions will need to be added to this group.
 634         (putop): Handle new macro chars 'C' (short/long suffix selector),
 635         'I' (Intel mode override for following macro char), and 'J' (for
 636         adding the 'l' prefix to far branches in AT&T mode). When an
 637         alternative was specified in the template, honor macro character when
 638         specified for Intel mode.
 639         (OP_E): Handle new *_mode values. Correct pointer specifications for
 640         memory operands. Consolidate output of index register.
 641         (OP_G): Handle new *_mode values.
 642         (OP_I): Handle const_1_mode.
 643         (OP_ESreg, OP_DSreg): Generate pointer specifications. Indicate
 644         respective opcode prefix bits have been consumed.
 645         (OP_EM, OP_EX): Provide some default handling for generating pointer
 646         specifications.
 647
 648 2004-10-28  Tomer Levi  <Tomer.Levi@nsc.com>
 649
 650         * crx-opc.c (REV_COP_INST): New macro, reverse operand order of
 651         COP_INST macro.
 652
 653 2004-10-27  Tomer Levi  <Tomer.Levi@nsc.com>
 654
 655         * crx-dis.c (enum REG_ARG_TYPE): New, replacing COP_ARG_TYPE.
 656         (getregliststring): Support HI/LO and user registers.
 657         * crx-opc.c (crx_instruction): Update data structure according to the
 658         rearrangement done in CRX opcode header file.
 659         (crx_regtab):  Likewise.
 660         (crx_optab):  Likewise.
 661         (crx_instruction): Reorder load/stor instructions, remove unsupported
 662         formats.
 663         support new Co-Processor instruction 'cpi'.
 664
 665 2004-10-27  Nick Clifton  <nickc@redhat.com>
 666
 667         * opcodes/iq2000-asm.c: Regenerate.
 668         * opcodes/iq2000-desc.c: Regenerate.
 669         * opcodes/iq2000-desc.h: Regenerate.
 670         * opcodes/iq2000-dis.c: Regenerate.
 671         * opcodes/iq2000-ibld.c: Regenerate.
 672         * opcodes/iq2000-opc.c: Regenerate.
 673         * opcodes/iq2000-opc.h: Regenerate.
 674
 675 2004-10-21  Tomer Levi  <Tomer.Levi@nsc.com>
 676
 677         * crx-opc.c (crx_instruction): Replace i3, i4, i5 with us3,
 678         us4, us5 (respectively).
 679         Remove unsupported 'popa' instruction.
 680         Reverse operands order in store co-processor instructions.
 681
 682 2004-10-15  Alan Modra  <amodra@bigpond.net.au>
 683
 684         * Makefile.am: Run "make dep-am"
 685         * Makefile.in: Regenerate.
 686
 687 2004-10-12  Bob Wilson  <bob.wilson@acm.org>
 688
 689         * xtensa-dis.c: Use ISO C90 formatting.
 690
 691 2004-10-09  Alan Modra  <amodra@bigpond.net.au>
 692
 693         * ppc-opc.c: Revert 2004-09-09 change.
 694
 695 2004-10-07  Bob Wilson  <bob.wilson@acm.org>
 696
 697         * xtensa-dis.c (state_names): Delete.
 698         (fetch_data): Use xtensa_isa_maxlength.
 699         (print_xtensa_operand): Replace operand parameter with opcode/operand
 700         pair.  Remove print_sr_name parameter.  Use new xtensa-isa.h functions.
 701         (print_insn_xtensa): Use new xtensa-isa.h functions.  Handle multislot
 702         instruction bundles.  Use xmalloc instead of malloc.
 703
 704 2004-10-07  David Gibson  <david@gibson.dropbear.id.au>
 705
 706         * ppc-opc.c: Replace literal "0"s with NULLs in pointer
 707         initializers.
 708
 709 2004-10-07  Tomer Levi  <Tomer.Levi@nsc.com>
 710
 711         * crx-opc.c (crx_instruction): Support Co-processor insns.
 712         * crx-dis.c (COP_ARG_TYPE): New enum for CO-Processor arguments.
 713         (getregliststring): Change function to use the above enum.
 714         (print_arg): Handle CO-Processor insns.
 715         (crx_cinvs): Add 'b' option to invalidate the branch-target
 716         cache.
 717
 718 2004-10-06  Aldy Hernandez  <aldyh@redhat.com>
 719
 720         * ppc-opc.c (powerpc_opcodes): Add efscfd, efdabs, efdnabs,
 721         efdneg, efdadd, efdsub, efdmul, efddiv, efdcmpgt, efdcmplt,
 722         efdcmpeq, efdtstgt, efdtstlt, efdtsteq, efdcfsi, efdcfsid,
 723         efdcfui, efdcfuid, efdcfsf, efdcfuf, efdctsi, efdctsidz, efdctsiz,
 724         efdctui, efdctuidz, efdctuiz, efdctsf, efdctuf, efdctuf, efdcfs.
 725
 726 2004-10-01  Bill Farmer  <Bill@the-farmers.freeserve.co.uk>
 727
 728         * pdp11-dis.c (print_insn_pdp11): Subtract the SOB's displacement
 729         rather than add it.
 730
 731 2004-09-30  Paul Brook  <paul@codesourcery.com>
 732
 733         * arm-dis.c (print_insn_arm): Handle 'e' for SMI instruction.
 734         * arm-opc.h: Document %e.  Add ARMv6ZK instructions.
 735
 736 2004-09-17  H.J. Lu  <hongjiu.lu@intel.com>
 737
 738         * Makefile.am (AUTOMAKE_OPTIONS): Require 1.9.
 739         (CONFIG_STATUS_DEPENDENCIES): New.
 740         (Makefile): Removed.
 741         (config.status): Likewise.
 742         * Makefile.in: Regenerated.
 743
 744 2004-09-17  Alan Modra  <amodra@bigpond.net.au>
 745
 746         * Makefile.am: Run "make dep-am".
 747         * Makefile.in: Regenerate.
 748         * aclocal.m4: Regenerate.
 749         * configure: Regenerate.
 750         * po/POTFILES.in: Regenerate.
 751         * po/opcodes.pot: Regenerate.
 752
 753 2004-09-11  Andreas Schwab  <schwab@suse.de>
 754
 755         * configure: Rebuild.
 756
 757 2004-09-09  Segher Boessenkool  <segher@kernel.crashing.org>
 758
 759         * ppc-opc.c (L): Make this field not optional.
 760
 761 2004-09-03  Tomer Levi  <Tomer.Levi@nsc.com>
 762
 763         * opc-crx.c: Rename 'popma' to 'popa', remove 'pushma'.
 764         Fix parameter to 'm[t|f]csr' insns.
 765
 766 2004-08-30  Nathanael Nerode  <neroden@gcc.gnu.org>
 767
 768         * configure.in: Autoupdate to autoconf 2.59.
 769         * aclocal.m4: Rebuild with aclocal 1.4p6.
 770         * configure: Rebuild with autoconf 2.59.
 771         * Makefile.in: Rebuild with automake 1.4p6 (picking up
 772         bfd changes for autoconf 2.59 on the way).
 773         * config.in: Rebuild with autoheader 2.59.
 774
 775 2004-08-27  Richard Sandiford  <rsandifo@redhat.com>
 776
 777         * frv-desc.[ch], frv-opc.[ch]: Regenerated.
 778
 779 2004-07-30  Michal Ludvig  <mludvig@suse.cz>
 780
 781         * i386-dis.c (GRPPADLCK): Renamed to GRPPADLCK1
 782         (GRPPADLCK2): New define.
 783         (twobyte_has_modrm): True for 0xA6.
 784         (grps): GRPPADLCK2 for opcode 0xA6.
 785
 786 2004-07-29  Alexandre Oliva  <aoliva@redhat.com>
 787
 788         Introduce SH2a support.
 789         * sh-opc.h (arch_sh2a_base): Renumber.
 790         (arch_sh2a_nofpu_base): Remove.
 791         (arch_sh_base_mask): Adjust.
 792         (arch_opann_mask): New.
 793         (arch_sh2a, arch_sh2a_nofpu): Adjust.
 794         (arch_sh2a_up, arch_sh2a_nofpu_up): Likewise.
 795         (sh_table): Adjust whitespace.
 796         2004-02-24  Corinna Vinschen  <vinschen@redhat.com>
 797         * sh-opc.h (arch_sh2a_nofpu_up): New.  Use instead of arch_sh2a_up in
 798         instruction list throughout.
 799         (arch_sh2a_up): Redefine to include fpu instruction set.  Use instead
 800         of arch_sh2a in instruction list throughout.
 801         (arch_sh2e_up): Accomodate above changes.
 802         (arch_sh2_up): Ditto.
 803         2004-02-20  Corinna Vinschen  <vinschen@redhat.com>
 804         * sh-opc.h: Add arch_sh2a_nofpu to arch_sh2_up.
 805         2004-02-18  Corinna Vinschen  <vinschen@redhat.com>
 806         * sh-dis.c (print_insn_sh): Add bfd_mach_sh2a_nofpu handling.
 807         * sh-opc.h (arch_sh2a_nofpu): New.
 808         (arch_sh2a_up): New, defines sh2a and sh2a_nofpu.
 809         (sh_table): Change all arch_sh2a to arch_sh2a_up unless FPU
 810         instruction.
 811         2004-01-20  DJ Delorie  <dj@redhat.com>
 812         * sh-dis.c (print_insn_sh): SH2A does not have 'X' fp regs.
 813         2003-12-29  DJ Delorie  <dj@redhat.com>
 814         * sh-opc.c (sh_nibble_type, sh_arg_type, arch_2a, arch_2e_up,
 815         sh_opcode_info, sh_table): Add sh2a support.
 816         (arch_op32): New, to tag 32-bit opcodes.
 817         * sh-dis.c (print_insn_sh): Support sh2a opcodes.
 818         2003-12-02  Michael Snyder  <msnyder@redhat.com>
 819         * sh-opc.h (arch_sh2a): Add.
 820         * sh-dis.c (arch_sh2a): Handle.
 821         * sh-opc.h (arch_sh2_up): Fix up to include arch_sh2a.
 822
 823 2004-07-27  Tomer Levi  <Tomer.Levi@nsc.com>
 824
 825         * crx-opc.c: Add popx,pushx insns. Indent code, fix comments.
 826
 827 2004-07-22  Nick Clifton  <nickc@redhat.com>
 828
 829         PR/280
 830         * h8300-dis.c (bfd_h8_disassemble): Do not dump raw bytes for the
 831         insns - this is done by objdump itself.
 832         * h8500-dis.c (print_insn_h8500): Likewise.
 833
 834 2004-07-21  Jan Beulich <jbeulich@novell.com>
 835
 836         * i386-dis.c (OP_E): Show rip-relative addressing in 64-bit mode
 837         regardless of address size prefix in effect.
 838         (ptr_reg): Size or address registers does not depend on rex64, but
 839         on the presence of an address size override.
 840         (OP_MMX): Use rex.x only for xmm registers.
 841         (OP_EM): Use rex.z only for xmm registers.
 842
 843 2004-07-20  Maciej W. Rozycki  <macro@linux-mips.org>
 844
 845         * mips-opc.c (mips_builtin_opcodes): Move coprocessor 2
 846         move/branch operations to the bottom so that VR5400 multimedia
 847         instructions take precedence in disassembly.
 848
 849 2004-07-20  Maciej W. Rozycki  <macro@linux-mips.org>
 850
 851         * mips-opc.c (mips_builtin_opcodes): Remove the MIPS32
 852         ISA-specific "break" encoding.
 853
 854 2004-07-13  Elvis Chiang  <elvisfb@gmail.com>
 855
 856         * arm-opc.h: Fix typo in comment.
 857
 858 2004-07-11  Andreas Schwab  <schwab@suse.de>
 859
 860         * m68k-dis.c (m68k_valid_ea): Fix typos in last change.
 861
 862 2004-07-09  Andreas Schwab  <schwab@suse.de>
 863
 864         * m68k-dis.c (m68k_valid_ea): Check validity of all codes.
 865
 866 2004-07-07  Tomer Levi  <Tomer.Levi@nsc.com>
 867
 868         * Makefile.am (CFILES): Add crx-dis.c, crx-opc.c.
 869         (ALL_MACHINES): Add crx-dis.lo, crx-opc.lo.
 870         (crx-dis.lo): New target.
 871         (crx-opc.lo): Likewise.
 872         * Makefile.in: Regenerate.
 873         * configure.in: Handle bfd_crx_arch.
 874         * configure: Regenerate.
 875         * crx-dis.c: New file.
 876         * crx-opc.c: New file.
 877         * disassemble.c (ARCH_crx): Define.
 878         (disassembler): Handle ARCH_crx.
 879
 880 2004-06-29  James E Wilson  <wilson@specifixinc.com>
 881
 882         * ia64-opc-a.c (ia64_opcodes_a): Delete mov immediate pseudo for adds.
 883         * ia64-asmtab.c: Regnerate.
 884
 885 2004-06-28  Alan Modra  <amodra@bigpond.net.au>
 886
 887         * ppc-opc.c (insert_fxm): Handle mfocrf and mtocrf.
 888         (extract_fxm): Don't test dialect.
 889         (XFXFXM_MASK): Include the power4 bit.
 890         (XFXM): Add p4 param.
 891         (powerpc_opcodes): Add mfocrf and mtocrf.  Adjust mtcr.
 892
 893 2004-06-27  Alexandre Oliva  <aoliva@redhat.com>
 894
 895         2003-07-21  Richard Sandiford  <rsandifo@redhat.com>
 896         * disassemble.c (disassembler): Handle bfd_mach_h8300sxn.
 897
 898 2004-06-26  Alan Modra  <amodra@bigpond.net.au>
 899
 900         * ppc-opc.c (BH, XLBH_MASK): Define.
 901         (powerpc_opcodes): Allow BH field on bclr, bclrl, bcctr, bcctrl.
 902
 903 2004-06-24  Alan Modra  <amodra@bigpond.net.au>
 904
 905         * i386-dis.c (x_mode): Comment.
 906         (two_source_ops): File scope.
 907         (float_mem): Correct fisttpll and fistpll.
 908         (float_mem_mode): New table.
 909         (dofloat): Use it.
 910         (OP_E): Correct intel mode PTR output.
 911         (ptr_reg): Use open_char and close_char.
 912         (PNI_Fixup): Handle possible suffix on sidt.  Use op1out etc. for
 913         operands.  Set two_source_ops.
 914
 915 2004-06-15  Alan Modra  <amodra@bigpond.net.au>
 916
 917         * arc-ext.c (build_ARC_extmap): Use bfd_get_section_size
 918         instead of _raw_size.
 919
 920 2004-06-08  Jakub Jelinek  <jakub@redhat.com>
 921
 922         * ia64-gen.c (in_iclass): Handle more postinc st
 923         and ld variants.
 924         * ia64-asmtab.c: Rebuilt.
 925
 926 2004-06-01  Martin Schwidefsky  <schwidefsky@de.ibm.com>
 927
 928         * s390-opc.txt: Correct architecture mask for some opcodes.
 929         lrv, lrvh, strv, ml, dl, alc, slb rll and mvclu are available
 930         in the esa mode as well.
 931
 932 2004-05-28  Andrew Stubbs <andrew.stubbs@superh.com>
 933
 934         * sh-dis.c (target_arch): Make unsigned.
 935         (print_insn_sh): Replace (most of) switch with a call to
 936         sh_get_arch_from_bfd_mach(). Also use new architecture flags system.
 937         * sh-opc.h: Redefine architecture flags values.
 938         Add sh3-nommu architecture.
 939         Reorganise <arch>_up macros so they make more visual sense.
 940         (SH_MERGE_ARCH_SET): Define new macro.
 941         (SH_VALID_BASE_ARCH_SET): Likewise.
 942         (SH_VALID_MMU_ARCH_SET): Likewise.
 943         (SH_VALID_CO_ARCH_SET): Likewise.
 944         (SH_VALID_ARCH_SET): Likewise.
 945         (SH_MERGE_ARCH_SET_VALID): Likewise.
 946         (SH_ARCH_SET_HAS_FPU): Likewise.
 947         (SH_ARCH_SET_HAS_DSP): Likewise.
 948         (SH_ARCH_UNKNOWN_ARCH): Likewise.
 949         (sh_get_arch_from_bfd_mach): Add prototype.
 950         (sh_get_arch_up_from_bfd_mach): Likewise.
 951         (sh_get_bfd_mach_from_arch_set): Likewise.
 952         (sh_merge_bfd_arc): Likewise.
 953
 954 2004-05-24  Peter Barada  <peter@the-baradas.com>
 955
 956         * m68k-dis.c(print_insn_m68k): Strip body of diassembly out
 957         into new match_insn_m68k function.  Loop over canidate
 958         matches and select first that completely matches.
 959         * m68k-dis.c(print_insn_arg): Fix 'g' case to only extract 1 bit.
 960         * m68k-dis.c(print_insn_arg): Call new function m68k_valid_ea
 961         to verify addressing for MAC/EMAC.
 962         * m68k-dis.c(print_insn_arg): Use reg_half_names for MAC/EMAC
 963         reigster halves since 'fpu' and 'spl' look misleading.
 964         * m68k-dis.c(fetch_arg): Fix 'G', 'H', 'I', 'f', 'M', 'N' cases.
 965         * m68k-opc.c: Rearragne mac/emac cases to use longest for
 966         first, tighten up match masks.
 967         * m68k-opc.c: Add 'size' field to struct m68k_opcode.  Produce
 968         'size' from special case code in print_insn_m68k to
 969         determine decode size of insns.
 970
 971 2004-05-19  Alan Modra  <amodra@bigpond.net.au>
 972
 973         * ppc-opc.c (insert_fxm): Enable two operand mfcr when -many as
 974         well as when -mpower4.
 975
 976 2004-05-13  Nick Clifton  <nickc@redhat.com>
 977
 978         * po/fr.po: Updated French translation.
 979
 980 2004-05-05  Peter Barada  <peter@the-baradas.com>
 981
 982         * m68k-dis.c(print_insn_m68k): Add new chips, use core
 983         variants in arch_mask.  Only set m68881/68851 for 68k chips.
 984         * m68k-op.c: Switch from ColdFire chips to core variants.
 985
 986 2004-05-05  Alan Modra  <amodra@bigpond.net.au>
 987
 988         PR 147.
 989         * ppc-opc.c (PPCVEC): Remove PPC_OPCODE_PPC.
 990
 991 2004-04-29  Ben Elliston  <bje@au.ibm.com>
 992
 993         * ppc-opc.c (XCMPL): Renmame to XOPL. Update users.
 994         (powerpc_opcodes): Add "dbczl" instruction for PPC970.
 995
 996 2004-04-22  Kaz Kojima  <kkojima@rr.iij4u.or.jp>
 997
 998         * sh-dis.c (print_insn_sh): Print the value in constant pool
 999         as a symbol if it looks like a symbol.
1000
1001 2004-04-22  Peter Barada <peter@the-baradas.com>
1002
1003         * m68k-dis.c(print_insn_m68k): Set mfcmac/mcfemac on
1004         appropriate ColdFire architectures.
1005         (print_insn_m68k): Handle EMAC, MAC/EMAC scalefactor, and MAC/EMAC
1006         mask addressing.
1007         Add EMAC instructions, fix MAC instructions. Remove
1008         macmw/macml/msacmw/msacml instructions since mask addressing now
1009         supported.
1010
1011 2004-04-20  Jakub Jelinek  <jakub@redhat.com>
1012
1013         * sparc-opc.c (fmoviccx, fmovfccx, fmovccx): Define.
1014         (fmovicc, fmovfcc, fmovcc): Remove fpsize argument, change opcode to
1015         suffix.  Use fmov*x macros, create all 3 fpsize variants in one
1016         macro.  Adjust all users.
1017
1018 2004-04-15  Anil Paranjpe  <anilp1@kpitcummins.com>
1019
1020         * h8300-dis.c (bfd_h8_disassemble) : Treat "adds" & "subs"
1021         separately.
1022
1023 2004-03-30  Kazuhiro Inaoka  <inaoka.kazuhiro@renesas.com>
1024
1025         * m32r-asm.c: Regenerate.
1026
1027 2004-03-29  Stan Shebs  <shebs@apple.com>
1028
1029         * mpw-config.in, mpw-make.sed: Remove MPW support files, no longer
1030         used.
1031
1032 2004-03-19  Alan Modra  <amodra@bigpond.net.au>
1033
1034         * aclocal.m4: Regenerate.
1035         * config.in: Regenerate.
1036         * configure: Regenerate.
1037         * po/POTFILES.in: Regenerate.
1038         * po/opcodes.pot: Regenerate.
1039
1040 2004-03-16  Alan Modra  <amodra@bigpond.net.au>
1041
1042         * ppc-dis.c (print_insn_powerpc): Don't print tabs.  Handle
1043         PPC_OPERANDS_GPR_0.
1044         * ppc-opc.c (RA0): Define.
1045         (RAQ, RAL, RAM, RAS, RSQ, RTQ, RSO): Use PPC_OPERAND_GPR_0.
1046         (RAOPT): Rename from RAO.  Update all uses.
1047         (powerpc_opcodes): Use RA0 as appropriate.
1048
1049 2004-03-15  Aldy Hernandez  <aldyh@redhat.com>
1050
1051         * ppc-opc.c (powerpc_opcodes): Add BOOKE versions of mfsprg.
1052
1053 2004-03-15  Alan Modra  <amodra@bigpond.net.au>
1054
1055         * sparc-dis.c (print_insn_sparc): Update getword prototype.
1056
1057 2004-03-12  Michal Ludvig  <mludvig@suse.cz>
1058
1059         * i386-dis.c (GRPPLOCK): Delete.
1060         (grps): Delete GRPPLOCK entry.
1061
1062 2004-03-12  Alan Modra  <amodra@bigpond.net.au>
1063
1064         * i386-dis.c (OP_M, OP_0f0e, OP_0fae, NOP_Fixup): New functions.
1065         (M, Mp): Use OP_M.
1066         (None, PADLOCK_SPECIAL, PADLOCK_0): Delete.
1067         (GRPPADLCK): Define.
1068         (dis386): Use NOP_Fixup on "nop".
1069         (dis386_twobyte): Use GRPPADLCK on opcode 0xa7.
1070         (twobyte_has_modrm): Set for 0xa7.
1071         (padlock_table): Delete.  Move to..
1072         (grps): ..here, using OP_0f07.  Use OP_Ofae on lfence, mfence
1073         and clflush.
1074         (print_insn): Revert PADLOCK_SPECIAL code.
1075         (OP_E): Delete sfence, lfence, mfence checks.
1076
1077 2004-03-12  Jakub Jelinek  <jakub@redhat.com>
1078
1079         * i386-dis.c (grps): Use INVLPG_Fixup instead of OP_E for invlpg.
1080         (INVLPG_Fixup): New function.
1081         (PNI_Fixup): Remove ATTRIBUTE_UNUSED from sizeflag.
1082
1083 2004-03-12  Michal Ludvig  <mludvig@suse.cz>
1084
1085         * i386-dis.c (PADLOCK_SPECIAL, PADLOCK_0): New defines.
1086         (dis386_twobyte): Opcode 0xa7 is PADLOCK_0.
1087         (padlock_table): New struct with PadLock instructions.
1088         (print_insn): Handle PADLOCK_SPECIAL.
1089
1090 2004-03-12  Alan Modra  <amodra@bigpond.net.au>
1091
1092         * i386-dis.c (grps): Use clflush by default for 0x0fae/7.
1093         (OP_E): Twiddle clflush to sfence here.
1094
1095 2004-03-08  Nick Clifton  <nickc@redhat.com>
1096
1097         * po/de.po: Updated German translation.
1098
1099 2003-03-03  Andrew Stubbs  <andrew.stubbs@superh.com>
1100
1101         * sh-dis.c (print_insn_sh): Don't disassemble fp instructions in
1102         nofpu mode.  Add BFD type bfd_mach_sh4_nommu_nofpu.
1103         * sh-opc.h: Add sh4_nommu_nofpu architecture and adjust instructions
1104         accordingly.
1105
1106 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
1107
1108         * frv-asm.c: Regenerate.
1109         * frv-desc.c: Regenerate.
1110         * frv-desc.h: Regenerate.
1111         * frv-dis.c: Regenerate.
1112         * frv-ibld.c: Regenerate.
1113         * frv-opc.c: Regenerate.
1114         * frv-opc.h: Regenerate.
1115
1116 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
1117
1118         * frv-desc.c, frv-opc.c: Regenerate.
1119
1120 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
1121
1122         * frv-desc.c, frv-opc.c, frv-opc.h: Regenerate.
1123
1124 2004-02-26  Andrew Stubbs  <andrew.stubbs@superh.com>
1125
1126         * sh-opc.h: Move fsca and fsrra instructions from sh4a to sh4.
1127         Also correct mistake in the comment.
1128
1129 2004-02-26  Andrew Stubbs <andrew.stubbs@superh.com>
1130
1131         * sh-dis.c (print_insn_sh): Add REG_N_D nibble type to
1132         ensure that double registers have even numbers.
1133         Add REG_N_B01 for nn01 (binary 01) nibble to ensure
1134         that reserved instruction 0xfffd does not decode the same
1135         as 0xfdfd (ftrv).
1136         * sh-opc.h: Add REG_N_D nibble type and use it whereever
1137         REG_N refers to a double register.
1138         Add REG_N_B01 nibble type and use it instead of REG_NM
1139         in ftrv.
1140         Adjust the bit patterns in a few comments.
1141
1142 2004-02-25  Aldy Hernandez  <aldyh@redhat.com>
1143
1144         * ppc-opc.c (powerpc_opcodes): Change mask for dcbt and dcbtst.
1145
1146 2004-02-20  Aldy Hernandez  <aldyh@redhat.com>
1147
1148         * ppc-opc.c (powerpc_opcodes): Move mfmcsrr0 before mfdc_dat.
1149
1150 2004-02-20  Aldy Hernandez  <aldyh@redhat.com>
1151
1152         * ppc-opc.c (powerpc_opcodes): Add m*ivor35.
1153
1154 2004-02-20  Aldy Hernandez  <aldyh@redhat.com>
1155
1156         * ppc-opc.c (powerpc_opcodes): Add mfivor32, mfivor33, mfivor34,
1157         mtivor32, mtivor33, mtivor34.
1158
1159 2004-02-19  Aldy Hernandez  <aldyh@redhat.com>
1160
1161         * ppc-opc.c (powerpc_opcodes): Add mfmcar.
1162
1163 2004-02-10  Petko Manolov  <petkan@nucleusys.com>
1164
1165         * arm-opc.h Maverick accumulator register opcode fixes.
1166
1167 2004-02-13  Ben Elliston  <bje@wasabisystems.com>
1168
1169         * m32r-dis.c: Regenerate.
1170
1171 2004-01-27  Michael Snyder  <msnyder@redhat.com>
1172
1173         * sh-opc.h (sh_table): "fsrra", not "fssra".
1174
1175 2004-01-23  Andrew Over <andrew.over@cs.anu.edu.au>
1176
1177         * sparc-opc.c (fdtox, fstox, fqtox, fxtod, fxtos, fxtoq): Tighten
1178         contraints.
1179
1180 2004-01-19  Andrew Over  <andrew.over@cs.anu.edu.au>
1181
1182         * sparc-opc.c (sparc_opcodes) <f[dsq]tox, fxto[dsq]>: Fix args.
1183
1184 2004-01-19  Alan Modra  <amodra@bigpond.net.au>
1185
1186         * i386-dis.c (OP_E): Print scale factor on intel mode sib when not
1187         1.  Don't print scale factor on AT&T mode when index missing.
1188
1189 2004-01-16  Alexandre Oliva  <aoliva@redhat.com>
1190
1191         * m10300-opc.c (mov): 8- and 24-bit immediates are zero-extended
1192         when loaded into XR registers.
1193
1194 2004-01-14  Richard Sandiford  <rsandifo@redhat.com>
1195
1196         * frv-desc.h: Regenerate.
1197         * frv-desc.c: Regenerate.
1198         * frv-opc.c: Regenerate.
1199
1200 2004-01-13  Michael Snyder  <msnyder@redhat.com>
1201
1202         * sh-dis.c (print_insn_sh): Allocate 4 bytes for insn.
1203
1204 2004-01-09  Paul Brook  <paul@codesourcery.com>
1205
1206         * arm-opc.h (arm_opcodes): Move generic mcrr after known
1207         specific opcodes.
1208
1209 2004-01-07  Daniel Jacobowitz  <drow@mvista.com>
1210
1211         * Makefile.am (libopcodes_la_DEPENDENCIES)
1212         (libopcodes_la_LIBADD): Revert 2003-05-17 change.  Add explanatory
1213         comment about the problem.
1214         * Makefile.in: Regenerate.
1215
1216 2004-01-06  Alexandre Oliva  <aoliva@redhat.com>
1217
1218         2003-12-19  Alexandre Oliva  <aoliva@redhat.com>
1219         * frv-asm.c (parse_ulo16, parse_uhi16, parse_d12): Fix some
1220         cut&paste errors in shifting/truncating numerical operands.
1221         2003-08-04  Alexandre Oliva  <aoliva@redhat.com>
1222         * frv-asm.c (parse_ulo16): Parse gotofflo and gotofffuncdesclo.
1223         (parse_uslo16): Likewise.
1224         (parse_uhi16): Parse gotoffhi and gotofffuncdeschi.
1225         (parse_d12): Parse gotoff12 and gotofffuncdesc12.
1226         (parse_s12): Likewise.
1227         2003-08-04  Alexandre Oliva  <aoliva@redhat.com>
1228         * frv-asm.c (parse_ulo16): Parse gotlo and gotfuncdesclo.
1229         (parse_uslo16): Likewise.
1230         (parse_uhi16): Parse gothi and gotfuncdeschi.
1231         (parse_d12): Parse got12 and gotfuncdesc12.
1232         (parse_s12): Likewise.
1233
1234 2004-01-02  Albert Bartoszko  <albar@nt.kegel.com.pl>
1235
1236         * msp430-dis.c (msp430_doubleoperand): Check for an 'add'
1237         instruction which looks similar to an 'rla' instruction.
1238
1239 For older changes see ChangeLog-0203
1240 \f
1241 Local Variables:
1242 mode: change-log
1243 left-margin: 8
1244 fill-column: 74
1245 version-control: never
1246 End: