Reimplement .no87/.nommx/.nosse/.noavx directives
[deliverable/binutils-gdb.git] / opcodes / ChangeLog
1 2016-05-25 H.J. Lu <hongjiu.lu@intel.com>
2
3 * i386-gen.c (cpu_flag_init): Rename CPU_ANY87_FLAGS to
4 CPU_ANY_X87_FLAGS. Add CPU_ANY_MMX_FLAGS.
5 * i386-init.h: Regenerated.
6
7 2016-05-23 Claudiu Zissulescu <claziss@synopsys.com>
8
9 * arc-dis.c (print_flags): Set branch_delay_insns, and insn_type
10 information.
11 (print_insn_arc): Set insn_type information.
12 * arc-opc.c (C_CC): Add F_CLASS_COND.
13 * arc-tbl.h (bbit0, bbit1): Update subclass to COND.
14 (beq_s, bge_s, bgt_s, bhi_s, bhs_s): Likewise.
15 (ble_s, blo_s, bls_s, blt_s, bne_s): Likewise.
16 (breq, breq_s, brge, brhs, brlo, brlt): Likewise.
17 (brne, brne_s, jeq_s, jne_s): Likewise.
18
19 2016-05-23 Claudiu Zissulescu <claziss@synopsys.com>
20
21 * arc-tbl.h (neg): New instruction variant.
22
23 2016-05-23 Cupertino Miranda <cmiranda@synopsys.com>
24
25 * arc-dis.c (find_format, find_format, get_auxreg)
26 (print_insn_arc): Changed.
27 * arc-ext.h (INSERT_XOP): Likewise.
28
29 2016-05-23 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
30
31 * tic54x-dis.c (sprint_mmr): Adjust.
32 * tic54x-opc.c: Likewise.
33
34 2016-05-19 Alan Modra <amodra@gmail.com>
35
36 * ppc-opc.c (NSISIGNOPT): Use insert_nsi and extract_nsi.
37
38 2016-05-19 Alan Modra <amodra@gmail.com>
39
40 * ppc-opc.c: Formatting.
41 (NSISIGNOPT): Define.
42 (powerpc_opcodes <subis>): Use NSISIGNOPT.
43
44 2016-05-18 Maciej W. Rozycki <macro@imgtec.com>
45
46 * mips-dis.c (is_compressed_mode_p): Add `micromips_p' operand,
47 replacing references to `micromips_ase' throughout.
48 (_print_insn_mips): Don't use file-level microMIPS annotation to
49 determine the disassembly mode with the symbol table.
50
51 2016-05-13 Peter Bergner <bergner@vnet.ibm.com>
52
53 * ppc-opc.c (IMM8): Use PPC_OPERAND_SIGNOPT.
54
55 2016-05-11 Andrew Bennett <andrew.bennett@imgtec.com>
56
57 * mips-dis.c (mips_arch_choices): Add ASE_DSPR3 to mips32r6 and
58 mips64r6.
59 * mips-opc.c (D34): New macro.
60 (mips_builtin_opcodes): Define bposge32c for DSPr3.
61
62 2016-05-10 Alexander Fomin <alexander.fomin@intel.com>
63
64 * i386-dis.c (prefix_table): Add RDPID instruction.
65 * i386-gen.c (cpu_flag_init): Add RDPID flag.
66 (cpu_flags): Add RDPID bitfield.
67 * i386-opc.h (enum): Add RDPID element.
68 (i386_cpu_flags): Add RDPID field.
69 * i386-opc.tbl: Add RDPID instruction.
70 * i386-init.h: Regenerate.
71 * i386-tbl.h: Regenerate.
72
73 2016-05-10 Thomas Preud'homme <thomas.preudhomme@arm.com>
74
75 * arm-dis.c (get_sym_code_type): Use ARM_GET_SYM_BRANCH_TYPE to get
76 branch type of a symbol.
77 (print_insn): Likewise.
78
79 2016-05-10 Thomas Preud'homme <thomas.preudhomme@arm.com>
80
81 * arm-dis.c (coprocessor_opcodes): Add entries for VFP ARMv8-M
82 Mainline Security Extensions instructions.
83 (thumb_opcodes): Add entries for narrow ARMv8-M Security
84 Extensions instructions.
85 (thumb32_opcodes): Add entries for wide ARMv8-M Security Extensions
86 instructions.
87 (psr_name): Add new MSP_NS and PSP_NS ARMv8-M Security Extensions
88 special registers.
89
90 2016-05-09 Jose E. Marchesi <jose.marchesi@oracle.com>
91
92 * sparc-opc.c (sparc_opcodes): Fix mnemonic of faligndatai.
93
94 2016-05-03 Claudiu Zissulescu <claziss@synopsys.com>
95
96 * arc-ext.c (dump_ARC_extmap): Handle SYNATX_NOP and SYNTAX_1OP.
97 (arcExtMap_genOpcode): Likewise.
98 * arc-opc.c (arg_32bit_rc): Define new variable.
99 (arg_32bit_u6): Likewise.
100 (arg_32bit_limm): Likewise.
101
102 2016-05-03 Szabolcs Nagy <szabolcs.nagy@arm.com>
103
104 * aarch64-gen.c (VERIFIER): Define.
105 * aarch64-opc.c (VERIFIER): Define.
106 (verify_ldpsw): Use static linkage.
107 * aarch64-opc.h (verify_ldpsw): Remove.
108 * aarch64-tbl.h: Use VERIFIER for verifiers.
109
110 2016-04-28 Nick Clifton <nickc@redhat.com>
111
112 PR target/19722
113 * aarch64-dis.c (aarch64_opcode_decode): Run verifier if present.
114 * aarch64-opc.c (verify_ldpsw): New function.
115 * aarch64-opc.h (verify_ldpsw): New prototype.
116 * aarch64-tbl.h: Add initialiser for verifier field.
117 (LDPSW): Set verifier to verify_ldpsw.
118
119 2016-04-23 H.J. Lu <hongjiu.lu@intel.com>
120
121 PR binutils/19983
122 PR binutils/19984
123 * i386-dis.c (print_insn): Return -1 if size of bfd_vma is
124 smaller than address size.
125
126 2016-04-20 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
127
128 * alpha-dis.c: Regenerate.
129 * crx-dis.c: Likewise.
130 * disassemble.c: Likewise.
131 * epiphany-opc.c: Likewise.
132 * fr30-opc.c: Likewise.
133 * frv-opc.c: Likewise.
134 * ip2k-opc.c: Likewise.
135 * iq2000-opc.c: Likewise.
136 * lm32-opc.c: Likewise.
137 * lm32-opinst.c: Likewise.
138 * m32c-opc.c: Likewise.
139 * m32r-opc.c: Likewise.
140 * m32r-opinst.c: Likewise.
141 * mep-opc.c: Likewise.
142 * mt-opc.c: Likewise.
143 * or1k-opc.c: Likewise.
144 * or1k-opinst.c: Likewise.
145 * tic80-opc.c: Likewise.
146 * xc16x-opc.c: Likewise.
147 * xstormy16-opc.c: Likewise.
148
149 2016-04-19 Andrew Burgess <andrew.burgess@embecosm.com>
150
151 * arc-nps400-tbl.h: Add addb, subb, adcb, sbcb, andb, xorb, orb,
152 fxorb, wxorb, shlb, shrb, notb, cntbb, div, mod, divm, qcmp,
153 calcsd, and calcxd instructions.
154 * arc-opc.c (insert_nps_bitop_size): Delete.
155 (extract_nps_bitop_size): Delete.
156 (MAKE_SRC_POS_INSERT_EXTRACT_FUNCS): Define, and use.
157 (extract_nps_qcmp_m3): Define.
158 (extract_nps_qcmp_m2): Define.
159 (extract_nps_qcmp_m1): Define.
160 (arc_flag_operands): Add F_NPS_SX, F_NPS_AR, F_NPS_AL.
161 (arc_flag_classes): Add C_NPS_SX, C_NPS_AR_AL
162 (arc_operands): Add NPS_SRC2_POS, NPS_SRC1_POS, NPS_ADDB_SIZE,
163 NPS_ANDB_SIZE, NPS_FXORB_SIZ, NPS_WXORB_SIZ, NPS_R_XLDST,
164 NPS_DIV_UIMM4, NPS_QCMP_SIZE, NPS_QCMP_M1, NPS_QCMP_M2, and
165 NPS_QCMP_M3.
166
167 2016-04-19 Andrew Burgess <andrew.burgess@embecosm.com>
168
169 * arc-nps400-tbl.h: Add dctcp, dcip, dcet, and dcacl instructions.
170
171 2016-04-15 H.J. Lu <hongjiu.lu@intel.com>
172
173 * Makefile.in: Regenerated with automake 1.11.6.
174 * aclocal.m4: Likewise.
175
176 2016-04-14 Andrew Burgess <andrew.burgess@embecosm.com>
177
178 * arc-nps400-tbl.h: Add xldb, xldw, xld, xstb, xstw, and xst
179 instructions.
180 * arc-opc.c (insert_nps_cmem_uimm16): New function.
181 (extract_nps_cmem_uimm16): New function.
182 (arc_operands): Add NPS_XLDST_UIMM16 operand.
183
184 2016-04-14 Andrew Burgess <andrew.burgess@embecosm.com>
185
186 * arc-dis.c (arc_insn_length): New function.
187 (print_insn_arc): Use arc_insn_length, change insnLen to unsigned.
188 (find_format): Change insnLen parameter to unsigned.
189
190 2016-04-13 Nick Clifton <nickc@redhat.com>
191
192 PR target/19937
193 * v850-opc.c (v850_opcodes): Correct masks for long versions of
194 the LD.B and LD.BU instructions.
195
196 2016-04-12 Claudiu Zissulescu <claziss@synopsys.com>
197
198 * arc-dis.c (find_format): Check for extension flags.
199 (print_flags): New function.
200 (print_insn_arc): Update for .extCondCode, .extCoreRegister and
201 .extAuxRegister.
202 * arc-ext.c (arcExtMap_coreRegName): Use
203 LAST_EXTENSION_CORE_REGISTER.
204 (arcExtMap_coreReadWrite): Likewise.
205 (dump_ARC_extmap): Update printing.
206 * arc-opc.c (arc_flag_classes): Add F_CLASS_EXTEND flag.
207 (arc_aux_regs): Add cpu field.
208 * arc-regs.h: Add cpu field, lower case name aux registers.
209
210 2016-04-12 Claudiu Zissulescu <claziss@synopsys.com>
211
212 * arc-tbl.h: Add rtsc, sleep with no arguments.
213
214 2016-04-12 Claudiu Zissulescu <claziss@synopsys.com>
215
216 * arc-opc.c (flags_none, flags_f, flags_cc, flags_ccf):
217 Initialize.
218 (arg_none, arg_32bit_rarbrc, arg_32bit_zarbrc, arg_32bit_rbrbrc)
219 (arg_32bit_rarbu6, arg_32bit_zarbu6, arg_32bit_rbrbu6)
220 (arg_32bit_rbrbs12, arg_32bit_ralimmrc, arg_32bit_rarblimm)
221 (arg_32bit_zalimmrc, arg_32bit_zarblimm, arg_32bit_rbrblimm)
222 (arg_32bit_ralimmu6, arg_32bit_zalimmu6, arg_32bit_zalimms12)
223 (arg_32bit_ralimmlimm, arg_32bit_zalimmlimm, arg_32bit_rbrc)
224 (arg_32bit_zarc, arg_32bit_rbu6, arg_32bit_zau6, arg_32bit_rblimm)
225 (arg_32bit_zalimm, arg_32bit_limmrc, arg_32bit_limmu6)
226 (arg_32bit_limms12, arg_32bit_limmlimm): Likewise.
227 (arc_opcode arc_opcodes): Null terminate the array.
228 (arc_num_opcodes): Remove.
229 * arc-ext.h (INSERT_XOP): Define.
230 (extInstruction_t): Likewise.
231 (arcExtMap_instName): Delete.
232 (arcExtMap_insn): New function.
233 (arcExtMap_genOpcode): Likewise.
234 * arc-ext.c (ExtInstruction): Remove.
235 (create_map): Zero initialize instruction fields.
236 (arcExtMap_instName): Remove.
237 (arcExtMap_insn): New function.
238 (dump_ARC_extmap): More info while debuging.
239 (arcExtMap_genOpcode): New function.
240 * arc-dis.c (find_format): New function.
241 (print_insn_arc): Use find_format.
242 (arc_get_disassembler): Enable dump_ARC_extmap only when
243 debugging.
244
245 2016-04-11 Maciej W. Rozycki <macro@imgtec.com>
246
247 * mips-dis.c (print_mips16_insn_arg): Mask unused extended
248 instruction bits out.
249
250 2016-04-07 Andrew Burgess <andrew.burgess@embecosm.com>
251
252 * arc-nps400-tbl.h: Add schd, sync, and hwschd instructions.
253 * arc-opc.c (arc_flag_operands): Add new flags.
254 (arc_flag_classes): Add new classes.
255
256 2016-04-07 Andrew Burgess <andrew.burgess@embecosm.com>
257
258 * arc-opc.c (arc_opcodes): Extend comment to discus table layout.
259
260 2016-04-05 Andrew Burgess <andrew.burgess@embecosm.com>
261
262 * arc-nps400-tbl.h: Add movbi, decode1, fbset, fbclear, encode0,
263 encode1, rflt, crc16, and crc32 instructions.
264 * arc-opc.c (arc_flag_operands): Add F_NPS_R.
265 (arc_flag_classes): Add C_NPS_R.
266 (insert_nps_bitop_size_2b): New function.
267 (extract_nps_bitop_size_2b): Likewise.
268 (insert_nps_bitop_uimm8): Likewise.
269 (extract_nps_bitop_uimm8): Likewise.
270 (arc_operands): Add new operand entries.
271
272 2016-04-05 Claudiu Zissulescu <claziss@synopsys.com>
273
274 * arc-regs.h: Add a new subclass field. Add double assist
275 accumulator register values.
276 * arc-tbl.h: Use DPA subclass to mark the double assist
277 instructions. Use DPX/SPX subclas to mark the FPX instructions.
278 * arc-opc.c (RSP): Define instead of SP.
279 (arc_aux_regs): Add the subclass field.
280
281 2016-04-05 Jiong Wang <jiong.wang@arm.com>
282
283 * arm-dis.c: Support FP16 vmul, vmla, vmls (by scalar).
284
285 2016-03-31 Andrew Burgess <andrew.burgess@embecosm.com>
286
287 * arc-opc.c (arc_operands): Fix operand flags for NPS_R_DST, and
288 NPS_R_SRC1.
289
290 2016-03-30 Andrew Burgess <andrew.burgess@embecosm.com>
291
292 * arc-nps400-tbl.h: Add a header comment, and fix some whitespace
293 issues. No functional changes.
294
295 2016-03-30 Claudiu Zissulescu <claziss@synopsys.com>
296
297 * arc-regs.h (IC_RAM_ADDRESS, IC_TAG, IC_WP, IC_DATA, CONTROL0)
298 (AX2, AY2, MX2, MY2, AY0, AY1, DC_RAM_ADDR, DC_TAG, CONTROL1)
299 (RTT): Remove duplicate.
300 (LCDINSTR, LCDDATA, LCDSTAT, CC_*, PCT_COUNT*, PCT_SNAP*)
301 (PCT_CONFIG*): Remove.
302 (D1L, D1H, D2H, D2L): Define.
303
304 2016-03-29 Claudiu Zissulescu <claziss@synopsys.com>
305
306 * arc-ext-tbl.h (dsp_fp_i2flt): Fix typo.
307
308 2016-03-29 Claudiu Zissulescu <claziss@synopsys.com>
309
310 * arc-tbl.h (invld07): Remove.
311 * arc-ext-tbl.h: New file.
312 * arc-dis.c (FIELDA, FIELDB, FIELDC): Remove.
313 * arc-opc.c (arc_opcodes): Add ext-tbl include.
314
315 2016-03-24 Jan Kratochvil <jan.kratochvil@redhat.com>
316
317 Fix -Wstack-usage warnings.
318 * aarch64-dis.c (print_operands): Substitute size.
319 * aarch64-opc.c (print_register_offset_address): Substitute tblen.
320
321 2016-03-22 Jose E. Marchesi <jose.marchesi@oracle.com>
322
323 * sparc-opc.c (sparc_opcodes): Reorder entries for `rd' in order
324 to get a proper diagnostic when an invalid ASR register is used.
325
326 2016-03-22 Nick Clifton <nickc@redhat.com>
327
328 * configure: Regenerate.
329
330 2016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
331
332 * arc-nps400-tbl.h: New file.
333 * arc-opc.c: Add top level comment.
334 (insert_nps_3bit_dst): New function.
335 (extract_nps_3bit_dst): New function.
336 (insert_nps_3bit_src2): New function.
337 (extract_nps_3bit_src2): New function.
338 (insert_nps_bitop_size): New function.
339 (extract_nps_bitop_size): New function.
340 (arc_flag_operands): Add nps400 entries.
341 (arc_flag_classes): Add nps400 entries.
342 (arc_operands): Add nps400 entries.
343 (arc_opcodes): Add nps400 include.
344
345 2016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
346
347 * arc-opc.c (arc_flag_classes): Convert all flag classes to use
348 the new class enum values.
349
350 2016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
351
352 * arc-dis.c (print_insn_arc): Handle nps400.
353
354 2016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
355
356 * arc-opc.c (BASE): Delete.
357
358 2016-03-18 Nick Clifton <nickc@redhat.com>
359
360 PR target/19721
361 * aarch64-tbl.h (aarch64_opcode_table): Fix type of second operand
362 of MOV insn that aliases an ORR insn.
363
364 2016-03-16 Jiong Wang <jiong.wang@arm.com>
365
366 * arm-dis.c (neon_opcodes): Support new FP16 instructions.
367
368 2016-03-07 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
369
370 * mcore-opc.h: Add const qualifiers.
371 * microblaze-opc.h (struct op_code_struct): Likewise.
372 * sh-opc.h: Likewise.
373 * tic4x-dis.c (tic4x_print_indirect): Likewise.
374 (tic4x_print_op): Likewise.
375
376 2016-03-02 Alan Modra <amodra@gmail.com>
377
378 * or1k-desc.h: Regenerate.
379 * fr30-ibld.c: Regenerate.
380 * rl78-decode.c: Regenerate.
381
382 2016-03-01 Nick Clifton <nickc@redhat.com>
383
384 PR target/19747
385 * rl78-dis.c (print_insn_rl78_common): Fix typo.
386
387 2016-02-24 Renlin Li <renlin.li@arm.com>
388
389 * arm-dis.c (coprocessor_opcodes): Add fp16 instruction entries.
390 (print_insn_coprocessor): Support fp16 instructions.
391
392 2016-02-24 Renlin Li <renlin.li@arm.com>
393
394 * arm-dis.c (print_insn_coprocessor): Fix mask for vsel, vmaxnm,
395 vminnm, vrint(mpna).
396
397 2016-02-24 Renlin Li <renlin.li@arm.com>
398
399 * arm-dis.c (print_insn_coprocessor): Check co-processor number for
400 cpd/cpd2, mcr/mcr2, mrc/mrc2, ldc/ldc2, stc/stc2.
401
402 2016-02-15 H.J. Lu <hongjiu.lu@intel.com>
403
404 * i386-dis.c (print_insn): Parenthesize expression to prevent
405 truncated addresses.
406 (OP_J): Likewise.
407
408 2016-02-10 Claudiu Zissulescu <claziss@synopsys.com>
409 Janek van Oirschot <jvanoirs@synopsys.com>
410
411 * arc-opc.c (arc_relax_opcodes, arc_num_relax_opcodes): New
412 variable.
413
414 2016-02-04 Nick Clifton <nickc@redhat.com>
415
416 PR target/19561
417 * msp430-dis.c (print_insn_msp430): Add a special case for
418 decoding an RRC instruction with the ZC bit set in the extension
419 word.
420
421 2016-02-02 Andrew Burgess <andrew.burgess@embecosm.com>
422
423 * cgen-ibld.in (insert_normal): Rework calculation of shift.
424 * epiphany-ibld.c: Regenerate.
425 * fr30-ibld.c: Regenerate.
426 * frv-ibld.c: Regenerate.
427 * ip2k-ibld.c: Regenerate.
428 * iq2000-ibld.c: Regenerate.
429 * lm32-ibld.c: Regenerate.
430 * m32c-ibld.c: Regenerate.
431 * m32r-ibld.c: Regenerate.
432 * mep-ibld.c: Regenerate.
433 * mt-ibld.c: Regenerate.
434 * or1k-ibld.c: Regenerate.
435 * xc16x-ibld.c: Regenerate.
436 * xstormy16-ibld.c: Regenerate.
437
438 2016-02-02 Andrew Burgess <andrew.burgess@embecosm.com>
439
440 * epiphany-dis.c: Regenerated from latest cpu files.
441
442 2016-02-01 Michael McConville <mmcco@mykolab.com>
443
444 * cgen-dis.c (count_decodable_bits): Use unsigned value for mask
445 test bit.
446
447 2016-01-25 Renlin Li <renlin.li@arm.com>
448
449 * arm-dis.c (mapping_symbol_for_insn): New function.
450 (find_ifthen_state): Call mapping_symbol_for_insn().
451
452 2016-01-20 Matthew Wahab <matthew.wahab@arm.com>
453
454 * aarch64-opc.c (operand_general_constraint_met_p): Check validity
455 of MSR UAO immediate operand.
456
457 2016-01-18 Maciej W. Rozycki <macro@imgtec.com>
458
459 * mips-dis.c (print_insn_micromips): Remove 48-bit microMIPS
460 instruction support.
461
462 2016-01-17 Alan Modra <amodra@gmail.com>
463
464 * configure: Regenerate.
465
466 2016-01-14 Nick Clifton <nickc@redhat.com>
467
468 * rl78-decode.opc (rl78_decode_opcode): Add 's' operand to movw
469 instructions that can support stack pointer operations.
470 * rl78-decode.c: Regenerate.
471 * rl78-dis.c: Fix display of stack pointer in MOVW based
472 instructions.
473
474 2016-01-14 Matthew Wahab <matthew.wahab@arm.com>
475
476 * aarch64-opc.c (aarch64_sys_reg_supported_p): Merge conditionals
477 testing for RAS support. Add checks for erxfr_el1, erxctlr_el1,
478 erxtatus_el1 and erxaddr_el1.
479
480 2016-01-12 Matthew Wahab <matthew.wahab@arm.com>
481
482 * arm-dis.c (arm_opcodes): Add "esb".
483 (thumb_opcodes): Likewise.
484
485 2016-01-11 Peter Bergner <bergner@vnet.ibm.com>
486
487 * ppc-opc.c <xscmpnedp>: Delete.
488 <xvcmpnedp>: Likewise.
489 <xvcmpnedp.>: Likewise.
490 <xvcmpnesp>: Likewise.
491 <xvcmpnesp.>: Likewise.
492
493 2016-01-08 Andreas Schwab <schwab@linux-m68k.org>
494
495 PR gas/13050
496 * m68k-opc.c (moveb, movew): For ISA_B/C only allow #,d(An) in
497 addition to ISA_A.
498
499 2016-01-01 Alan Modra <amodra@gmail.com>
500
501 Update year range in copyright notice of all files.
502
503 For older changes see ChangeLog-2015
504 \f
505 Copyright (C) 2016 Free Software Foundation, Inc.
506
507 Copying and distribution of this file, with or without modification,
508 are permitted in any medium without royalty provided the copyright
509 notice and this notice are preserved.
510
511 Local Variables:
512 mode: change-log
513 left-margin: 8
514 fill-column: 74
515 version-control: never
516 End:
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