opcodes/ChangeLog

   1 2005-07-05  Jan Beulich  <jbeulich@novell.com>
   2
   3         * i386-dis.c (SVME_Fixup): New.
   4         (grps): Use it for the lidt entry.
   5         (PNI_Fixup): Call OP_M rather than OP_E.
   6         (INVLPG_Fixup): Likewise.
   7
   8 2005-07-04  H.J. Lu  <hongjiu.lu@intel.com>
   9
  10         * tic30-dis.c (cnvt_tmsfloat_ieee): Use HUGE_VALF if defined.
  11
  12 2005-07-01  Nick Clifton  <nickc@redhat.com>
  13
  14         * a29k-dis.c: Update to ISO C90 style function declarations and
  15         fix formatting.
  16         * alpha-opc.c: Likewise.
  17         * arc-dis.c: Likewise.
  18         * arc-opc.c: Likewise.
  19         * avr-dis.c: Likewise.
  20         * cgen-asm.in: Likewise.
  21         * cgen-dis.in: Likewise.
  22         * cgen-ibld.in: Likewise.
  23         * cgen-opc.c: Likewise.
  24         * cris-dis.c: Likewise.
  25         * d10v-dis.c: Likewise.
  26         * d30v-dis.c: Likewise.
  27         * d30v-opc.c: Likewise.
  28         * dis-buf.c: Likewise.
  29         * dlx-dis.c: Likewise.
  30         * h8300-dis.c: Likewise.
  31         * h8500-dis.c: Likewise.
  32         * hppa-dis.c: Likewise.
  33         * i370-dis.c: Likewise.
  34         * i370-opc.c: Likewise.
  35         * m10200-dis.c: Likewise.
  36         * m10300-dis.c: Likewise.
  37         * m68k-dis.c: Likewise.
  38         * m88k-dis.c: Likewise.
  39         * mips-dis.c: Likewise.
  40         * mmix-dis.c: Likewise.
  41         * msp430-dis.c: Likewise.
  42         * ns32k-dis.c: Likewise.
  43         * or32-dis.c: Likewise.
  44         * or32-opc.c: Likewise.
  45         * pdp11-dis.c: Likewise.
  46         * pj-dis.c: Likewise.
  47         * s390-dis.c: Likewise.
  48         * sh-dis.c: Likewise.
  49         * sh64-dis.c: Likewise.
  50         * sparc-dis.c: Likewise.
  51         * sparc-opc.c: Likewise.
  52         * sysdep.h: Likewise.
  53         * tic30-dis.c: Likewise.
  54         * tic4x-dis.c: Likewise.
  55         * tic80-dis.c: Likewise.
  56         * v850-dis.c: Likewise.
  57         * v850-opc.c: Likewise.
  58         * vax-dis.c: Likewise.
  59         * w65-dis.c: Likewise.
  60         * z8kgen.c: Likewise.
  61
  62         * fr30-*: Regenerate.
  63         * frv-*: Regenerate.
  64         * ip2k-*: Regenerate.
  65         * iq2000-*: Regenerate.
  66         * m32r-*: Regenerate.
  67         * ms1-*: Regenerate.
  68         * openrisc-*: Regenerate.
  69         * xstormy16-*: Regenerate.
  70
  71 2005-06-23  Ben Elliston  <bje@gnu.org>
  72
  73         * m68k-dis.c: Use ISC C90.
  74         * m68k-opc.c: Formatting fixes.
  75
  76 2005-06-16  David Ung  <davidu@mips.com>
  77
  78         * mips16-opc.c (mips16_opcodes): Add the following MIPS16e
  79         instructions to the table; seb/seh/sew/zeb/zeh/zew.
  80
  81 2005-06-15  Dave Brolley  <brolley@redhat.com>
  82
  83         Contribute Morpho ms1 on behalf of Red Hat
  84         * ms1-asm.c, ms1-desc.c, ms1-dis.c, ms1-ibld.c, ms1-opc.c,
  85         ms1-opc.h: New files, Morpho ms1 target.
  86
  87         2004-05-14  Stan Cox  <scox@redhat.com>
  88
  89         * disassemble.c (ARCH_ms1): Define.
  90         (disassembler): Handle bfd_arch_ms1
  91
  92         2004-05-13  Michael Snyder  <msnyder@redhat.com>
  93
  94         * Makefile.am, Makefile.in: Add ms1 target.
  95         * configure.in: Ditto.
  96
  97 2005-06-08  Zack Weinberg  <zack@codesourcery.com>
  98
  99         * arm-opc.h: Delete; fold contents into ...
 100         * arm-dis.c: ... here.  Move includes of internal COFF headers
 101         next to includes of internal ELF headers.
 102         (streq, WORD_ADDRESS, BDISP, BDISP23): Delete, unused.
 103         (struct arm_opcode): Rename struct opcode32.  Make 'assembler' const.
 104         (struct thumb_opcode): Rename struct opcode16.  Make 'assembler' const.
 105         (arm_conditional, arm_fp_const, arm_shift, arm_regname, regnames)
 106         (iwmmxt_wwnames, iwmmxt_wwssnames):
 107         Make const.
 108         (regnames): Remove iWMMXt coprocessor register sets.
 109         (iwmmxt_regnames, iwmmxt_cregnames): New statics.
 110         (get_arm_regnames): Adjust fourth argument to match above changes.
 111         (set_iwmmxt_regnames): Delete.
 112         (print_insn_arm): Constify 'c'.  Use ISO syntax for function
 113         pointer calls.  Expand sole use of BDISP.  Use iwmmxt_regnames
 114         and iwmmxt_cregnames, not set_iwmmxt_regnames.
 115         (print_insn_thumb16, print_insn_thumb32): Constify 'c'.  Use
 116         ISO syntax for function pointer calls.
 117
 118 2005-06-07  Zack Weinberg  <zack@codesourcery.com>
 119
 120         * arm-dis.c: Split up the comments describing the format codes, so
 121         that the ARM and 16-bit Thumb opcode tables each have comments
 122         preceding them that describe all the codes, and only the codes,
 123         valid in those tables.  (32-bit Thumb table is already like this.)
 124         Reorder the lists in all three comments to match the order in
 125         which the codes are implemented.
 126         Remove all forward declarations of static functions.  Convert all
 127         function definitions to ISO C format.
 128         (print_insn_arm, print_insn_thumb16, print_insn_thumb32):
 129         Return nothing.
 130         (print_insn_thumb16): Remove unused case 'I'.
 131         (print_insn): Update for changed calling convention of subroutines.
 132
 133 2005-05-25  Jan Beulich  <jbeulich@novell.com>
 134
 135         * i386-dis.c (OP_E): In Intel mode, display 32-bit displacements in
 136         hex (but retain it being displayed as signed). Remove redundant
 137         checks. Add handling of displacements for 16-bit addressing in Intel
 138         mode.
 139
 140 2005-05-25  Jan Beulich  <jbeulich@novell.com>
 141
 142         * i386-dis.c (prefix_name): Remove pointless mode_64bit check.
 143         (OP_E): Remove redundant REX_EXTZ handling. Remove pointless
 144         masking of 'rm' in 16-bit memory address handling.
 145
 146 2005-05-19  Anton Blanchard  <anton@samba.org>
 147
 148         * ppc-dis.c (powerpc_dialect): Handle "-Mpower5".
 149         (print_ppc_disassembler_options): Document it.
 150         * ppc-opc.c (SVC_LEV): Define.
 151         (LEV): Allow optional operand.
 152         (POWER5): Define.
 153         (powerpc_opcodes): Extend "sc".  Adjust "svc" and "svcl".  Add
 154         "hrfid", "popcntb", "fsqrtes", "fsqrtes.", "fre" and "fre.".
 155
 156 2005-05-19  Kelley Cook  <kcook@gcc.gnu.org>
 157
 158         * Makefile.in:  Regenerate.
 159
 160 2005-05-17  Zack Weinberg  <zack@codesourcery.com>
 161
 162         * arm-dis.c (thumb_opcodes): Add disassembly for V6T2 16-bit
 163         instructions.  Adjust disassembly of some opcodes to match
 164         unified syntax.
 165         (thumb32_opcodes): New table.
 166         (print_insn_thumb): Rename print_insn_thumb16; don't handle
 167         two-halfword branches here.
 168         (print_insn_thumb32): New function.
 169         (print_insn): Choose among print_insn_arm, print_insn_thumb16,
 170         and print_insn_thumb32.  Be consistent about order of
 171         halfwords when printing 32-bit instructions.
 172
 173 2005-05-07  H.J. Lu  <hongjiu.lu@intel.com>
 174
 175         PR 843
 176         * i386-dis.c (branch_v_mode): New.
 177         (indirEv): Use branch_v_mode instead of v_mode.
 178         (OP_E): Handle branch_v_mode.
 179
 180 2005-05-07  H.J. Lu  <hongjiu.lu@intel.com>
 181
 182         * d10v-dis.c (dis_2_short): Support 64bit host.
 183
 184 2005-05-07  Nick Clifton  <nickc@redhat.com>
 185
 186         * po/nl.po: Updated translation.
 187
 188 2005-05-07  Nick Clifton  <nickc@redhat.com>
 189
 190         * Update the address and phone number of the FSF organization in
 191         the GPL notices in the following files:
 192         a29k-dis.c, aclocal.m4, alpha-dis.c, alpha-opc.c, arc-dis.c,
 193         arc-dis.h, arc-ext.c, arc-ext.h, arc-opc.c, arm-dis.c, arm-opc.h,
 194         avr-dis.c, cgen-asm.c, cgen-asm.in, cgen-dis.c, cgen-dis.in,
 195         cgen-ibld.in, cgen-opc.c, cgen.sh, cris-dis.c, cris-opc.c,
 196         crx-dis.c, crx-opc.c, d10v-dis.c, d10v-opc.c, d30v-dis.c,
 197         d30v-opc.c, dis-buf.c, dis-init.c, disassemble.c, dlx-dis.c,
 198         fr30-asm.c, fr30-desc.c, fr30-desc.h, fr30-dis.c, fr30-ibld.c,
 199         fr30-opc.c, fr30-opc.h, frv-asm.c, frv-desc.c, frv-desc.h,
 200         frv-dis.c, frv-ibld.c, frv-opc.c, frv-opc.h, h8300-dis.c,
 201         h8500-dis.c, h8500-opc.h, hppa-dis.c, i370-dis.c, i370-opc.c,
 202         i386-dis.c, i860-dis.c, i960-dis.c, ia64-asmtab.h, ia64-dis.c,
 203         ia64-gen.c, ia64-opc-a.c, ia64-opc-b.c, ia64-opc-d.c,
 204         ia64-opc-f.c, ia64-opc-i.c, ia64-opc-m.c, ia64-opc-x.c,
 205         ia64-opc.c, ia64-opc.h, ip2k-asm.c, ip2k-desc.c, ip2k-desc.h,
 206         ip2k-dis.c, ip2k-ibld.c, ip2k-opc.c, ip2k-opc.h, iq2000-asm.c,
 207         iq2000-desc.c, iq2000-desc.h, iq2000-dis.c, iq2000-ibld.c,
 208         iq2000-opc.c, iq2000-opc.h, m10200-dis.c, m10200-opc.c,
 209         m10300-dis.c, m10300-opc.c, m32r-asm.c, m32r-desc.c, m32r-desc.h,
 210         m32r-dis.c, m32r-ibld.c, m32r-opc.c, m32r-opc.h, m32r-opinst.c,
 211         m68hc11-dis.c, m68hc11-opc.c, m68k-dis.c, m68k-opc.c, m88k-dis.c,
 212         maxq-dis.c, mcore-dis.c, mcore-opc.h, mips-dis.c, mips-opc.c,
 213         mips16-opc.c, mmix-dis.c, mmix-opc.c, msp430-dis.c, ns32k-dis.c,
 214         openrisc-asm.c, openrisc-desc.c, openrisc-desc.h, openrisc-dis.c,
 215         openrisc-ibld.c, openrisc-opc.c, openrisc-opc.h, opintl.h,
 216         or32-dis.c, or32-opc.c, pdp11-dis.c, pdp11-opc.c, pj-dis.c,
 217         pj-opc.c, ppc-dis.c, ppc-opc.c, s390-dis.c, s390-mkopc.c,
 218         s390-opc.c, sh-dis.c, sh-opc.h, sh64-dis.c, sh64-opc.c,
 219         sh64-opc.h, sparc-dis.c, sparc-opc.c, sysdep.h, tic30-dis.c,
 220         tic4x-dis.c, tic54x-dis.c, tic54x-opc.c, tic80-dis.c, tic80-opc.c,
 221         v850-dis.c, v850-opc.c, vax-dis.c, w65-dis.c, w65-opc.h,
 222         xstormy16-asm.c, xstormy16-desc.c, xstormy16-desc.h,
 223         xstormy16-dis.c, xstormy16-ibld.c, xstormy16-opc.c,
 224         xstormy16-opc.h, xtensa-dis.c, z8k-dis.c, z8kgen.c
 225
 226 2005-05-05  James E Wilson  <wilson@specifixinc.com>
 227
 228         * ia64-opc.c: Include sysdep.h before libiberty.h.
 229
 230 2005-05-05  Nick Clifton  <nickc@redhat.com>
 231
 232         * configure.in (ALL_LINGUAS): Add vi.
 233         * configure: Regenerate.
 234         * po/vi.po: New.
 235
 236 2005-04-26  Jerome Guitton  <guitton@gnat.com>
 237
 238         * configure.in: Fix the check for basename declaration.
 239         * configure: Regenerate.
 240
 241 2005-04-19  Alan Modra  <amodra@bigpond.net.au>
 242
 243         * ppc-opc.c (RTO): Define.
 244         (powerpc_opcodes <tlbsx, tlbsx., tlbre>): Combine PPC403 and BOOKE
 245         entries to suit PPC440.
 246
 247 2005-04-18  Mark Kettenis  <kettenis@gnu.org>
 248
 249         * i386-dis.c: Insert hyphens into selected VIA PadLock extensions.
 250         Add xcrypt-ctr.
 251
 252 2005-04-14  Nick Clifton  <nickc@redhat.com>
 253
 254         * po/fi.po: New translation: Finnish.
 255         * configure.in (ALL_LINGUAS): Add fi.
 256         * configure: Regenerate.
 257
 258 2005-04-14  Alan Modra  <amodra@bigpond.net.au>
 259
 260         * Makefile.am (NO_WERROR): Define.
 261         * configure.in: Invoke AM_BINUTILS_WARNINGS.
 262         * Makefile.in: Regenerate.
 263         * aclocal.m4: Regenerate.
 264         * configure: Regenerate.
 265
 266 2005-04-04  Nick Clifton  <nickc@redhat.com>
 267
 268         * fr30-asm.c: Regenerate.
 269         * frv-asm.c: Regenerate.
 270         * iq2000-asm.c: Regenerate.
 271         * m32r-asm.c: Regenerate.
 272         * openrisc-asm.c: Regenerate.
 273
 274 2005-04-01  Jan Beulich  <jbeulich@novell.com>
 275
 276         * i386-dis.c (PNI_Fixup): Neither mwait nor monitor have any
 277         visible operands in Intel mode. The first operand of monitor is
 278         %rax in 64-bit mode.
 279
 280 2005-04-01  Jan Beulich  <jbeulich@novell.com>
 281
 282         * i386-dis.c (INVLPG_Fixup): Decode rdtscp; change code to allow for
 283         easier future additions.
 284
 285 2005-03-31  Jerome Guitton  <guitton@gnat.com>
 286
 287         * configure.in: Check for basename.
 288         * configure: Regenerate.
 289         * config.in: Ditto.
 290
 291 2005-03-29  H.J. Lu  <hongjiu.lu@intel.com>
 292
 293         * i386-dis.c (SEG_Fixup): New.
 294         (Sv): New.
 295         (dis386): Use "Sv" for 0x8c and 0x8e.
 296
 297 2005-03-21  Jan-Benedict Glaw  <jbglaw@lug-owl.de>
 298             Nick Clifton  <nickc@redhat.com>
 299
 300         * vax-dis.c: (entry_addr): New varible:  An array of user supplied
 301         function entry mask addresses.
 302         (entry_addr_occupied_slots): New variable: The number of occupied
 303         elements in entry_addr.
 304         (entry_addr_total_slots): New variable: The total number of
 305         elements in entry_addr.
 306         (parse_disassembler_options): New function.  Fills in the entry_addr
 307         array.
 308         (free_entry_array): New function.  Release the memory used by the
 309         entry addr array.  Suppressed because there is no way to call it.
 310         (is_function_entry): Check if a given address is a function's
 311         start address by looking at supplied entry mask addresses and
 312         symbol information, if available.
 313         (print_insn_vax): Use parse_disassembler_options and is_function_entry.
 314
 315 2005-03-23  H.J. Lu  <hongjiu.lu@intel.com>
 316
 317         * cris-dis.c (print_with_operands): Use ~31L for long instead
 318         of ~31.
 319
 320 2005-03-20  H.J. Lu  <hongjiu.lu@intel.com>
 321
 322         * mmix-opc.c (O): Revert the last change.
 323         (Z): Likewise.
 324
 325 2005-03-19  H.J. Lu  <hongjiu.lu@intel.com>
 326
 327         * mmix-opc.c (O): Use 24UL instead of 24 for unsigned long.
 328         (Z): Likewise.
 329
 330 2005-03-19  Hans-Peter Nilsson  <hp@bitrange.com>
 331
 332         * mmix-opc.c (O, Z): Force expression as unsigned long.
 333
 334 2005-03-18  Nick Clifton  <nickc@redhat.com>
 335
 336         * ip2k-asm.c: Regenerate.
 337         * op/opcodes.pot: Regenerate.
 338
 339 2005-03-16  Nick Clifton  <nickc@redhat.com>
 340             Ben Elliston  <bje@au.ibm.com>
 341
 342         * configure.in (werror): New switch: Add -Werror to the
 343         compiler command line.  Enabled by default.  Disable via
 344         --disable-werror.
 345         * configure: Regenerate.
 346
 347 2005-03-16  Alan Modra  <amodra@bigpond.net.au>
 348
 349         * ppc-dis.c (powerpc_dialect): Don't set PPC_OPCODE_ALTIVEC when
 350         BOOKE.
 351
 352 2005-03-15  Alan Modra  <amodra@bigpond.net.au>
 353
 354         * po/es.po: Commit new Spanish translation.
 355
 356         * po/fr.po: Commit new French translation.
 357
 358 2005-03-14  Jan-Benedict Glaw  <jbglaw@lug-owl.de>
 359
 360         * vax-dis.c: Fix spelling error
 361         (print_insn_vax): Use ".word 0x0012 # Entry mask: r1 r2 >" instead
 362         of just "Entry mask: < r1 ... >"
 363
 364 2005-03-12  Zack Weinberg  <zack@codesourcery.com>
 365
 366         * arm-dis.c (arm_opcodes): Document %E and %V.
 367         Add entries for v6T2 ARM instructions:
 368         bfc bfi mls strht ldrht ldrsht ldrsbt movw movt rbit ubfx sbfx.
 369         (print_insn_arm): Add support for %E and %V.
 370         (thumb_opcodes): Add ARMv6K instructions nop, sev, wfe, wfi, yield.
 371
 372 2005-03-10  Jeff Baker  <jbaker@qnx.com>
 373             Alan Modra  <amodra@bigpond.net.au>
 374
 375         * ppc-opc.c (insert_sprg, extract_sprg): New Functions.
 376         (powerpc_operands <SPRG>): Call the above.  Bit field is 5 bits.
 377         (SPRG_MASK): Delete.
 378         (XSPRG_MASK): Mask off extra bits now part of sprg field.
 379         (powerpc_opcodes): Asjust mfsprg and mtsprg to suit new mask.  Move
 380         mfsprg4..7 after msprg and consolidate.
 381
 382 2005-03-09  Jan-Benedict Glaw  <jbglaw@lug-owl.de>
 383
 384         * vax-dis.c (entry_mask_bit): New array.
 385         (print_insn_vax): Decode function entry mask.
 386
 387 2005-03-07  Aldy Hernandez  <aldyh@redhat.com>
 388
 389         * ppc-opc.c (powerpc_opcodes): Fix encoding of efscfd.
 390
 391 2005-03-05  Alan Modra  <amodra@bigpond.net.au>
 392
 393         * po/opcodes.pot: Regenerate.
 394
 395 2005-03-03  Ramana Radhakrishnan  <ramana.radhakrishnan@codito.com>
 396
 397         * arc-dis.c (a4_decoding_class): New enum.
 398         (dsmOneArcInst): Use the enum values for the decoding class.
 399         Remove redundant case in the switch for decodingClass value 11.
 400
 401 2005-03-02  Jan Beulich  <jbeulich@novell.com>
 402
 403         * i386-dis.c (print_insn): Suppress lock prefix printing for cr8...15
 404         accesses.
 405         (OP_C): Consider lock prefix in non-64-bit modes.
 406
 407 2005-02-24  Alan Modra  <amodra@bigpond.net.au>
 408
 409         * cris-dis.c (format_hex): Remove ineffective warning fix.
 410         * crx-dis.c (make_instruction): Warning fix.
 411         * frv-asm.c: Regenerate.
 412
 413 2005-02-23  Nick Clifton  <nickc@redhat.com>
 414
 415         * cgen-dis.in: Use bfd_byte for buffers that are passed to
 416         read_memory.
 417
 418         * ia64-opc.c (locate_opcode_ent): Initialise opval array.
 419
 420         * crx-dis.c (make_instruction): Move argument structure into inner
 421         scope and ensure that all of its fields are initialised before
 422         they are used.
 423
 424         * fr30-asm.c: Regenerate.
 425         * fr30-dis.c: Regenerate.
 426         * frv-asm.c: Regenerate.
 427         * frv-dis.c: Regenerate.
 428         * ip2k-asm.c: Regenerate.
 429         * ip2k-dis.c: Regenerate.
 430         * iq2000-asm.c: Regenerate.
 431         * iq2000-dis.c: Regenerate.
 432         * m32r-asm.c: Regenerate.
 433         * m32r-dis.c: Regenerate.
 434         * openrisc-asm.c: Regenerate.
 435         * openrisc-dis.c: Regenerate.
 436         * xstormy16-asm.c: Regenerate.
 437         * xstormy16-dis.c: Regenerate.
 438
 439 2005-02-22  Alan Modra  <amodra@bigpond.net.au>
 440
 441         * arc-ext.c: Warning fixes.
 442         * arc-ext.h: Likewise.
 443         * cgen-opc.c: Likewise.
 444         * ia64-gen.c: Likewise.
 445         * maxq-dis.c: Likewise.
 446         * ns32k-dis.c: Likewise.
 447         * w65-dis.c: Likewise.
 448         * ia64-asmtab.c: Regenerate.
 449
 450 2005-02-22  Alan Modra  <amodra@bigpond.net.au>
 451
 452         * fr30-desc.c: Regenerate.
 453         * fr30-desc.h: Regenerate.
 454         * fr30-opc.c: Regenerate.
 455         * fr30-opc.h: Regenerate.
 456         * frv-desc.c: Regenerate.
 457         * frv-desc.h: Regenerate.
 458         * frv-opc.c: Regenerate.
 459         * frv-opc.h: Regenerate.
 460         * ip2k-desc.c: Regenerate.
 461         * ip2k-desc.h: Regenerate.
 462         * ip2k-opc.c: Regenerate.
 463         * ip2k-opc.h: Regenerate.
 464         * iq2000-desc.c: Regenerate.
 465         * iq2000-desc.h: Regenerate.
 466         * iq2000-opc.c: Regenerate.
 467         * iq2000-opc.h: Regenerate.
 468         * m32r-desc.c: Regenerate.
 469         * m32r-desc.h: Regenerate.
 470         * m32r-opc.c: Regenerate.
 471         * m32r-opc.h: Regenerate.
 472         * m32r-opinst.c: Regenerate.
 473         * openrisc-desc.c: Regenerate.
 474         * openrisc-desc.h: Regenerate.
 475         * openrisc-opc.c: Regenerate.
 476         * openrisc-opc.h: Regenerate.
 477         * xstormy16-desc.c: Regenerate.
 478         * xstormy16-desc.h: Regenerate.
 479         * xstormy16-opc.c: Regenerate.
 480         * xstormy16-opc.h: Regenerate.
 481
 482 2005-02-21  Alan Modra  <amodra@bigpond.net.au>
 483
 484         * Makefile.am: Run "make dep-am"
 485         * Makefile.in: Regenerate.
 486
 487 2005-02-15  Nick Clifton  <nickc@redhat.com>
 488
 489         * cgen-dis.in (print_address): Add an ATTRIBUTE_UNUSED to prevent
 490         compile time warnings.
 491         (print_keyword): Likewise.
 492         (default_print_insn): Likewise.
 493
 494         * fr30-desc.c: Regenerated.
 495         * fr30-desc.h: Regenerated.
 496         * fr30-dis.c: Regenerated.
 497         * fr30-opc.c: Regenerated.
 498         * fr30-opc.h: Regenerated.
 499         * frv-desc.c: Regenerated.
 500         * frv-dis.c: Regenerated.
 501         * frv-opc.c: Regenerated.
 502         * ip2k-asm.c: Regenerated.
 503         * ip2k-desc.c: Regenerated.
 504         * ip2k-desc.h: Regenerated.
 505         * ip2k-dis.c: Regenerated.
 506         * ip2k-opc.c: Regenerated.
 507         * ip2k-opc.h: Regenerated.
 508         * iq2000-desc.c: Regenerated.
 509         * iq2000-dis.c: Regenerated.
 510         * iq2000-opc.c: Regenerated.
 511         * m32r-asm.c: Regenerated.
 512         * m32r-desc.c: Regenerated.
 513         * m32r-desc.h: Regenerated.
 514         * m32r-dis.c: Regenerated.
 515         * m32r-opc.c: Regenerated.
 516         * m32r-opc.h: Regenerated.
 517         * m32r-opinst.c: Regenerated.
 518         * openrisc-desc.c: Regenerated.
 519         * openrisc-desc.h: Regenerated.
 520         * openrisc-dis.c: Regenerated.
 521         * openrisc-opc.c: Regenerated.
 522         * openrisc-opc.h: Regenerated.
 523         * xstormy16-desc.c: Regenerated.
 524         * xstormy16-desc.h: Regenerated.
 525         * xstormy16-dis.c: Regenerated.
 526         * xstormy16-opc.c: Regenerated.
 527         * xstormy16-opc.h: Regenerated.
 528
 529 2005-02-14  H.J. Lu  <hongjiu.lu@intel.com>
 530
 531         * dis-buf.c (perror_memory): Use sprintf_vma to print out
 532         address.
 533
 534 2005-02-11  Nick Clifton  <nickc@redhat.com>
 535
 536         * iq2000-asm.c: Regenerate.
 537
 538         * frv-dis.c: Regenerate.
 539
 540 2005-02-07  Jim Blandy  <jimb@redhat.com>
 541
 542         * Makefile.am (CGEN): Load guile.scm before calling the main
 543         application script.
 544         * Makefile.in: Regenerated.
 545         * cgen.sh: Be prepared for the 'cgen' argument to contain spaces.
 546         Simply pass the cgen-opc.scm path to ${cgen} as its first
 547         argument; ${cgen} itself now contains the '-s', or whatever is
 548         appropriate for the Scheme being used.
 549
 550 2005-01-31  Andrew Cagney  <cagney@gnu.org>
 551
 552         * configure: Regenerate to track ../gettext.m4.
 553
 554 2005-01-31  Jan Beulich  <jbeulich@novell.com>
 555
 556         * ia64-gen.c (NELEMS): Define.
 557         (shrink): Generate alias with missing second predicate register when
 558         opcode has two outputs and these are both predicates.
 559         * ia64-opc-i.c (FULL17): Define.
 560         (ia64_opcodes_i): Add mov-to-pr alias without second input. Use FULL17
 561         here to generate output template.
 562         (TBITCM, TNATCM): Undefine after use.
 563         * ia64-opc-m.c (ia64_opcodes_i): Add alloc alias without ar.pfs as
 564         first input. Add ld16 aliases without ar.csd as second output. Add
 565         st16 aliases without ar.csd as second input. Add cmpxchg aliases
 566         without ar.ccv as third input. Add cmp8xchg16 aliases without ar.csd/
 567         ar.ccv as third/fourth inputs. Consolidate through...
 568         (CMPXCHG_acq, CMPXCHG_rel, CMPXCHG_1, CMPXCHG_2, CMPXCHG_4, CMPXCHG_8,
 569         CMPXCHGn, CMP8XCHG16, CMPXCHG_ALL): Define.
 570         * ia64-asmtab.c: Regenerate.
 571
 572 2005-01-27  Andrew Cagney  <cagney@gnu.org>
 573
 574         * configure: Regenerate to track ../gettext.m4 change.
 575
 576 2005-01-25  Alexandre Oliva  <aoliva@redhat.com>
 577
 578         2004-11-10  Alexandre Oliva  <aoliva@redhat.com>
 579         * frv-asm.c: Rebuilt.
 580         * frv-desc.c: Rebuilt.
 581         * frv-desc.h: Rebuilt.
 582         * frv-dis.c: Rebuilt.
 583         * frv-ibld.c: Rebuilt.
 584         * frv-opc.c: Rebuilt.
 585         * frv-opc.h: Rebuilt.
 586
 587 2005-01-24  Andrew Cagney  <cagney@gnu.org>
 588
 589         * configure: Regenerate, ../gettext.m4 was updated.
 590
 591 2005-01-21  Fred Fish  <fnf@specifixinc.com>
 592
 593         * mips-opc.c:  Change INSN_ALIAS to INSN2_ALIAS.
 594         Change INSN_WRITE_MDMX_ACC to INSN2_WRITE_MDMX_ACC.
 595         Change INSN_READ_MDMX_ACC to INSN2_READ_MDMX_ACC.
 596         * mips-dis.c: Ditto.
 597
 598 2005-01-20  Alan Modra  <amodra@bigpond.net.au>
 599
 600         * ppc-opc.c (powerpc_opcodes): Add optional 'l' arg to tlbiel.
 601
 602 2005-01-19  Fred Fish  <fnf@specifixinc.com>
 603
 604         * mips-dis.c (no_aliases): New disassembly option flag.
 605         (set_default_mips_dis_options): Init no_aliases to zero.
 606         (parse_mips_dis_option): Handle no-aliases option.
 607         (print_insn_mips): Ignore table entries that are aliases
 608         if no_aliases is set.
 609         (print_insn_mips16): Ditto.
 610         * mips-opc.c (mips_builtin_opcodes): Add initializer column for
 611         new pinfo2 member and add INSN_ALIAS initializers as needed.  Also
 612         move WR_MACC and RD_MACC initializers from pinfo to pinfo2.
 613         * mips16-opc.c (mips16_opcodes): Ditto.
 614
 615 2005-01-17  Andrew Stubbs  <andrew.stubbs@st.com>
 616
 617         * sh-opc.h (arch_sh2a_or_sh3e,arch_sh2a_or_sh4): Correct definition.
 618         (inheritance diagram): Add missing edge.
 619         (arch_sh1_up): Rename arch_sh_up to match external name to make life
 620         easier for the testsuite.
 621         (arch_sh4_nofp_up): Likewise, rename arch_sh4_nofpu_up.
 622         (arch_sh4a_nofp_up): Likewise, rename arch_sh4a_nofpu_up.
 623         (arch_sh2a_nofpu_or_sh4_nommu_nofpu_up): Add missing
 624         arch_sh2a_or_sh4_up child.
 625         (sh_table): Do renaming as above.
 626         Correct comment for ldc.l for gas testsuite to read.
 627         Remove rogue mul.l from sh1 (duplicate of the one for sh2).
 628         Correct comments for movy.w and movy.l for gas testsuite to read.
 629         Correct comments for fmov.d and fmov.s for gas testsuite to read.
 630
 631 2005-01-12  H.J. Lu  <hongjiu.lu@intel.com>
 632
 633         * i386-dis.c (OP_E): Don't ignore scale in SIB for 64 bit mode.
 634
 635 2005-01-12  H.J. Lu  <hongjiu.lu@intel.com>
 636
 637         * i386-dis.c (OP_E): Ignore scale when index == 0x4 in SIB.
 638
 639 2005-01-10  Andreas Schwab  <schwab@suse.de>
 640
 641         * disassemble.c (disassemble_init_for_target) <case
 642         bfd_arch_ia64>: Set skip_zeroes to 16.
 643         <case bfd_arch_tic4x>: Set skip_zeroes to 32.
 644
 645 2004-12-23  Tomer Levi  <Tomer.Levi@nsc.com>
 646
 647         * crx-opc.c: Mark 'bcop' instruction as RELAXABLE.
 648
 649 2004-12-14  Svein E. Seldal  <Svein.Seldal@solidas.com>
 650
 651         * avr-dis.c: Prettyprint. Added printing of symbol names in all
 652         memory references. Convert avr_operand() to C90 formatting.
 653
 654 2004-12-05  Tomer Levi  <Tomer.Levi@nsc.com>
 655
 656         * crx-dis.c (print_arg): Use 'info->print_address_func' for address printing.
 657
 658 2004-11-29  Tomer Levi  <Tomer.Levi@nsc.com>
 659
 660         * crx-opc.c (crx_optab): Mark all rbase_disps* operands as signed.
 661         (no_op_insn): Initialize array with instructions that have no
 662         operands.
 663         * crx-dis.c (make_instruction): Get rid of COP_BRANCH_INS operand swapping.
 664
 665 2004-11-29  Richard Earnshaw  <rearnsha@arm.com>
 666
 667         * arm-dis.c: Correct top-level comment.
 668
 669 2004-11-27  Richard Earnshaw  <rearnsha@arm.com>
 670
 671         * arm-opc.h (arm_opcode, thumb_opcode): Add extra field for the
 672         architecuture defining the insn.
 673         (arm_opcodes, thumb_opcodes): Delete.  Move to ...
 674         * arm-dis.c (arm_opcodes, thumb_opcodes): Here.  Add architecutre
 675         field.
 676         Also include opcode/arm.h.
 677         * Makefile.am (arm-dis.lo): Update dependency list.
 678         * Makefile.in: Regenerate.
 679
 680 2004-11-22  Ravi Ramaseshan  <ravi.ramaseshan@codito.com>
 681
 682         * opcode/arc-opc.c (insert_base): Modify ls_operand[LS_OFFSET] to
 683         reflect the change to the short immediate syntax.
 684
 685 2004-11-19  Alan Modra  <amodra@bigpond.net.au>
 686
 687         * or32-opc.c (debug): Warning fix.
 688         * po/POTFILES.in: Regenerate.
 689
 690         * maxq-dis.c: Formatting.
 691         (print_insn): Warning fix.
 692
 693 2004-11-17  Daniel Jacobowitz  <dan@codesourcery.com>
 694
 695         * arm-dis.c (WORD_ADDRESS): Define.
 696         (print_insn): Use it.  Correct big-endian end-of-section handling.
 697
 698 2004-11-08  Inderpreet Singh   <inderpreetb@nioda.hcltech.com>
 699             Vineet Sharma      <vineets@noida.hcltech.com>
 700
 701         * maxq-dis.c: New file.
 702         * disassemble.c (ARCH_maxq): Define.
 703         (disassembler): Add 'print_insn_maxq_little' for handling maxq
 704         instructions..
 705         * configure.in: Add case for bfd_maxq_arch.
 706         * configure: Regenerate.
 707         * Makefile.am: Add support for maxq-dis.c
 708         * Makefile.in: Regenerate.
 709         * aclocal.m4: Regenerate.
 710
 711 2004-11-05  Tomer Levi  <Tomer.Levi@nsc.com>
 712
 713         * crx-opc.c (crx_optab): Rename 'arg_icr' to 'arg_idxr' for Index register
 714         mode.
 715         * crx-dis.c: Likewise.
 716
 717 2004-11-04  Hans-Peter Nilsson  <hp@axis.com>
 718
 719         Generally, handle CRISv32.
 720         * cris-dis.c (TRACE_CASE): Define as (disdata->trace_case).
 721         (struct cris_disasm_data): New type.
 722         (format_reg, format_hex, cris_constraint, print_flags)
 723         (get_opcode_entry): Add struct cris_disasm_data * parameter.  All
 724         callers changed.
 725         (format_sup_reg, print_insn_crisv32_with_register_prefix)
 726         (print_insn_crisv32_without_register_prefix)
 727         (print_insn_crisv10_v32_with_register_prefix)
 728         (print_insn_crisv10_v32_without_register_prefix)
 729         (cris_parse_disassembler_options): New functions.
 730         (bytes_to_skip, cris_spec_reg): Add enum cris_disass_family
 731         parameter.  All callers changed.
 732         (get_opcode_entry): Call malloc, not xmalloc.  Return NULL on
 733         failure.
 734         (cris_constraint) <case 'Y', 'U'>: New cases.
 735         (bytes_to_skip): Handle 'Y' and 'N' as 's'.  Skip size is 4 bytes
 736         for constraint 'n'.
 737         (print_with_operands) <case 'Y'>: New case.
 738         (print_with_operands) <case 'T', 'A', '[', ']', 'd', 'n', 'u'>
 739         <case 'N', 'Y', 'Q'>: New cases.
 740         (print_insn_cris_generic): Emit "bcc ." for zero and CRISv32.
 741         (print_insn_cris_with_register_prefix)
 742         (print_insn_cris_without_register_prefix): Call
 743         cris_parse_disassembler_options.
 744         * cris-opc.c (cris_spec_regs): Mention that this table isn't used
 745         for CRISv32 and the size of immediate operands.  New v32-only
 746         entries for bz, pid, srs, wz, exs, eda, dz, ebp, erp, nrp, ccs and
 747         spc.  Add v32-only 4-byte entries for p2, p3, p5 and p6.  Change
 748         ccr, ibr, irp to be v0..v10.  Change bar, dccr to be v8..v10.
 749         Change brp to be v3..v10.
 750         (cris_support_regs): New vector.
 751         (cris_opcodes): Update head comment.  New format characters '[',
 752         ']', space, 'A', 'd', 'N', 'n', 'Q', 'T', 'u', 'U', 'Y'.
 753         Add new opcodes for v32 and adjust existing opcodes to accommodate
 754         differences to earlier variants.
 755         (cris_cond15s): New vector.
 756
 757 2004-11-04 Jan Beulich <jbeulich@novell.com>
 758
 759         * i386-dis.c (Eq, Edqw, indirEp, Gdq, I1): Define.
 760         (indirEb): Remove.
 761         (Mp): Use f_mode rather than none at all.
 762         (t_mode, dq_mode, dqw_mode, f_mode, const_1_mode): Define. t_mode
 763         replaces what previously was x_mode; x_mode now means 128-bit SSE
 764         operands.
 765         (dis386): Make far jumps and calls have an 'l' prefix only in AT&T
 766         mode. movmskpX's, pextrw's, and pmovmskb's first operands are Gdq.
 767         pinsrw's second operand is Edqw.
 768         (grps): 1-bit shifts' and rotates' second operands are I1. cmpxchg8b's
 769         operand is Eq. movntq's and movntdq's first operands are EM. s[gi]dt,
 770         fldenv, frstor, fsave, fstenv all should also have suffixes in Intel
 771         mode when an operand size override is present or always suffixing.
 772         More instructions will need to be added to this group.
 773         (putop): Handle new macro chars 'C' (short/long suffix selector),
 774         'I' (Intel mode override for following macro char), and 'J' (for
 775         adding the 'l' prefix to far branches in AT&T mode). When an
 776         alternative was specified in the template, honor macro character when
 777         specified for Intel mode.
 778         (OP_E): Handle new *_mode values. Correct pointer specifications for
 779         memory operands. Consolidate output of index register.
 780         (OP_G): Handle new *_mode values.
 781         (OP_I): Handle const_1_mode.
 782         (OP_ESreg, OP_DSreg): Generate pointer specifications. Indicate
 783         respective opcode prefix bits have been consumed.
 784         (OP_EM, OP_EX): Provide some default handling for generating pointer
 785         specifications.
 786
 787 2004-10-28  Tomer Levi  <Tomer.Levi@nsc.com>
 788
 789         * crx-opc.c (REV_COP_INST): New macro, reverse operand order of
 790         COP_INST macro.
 791
 792 2004-10-27  Tomer Levi  <Tomer.Levi@nsc.com>
 793
 794         * crx-dis.c (enum REG_ARG_TYPE): New, replacing COP_ARG_TYPE.
 795         (getregliststring): Support HI/LO and user registers.
 796         * crx-opc.c (crx_instruction): Update data structure according to the
 797         rearrangement done in CRX opcode header file.
 798         (crx_regtab):  Likewise.
 799         (crx_optab):  Likewise.
 800         (crx_instruction): Reorder load/stor instructions, remove unsupported
 801         formats.
 802         support new Co-Processor instruction 'cpi'.
 803
 804 2004-10-27  Nick Clifton  <nickc@redhat.com>
 805
 806         * opcodes/iq2000-asm.c: Regenerate.
 807         * opcodes/iq2000-desc.c: Regenerate.
 808         * opcodes/iq2000-desc.h: Regenerate.
 809         * opcodes/iq2000-dis.c: Regenerate.
 810         * opcodes/iq2000-ibld.c: Regenerate.
 811         * opcodes/iq2000-opc.c: Regenerate.
 812         * opcodes/iq2000-opc.h: Regenerate.
 813
 814 2004-10-21  Tomer Levi  <Tomer.Levi@nsc.com>
 815
 816         * crx-opc.c (crx_instruction): Replace i3, i4, i5 with us3,
 817         us4, us5 (respectively).
 818         Remove unsupported 'popa' instruction.
 819         Reverse operands order in store co-processor instructions.
 820
 821 2004-10-15  Alan Modra  <amodra@bigpond.net.au>
 822
 823         * Makefile.am: Run "make dep-am"
 824         * Makefile.in: Regenerate.
 825
 826 2004-10-12  Bob Wilson  <bob.wilson@acm.org>
 827
 828         * xtensa-dis.c: Use ISO C90 formatting.
 829
 830 2004-10-09  Alan Modra  <amodra@bigpond.net.au>
 831
 832         * ppc-opc.c: Revert 2004-09-09 change.
 833
 834 2004-10-07  Bob Wilson  <bob.wilson@acm.org>
 835
 836         * xtensa-dis.c (state_names): Delete.
 837         (fetch_data): Use xtensa_isa_maxlength.
 838         (print_xtensa_operand): Replace operand parameter with opcode/operand
 839         pair.  Remove print_sr_name parameter.  Use new xtensa-isa.h functions.
 840         (print_insn_xtensa): Use new xtensa-isa.h functions.  Handle multislot
 841         instruction bundles.  Use xmalloc instead of malloc.
 842
 843 2004-10-07  David Gibson  <david@gibson.dropbear.id.au>
 844
 845         * ppc-opc.c: Replace literal "0"s with NULLs in pointer
 846         initializers.
 847
 848 2004-10-07  Tomer Levi  <Tomer.Levi@nsc.com>
 849
 850         * crx-opc.c (crx_instruction): Support Co-processor insns.
 851         * crx-dis.c (COP_ARG_TYPE): New enum for CO-Processor arguments.
 852         (getregliststring): Change function to use the above enum.
 853         (print_arg): Handle CO-Processor insns.
 854         (crx_cinvs): Add 'b' option to invalidate the branch-target
 855         cache.
 856
 857 2004-10-06  Aldy Hernandez  <aldyh@redhat.com>
 858
 859         * ppc-opc.c (powerpc_opcodes): Add efscfd, efdabs, efdnabs,
 860         efdneg, efdadd, efdsub, efdmul, efddiv, efdcmpgt, efdcmplt,
 861         efdcmpeq, efdtstgt, efdtstlt, efdtsteq, efdcfsi, efdcfsid,
 862         efdcfui, efdcfuid, efdcfsf, efdcfuf, efdctsi, efdctsidz, efdctsiz,
 863         efdctui, efdctuidz, efdctuiz, efdctsf, efdctuf, efdctuf, efdcfs.
 864
 865 2004-10-01  Bill Farmer  <Bill@the-farmers.freeserve.co.uk>
 866
 867         * pdp11-dis.c (print_insn_pdp11): Subtract the SOB's displacement
 868         rather than add it.
 869
 870 2004-09-30  Paul Brook  <paul@codesourcery.com>
 871
 872         * arm-dis.c (print_insn_arm): Handle 'e' for SMI instruction.
 873         * arm-opc.h: Document %e.  Add ARMv6ZK instructions.
 874
 875 2004-09-17  H.J. Lu  <hongjiu.lu@intel.com>
 876
 877         * Makefile.am (AUTOMAKE_OPTIONS): Require 1.9.
 878         (CONFIG_STATUS_DEPENDENCIES): New.
 879         (Makefile): Removed.
 880         (config.status): Likewise.
 881         * Makefile.in: Regenerated.
 882
 883 2004-09-17  Alan Modra  <amodra@bigpond.net.au>
 884
 885         * Makefile.am: Run "make dep-am".
 886         * Makefile.in: Regenerate.
 887         * aclocal.m4: Regenerate.
 888         * configure: Regenerate.
 889         * po/POTFILES.in: Regenerate.
 890         * po/opcodes.pot: Regenerate.
 891
 892 2004-09-11  Andreas Schwab  <schwab@suse.de>
 893
 894         * configure: Rebuild.
 895
 896 2004-09-09  Segher Boessenkool  <segher@kernel.crashing.org>
 897
 898         * ppc-opc.c (L): Make this field not optional.
 899
 900 2004-09-03  Tomer Levi  <Tomer.Levi@nsc.com>
 901
 902         * opc-crx.c: Rename 'popma' to 'popa', remove 'pushma'.
 903         Fix parameter to 'm[t|f]csr' insns.
 904
 905 2004-08-30  Nathanael Nerode  <neroden@gcc.gnu.org>
 906
 907         * configure.in: Autoupdate to autoconf 2.59.
 908         * aclocal.m4: Rebuild with aclocal 1.4p6.
 909         * configure: Rebuild with autoconf 2.59.
 910         * Makefile.in: Rebuild with automake 1.4p6 (picking up
 911         bfd changes for autoconf 2.59 on the way).
 912         * config.in: Rebuild with autoheader 2.59.
 913
 914 2004-08-27  Richard Sandiford  <rsandifo@redhat.com>
 915
 916         * frv-desc.[ch], frv-opc.[ch]: Regenerated.
 917
 918 2004-07-30  Michal Ludvig  <mludvig@suse.cz>
 919
 920         * i386-dis.c (GRPPADLCK): Renamed to GRPPADLCK1
 921         (GRPPADLCK2): New define.
 922         (twobyte_has_modrm): True for 0xA6.
 923         (grps): GRPPADLCK2 for opcode 0xA6.
 924
 925 2004-07-29  Alexandre Oliva  <aoliva@redhat.com>
 926
 927         Introduce SH2a support.
 928         * sh-opc.h (arch_sh2a_base): Renumber.
 929         (arch_sh2a_nofpu_base): Remove.
 930         (arch_sh_base_mask): Adjust.
 931         (arch_opann_mask): New.
 932         (arch_sh2a, arch_sh2a_nofpu): Adjust.
 933         (arch_sh2a_up, arch_sh2a_nofpu_up): Likewise.
 934         (sh_table): Adjust whitespace.
 935         2004-02-24  Corinna Vinschen  <vinschen@redhat.com>
 936         * sh-opc.h (arch_sh2a_nofpu_up): New.  Use instead of arch_sh2a_up in
 937         instruction list throughout.
 938         (arch_sh2a_up): Redefine to include fpu instruction set.  Use instead
 939         of arch_sh2a in instruction list throughout.
 940         (arch_sh2e_up): Accomodate above changes.
 941         (arch_sh2_up): Ditto.
 942         2004-02-20  Corinna Vinschen  <vinschen@redhat.com>
 943         * sh-opc.h: Add arch_sh2a_nofpu to arch_sh2_up.
 944         2004-02-18  Corinna Vinschen  <vinschen@redhat.com>
 945         * sh-dis.c (print_insn_sh): Add bfd_mach_sh2a_nofpu handling.
 946         * sh-opc.h (arch_sh2a_nofpu): New.
 947         (arch_sh2a_up): New, defines sh2a and sh2a_nofpu.
 948         (sh_table): Change all arch_sh2a to arch_sh2a_up unless FPU
 949         instruction.
 950         2004-01-20  DJ Delorie  <dj@redhat.com>
 951         * sh-dis.c (print_insn_sh): SH2A does not have 'X' fp regs.
 952         2003-12-29  DJ Delorie  <dj@redhat.com>
 953         * sh-opc.c (sh_nibble_type, sh_arg_type, arch_2a, arch_2e_up,
 954         sh_opcode_info, sh_table): Add sh2a support.
 955         (arch_op32): New, to tag 32-bit opcodes.
 956         * sh-dis.c (print_insn_sh): Support sh2a opcodes.
 957         2003-12-02  Michael Snyder  <msnyder@redhat.com>
 958         * sh-opc.h (arch_sh2a): Add.
 959         * sh-dis.c (arch_sh2a): Handle.
 960         * sh-opc.h (arch_sh2_up): Fix up to include arch_sh2a.
 961
 962 2004-07-27  Tomer Levi  <Tomer.Levi@nsc.com>
 963
 964         * crx-opc.c: Add popx,pushx insns. Indent code, fix comments.
 965
 966 2004-07-22  Nick Clifton  <nickc@redhat.com>
 967
 968         PR/280
 969         * h8300-dis.c (bfd_h8_disassemble): Do not dump raw bytes for the
 970         insns - this is done by objdump itself.
 971         * h8500-dis.c (print_insn_h8500): Likewise.
 972
 973 2004-07-21  Jan Beulich <jbeulich@novell.com>
 974
 975         * i386-dis.c (OP_E): Show rip-relative addressing in 64-bit mode
 976         regardless of address size prefix in effect.
 977         (ptr_reg): Size or address registers does not depend on rex64, but
 978         on the presence of an address size override.
 979         (OP_MMX): Use rex.x only for xmm registers.
 980         (OP_EM): Use rex.z only for xmm registers.
 981
 982 2004-07-20  Maciej W. Rozycki  <macro@linux-mips.org>
 983
 984         * mips-opc.c (mips_builtin_opcodes): Move coprocessor 2
 985         move/branch operations to the bottom so that VR5400 multimedia
 986         instructions take precedence in disassembly.
 987
 988 2004-07-20  Maciej W. Rozycki  <macro@linux-mips.org>
 989
 990         * mips-opc.c (mips_builtin_opcodes): Remove the MIPS32
 991         ISA-specific "break" encoding.
 992
 993 2004-07-13  Elvis Chiang  <elvisfb@gmail.com>
 994
 995         * arm-opc.h: Fix typo in comment.
 996
 997 2004-07-11  Andreas Schwab  <schwab@suse.de>
 998
 999         * m68k-dis.c (m68k_valid_ea): Fix typos in last change.
1000
1001 2004-07-09  Andreas Schwab  <schwab@suse.de>
1002
1003         * m68k-dis.c (m68k_valid_ea): Check validity of all codes.
1004
1005 2004-07-07  Tomer Levi  <Tomer.Levi@nsc.com>
1006
1007         * Makefile.am (CFILES): Add crx-dis.c, crx-opc.c.
1008         (ALL_MACHINES): Add crx-dis.lo, crx-opc.lo.
1009         (crx-dis.lo): New target.
1010         (crx-opc.lo): Likewise.
1011         * Makefile.in: Regenerate.
1012         * configure.in: Handle bfd_crx_arch.
1013         * configure: Regenerate.
1014         * crx-dis.c: New file.
1015         * crx-opc.c: New file.
1016         * disassemble.c (ARCH_crx): Define.
1017         (disassembler): Handle ARCH_crx.
1018
1019 2004-06-29  James E Wilson  <wilson@specifixinc.com>
1020
1021         * ia64-opc-a.c (ia64_opcodes_a): Delete mov immediate pseudo for adds.
1022         * ia64-asmtab.c: Regnerate.
1023
1024 2004-06-28  Alan Modra  <amodra@bigpond.net.au>
1025
1026         * ppc-opc.c (insert_fxm): Handle mfocrf and mtocrf.
1027         (extract_fxm): Don't test dialect.
1028         (XFXFXM_MASK): Include the power4 bit.
1029         (XFXM): Add p4 param.
1030         (powerpc_opcodes): Add mfocrf and mtocrf.  Adjust mtcr.
1031
1032 2004-06-27  Alexandre Oliva  <aoliva@redhat.com>
1033
1034         2003-07-21  Richard Sandiford  <rsandifo@redhat.com>
1035         * disassemble.c (disassembler): Handle bfd_mach_h8300sxn.
1036
1037 2004-06-26  Alan Modra  <amodra@bigpond.net.au>
1038
1039         * ppc-opc.c (BH, XLBH_MASK): Define.
1040         (powerpc_opcodes): Allow BH field on bclr, bclrl, bcctr, bcctrl.
1041
1042 2004-06-24  Alan Modra  <amodra@bigpond.net.au>
1043
1044         * i386-dis.c (x_mode): Comment.
1045         (two_source_ops): File scope.
1046         (float_mem): Correct fisttpll and fistpll.
1047         (float_mem_mode): New table.
1048         (dofloat): Use it.
1049         (OP_E): Correct intel mode PTR output.
1050         (ptr_reg): Use open_char and close_char.
1051         (PNI_Fixup): Handle possible suffix on sidt.  Use op1out etc. for
1052         operands.  Set two_source_ops.
1053
1054 2004-06-15  Alan Modra  <amodra@bigpond.net.au>
1055
1056         * arc-ext.c (build_ARC_extmap): Use bfd_get_section_size
1057         instead of _raw_size.
1058
1059 2004-06-08  Jakub Jelinek  <jakub@redhat.com>
1060
1061         * ia64-gen.c (in_iclass): Handle more postinc st
1062         and ld variants.
1063         * ia64-asmtab.c: Rebuilt.
1064
1065 2004-06-01  Martin Schwidefsky  <schwidefsky@de.ibm.com>
1066
1067         * s390-opc.txt: Correct architecture mask for some opcodes.
1068         lrv, lrvh, strv, ml, dl, alc, slb rll and mvclu are available
1069         in the esa mode as well.
1070
1071 2004-05-28  Andrew Stubbs <andrew.stubbs@superh.com>
1072
1073         * sh-dis.c (target_arch): Make unsigned.
1074         (print_insn_sh): Replace (most of) switch with a call to
1075         sh_get_arch_from_bfd_mach(). Also use new architecture flags system.
1076         * sh-opc.h: Redefine architecture flags values.
1077         Add sh3-nommu architecture.
1078         Reorganise <arch>_up macros so they make more visual sense.
1079         (SH_MERGE_ARCH_SET): Define new macro.
1080         (SH_VALID_BASE_ARCH_SET): Likewise.
1081         (SH_VALID_MMU_ARCH_SET): Likewise.
1082         (SH_VALID_CO_ARCH_SET): Likewise.
1083         (SH_VALID_ARCH_SET): Likewise.
1084         (SH_MERGE_ARCH_SET_VALID): Likewise.
1085         (SH_ARCH_SET_HAS_FPU): Likewise.
1086         (SH_ARCH_SET_HAS_DSP): Likewise.
1087         (SH_ARCH_UNKNOWN_ARCH): Likewise.
1088         (sh_get_arch_from_bfd_mach): Add prototype.
1089         (sh_get_arch_up_from_bfd_mach): Likewise.
1090         (sh_get_bfd_mach_from_arch_set): Likewise.
1091         (sh_merge_bfd_arc): Likewise.
1092
1093 2004-05-24  Peter Barada  <peter@the-baradas.com>
1094
1095         * m68k-dis.c(print_insn_m68k): Strip body of diassembly out
1096         into new match_insn_m68k function.  Loop over canidate
1097         matches and select first that completely matches.
1098         * m68k-dis.c(print_insn_arg): Fix 'g' case to only extract 1 bit.
1099         * m68k-dis.c(print_insn_arg): Call new function m68k_valid_ea
1100         to verify addressing for MAC/EMAC.
1101         * m68k-dis.c(print_insn_arg): Use reg_half_names for MAC/EMAC
1102         reigster halves since 'fpu' and 'spl' look misleading.
1103         * m68k-dis.c(fetch_arg): Fix 'G', 'H', 'I', 'f', 'M', 'N' cases.
1104         * m68k-opc.c: Rearragne mac/emac cases to use longest for
1105         first, tighten up match masks.
1106         * m68k-opc.c: Add 'size' field to struct m68k_opcode.  Produce
1107         'size' from special case code in print_insn_m68k to
1108         determine decode size of insns.
1109
1110 2004-05-19  Alan Modra  <amodra@bigpond.net.au>
1111
1112         * ppc-opc.c (insert_fxm): Enable two operand mfcr when -many as
1113         well as when -mpower4.
1114
1115 2004-05-13  Nick Clifton  <nickc@redhat.com>
1116
1117         * po/fr.po: Updated French translation.
1118
1119 2004-05-05  Peter Barada  <peter@the-baradas.com>
1120
1121         * m68k-dis.c(print_insn_m68k): Add new chips, use core
1122         variants in arch_mask.  Only set m68881/68851 for 68k chips.
1123         * m68k-op.c: Switch from ColdFire chips to core variants.
1124
1125 2004-05-05  Alan Modra  <amodra@bigpond.net.au>
1126
1127         PR 147.
1128         * ppc-opc.c (PPCVEC): Remove PPC_OPCODE_PPC.
1129
1130 2004-04-29  Ben Elliston  <bje@au.ibm.com>
1131
1132         * ppc-opc.c (XCMPL): Renmame to XOPL. Update users.
1133         (powerpc_opcodes): Add "dbczl" instruction for PPC970.
1134
1135 2004-04-22  Kaz Kojima  <kkojima@rr.iij4u.or.jp>
1136
1137         * sh-dis.c (print_insn_sh): Print the value in constant pool
1138         as a symbol if it looks like a symbol.
1139
1140 2004-04-22  Peter Barada <peter@the-baradas.com>
1141
1142         * m68k-dis.c(print_insn_m68k): Set mfcmac/mcfemac on
1143         appropriate ColdFire architectures.
1144         (print_insn_m68k): Handle EMAC, MAC/EMAC scalefactor, and MAC/EMAC
1145         mask addressing.
1146         Add EMAC instructions, fix MAC instructions. Remove
1147         macmw/macml/msacmw/msacml instructions since mask addressing now
1148         supported.
1149
1150 2004-04-20  Jakub Jelinek  <jakub@redhat.com>
1151
1152         * sparc-opc.c (fmoviccx, fmovfccx, fmovccx): Define.
1153         (fmovicc, fmovfcc, fmovcc): Remove fpsize argument, change opcode to
1154         suffix.  Use fmov*x macros, create all 3 fpsize variants in one
1155         macro.  Adjust all users.
1156
1157 2004-04-15  Anil Paranjpe  <anilp1@kpitcummins.com>
1158
1159         * h8300-dis.c (bfd_h8_disassemble) : Treat "adds" & "subs"
1160         separately.
1161
1162 2004-03-30  Kazuhiro Inaoka  <inaoka.kazuhiro@renesas.com>
1163
1164         * m32r-asm.c: Regenerate.
1165
1166 2004-03-29  Stan Shebs  <shebs@apple.com>
1167
1168         * mpw-config.in, mpw-make.sed: Remove MPW support files, no longer
1169         used.
1170
1171 2004-03-19  Alan Modra  <amodra@bigpond.net.au>
1172
1173         * aclocal.m4: Regenerate.
1174         * config.in: Regenerate.
1175         * configure: Regenerate.
1176         * po/POTFILES.in: Regenerate.
1177         * po/opcodes.pot: Regenerate.
1178
1179 2004-03-16  Alan Modra  <amodra@bigpond.net.au>
1180
1181         * ppc-dis.c (print_insn_powerpc): Don't print tabs.  Handle
1182         PPC_OPERANDS_GPR_0.
1183         * ppc-opc.c (RA0): Define.
1184         (RAQ, RAL, RAM, RAS, RSQ, RTQ, RSO): Use PPC_OPERAND_GPR_0.
1185         (RAOPT): Rename from RAO.  Update all uses.
1186         (powerpc_opcodes): Use RA0 as appropriate.
1187
1188 2004-03-15  Aldy Hernandez  <aldyh@redhat.com>
1189
1190         * ppc-opc.c (powerpc_opcodes): Add BOOKE versions of mfsprg.
1191
1192 2004-03-15  Alan Modra  <amodra@bigpond.net.au>
1193
1194         * sparc-dis.c (print_insn_sparc): Update getword prototype.
1195
1196 2004-03-12  Michal Ludvig  <mludvig@suse.cz>
1197
1198         * i386-dis.c (GRPPLOCK): Delete.
1199         (grps): Delete GRPPLOCK entry.
1200
1201 2004-03-12  Alan Modra  <amodra@bigpond.net.au>
1202
1203         * i386-dis.c (OP_M, OP_0f0e, OP_0fae, NOP_Fixup): New functions.
1204         (M, Mp): Use OP_M.
1205         (None, PADLOCK_SPECIAL, PADLOCK_0): Delete.
1206         (GRPPADLCK): Define.
1207         (dis386): Use NOP_Fixup on "nop".
1208         (dis386_twobyte): Use GRPPADLCK on opcode 0xa7.
1209         (twobyte_has_modrm): Set for 0xa7.
1210         (padlock_table): Delete.  Move to..
1211         (grps): ..here, using OP_0f07.  Use OP_Ofae on lfence, mfence
1212         and clflush.
1213         (print_insn): Revert PADLOCK_SPECIAL code.
1214         (OP_E): Delete sfence, lfence, mfence checks.
1215
1216 2004-03-12  Jakub Jelinek  <jakub@redhat.com>
1217
1218         * i386-dis.c (grps): Use INVLPG_Fixup instead of OP_E for invlpg.
1219         (INVLPG_Fixup): New function.
1220         (PNI_Fixup): Remove ATTRIBUTE_UNUSED from sizeflag.
1221
1222 2004-03-12  Michal Ludvig  <mludvig@suse.cz>
1223
1224         * i386-dis.c (PADLOCK_SPECIAL, PADLOCK_0): New defines.
1225         (dis386_twobyte): Opcode 0xa7 is PADLOCK_0.
1226         (padlock_table): New struct with PadLock instructions.
1227         (print_insn): Handle PADLOCK_SPECIAL.
1228
1229 2004-03-12  Alan Modra  <amodra@bigpond.net.au>
1230
1231         * i386-dis.c (grps): Use clflush by default for 0x0fae/7.
1232         (OP_E): Twiddle clflush to sfence here.
1233
1234 2004-03-08  Nick Clifton  <nickc@redhat.com>
1235
1236         * po/de.po: Updated German translation.
1237
1238 2003-03-03  Andrew Stubbs  <andrew.stubbs@superh.com>
1239
1240         * sh-dis.c (print_insn_sh): Don't disassemble fp instructions in
1241         nofpu mode.  Add BFD type bfd_mach_sh4_nommu_nofpu.
1242         * sh-opc.h: Add sh4_nommu_nofpu architecture and adjust instructions
1243         accordingly.
1244
1245 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
1246
1247         * frv-asm.c: Regenerate.
1248         * frv-desc.c: Regenerate.
1249         * frv-desc.h: Regenerate.
1250         * frv-dis.c: Regenerate.
1251         * frv-ibld.c: Regenerate.
1252         * frv-opc.c: Regenerate.
1253         * frv-opc.h: Regenerate.
1254
1255 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
1256
1257         * frv-desc.c, frv-opc.c: Regenerate.
1258
1259 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
1260
1261         * frv-desc.c, frv-opc.c, frv-opc.h: Regenerate.
1262
1263 2004-02-26  Andrew Stubbs  <andrew.stubbs@superh.com>
1264
1265         * sh-opc.h: Move fsca and fsrra instructions from sh4a to sh4.
1266         Also correct mistake in the comment.
1267
1268 2004-02-26  Andrew Stubbs <andrew.stubbs@superh.com>
1269
1270         * sh-dis.c (print_insn_sh): Add REG_N_D nibble type to
1271         ensure that double registers have even numbers.
1272         Add REG_N_B01 for nn01 (binary 01) nibble to ensure
1273         that reserved instruction 0xfffd does not decode the same
1274         as 0xfdfd (ftrv).
1275         * sh-opc.h: Add REG_N_D nibble type and use it whereever
1276         REG_N refers to a double register.
1277         Add REG_N_B01 nibble type and use it instead of REG_NM
1278         in ftrv.
1279         Adjust the bit patterns in a few comments.
1280
1281 2004-02-25  Aldy Hernandez  <aldyh@redhat.com>
1282
1283         * ppc-opc.c (powerpc_opcodes): Change mask for dcbt and dcbtst.
1284
1285 2004-02-20  Aldy Hernandez  <aldyh@redhat.com>
1286
1287         * ppc-opc.c (powerpc_opcodes): Move mfmcsrr0 before mfdc_dat.
1288
1289 2004-02-20  Aldy Hernandez  <aldyh@redhat.com>
1290
1291         * ppc-opc.c (powerpc_opcodes): Add m*ivor35.
1292
1293 2004-02-20  Aldy Hernandez  <aldyh@redhat.com>
1294
1295         * ppc-opc.c (powerpc_opcodes): Add mfivor32, mfivor33, mfivor34,
1296         mtivor32, mtivor33, mtivor34.
1297
1298 2004-02-19  Aldy Hernandez  <aldyh@redhat.com>
1299
1300         * ppc-opc.c (powerpc_opcodes): Add mfmcar.
1301
1302 2004-02-10  Petko Manolov  <petkan@nucleusys.com>
1303
1304         * arm-opc.h Maverick accumulator register opcode fixes.
1305
1306 2004-02-13  Ben Elliston  <bje@wasabisystems.com>
1307
1308         * m32r-dis.c: Regenerate.
1309
1310 2004-01-27  Michael Snyder  <msnyder@redhat.com>
1311
1312         * sh-opc.h (sh_table): "fsrra", not "fssra".
1313
1314 2004-01-23  Andrew Over <andrew.over@cs.anu.edu.au>
1315
1316         * sparc-opc.c (fdtox, fstox, fqtox, fxtod, fxtos, fxtoq): Tighten
1317         contraints.
1318
1319 2004-01-19  Andrew Over  <andrew.over@cs.anu.edu.au>
1320
1321         * sparc-opc.c (sparc_opcodes) <f[dsq]tox, fxto[dsq]>: Fix args.
1322
1323 2004-01-19  Alan Modra  <amodra@bigpond.net.au>
1324
1325         * i386-dis.c (OP_E): Print scale factor on intel mode sib when not
1326         1.  Don't print scale factor on AT&T mode when index missing.
1327
1328 2004-01-16  Alexandre Oliva  <aoliva@redhat.com>
1329
1330         * m10300-opc.c (mov): 8- and 24-bit immediates are zero-extended
1331         when loaded into XR registers.
1332
1333 2004-01-14  Richard Sandiford  <rsandifo@redhat.com>
1334
1335         * frv-desc.h: Regenerate.
1336         * frv-desc.c: Regenerate.
1337         * frv-opc.c: Regenerate.
1338
1339 2004-01-13  Michael Snyder  <msnyder@redhat.com>
1340
1341         * sh-dis.c (print_insn_sh): Allocate 4 bytes for insn.
1342
1343 2004-01-09  Paul Brook  <paul@codesourcery.com>
1344
1345         * arm-opc.h (arm_opcodes): Move generic mcrr after known
1346         specific opcodes.
1347
1348 2004-01-07  Daniel Jacobowitz  <drow@mvista.com>
1349
1350         * Makefile.am (libopcodes_la_DEPENDENCIES)
1351         (libopcodes_la_LIBADD): Revert 2003-05-17 change.  Add explanatory
1352         comment about the problem.
1353         * Makefile.in: Regenerate.
1354
1355 2004-01-06  Alexandre Oliva  <aoliva@redhat.com>
1356
1357         2003-12-19  Alexandre Oliva  <aoliva@redhat.com>
1358         * frv-asm.c (parse_ulo16, parse_uhi16, parse_d12): Fix some
1359         cut&paste errors in shifting/truncating numerical operands.
1360         2003-08-04  Alexandre Oliva  <aoliva@redhat.com>
1361         * frv-asm.c (parse_ulo16): Parse gotofflo and gotofffuncdesclo.
1362         (parse_uslo16): Likewise.
1363         (parse_uhi16): Parse gotoffhi and gotofffuncdeschi.
1364         (parse_d12): Parse gotoff12 and gotofffuncdesc12.
1365         (parse_s12): Likewise.
1366         2003-08-04  Alexandre Oliva  <aoliva@redhat.com>
1367         * frv-asm.c (parse_ulo16): Parse gotlo and gotfuncdesclo.
1368         (parse_uslo16): Likewise.
1369         (parse_uhi16): Parse gothi and gotfuncdeschi.
1370         (parse_d12): Parse got12 and gotfuncdesc12.
1371         (parse_s12): Likewise.
1372
1373 2004-01-02  Albert Bartoszko  <albar@nt.kegel.com.pl>
1374
1375         * msp430-dis.c (msp430_doubleoperand): Check for an 'add'
1376         instruction which looks similar to an 'rla' instruction.
1377
1378 For older changes see ChangeLog-0203
1379 \f
1380 Local Variables:
1381 mode: change-log
1382 left-margin: 8
1383 fill-column: 74
1384 version-control: never
1385 End: