opcodes/ChangeLog

   1 2015-05-11  H.J. Lu  <hongjiu.lu@intel.com>
   2
   3         * opcodes/i386-opc.tbl (call): Remove Disp16|Disp32 from 64-bit
   4         direct branch.
   5         (jmp): Likewise.
   6         * i386-tbl.h: Regenerated.
   7
   8 2015-05-11  H.J. Lu  <hongjiu.lu@intel.com>
   9
  10         * configure.ac: Support bfd_iamcu_arch.
  11         * disassemble.c (disassembler): Support bfd_iamcu_arch.
  12         * i386-gen.c (cpu_flag_init): Add CPU_IAMCU_FLAGS and
  13         CPU_IAMCU_COMPAT_FLAGS.
  14         (cpu_flags): Add CpuIAMCU.
  15         * i386-opc.h (CpuIAMCU): New.
  16         (i386_cpu_flags): Add cpuiamcu.
  17         * configure: Regenerated.
  18         * i386-init.h: Likewise.
  19         * i386-tbl.h: Likewise.
  20
  21 2015-05-08  H.J. Lu  <hongjiu.lu@intel.com>
  22
  23         PR binutis/18386
  24         * i386-dis.c (X86_64_E8): New.
  25         (X86_64_E9): Likewise.
  26         Update comments on 'T', 'U', 'V'.  Add comments for '^'.
  27         (dis386): Replace callT/jmpT with X86_64_E8/X86_64_E9.
  28         (x86_64_table): Add X86_64_E8 and X86_64_E9.
  29         (mod_table): Replace {T|} with ^ on Jcall/Jmp.
  30         (putop): Handle '^'.
  31         (OP_J): Ignore the operand size prefix in 64-bit.  Don't check
  32         REX_W.
  33
  34 2015-04-30  DJ Delorie  <dj@redhat.com>
  35
  36         * disassemble.c (disassembler): Choose suitable disassembler based
  37         on E_ABI.
  38         * rl78-decode.opc (rl78_decode_opcode): Take ISA parameter.  Use
  39         it to decode mul/div insns.
  40         * rl78-decode.c: Regenerate.
  41         * rl78-dis.c (print_insn_rl78): Rename to...
  42         (print_insn_rl78_common): ...this, take ISA parameter.
  43         (print_insn_rl78): New.
  44         (print_insn_rl78_g10): New.
  45         (print_insn_rl78_g13): New.
  46         (print_insn_rl78_g14): New.
  47         (rl78_get_disassembler): New.
  48
  49 2015-04-29  Nick Clifton  <nickc@redhat.com>
  50
  51         * po/fr.po: Updated French translation.
  52
  53 2015-04-27  Peter Bergner  <bergner@vnet.ibm.com>
  54
  55         * ppc-opc.c (DCBT_EO): New define.
  56         (powerpc_opcodes) <lbarx>: Enable for POWER8 and later.
  57         <lharx>: Likewise.
  58         <stbcx.>: Likewise.
  59         <sthcx.>: Likewise.
  60         <waitrsv>: Do not enable for POWER7 and later.
  61         <waitimpl>: Likewise.
  62         <dcbt>: Default to the two operand form of the instruction for all
  63         "old" cpus.  For "new" cpus, use the operand ordering that matches
  64         whether the cpu is server or embedded.
  65         <dcbtst>: Likewise.
  66
  67 2015-04-27  Andreas Krebbel  <krebbel@linux.vnet.ibm.com>
  68
  69         * s390-opc.c: New instruction type VV0UU2.
  70         * s390-opc.txt: Fix instruction types for VFCE, VLDE, VFSQ, WFK,
  71         and WFC.
  72
  73 2015-04-23  Jan Beulich  <jbeulich@suse.com>
  74
  75         * i386-dis.c (putop): Extend "XY" handling to AVX512. Handle "XZ".
  76         * i386-dis-evex.h.c (vcvtpd2ps, vcvtqq2ps, vcvttpd2udq,
  77         vcvtpd2udq, vcvtuqq2ps, vcvttpd2dq, vcvtpd2dq): Add %XY.
  78         (vfpclasspd, vfpclassps): Add %XZ.
  79
  80 2015-04-15  H.J. Lu  <hongjiu.lu@intel.com>
  81
  82         * i386-dis.c (PREFIX_UD_SHIFT): Removed.
  83         (PREFIX_UD_REPZ): Likewise.
  84         (PREFIX_UD_REPNZ): Likewise.
  85         (PREFIX_UD_DATA): Likewise.
  86         (PREFIX_UD_ADDR): Likewise.
  87         (PREFIX_UD_LOCK): Likewise.
  88
  89 2015-04-15  H.J. Lu  <hongjiu.lu@intel.com>
  90
  91         * i386-dis.c (prefix_requirement): Removed.
  92         (print_insn): Don't set prefix_requirement.  Check
  93         dp->prefix_requirement instead of prefix_requirement.
  94
  95 2015-04-15  H.J. Lu  <hongjiu.lu@intel.com>
  96
  97         PR binutils/17898
  98         * i386-dis.c (PREFIX_0FC7_REG_6): Renamed to ...
  99         (PREFIX_MOD_0_0FC7_REG_6): This.
 100         (PREFIX_MOD_3_0FC7_REG_6): New.
 101         (PREFIX_MOD_3_0FC7_REG_7): Likewise.
 102         (prefix_table): Replace PREFIX_0FC7_REG_6 with
 103         PREFIX_MOD_0_0FC7_REG_6.  Add PREFIX_MOD_3_0FC7_REG_6 and
 104         PREFIX_MOD_3_0FC7_REG_7.
 105         (mod_table): Replace PREFIX_0FC7_REG_6 with
 106         PREFIX_MOD_0_0FC7_REG_6.  Use PREFIX_MOD_3_0FC7_REG_6 and
 107         PREFIX_MOD_3_0FC7_REG_7.
 108
 109 2015-04-15  H.J. Lu  <hongjiu.lu@intel.com>
 110
 111         * i386-dis.c (PREFIX_MANDATORY_REPZ): Removed.
 112         (PREFIX_MANDATORY_REPNZ): Likewise.
 113         (PREFIX_MANDATORY_DATA): Likewise.
 114         (PREFIX_MANDATORY_ADDR): Likewise.
 115         (PREFIX_MANDATORY_LOCK): Likewise.
 116         (PREFIX_MANDATORY): Likewise.
 117         (PREFIX_UD_SHIFT): Set to 8
 118         (PREFIX_UD_REPZ): Updated.
 119         (PREFIX_UD_REPNZ): Likewise.
 120         (PREFIX_UD_DATA): Likewise.
 121         (PREFIX_UD_ADDR): Likewise.
 122         (PREFIX_UD_LOCK): Likewise.
 123         (PREFIX_IGNORED_SHIFT): New.
 124         (PREFIX_IGNORED_REPZ): Likewise.
 125         (PREFIX_IGNORED_REPNZ): Likewise.
 126         (PREFIX_IGNORED_DATA): Likewise.
 127         (PREFIX_IGNORED_ADDR): Likewise.
 128         (PREFIX_IGNORED_LOCK): Likewise.
 129         (PREFIX_OPCODE): Likewise.
 130         (PREFIX_IGNORED): Likewise.
 131         (Bad_Opcode): Replace PREFIX_MANDATORY with 0.
 132         (dis386_twobyte): Replace PREFIX_MANDATORY with PREFIX_OPCODE.
 133         (three_byte_table): Likewise.
 134         (mod_table): Likewise.
 135         (mandatory_prefix): Renamed to ...
 136         (prefix_requirement): This.
 137         (prefix_table): Replace PREFIX_MANDATORY with PREFIX_OPCODE.
 138         Update PREFIX_90 entry.
 139         (get_valid_dis386): Check prefix_requirement to see if a prefix
 140         should be ignored.
 141         (print_insn): Replace mandatory_prefix with prefix_requirement.
 142
 143 2015-04-15  Renlin Li  <renlin.li@arm.com>
 144
 145         * arm-dis.c (thumb32_opcodes): Define 'D' format control code,
 146         use it for ssat and ssat16.
 147         (print_insn_thumb32): Add handle case for 'D' control code.
 148
 149 2015-04-06  Ilya Tocar  <ilya.tocar@intel.com>
 150             H.J. Lu  <hongjiu.lu@intel.com>
 151
 152         * i386-dis-evex.h (evex_table): Fill prefix_requirement field.
 153         * i386-dis.c (PREFIX_MANDATORY_REPZ, PREFIX_MANDATORY_REPNZ,
 154         PREFIX_MANDATORY_DATA, PREFIX_MANDATORY_ADDR, PREFIX_MANDATORY_LOCK,
 155         PREFIX_UD_SHIFT, PREFIX_UD_REPZ, REFIX_UD_REPNZ, PREFIX_UD_DATA,
 156         PREFIX_UD_ADDR, PREFIX_UD_LOCK, PREFIX_MANDATORY): Define.
 157         (Bad_Opcode, FLOAT, DIS386, DIS386_PREFIX, THREE_BYTE_TABLE_PREFIX):
 158         Fill prefix_requirement field.
 159         (struct dis386): Add prefix_requirement field.
 160         (dis386): Fill prefix_requirement field.
 161         (dis386_twobyte): Ditto.
 162         (twobyte_has_mandatory_prefix_: Remove.
 163         (reg_table): Fill prefix_requirement field.
 164         (prefix_table): Ditto.
 165         (x86_64_table): Ditto.
 166         (three_byte_table): Ditto.
 167         (xop_table): Ditto.
 168         (vex_table): Ditto.
 169         (vex_len_table): Ditto.
 170         (vex_w_table): Ditto.
 171         (mod_table): Ditto.
 172         (bad_opcode): Ditto.
 173         (print_insn): Use prefix_requirement.
 174         (FGRPd9_2, FGRPd9_4, FGRPd9_5, FGRPd9_6, FGRPd9_7, FGRPda_5, FGRPdb_4,
 175         FGRPde_3, FGRPdf_4): Fill prefix_requirement field.
 176         (float_reg): Ditto.
 177
 178 2015-03-30  Mike Frysinger  <vapier@gentoo.org>
 179
 180         * d10v-opc.c (d10v_reg_name_cnt): Convert old style prototype.
 181
 182 2015-03-29  H.J. Lu  <hongjiu.lu@intel.com>
 183
 184         * Makefile.in: Regenerated.
 185
 186 2015-03-25  Anton Blanchard  <anton@samba.org>
 187
 188         * ppc-dis.c (disassemble_init_powerpc): Only initialise
 189         powerpc_opcd_indices and vle_opcd_indices once.
 190
 191 2015-03-25  Anton Blanchard  <anton@samba.org>
 192
 193         * ppc-opc.c (powerpc_opcodes): Add slbfee.
 194
 195 2015-03-24  Terry Guo  <terry.guo@arm.com>
 196
 197         * arm-dis.c (opcode32): Updated to use new arm feature struct.
 198         (opcode16): Likewise.
 199         (coprocessor_opcodes): Replace bit with feature struct.
 200         (neon_opcodes): Likewise.
 201         (arm_opcodes): Likewise.
 202         (thumb_opcodes): Likewise.
 203         (thumb32_opcodes): Likewise.
 204         (print_insn_coprocessor): Likewise.
 205         (print_insn_arm): Likewise.
 206         (select_arm_features): Follow new feature struct.
 207
 208 2015-03-17  Ganesh Gopalasubramanian  <Ganesh.Gopalasubramanian@amd.com>
 209
 210         * i386-dis.c (rm_table): Add clzero.
 211         * i386-gen.c (cpu_flag_init): Add new CPU_ZNVER1_FLAGS.
 212         Add CPU_CLZERO_FLAGS.
 213         (cpu_flags): Add CpuCLZERO.
 214         * i386-opc.h: Add CpuCLZERO.
 215         * i386-opc.tbl: Add clzero.
 216         * i386-init.h: Re-generated.
 217         * i386-tbl.h: Re-generated.
 218
 219 2015-03-13  Andrew Bennett  <andrew.bennett@imgtec.com>
 220
 221         * mips-opc.c (decode_mips_operand): Fix constraint issues
 222         with u and y operands.
 223
 224 2015-03-13  Andrew Bennett  <andrew.bennett@imgtec.com>
 225
 226         * mips-opc.c (mips_builtin_opcodes): Add evp and dvp instructions.
 227
 228 2015-03-10  Andreas Krebbel  <krebbel@linux.vnet.ibm.com>
 229
 230         * s390-opc.c: Add new IBM z13 instructions.
 231         * s390-opc.txt: Likewise.
 232
 233 2015-03-10  Renlin Li  <renlin.li@arm.com>
 234
 235         * aarch64-tbl.h (aarch64_opcode_table): Remove strub, ldurb, ldursb,
 236         stur, ldur, sturh, ldurh, ldursh, ldursw, prfum F_HAS_ALIAS flag and
 237         related alias.
 238         * aarch64-asm-2.c: Regenerate.
 239         * aarch64-dis-2.c: Likewise.
 240         * aarch64-opc-2.c: Likewise.
 241
 242 2015-03-03  Jiong Wang  <jiong.wang@arm.com>
 243
 244         * arm-dis.c (arm_symbol_is_valid): Skip ARM private symbols.
 245
 246 2015-02-25  Oleg Endo  <olegendo@gcc.gnu.org>
 247
 248         * sh-opc.h (clrs, sets): Mark as arch_sh3_nommu_up instead of
 249         arch_sh_up.
 250         (pref): Mark as arch_sh2a_nofpu_or_sh3_nommu_up instead of
 251         arch_sh2a_nofpu_or_sh4_nommu_nofpu_up.
 252
 253 2015-02-23  Vinay  <Vinay.G@kpit.com>
 254
 255         * rl78-decode.opc (MOV): Added space between two operands for
 256         'mov' instruction in index addressing mode.
 257         * rl78-decode.c: Regenerate.
 258
 259 2015-02-19  Pedro Alves  <palves@redhat.com>
 260
 261         * microblaze-dis.h [__cplusplus]: Wrap in extern "C".
 262
 263 2015-02-10  Pedro Alves  <palves@redhat.com>
 264             Tom Tromey  <tromey@redhat.com>
 265
 266         * microblaze-opcm.h (or, and, xor): Rename to microblaze_or,
 267         microblaze_and, microblaze_xor.
 268         * microblaze-opc.h (opcodes): Adjust.
 269
 270 2015-01-28  James Bowman  <james.bowman@ftdichip.com>
 271
 272         * Makefile.am: Add FT32 files.
 273         * configure.ac: Handle FT32.
 274         * disassemble.c (disassembler): Call print_insn_ft32.
 275         * ft32-dis.c: New file.
 276         * ft32-opc.c: New file.
 277         * Makefile.in: Regenerate.
 278         * configure: Regenerate.
 279         * po/POTFILES.in: Regenerate.
 280
 281 2015-01-28 Kuan-Lin Chen <kuanlinchentw@gmail.com>
 282
 283         * nds32-asm.c (keyword_sr): Add new system registers.
 284
 285 2015-01-16  Andreas Krebbel  <krebbel@linux.vnet.ibm.com>
 286
 287         * s390-dis.c (s390_extract_operand): Support vector register
 288         operands.
 289         (s390_print_insn_with_opcode): Support new operands types and add
 290         new handling of optional operands.
 291         * s390-mkopc.c (s390_opcode_mode_val, s390_opcode_cpu_val): Remove
 292         and include opcode/s390.h instead.
 293         (struct op_struct): New field `flags'.
 294         (insertOpcode, insertExpandedMnemonic): New parameter `flags'.
 295         (dumpTable): Dump flags.
 296         (main): Parse flags from the s390-opc.txt file.  Add z13 as cpu
 297         string.
 298         * s390-opc.c: Add new operands types, instruction formats, and
 299         instruction masks.
 300         (s390_opformats): Add new formats for .insn.
 301         * s390-opc.txt: Add new instructions.
 302
 303 2015-01-01  Alan Modra  <amodra@gmail.com>
 304
 305         Update year range in copyright notice of all files.
 306
 307 For older changes see ChangeLog-2014
 308 \f
 309 Copyright (C) 2015 Free Software Foundation, Inc.
 310
 311 Copying and distribution of this file, with or without modification,
 312 are permitted in any medium without royalty provided the copyright
 313 notice and this notice are preserved.
 314
 315 Local Variables:
 316 mode: change-log
 317 left-margin: 8
 318 fill-column: 74
 319 version-control: never
 320 End: