* gas/config/tc-arm.c (NEON_ENC_TAB): Add entries for VSEL.
[deliverable/binutils-gdb.git] / opcodes / ChangeLog
1 2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
2
3 * arm-dis.c (coprocessor_opcodes): Add VSEL.
4 (print_insn_coprocessor): Add new %<>c bitfield format
5 specifier.
6
7 2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
8
9 * arm-dis.c (arm_opcodes): Add LDRA/STRL instructions.
10 (thumb32_opcodes): Likewise.
11 (print_arm_insn): Add support for %<>T formatter.
12
13 2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
14
15 * arm-dis.c (arm_opcodes): Add HLT.
16 (thumb_opcodes): Likewise.
17
18 2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
19
20 * arm-dis.c (thumb32_opcodes): Add DCPS instruction.
21
22 2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
23
24 * arm-dis.c (arm_opcodes): Add SEVL.
25 (thumb_opcodes): Likewise.
26 (thumb32_opcodes): Likewise.
27
28 2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
29
30 * arm-dis.c (data_barrier_option): New function.
31 (print_insn_arm): Use data_barrier_option.
32 (print_insn_thumb32): Use data_barrier_option.
33
34 2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com
35
36 * arm-dis.c (COND_UNCOND): New constant.
37 (print_insn_coprocessor): Add support for %u format specifier.
38 (print_insn_neon): Likewise.
39
40 2012-08-21 David S. Miller <davem@davemloft.net>
41
42 * sparc-opc.c (4-argument crypto instructions): Fix encoding using
43 F3F4 macro.
44
45 2012-08-20 Edmar Wienskoski <edmar@freescale.com>
46
47 * ppc-opc.c (powerpc_opcodes): Changed opcode for vabsdub,
48 vabsduh, vabsduw, mviwsplt.
49
50 2012-08-17 Nagajyothi Eggone <nagajyothi.eggone@amd.com>
51
52 * i386-gen.c (cpu_flag_init): Add CPU_BTVER1_FLAGS and
53 CPU_BTVER2_FLAGS.
54
55 * i386-opc.h: Update CpuPRFCHW comment.
56
57 * i386-opc.tbl: Enable prefetch instruction for CpuPRFCHW.
58 * i386-init.h: Regenerated.
59 * i386-tbl.h: Likewise.
60
61 2012-08-17 Nick Clifton <nickc@redhat.com>
62
63 * po/uk.po: New Ukranian translation.
64 * configure.in (ALL_LINGUAS): Add uk.
65 * configure: Regenerate.
66
67 2012-08-16 Peter Bergner <bergner@vnet.ibm.com>
68
69 * ppc-opc.c (powerpc_opcodes) <"lswx">: Use RAX for the second and
70 RBX for the third operand.
71 <"lswi">: Use RAX for second and NBI for the third operand.
72
73 2012-08-15 DJ Delorie <dj@redhat.com>
74
75 * rl78-decode.opc (rl78_decode_opcode): Merge %e and %[01]
76 operands, so that data addresses can be corrected when not
77 ES-overridden.
78 * rl78-decode.c: Regenerate.
79 * rl78-dis.c (print_insn_rl78): Make order of modifiers
80 irrelevent. When the 'e' specifier is used on an operand and no
81 ES prefix is provided, adjust address to make it absolute.
82
83 2012-08-15 Peter Bergner <bergner@vnet.ibm.com>
84
85 * ppc-opc.c <RSQ, RTQ>: Use PPC_OPERAND_GPR.
86
87 2012-08-15 Peter Bergner <bergner@vnet.ibm.com>
88
89 * ppc-opc.c <xnop, yield, mdoio, mdoom>: New extended mnemonics.
90
91 2012-08-14 Maciej W. Rozycki <macro@codesourcery.com>
92
93 * mips-dis.c (print_insn_args): Add GET_OP and GET_OP_S local
94 macros, use local variables for info struct member accesses,
95 update the type of the variable used to hold the instruction
96 word.
97 (print_insn_mips, print_mips16_insn_arg): Likewise.
98 (print_insn_mips16): Add GET_OP and GET_OP_S local macros, use
99 local variables for info struct member accesses.
100 (print_insn_micromips): Add GET_OP_S local macro.
101 (_print_insn_mips): Update the type of the variable used to hold
102 the instruction word.
103
104 2012-08-13 Ian Bolton <ian.bolton@arm.com>
105 Laurent Desnogues <laurent.desnogues@arm.com>
106 Jim MacArthur <jim.macarthur@arm.com>
107 Marcus Shawcroft <marcus.shawcroft@arm.com>
108 Nigel Stephens <nigel.stephens@arm.com>
109 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
110 Richard Earnshaw <rearnsha@arm.com>
111 Sofiane Naci <sofiane.naci@arm.com>
112 Tejas Belagod <tejas.belagod@arm.com>
113 Yufeng Zhang <yufeng.zhang@arm.com>
114
115 * Makefile.am: Add AArch64.
116 * Makefile.in: Regenerate.
117 * aarch64-asm.c: New file.
118 * aarch64-asm.h: New file.
119 * aarch64-dis.c: New file.
120 * aarch64-dis.h: New file.
121 * aarch64-gen.c: New file.
122 * aarch64-opc.c: New file.
123 * aarch64-opc.h: New file.
124 * aarch64-tbl.h: New file.
125 * configure.in: Add AArch64.
126 * configure: Regenerate.
127 * disassemble.c: Add AArch64.
128 * aarch64-asm-2.c: New file (automatically generated).
129 * aarch64-dis-2.c: New file (automatically generated).
130 * aarch64-opc-2.c: New file (automatically generated).
131 * po/POTFILES.in: Regenerate.
132
133 2012-08-13 Maciej W. Rozycki <macro@codesourcery.com>
134
135 * micromips-opc.c (micromips_opcodes): Update comment.
136 * mips-opc.c (mips_builtin_opcodes): Likewise. Mark coprocessor
137 instructions for IOCT as appropriate.
138 * mips-dis.c (print_insn_mips): Replace OPCODE_IS_MEMBER with
139 opcode_is_member.
140 * configure.in: Substitute NO_WMISSING_FIELD_INITIALIZERS with
141 the result of a check for the -Wno-missing-field-initializers
142 GCC option.
143 * Makefile.am (NO_WMISSING_FIELD_INITIALIZERS): New variable.
144 (mips-opc.lo): Pass $(NO_WMISSING_FIELD_INITIALIZERS) to
145 compilation.
146 (mips16-opc.lo): Likewise.
147 (micromips-opc.lo): Likewise.
148 * aclocal.m4: Regenerate.
149 * configure: Regenerate.
150 * Makefile.in: Regenerate.
151
152 2012-08-11 Saravanan Ekanathan <saravanan.ekanathan@amd.com>
153
154 PR gas/14423
155 * i386-gen.c (cpu_flag_init): Add CpuFMA in CPU_BDVER2_FLAGS.
156 * i386-init.h: Regenerated.
157
158 2012-08-09 Nick Clifton <nickc@redhat.com>
159
160 * po/vi.po: Updated Vietnamese translation.
161
162 2012-08-07 Roland McGrath <mcgrathr@google.com>
163
164 * i386-dis.c (reg_table): Fill out REG_0F0D table with
165 AMD-reserved cases as "prefetch".
166 (MOD_0F18_REG_4, MOD_0F18_REG_5): New enum constants.
167 (MOD_0F18_REG_6, MOD_0F18_REG_7): Likewise.
168 (reg_table): Use those under REG_0F18.
169 (mod_table): Add those cases as "nop/reserved".
170
171 2012-08-07 Jan Beulich <jbeulich@suse.com>
172
173 * i386-opc.tbl: Remove "FIXME" comments from SVME instructions.
174
175 2012-08-06 Roland McGrath <mcgrathr@google.com>
176
177 * i386-dis.c (print_insn): Print spaces between multiple excess
178 prefixes. Return actual number of excess prefixes consumed,
179 not always one.
180
181 * i386-dis.c (OP_REG): Ignore REX_B for segment register cases.
182
183 2012-08-06 Roland McGrath <mcgrathr@google.com>
184 Victor Khimenko <khim@google.com>
185 H.J. Lu <hongjiu.lu@intel.com>
186
187 * i386-dis.c (OP_sI): In b_T_mode and v_mode, REX_W trumps DFLAG.
188 (putop): For 'T', 'U', and 'V', treat REX_W like DFLAG.
189 (intel_operand_size): For stack_v_mode, treat REX_W like DFLAG.
190 (OP_E_register): Likewise.
191 (OP_REG): For low 8 whole registers, treat REX_W like DFLAG.
192
193 2012-08-02 Jan-Benedict Glaw <jbglaw@lug-owl.de>
194
195 * configure.in: Formatting.
196 * configure: Regenerate.
197
198 2012-08-01 Alan Modra <amodra@gmail.com>
199
200 * h8300-dis.c: Fix printf arg warnings.
201 * i960-dis.c: Likewise.
202 * mips-dis.c: Likewise.
203 * pdp11-dis.c: Likewise.
204 * sh-dis.c: Likewise.
205 * v850-dis.c: Likewise.
206 * configure.in: Formatting.
207 * configure: Regenerate.
208 * rl78-decode.c: Regenerate.
209 * po/POTFILES.in: Regenerate.
210
211 2012-07-31 Chao-Ying Fu <fu@mips.com>
212 Catherine Moore <clm@codesourcery.com>
213 Maciej W. Rozycki <macro@codesourcery.com>
214
215 * micromips-opc.c (WR_a, RD_a, MOD_a): New macros.
216 (DSP_VOLA): Likewise.
217 (D32, D33): Likewise.
218 (micromips_opcodes): Add DSP ASE instructions.
219 * mips-dis.c (print_insn_micromips) <'2', '3'>: New cases.
220 <'4', '5', '6', '7', '8', '0', '^', '@'>: Likewise.
221
222 2012-07-31 Jan Beulich <jbeulich@suse.com>
223
224 * i386-opc.tbl (vmovntdqa): Move up into 256-bit integer AVX2
225 instruction group. Mark as requiring AVX2.
226 * i386-tbl.h: Re-generate.
227
228 2012-07-30 Nick Clifton <nickc@redhat.com>
229
230 * po/opcodes.pot: Updated template.
231 * po/es.po: Updated Spanish translation.
232 * po/fi.po: Updated Finnish translation.
233
234 2012-07-27 Mike Frysinger <vapier@gentoo.org>
235
236 * configure.in (BFD_VERSION): Run bfd/configure --version and
237 parse the output of that.
238 * configure: Regenerate.
239
240 2012-07-25 James Lemke <jwlemke@codesourcery.com>
241
242 * ppc-opc.c (powerpc_opcodes): Add/remove PPCVLE for some 32-bit insns.
243
244 2012-07-24 Stephan McCamant <smcc@cs.berkeley.edu>
245 Dr David Alan Gilbert <dave@treblig.org>
246
247 PR binutils/13135
248 * arm-dis.c: Add necessary casts for printing integer values.
249 Use %s when printing string values.
250 * hppa-dis.c: Likewise.
251 * m68k-dis.c: Likewise.
252 * microblaze-dis.c: Likewise.
253 * mips-dis.c: Likewise.
254 * sparc-dis.c: Likewise.
255
256 2012-07-19 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
257
258 PR binutils/14355
259 * i386-dis.c (VEX_LEN_0FXOP_08_CC): New.
260 (VEX_LEN_0FXOP_08_CD): Likewise.
261 (VEX_LEN_0FXOP_08_CE): Likewise.
262 (VEX_LEN_0FXOP_08_CF): Likewise.
263 (VEX_LEN_0FXOP_08_EC): Likewise.
264 (VEX_LEN_0FXOP_08_ED): Likewise.
265 (VEX_LEN_0FXOP_08_EE): Likewise.
266 (VEX_LEN_0FXOP_08_EF): Likewise.
267 (xop_table): Fix entries for vpcomb, vpcomw, vpcomd, vpcomq,
268 vpcomub, vpcomuw, vpcomud, vpcomuq.
269 (vex_len_table): Add entries for VEX_LEN_0FXOP_08_CC,
270 VEX_LEN_0FXOP_08_CD, VEX_LEN_0FXOP_08_CE, VEX_LEN_0FXOP_08_CF,
271 VEX_LEN_0FXOP_08_EC, VEX_LEN_0FXOP_08_ED, VEX_LEN_0FXOP_08_EE,
272 VEX_LEN_0FXOP_08_EF.
273
274 2012-07-16 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
275
276 * i386-dis.c (PREFIX_0F38F6): New.
277 (prefix_table): Add adcx, adox instructions.
278 (three_byte_table): Use PREFIX_0F38F6.
279 (mod_table): Add rdseed instruction.
280 * i386-gen.c (cpu_flag_init): Add CpuADX, CpuRDSEED, CpuPRFCHW.
281 (cpu_flags): Likewise.
282 * i386-opc.h: Add CpuADX, CpuRDSEED, CpuPRFCHW.
283 (i386_cpu_flags): Add fields cpurdseed, cpuadx, cpuprfchw.
284 * i386-opc.tbl: Add instrcutions adcx, adox, rdseed. Extend
285 prefetchw.
286 * i386-tbl.h: Regenerate.
287 * i386-init.h: Likewise.
288
289 2012-07-05 Thomas Schwinge <thomas@codesourcery.com>
290
291 * mips-dis.c: Remove gratuitous newline.
292
293 2012-07-05 Sean Keys <skeys@ipdatasys.com>
294
295 * xgate-dis.c: Removed an IF statement that will
296 always be false due to overlapping operand masks.
297 * xgate-opc.c: Corrected 'com' opcode entry and
298 fixed spacing.
299
300 2012-07-02 Roland McGrath <mcgrathr@google.com>
301
302 * i386-opc.tbl: Add RepPrefixOk to nop.
303 * i386-tbl.h: Regenerate.
304
305 2012-06-28 Nick Clifton <nickc@redhat.com>
306
307 * po/vi.po: Updated Vietnamese translation.
308
309 2012-06-22 Roland McGrath <mcgrathr@google.com>
310
311 * i386-opc.tbl: Add RepPrefixOk to ret.
312 * i386-tbl.h: Regenerate.
313
314 * i386-opc.h (RepPrefixOk): New enum constant.
315 (i386_opcode_modifier): New bitfield 'repprefixok'.
316 * i386-gen.c (opcode_modifiers): Add RepPrefixOk.
317 * i386-opc.tbl: Add RepPrefixOk to bsf, bsr, and to all
318 instructions that have IsString.
319 * i386-tbl.h: Regenerate.
320
321 2012-06-11 Andreas Schwab <schwab@linux-m68k.org>
322
323 * ppc-opc.c (lvsl, lvebx, isellt, icbt, ldepx, lwepx, lvsr, lvehx)
324 (iselgt, lvewx, iseleq, isel, dcbst, dcbstep, dcbfl, dcbf, lbepx)
325 (lvx, dcbfep, dcbtstls, stvebx, dcbtstlse, stdepx, stwepx, dcbtls)
326 (stvehx, dcbtlse, stvewx, stbepx, icblc, stvx, dcbtstt, dcbtst)
327 (dcbtst, dcbtstep, dcbtt, dcbt, dcbt, lhepx, eciwx, dcbtep)
328 (dcread, lxvdsx, lvxl, dcblc, sthepx, ecowx, dcbi, dcread, icbtls)
329 (stvxl, lxsdx, lfdepx, stxsdx, stfdepx, dcba, dcbal, lxvw4x)
330 (tlbivax, lfdpx, lxvd2x, tlbsrx., stxvw4x, tlbsx, tlbsx., stfdpx)
331 (stfqx, stxvd2x, icbi, icbiep, icread, dcbzep): Change RA to RA0.
332
333 2012-05-19 Alan Modra <amodra@gmail.com>
334
335 * ppc-dis.c: Don't include elf32-ppc.h, do include elf/ppc.h.
336 (get_powerpc_dialect): Detect VLE sections from ELF sh_flags.
337
338 2012-05-18 Alan Modra <amodra@gmail.com>
339
340 * ia64-opc.c: Remove #include "ansidecl.h".
341 * z8kgen.c: Include sysdep.h first.
342
343 * arc-dis.c: Include sysdep.h first, remove some redundant includes.
344 * bfin-dis.c: Likewise.
345 * i860-dis.c: Likewise.
346 * ia64-dis.c: Likewise.
347 * ia64-gen.c: Likewise.
348 * m68hc11-dis.c: Likewise.
349 * mmix-dis.c: Likewise.
350 * msp430-dis.c: Likewise.
351 * or32-dis.c: Likewise.
352 * rl78-dis.c: Likewise.
353 * rx-dis.c: Likewise.
354 * tic4x-dis.c: Likewise.
355 * tilegx-opc.c: Likewise.
356 * tilepro-opc.c: Likewise.
357 * rx-decode.c: Regenerate.
358
359 2012-05-17 James Lemke <jwlemke@codesourcery.com>
360
361 * ppc-opc.c (powerpc_macros): Add entries for e_extlwi to e_clrlslwi.
362
363 2012-05-17 James Lemke <jwlemke@codesourcery.com>
364
365 * ppc-opc.c (extract_sprg): Use ALLOW8_SPRG to include VLE.
366
367 2012-05-17 Daniel Richard G. <skunk@iskunk.org>
368 Nick Clifton <nickc@redhat.com>
369
370 PR 14072
371 * configure.in: Add check that sysdep.h has been included before
372 any system header files.
373 * configure: Regenerate.
374 * config.in: Regenerate.
375 * sysdep.h: Generate an error if included before config.h.
376 * alpha-opc.c: Include sysdep.h before any other header file.
377 * alpha-dis.c: Likewise.
378 * avr-dis.c: Likewise.
379 * cgen-opc.c: Likewise.
380 * cr16-dis.c: Likewise.
381 * cris-dis.c: Likewise.
382 * crx-dis.c: Likewise.
383 * d10v-dis.c: Likewise.
384 * d10v-opc.c: Likewise.
385 * d30v-dis.c: Likewise.
386 * d30v-opc.c: Likewise.
387 * h8500-dis.c: Likewise.
388 * i370-dis.c: Likewise.
389 * i370-opc.c: Likewise.
390 * m10200-dis.c: Likewise.
391 * m10300-dis.c: Likewise.
392 * micromips-opc.c: Likewise.
393 * mips-opc.c: Likewise.
394 * mips61-opc.c: Likewise.
395 * moxie-dis.c: Likewise.
396 * or32-opc.c: Likewise.
397 * pj-dis.c: Likewise.
398 * ppc-dis.c: Likewise.
399 * ppc-opc.c: Likewise.
400 * s390-dis.c: Likewise.
401 * sh-dis.c: Likewise.
402 * sh64-dis.c: Likewise.
403 * sparc-dis.c: Likewise.
404 * sparc-opc.c: Likewise.
405 * spu-dis.c: Likewise.
406 * tic30-dis.c: Likewise.
407 * tic54x-dis.c: Likewise.
408 * tic80-dis.c: Likewise.
409 * tic80-opc.c: Likewise.
410 * tilegx-dis.c: Likewise.
411 * tilepro-dis.c: Likewise.
412 * v850-dis.c: Likewise.
413 * v850-opc.c: Likewise.
414 * vax-dis.c: Likewise.
415 * w65-dis.c: Likewise.
416 * xgate-dis.c: Likewise.
417 * xtensa-dis.c: Likewise.
418 * rl78-decode.opc: Likewise.
419 * rl78-decode.c: Regenerate.
420 * rx-decode.opc: Likewise.
421 * rx-decode.c: Regenerate.
422
423 2012-05-17 Alan Modra <amodra@gmail.com>
424
425 * ppc_dis.c: Don't include elf/ppc.h.
426
427 2012-05-16 Meador Inge <meadori@codesourcery.com>
428
429 * arm-dis.c (arm_opcodes): Don't disassemble STMFD/LDMIA sp!, {reg}
430 to PUSH/POP {reg}.
431
432 2012-05-15 James Murray <jsm@jsm-net.demon.co.uk>
433 Stephane Carrez <stcarrez@nerim.fr>
434
435 * configure.in: Add S12X and XGATE co-processor support to m68hc11
436 target.
437 * disassemble.c: Likewise.
438 * configure: Regenerate.
439 * m68hc11-dis.c: Make objdump output more consistent, use hex
440 instead of decimal and use 0x prefix for hex.
441 * m68hc11-opc.c: Add S12X and XGATE opcodes.
442
443 2012-05-14 James Lemke <jwlemke@codesourcery.com>
444
445 * ppc-dis.c (get_powerpc_dialect): Use is_ppc_vle.
446 (PPC_OPCD_SEGS, VLE_OPCD_SEGS): New defines.
447 (vle_opcd_indices): New array.
448 (lookup_vle): New function.
449 (disassemble_init_powerpc): Revise for second (VLE) opcode table.
450 (print_insn_powerpc): Likewise.
451 * ppc-opc.c: Likewise.
452
453 2012-05-14 Catherine Moore <clm@codesourcery.com>
454 Maciej W. Rozycki <macro@codesourcery.com>
455 Rhonda Wittels <rhonda@codesourcery.com>
456 Nathan Froyd <froydnj@codesourcery.com>
457
458 * ppc-opc.c (insert_arx, extract_arx): New functions.
459 (insert_ary, extract_ary): New functions.
460 (insert_li20, extract_li20): New functions.
461 (insert_rx, extract_rx): New functions.
462 (insert_ry, extract_ry): New functions.
463 (insert_sci8, extract_sci8): New functions.
464 (insert_sci8n, extract_sci8n): New functions.
465 (insert_sd4h, extract_sd4h): New functions.
466 (insert_sd4w, extract_sd4w): New functions.
467 (insert_vlesi, extract_vlesi): New functions.
468 (insert_vlensi, extract_vlensi): New functions.
469 (insert_vleui, extract_vleui): New functions.
470 (insert_vleil, extract_vleil): New functions.
471 (BI_MASK, BB_MASK, BT): Use PPC_OPERAND_CR_BIT.
472 (BI16, BI32, BO32, B8): New.
473 (B15, B24, CRD32, CRS): New.
474 (CRD, OBF, BFA, CR, CRFS): Use PPC_OPERAND_CR_REG.
475 (DB, IMM20, RD, Rx, ARX, RY, RZ): New.
476 (ARY, SCLSCI8, SCLSCI8N, SE_SD, SE_SDH): New.
477 (SH6_MASK): Use PPC_OPSHIFT_INV.
478 (SI8, UI5, OIMM5, UI7, BO16): New.
479 (VLESIMM, VLENSIMM, VLEUIMM, VLEUIMML): New.
480 (XT6, XA6, XB6, XB6S, XC6): Use PPC_OPSHIFT_INV.
481 (ALLOW8_SPRG): New.
482 (insert_sprg, extract_sprg): Check ALLOW8_SPRG.
483 (OPVUP, OPVUP_MASK OPVUP): New
484 (BD8, BD8_MASK, BD8IO, BD8IO_MASK): New.
485 (EBD8IO, EBD8IO1_MASK, EBD8IO2_MASK, EBD8IO3_MASK): New.
486 (BD15, BD15_MASK, EBD15, EBD15_MASK, EBD15BI, EBD15BI_MASK): New.
487 (BD24,BD24_MASK, C_LK, C_LK_MASK, C, C_MASK): New.
488 (IA16, IA16_MASK, I16A, I16A_MASK, I16L, I16L_MASK): New.
489 (IM7, IM7_MASK, LI20, LI20_MASK, SCI8, SCI8_MASK): New.
490 (SCI8BF, SCI8BF_MASK, SD4, SD4_MASK): New.
491 (SE_IM5, SE_IM5_MASK): New.
492 (SE_R, SE_R_MASK, SE_RR, SE_RR_MASK): New.
493 (EX, EX_MASK, BO16F, BO16T, BO32F, BO32T): New.
494 (BO32DNZ, BO32DZ): New.
495 (NO371, PPCSPE, PPCISEL, PPCEFS, MULHW): Include PPC_OPCODE_VLE.
496 (PPCVLE): New.
497 (powerpc_opcodes): Add new VLE instructions. Update existing
498 instruction to include PPCVLE if supported.
499 * ppc-dis.c (ppc_opts): Add vle entry.
500 (get_powerpc_dialect): New function.
501 (powerpc_init_dialect): VLE support.
502 (print_insn_big_powerpc): Call get_powerpc_dialect.
503 (print_insn_little_powerpc): Likewise.
504 (operand_value_powerpc): Handle negative shift counts.
505 (print_insn_powerpc): Handle 2-byte instruction lengths.
506
507 2012-05-11 Daniel Richard G. <skunk@iskunk.org>
508
509 PR binutils/14028
510 * configure.in: Invoke ACX_HEADER_STRING.
511 * configure: Regenerate.
512 * config.in: Regenerate.
513 * sysdep.h: If STRINGS_WITH_STRING is defined then include both
514 string.h and strings.h.
515
516 2012-05-11 Nick Clifton <nickc@redhat.com>
517
518 PR binutils/14006
519 * arm-dis.c (print_insn): Fix detection of instruction mode in
520 files containing multiple executable sections.
521
522 2012-05-03 Sean Keys <skeys@ipdatasys.com>
523
524 * Makefile.in, configure: regenerate
525 * disassemble.c (disassembler): Recognize ARCH_XGATE.
526 * xgate-dis.c (read_memory, print_insn, print_insn_xgate):
527 New functions.
528 * configure.in: Recognize xgate.
529 * xgate-dis.c, xgate-opc.c: New files for support of xgate
530 * Makefile.am (CFILES, ALL_MACHINES): New files for disassembly
531 and opcode generation for xgate.
532
533 2012-04-30 DJ Delorie <dj@redhat.com>
534
535 * rx-decode.opc (MOV): Do not sign-extend immediates which are
536 already the maximum bit size.
537 * rx-decode.c: Regenerate.
538
539 2012-04-27 David S. Miller <davem@davemloft.net>
540
541 * sparc-dis.c (v9a_asr_reg_names): Add 'cfr'.
542 * sparc-opc.c (sparc_opcodes): Add rd/wr cases for %cfr.
543
544 * sparc-opc.c (sparc_opcodes): Add 'wr X, %pause' and 'pause'.
545 * sparc-dis.c (v9a_asr_reg_names): Add 'pause'.
546
547 * sparc-opc.c (CBCOND): New define.
548 (CBCOND_XCC): Likewise.
549 (cbcond): New helper macro.
550 (sparc_opcodes): Add compare-and-branch instructions.
551
552 * sparc-dis.c (print_insn_sparc): Handle ')'.
553 * sparc-opc.c (sparc_opcodes): Add crypto instructions.
554
555 * sparc-opc.c (sparc_opcodes): Rework table to put HWCAP values
556 into new struct sparc_opcode 'hwcaps' field instead of 'flags'.
557
558 2012-04-12 David S. Miller <davem@davemloft.net>
559
560 * sparc-dis.c (X_DISP10): Define.
561 (print_insn_sparc): Handle '='.
562
563 2012-04-01 Mike Frysinger <vapier@gentoo.org>
564
565 * bfin-dis.c (fmtconst): Replace decimal handling with a single
566 sprintf call and the '*' field width.
567
568 2012-03-23 Maxim Kuvyrkov <maxim@codesourcery.com>
569
570 * mips-dis.c (mips_arch_choices): Add entry for Broadcom XLP.
571
572 2012-03-16 Alan Modra <amodra@gmail.com>
573
574 * ppc-dis.c (PPC_OPC_SEGS, PPC_OP_TO_SEG): Delete.
575 (powerpc_opcd_indices): Bump array size.
576 (disassemble_init_powerpc): Set powerpc_opcd_indices entries
577 corresponding to unused opcodes to following entry.
578 (lookup_powerpc): New function, extracted and optimised from..
579 (print_insn_powerpc): ..here.
580
581 2012-03-15 Alan Modra <amodra@gmail.com>
582 James Lemke <jwlemke@codesourcery.com>
583
584 * disassemble.c (disassemble_init_for_target): Handle ppc init.
585 * ppc-dis.c (private): New var.
586 (powerpc_init_dialect): Don't return calloc failure, instead use
587 private.
588 (PPC_OPCD_SEGS, PPC_OP_TO_SEG): Define.
589 (powerpc_opcd_indices): New array.
590 (disassemble_init_powerpc): New function.
591 (print_insn_big_powerpc): Don't init dialect here.
592 (print_insn_little_powerpc): Likewise.
593 (print_insn_powerpc): Start search using powerpc_opcd_indices.
594
595 2012-03-10 Edmar Wienskoski <edmar@freescale.com>
596
597 * ppc-dis.c (ppc_opts): Add entries for "e5500" and "e6500".
598 * ppc-opc.c (insert_ls, TMR, ESYNC, XSYNCLE_MASK): New.
599 (PPCVEC2, PPCTMR, E6500): New short names.
600 (powerpc_opcodes): Add vabsdub, vabsduh, vabsduw, dni, mvidsplt,
601 mviwsplt, icblq., mftmr, mttmr, dcblq., miso, lvexbx, lvexhx,
602 lvexwx, stvexbx, stvexhx, stvexwx, lvepx, lvepxl, stvepx, stvepxl,
603 lvtrx, lvtrxl, lvtlx, lvtlxl, stvfrx, stvfrxl, stvflx, stvflxl,
604 lvswx, lvswxl, stvswx, stvswxl, lvsm mnemonics. Accept LS, ESYNC
605 optional operands on sync instruction for E6500 target.
606
607 2012-03-08 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
608
609 * s390-opc.txt: Set instruction type of pku to SS_L2RDRD.
610
611 2012-02-27 Alan Modra <amodra@gmail.com>
612
613 * mt-dis.c: Regenerate.
614
615 2012-02-27 Alan Modra <amodra@gmail.com>
616
617 * v850-opc.c (extract_v8): Rearrange to make it obvious this
618 is the inverse of corresponding insert function.
619 (extract_d22, extract_u9, extract_r4): Likewise.
620 (extract_d9): Correct sign extension.
621 (extract_d16_15): Don't assume "long" is 32 bits, and don't
622 rely on implementation defined behaviour for shift right of
623 signed types.
624 (extract_d16_16, extract_d17_16, extract_i9): Likewise.
625 (extract_d23): Likewise, and correct mask.
626
627 2012-02-27 Alan Modra <amodra@gmail.com>
628
629 * crx-dis.c (print_arg): Mask constant to 32 bits.
630 * crx-opc.c (cst4_map): Use int array.
631
632 2012-02-27 Alan Modra <amodra@gmail.com>
633
634 * arc-dis.c (BITS): Don't use shifts to mask off bits.
635 (FIELDD): Sign extend with xor,sub.
636
637 2012-02-25 Walter Lee <walt@tilera.com>
638
639 * tilegx-opc.c: Handle TILEGX_OPC_LD4S_TLS and TILEGX_OPC_LD_TLS.
640 * tilepro-opc.c: Handle TILEPRO_OPC_LW_TLS and
641 TILEPRO_OPC_LW_TLS_SN.
642
643 2012-02-21 H.J. Lu <hongjiu.lu@intel.com>
644
645 * i386-opc.h (HLEPrefixNone): New.
646 (HLEPrefixLock): Likewise.
647 (HLEPrefixAny): Likewise.
648 (HLEPrefixRelease): Likewise.
649
650 2012-02-08 H.J. Lu <hongjiu.lu@intel.com>
651
652 * i386-dis.c (HLE_Fixup1): New.
653 (HLE_Fixup2): Likewise.
654 (HLE_Fixup3): Likewise.
655 (Ebh1): Likewise.
656 (Evh1): Likewise.
657 (Ebh2): Likewise.
658 (Evh2): Likewise.
659 (Ebh3): Likewise.
660 (Evh3): Likewise.
661 (MOD_C6_REG_7): Likewise.
662 (MOD_C7_REG_7): Likewise.
663 (RM_C6_REG_7): Likewise.
664 (RM_C7_REG_7): Likewise.
665 (XACQUIRE_PREFIX): Likewise.
666 (XRELEASE_PREFIX): Likewise.
667 (dis386): Use Ebh1/Evh1 on add, adc, and, btc, btr, bts,
668 cmpxchg, dec, inc, neg, not, or, sbb, sub, xor and xadd. Use
669 Ebh2/Evh2 on xchg. Use Ebh3/Evh3 on mov.
670 (reg_table): Use Ebh1/Evh1 on add, adc, and, dec, inc, neg,
671 not, or, sbb, sub and xor. Use Ebh3/Evh3 on mov. Use
672 MOD_C6_REG_7 and MOD_C7_REG_7.
673 (mod_table): Add MOD_C6_REG_7 and MOD_C7_REG_7.
674 (rm_table): Add RM_C6_REG_7 and RM_C7_REG_7. Add xend and
675 xtest.
676 (prefix_name): Handle XACQUIRE_PREFIX and XRELEASE_PREFIX.
677 (CMPXCHG8B_Fixup): Handle HLE prefix on cmpxchg8b.
678
679 * i386-gen.c (cpu_flag_init): Add CPU_HLE_FLAGS and
680 CPU_RTM_FLAGS.
681 (cpu_flags): Add CpuHLE and CpuRTM.
682 (opcode_modifiers): Add HLEPrefixOk.
683
684 * i386-opc.h (CpuHLE): New.
685 (CpuRTM): Likewise.
686 (HLEPrefixOk): Likewise.
687 (i386_cpu_flags): Add cpuhle and cpurtm.
688 (i386_opcode_modifier): Add hleprefixok.
689
690 * i386-opc.tbl: Add HLEPrefixOk=3 to mov. Add HLEPrefixOk to
691 add, adc, and, btc, btr, bts, cmpxchg, dec, inc, neg, not, or,
692 sbb, sub, xor and xadd. Add HLEPrefixOk=2 to xchg with memory
693 operand. Add xacquire, xrelease, xabort, xbegin, xend and
694 xtest.
695 * i386-init.h: Regenerated.
696 * i386-tbl.h: Likewise.
697
698 2012-01-24 DJ Delorie <dj@redhat.com>
699
700 * rl78-decode.opc (rl78_decode_opcode): Add NOT1.
701 * rl78-decode.c: Regenerate.
702
703 2012-01-17 James Murray <jsm@jsm-net.demon.co.uk>
704
705 PR binutils/10173
706 * cr16-dis.c (print_arg): Test symtab_size not num_symbols.
707
708 2012-01-17 Andreas Schwab <schwab@linux-m68k.org>
709
710 * m68k-opc.c (m68k_opcodes): Fix entries for pmove with BADx/BACx
711 register and move them after pmove with PSR/PCSR register.
712
713 2012-01-13 H.J. Lu <hongjiu.lu@intel.com>
714
715 * i386-dis.c (mod_table): Add vmfunc.
716
717 * i386-gen.c (cpu_flag_init): Add CPU_VMFUNC_FLAGS.
718 (cpu_flags): CpuVMFUNC.
719
720 * i386-opc.h (CpuVMFUNC): New.
721 (i386_cpu_flags): Add cpuvmfunc.
722
723 * i386-opc.tbl: Add vmfunc.
724 * i386-init.h: Regenerated.
725 * i386-tbl.h: Likewise.
726
727 For older changes see ChangeLog-2011
728 \f
729 Local Variables:
730 mode: change-log
731 left-margin: 8
732 fill-column: 74
733 version-control: never
734 End:
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