opcodes/ChangeLog

   1 2013-02-06  Sandra Loosemore  <sandra@codesourcery.com>
   2             Andrew Jenner <andrew@codesourcery.com>
   3
   4         Based on patches from Altera Corporation.
   5
   6         * Makefile.am (TARGET_LIBOPCODES_CFILES): Add nios2-dis.c and
   7         nios2-opc.c.
   8         * Makefile.in: Regenerated.
   9         * configure.in: Add case for bfd_nios2_arch.
  10         * configure: Regenerated.
  11         * disassemble.c (ARCH_nios2): Define.
  12         (disassembler): Add case for bfd_arch_nios2.
  13         * nios2-dis.c: New file.
  14         * nios2-opc.c: New file.
  15
  16 2013-02-04  Alan Modra  <amodra@gmail.com>
  17
  18         * po/POTFILES.in: Regenerate.
  19         * rl78-decode.c: Regenerate.
  20         * rx-decode.c: Regenerate.
  21
  22 2013-01-30  Yufeng Zhang  <yufeng.zhang@arm.com>
  23
  24         * aarch64-tbl.h (aarch64_opcode_table): Flag sshll, sshll2, ushll and
  25         ushll2 with F_HAS_ALIAS.  Add entries for sxtl, sxtl2, uxtl and uxtl2.
  26         * aarch64-asm.c (convert_xtl_to_shll): New function.
  27         (convert_to_real): Handle OP_SXTL, OP_SXTL2, OP_UXTL and OP_UXTL2 by
  28         calling convert_xtl_to_shll.
  29         * aarch64-dis.c (convert_shll_to_xtl): New function.
  30         (convert_to_alias): Handle OP_SXTL, OP_SXTL2, OP_UXTL and OP_UXTL2 by
  31         calling convert_shll_to_xtl.
  32         * aarch64-gen.c: Update copyright year.
  33         * aarch64-asm-2.c: Re-generate.
  34         * aarch64-dis-2.c: Re-generate.
  35         * aarch64-opc-2.c: Re-generate.
  36
  37 2013-01-24  Nick Clifton  <nickc@redhat.com>
  38
  39         * v850-dis.c: Add support for e3v5 architecture.
  40         * v850-opc.c: Likewise.
  41
  42 2013-01-17  Yufeng Zhang  <yufeng.zhang@arm.com>
  43
  44         * aarch64-asm.c (aarch64_ins_advsimd_imm_modified): Handle 8-bit MOVI.
  45         * aarch64-dis.c (aarch64_ext_advsimd_imm_modified): Likewise.
  46         * aarch64-opc.c (operand_general_constraint_met_p): For
  47         AARCH64_MOD_LSL, move the range check on the shift amount before the
  48         alignment check; change to call set_sft_amount_out_of_range_error
  49         instead of set_imm_out_of_range_error.
  50         * aarch64-tbl.h (QL_SIMD_IMM_B): Replace NIL with LSL.
  51         (aarch64_opcode_table): Remove the OP enumerator from the asimdimm
  52         8-bit MOVI entry; change the 2nd operand from SIMD_IMM to
  53         SIMD_IMM_SFT.
  54
  55 2013-01-16  H.J. Lu  <hongjiu.lu@intel.com>
  56
  57         * i386-gen.c (operand_type_init): Add OPERAND_TYPE_IMM32_64.
  58
  59         * i386-init.h: Regenerated.
  60         * i386-tbl.h: Likewise.
  61
  62 2013-01-15  Nick Clifton  <nickc@redhat.com>
  63
  64         * v850-dis.c (get_operand_value): Sign extend V850E_IMMEDIATE
  65         values.
  66         * v850-opc.c (IMM16LO): Add V850_OPERAND_SIGNED attribute.
  67
  68 2013-01-14  Will Newton <will.newton@imgtec.com>
  69
  70         * metag-dis.c (REG_WIDTH): Increase to 64.
  71
  72 2013-01-10  Peter Bergner <bergner@vnet.ibm.com>
  73
  74         * ppc-dis.c (ppc_opts): Add "power8", "pwr8" and "htm" entries.
  75         * ppc-opc.c (HTM_R, HTM_SI, XRTRB_MASK, XRTRARB_MASK, XRTLRARB_MASK,
  76         XRTARARB_MASK, XRTBFRARB_MASK, XRCL, POWER8, PPCHTM): New defines.
  77         (SH6): Update.
  78         <"tabort.", "tabortdc.", "tabortdci.", "tabortwc.",
  79         "tabortwci.", "tbegin.", "tcheck", "tend.", "trechkpt.",
  80         "treclaim.", "tsr.">: Add POWER8 HTM opcodes.
  81         <"tendall.", "tresume.", "tsuspend.">: Add POWER8 HTM extended opcodes.
  82
  83 2013-01-10  Will Newton <will.newton@imgtec.com>
  84
  85         * Makefile.am: Add Meta.
  86         * configure.in: Add Meta.
  87         * disassemble.c: Add Meta support.
  88         * metag-dis.c: New file.
  89         * Makefile.in: Regenerate.
  90         * configure: Regenerate.
  91
  92 2013-01-07  Kaushik Phatak  <kaushik.phatak@kpitcummins.com>
  93
  94         * cr16-dis.c (make_instruction): Rename to cr16_make_instruction.
  95         (match_opcode): Rename to cr16_match_opcode.
  96
  97 2013-01-04  Juergen Urban <JuergenUrban@gmx.de>
  98
  99         * mips-dis.c: Add names for CP0 registers of r5900.
 100         * mips-opc.c: Add M_SQ_AB and M_LQ_AB to support larger range for
 101         instructions sq and lq.
 102         Add support for MIPS r5900 CPU.
 103         Add support for 128 bit MMI (Multimedia Instructions).
 104         Add support for EE instructions (Emotion Engine).
 105         Disable unsupported floating point instructions (64 bit and
 106         undefined compare operations).
 107         Enable instructions of MIPS ISA IV which are supported by r5900.
 108         Disable 64 bit co processor instructions.
 109         Disable 64 bit multiplication and division instructions.
 110         Disable instructions for co-processor 2 and 3, because these are
 111         not supported (preparation for later VU0 support (Vector Unit)).
 112         Disable cvt.w.s because this behaves like trunc.w.s and the
 113         correct execution can't be ensured on r5900.
 114         Add trunc.w.s using the opcode encoding of cvt.w.s on r5900. This
 115         will confuse less developers and compilers.
 116
 117 2013-01-04  Yufeng Zhang  <yufeng.zhang@arm.com>
 118
 119         * aarch64-opc.c (aarch64_print_operand): Change to print
 120         AARCH64_OPND_IMM_MOV in hexadecimal in the instruction and in decimal
 121         in comment.
 122         * aarch64-tbl.h (aarch64_opcode_table): Remove the 'F_PSEUDO' flag
 123         from the opcode entries of OP_MOV_IMM_LOG, OP_MOV_IMM_WIDEN and
 124         OP_MOV_IMM_WIDE.
 125
 126 2013-01-04  Yufeng Zhang  <yufeng.zhang@arm.com>
 127
 128         * aarch64-opc.c (aarch64_prfops): Update to support PLIL1KEEP,
 129         PLIL1STRM, PLIL2KEEP, PLIL2STRM, PLIL3KEEP and PLIL3STRM.
 130
 131 2013-01-02  H.J. Lu  <hongjiu.lu@intel.com>
 132
 133         * i386-gen.c (process_copyright): Update copyright year to 2013.
 134
 135 2013-01-02  Kaushik Phatak  <kaushik.phatak@kpitcummins.com>
 136
 137         * cr16-dis.c (match_opcode,make_instruction): Remove static
 138         declaration.
 139         (dwordU,wordU): Moved typedefs to opcode/cr16.h
 140         (cr16_words,cr16_allWords,cr16_currInsn): Added prefix 'cr16_'.
 141
 142 For older changes see ChangeLog-2012
 143 \f
 144 Copyright (C) 2013 Free Software Foundation, Inc.
 145
 146 Copying and distribution of this file, with or without modification,
 147 are permitted in any medium without royalty provided the copyright
 148 notice and this notice are preserved.
 149
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