1 2008-04-28 Adam Nemet <anemet@caviumnetworks.com>
3 * mips-opc.c (mips_builtin_opcodes): Mark prefx and c1
4 instructions FP_S. Mark l.s, li.s, lwc1, swc1, s.s, trunc.w.s and
5 cop1 macros INSN2_M_FP_S. Mark l.d, li.d, ldc1 and sdc1 macros
6 INSN2_M_FP_D. Mark trunc.w.d macro INSN2_M_FP_S and INSN2_M_FP_D.
8 2008-04-25 David S. Miller <davem@davemloft.net>
10 * sparc-dis.c: Emit %stick instead of %sys_tick, and %stick_cmpr
11 instead of %sys_tick_cmpr, as suggested in architecture manuals.
13 2008-04-23 Paolo Bonzini <bonzini@gnu.org>
15 * aclocal.m4: Regenerate.
16 * configure: Regenerate.
18 2008-04-23 David S. Miller <davem@davemloft.net>
20 * sparc-opc.c (asi_table): Add UltraSPARC and Niagara
22 (prefetch_table): Add missing values.
24 2008-04-22 H.J. Lu <hongjiu.lu@intel.com>
26 * i386-gen.c (opcode_modifiers): Add NoAVX.
28 * i386-opc.h (NoAVX): New.
30 (i386_opcode_modifier): Add noavx.
32 * i386-opc.tbl: Add NoAVX to SSE, SSE2, SSE3 and SSSE3
33 instructions which don't have AVX equivalent.
34 * i386-tbl.h: Regenerated.
36 2008-04-18 H.J. Lu <hongjiu.lu@intel.com>
38 * i386-dis.c (OP_VEX_FMA): New.
39 (OP_EX_VexImmW): Likewise.
41 (Vex128FMA): Likewise.
42 (EXVexImmW): Likewise.
43 (get_vex_imm8): Likewise.
44 (OP_EX_VexReg): Likewise.
45 (vex_i4_done): Renamed to ...
47 (prefix_table): Replace EXVexW with EXVexImmW on vpermil2ps
48 and vpermil2pd. Replace Vex/Vex128 with VexFMA/Vex128FMA on
50 (print_insn): Updated.
51 (OP_EX_VexW): Rewrite to swap register in VEX with EX.
52 (OP_REG_VexI4): Check invalid high registers.
54 2008-04-16 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com>
55 Michael Meissner <michael.meissner@amd.com>
57 * i386-opc.tbl: Fix protX to allow memory in the middle operand.
58 * i386-tbl.h: Regenerate from i386-opc.tbl.
60 2008-04-14 Edmar Wienskoski <edmar@freescale.com>
62 * ppc-dis.c (powerpc_dialect): Handle "e500mc". Extend "e500" to
63 accept Power E500MC instructions.
64 (print_ppc_disassembler_options): Document -Me500mc.
65 * ppc-opc.c (DUIS, DUI, T): New.
66 (XRT, XRTRA): Likewise.
68 (powerpc_opcodes): Add new Power E500MC instructions.
70 2008-04-10 Andreas Krebbel <krebbel1@de.ibm.com>
72 * s390-dis.c (init_disasm): Evaluate disassembler_options.
73 (print_s390_disassembler_options): New function.
74 * disassemble.c (disassembler_usage): Invoke
75 print_s390_disassembler_options.
77 2008-04-10 Andreas Krebbel <krebbel1@de.ibm.com>
79 * s390-mkopc.c (insertExpandedMnemonic): Expand string sizes
80 of local variables used for mnemonic parsing: prefix, suffix and
83 2008-04-10 Andreas Krebbel <krebbel1@de.ibm.com>
85 * s390-mkopc.c (s390_cond_ext_format): Add back the mnemonic
86 extensions for conditional jumps (o, p, m, nz, z, nm, np, no).
87 (s390_crb_extensions): New extensions table.
88 (insertExpandedMnemonic): Handle '$' tag.
89 * s390-opc.txt: Remove conditional jump variants which can now
90 be expanded automatically.
91 Replace '*' tag with '$' in the compare and branch instructions.
93 2008-04-07 H.J. Lu <hongjiu.lu@intel.com>
95 * i386-dis.c (PREFIX_VEX_38XX): Add a tab.
96 (PREFIX_VEX_3AXX): Likewis.
98 2008-04-07 H.J. Lu <hongjiu.lu@intel.com>
100 * i386-opc.tbl: Remove 4 extra blank lines.
102 2008-04-04 H.J. Lu <hongjiu.lu@intel.com>
104 * i386-gen.c (cpu_flag_init): Replace CPU_CLMUL_FLAGS/CpuCLMUL
105 with CPU_PCLMUL_FLAGS/CpuPCLMUL.
106 (cpu_flags): Replace CpuCLMUL with CpuPCLMUL.
107 * i386-opc.tbl: Likewise.
109 * i386-opc.h (CpuCLMUL): Renamed to ...
112 (i386_cpu_flags): Replace cpuclmul with cpupclmul.
114 * i386-init.h: Regenerated.
116 2008-04-03 H.J. Lu <hongjiu.lu@intel.com>
118 * i386-dis.c (OP_E_register): New.
119 (OP_E_memory): Likewise.
121 (OP_EX_Vex): Likewise.
122 (OP_EX_VexW): Likewise.
123 (OP_XMM_Vex): Likewise.
124 (OP_XMM_VexW): Likewise.
125 (OP_REG_VexI4): Likewise.
126 (PCLMUL_Fixup): Likewise.
127 (VEXI4_Fixup): Likewise.
128 (VZERO_Fixup): Likewise.
129 (VCMP_Fixup): Likewise.
130 (VPERMIL2_Fixup): Likewise.
131 (rex_original): Likewise.
132 (rex_ignored): Likewise.
153 (VPERMIL2): Likewise.
154 (xmm_mode): Likewise.
155 (xmmq_mode): Likewise.
156 (ymmq_mode): Likewise.
157 (vex_mode): Likewise.
158 (vex128_mode): Likewise.
159 (vex256_mode): Likewise.
160 (USE_VEX_C4_TABLE): Likewise.
161 (USE_VEX_C5_TABLE): Likewise.
162 (USE_VEX_LEN_TABLE): Likewise.
163 (VEX_C4_TABLE): Likewise.
164 (VEX_C5_TABLE): Likewise.
165 (VEX_LEN_TABLE): Likewise.
166 (REG_VEX_XX): Likewise.
167 (MOD_VEX_XXX): Likewise.
168 (PREFIX_0F38DB..PREFIX_0F38DF): Likewise.
169 (PREFIX_0F3A44): Likewise.
170 (PREFIX_0F3ADF): Likewise.
171 (PREFIX_VEX_XXX): Likewise.
173 (VEX_OF38): Likewise.
174 (VEX_OF3A): Likewise.
175 (VEX_LEN_XXX): Likewise.
177 (need_vex): Likewise.
178 (need_vex_reg): Likewise.
179 (vex_i4_done): Likewise.
180 (vex_table): Likewise.
181 (vex_len_table): Likewise.
182 (OP_REG_VexI4): Likewise.
183 (vex_cmp_op): Likewise.
184 (pclmul_op): Likewise.
185 (vpermil2_op): Likewise.
188 (PREFIX_0F38F0): Likewise.
189 (PREFIX_0F3A60): Likewise.
190 (reg_table): Add REG_VEX_71...REG_VEX_73 and REG_VEX_AE.
191 (prefix_table): Add PREFIX_0F38DB..PREFIX_0F38DF, PREFIX_0F3ADF
192 and PREFIX_VEX_XXX entries.
193 (x86_64_table): Use VEX_C4_TABLE and VEX_C5_TABLE.
194 (three_byte_table): Use PREFIX_0F38DB..PREFIX_0F38DF and
196 (mod_table): Use VEX_C4_TABLE, VEX_C5_TABLE and VEX_LEN_TABLE.
197 Add MOD_VEX_XXX entries.
198 (ckprefix): Initialize rex_original and rex_ignored. Store the
199 REX byte in rex_original.
200 (get_valid_dis386): Handle the implicit prefix in VEX prefix
201 bytes and USE_VEX_LEN_TABLE/USE_VEX_C4_TABLE/USE_VEX_C5_TABLE.
202 (print_insn): Set need_vex/need_vex_reg/vex_i4_done to 0 before
203 calling get_valid_dis386. Use rex_original and rex_ignored when
205 (putop): Handle "XY".
206 (intel_operand_size): Handle VEX, xmm_mode, xmmq_mode and
208 (OP_E_extended): Updated to use OP_E_register and
210 (OP_XMM): Handle VEX.
212 (XMM_Fixup): Likewise.
213 (CMP_Fixup): Use ARRAY_SIZE.
215 * i386-gen.c (cpu_flag_init): Add CpuAES, CPU_CLMUL_FLAGS,
216 CPU_FMA_FLAGS and CPU_AVX_FLAGS.
217 (operand_type_init): Add OPERAND_TYPE_REGYMM and
218 OPERAND_TYPE_VEX_IMM4.
219 (cpu_flags): Add CpuAVX, CpuAES, CpuCLMUL and CpuFMA.
220 (opcode_modifiers): Add Implicit1stXmm0, Vex, Vex256, VexNDD,
221 VexNDS, VexW0, VexW1, Vex0F, Vex0F38, Vex0F3A, Vex3Sources,
222 VexImmExt and SSE2AVX.
223 (operand_types): Add RegYMM, Ymmword and Vex_Imm4.
225 * i386-opc.h (CpuAVX): New.
227 (CpuCLMUL): Likewise.
238 (Vex3Sources): Likewise.
239 (VexImmExt): Likewise.
243 (Vex_Imm4): Likewise.
244 (Implicit1stXmm0): Likewise.
247 (ByteOkIntel): Likewise.
250 (Unspecified): Likewise.
252 (i386_cpu_flags): Add cpuavx, cpuaes, cpuclmul and cpufma.
253 (i386_opcode_modifier): Add implicit1stxmm0, vex, vex256,
254 vexnds, vexndd, vexw0, vexw1, vex0f, vex0f38, vex0f3a,
255 vex3sources, veximmext and sse2avx.
256 (i386_operand_type): Add regymm, ymmword and vex_imm4.
258 * i386-opc.tbl: Add AES, CLMUL, AVX and FMA new instructions.
260 * i386-reg.tbl: Add AVX registers, ymm0..ymm15.
262 * i386-init.h: Regenerated.
263 * i386-tbl.h: Likewise.
265 2008-03-26 Bernd Schmidt <bernd.schmidt@analog.com>
267 From Robin Getz <robin.getz@analog.com>
268 * bfin-dis.c (bu32): Typedef.
269 (enum const_forms_t): Add c_uimm32 and c_huimm32.
270 (constant_formats[]): Add uimm32 and huimm16.
275 (luimm16_val): Define.
276 (struct saved_state): Define.
277 (GREG, DPREG, DREG, PREG, SPREG, FPREG, IREG, MREG, BREG, LREG,
278 A0XREG, A0WREG, A1XREG, A1WREG,CCREG, LC0REG, LT0REG, LB0REG,
279 LC1REG, LT1REG, LB1REG, RETSREG, PCREG): Define.
281 (decode_LDIMMhalf_0): Print out the whole register value.
283 From Jie Zhang <jie.zhang@analog.com>
284 * bfin-dis.c (decode_dsp32mac_0): Decode (IU) option for
285 multiply and multiply-accumulate to data register instruction.
287 * bfin-dis.c: (c_uimm4s4d, c_imm5d, c_imm7d, c_imm16d, c_uimm16s4d,
288 c_imm32, c_huimm32e): Define.
289 (constant_formats): Add flags for printing decimal, leading spaces, and
291 (comment, parallel): Add global flags in all disassembly.
292 (fmtconst): Take advantage of new flags, and print default in hex.
293 (fmtconst_val): Likewise.
294 (decode_macfunc): Be consistant with spaces, tabs, comments,
295 capitalization in disassembly, fix minor coding style issues.
296 (reg_names, amod0, amod1, amod0amod2, aligndir, get_allreg): Likewise.
297 (decode_ProgCtrl_0, decode_PushPopMultiple_0, decode_CCflag_0,
298 decode_CC2dreg_0, decode_CC2stat_0, decode_BRCC_0, decode_UJUMP_0,
299 decode_REGMV_0, decode_ALU2op_0, decode_PTR2op_0, decode_LOGI2op_0,
300 decode_COMP3op_0, decode_COMPI2opD_0, decode_COMPI2opP_0,
301 decode_LDSTpmod_0, decode_dagMODim_0, decode_dagMODik_0,
302 decode_dspLDST_0, decode_LDST_0, decode_LDSTiiFP_0, decode_LDSTii_0,
303 decode_LoopSetup_0, decode_LDIMMhalf_0, decode_CALLa_0,
304 decode_LDSTidxI_0, decode_linkage_0, decode_dsp32alu_0,
305 decode_dsp32shift_0, decode_dsp32shiftimm_0, decode_pseudodbg_assert_0,
306 _print_insn_bfin, print_insn_bfin): Likewise.
308 2008-03-17 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
310 * aclocal.m4: Regenerate.
311 * configure: Likewise.
312 * Makefile.in: Likewise.
314 2008-03-13 Alan Modra <amodra@bigpond.net.au>
316 * Makefile.am: Run "make dep-am".
317 * Makefile.in: Regenerate.
318 * configure: Regenerate.
320 2008-03-07 Alan Modra <amodra@bigpond.net.au>
322 * ppc-opc.c (powerpc_opcodes): Order and format.
324 2008-03-01 H.J. Lu <hongjiu.lu@intel.com>
326 * i386-opc.tbl: Allow 16-bit near indirect branches for x86-64.
327 * i386-tbl.h: Regenerated.
329 2008-02-23 H.J. Lu <hongjiu.lu@intel.com>
331 * i386-opc.tbl: Disallow 16-bit near indirect branches for
333 * i386-tbl.h: Regenerated.
335 2008-02-21 Jan Beulich <jbeulich@novell.com>
337 * i386-opc.tbl: Allow Dword for far indirect call. Allow Dword
338 and Fword for far indirect jmp. Allow Reg16 and Word for near
339 indirect jmp on x86-64. Disallow Fword for lcall.
340 * i386-tbl.h: Re-generate.
342 2008-02-18 M R Swami Reddy <MR.Swami.Reddy@nsc.com>
344 * cr16-opc.c (cr16_num_optab): Defined
346 2008-02-16 H.J. Lu <hongjiu.lu@intel.com>
348 * i386-gen.c (operand_type_init): Add OPERAND_TYPE_INOUTPORTREG.
349 * i386-init.h: Regenerated.
351 2008-02-14 Nick Clifton <nickc@redhat.com>
354 * configure.in (SHARED_LIBADD): Select the correct host specific
355 file extension for shared libraries.
356 * configure: Regenerate.
358 2008-02-13 Jan Beulich <jbeulich@novell.com>
360 * i386-opc.h (RegFlat): New.
361 * i386-reg.tbl (flat): Add.
362 * i386-tbl.h: Re-generate.
364 2008-02-13 Jan Beulich <jbeulich@novell.com>
366 * i386-dis.c (a_mode): New.
367 (cond_jump_mode): Adjust.
368 (Ma): Change to a_mode.
369 (intel_operand_size): Handle a_mode.
370 * i386-opc.tbl: Allow Dword and Qword for bound.
371 * i386-tbl.h: Re-generate.
373 2008-02-13 Jan Beulich <jbeulich@novell.com>
375 * i386-gen.c (process_i386_registers): Process new fields.
376 * i386-opc.h (reg_entry): Shrink reg_flags and reg_num to
377 unsigned char. Add dw2_regnum and Dw2Inval.
378 * i386-reg.tbl: Provide initializers for dw2_regnum. Add pseudo
380 * i386-tbl.h: Re-generate.
382 2008-02-11 H.J. Lu <hongjiu.lu@intel.com>
384 * i386-gen.c (cpu_flag_init): Add CPU_XSAVE_FLAGS.
385 * i386-init.h: Updated.
387 2008-02-11 H.J. Lu <hongjiu.lu@intel.com>
389 * i386-gen.c (cpu_flags): Add CpuXsave.
391 * i386-opc.h (CpuXsave): New.
393 (i386_cpu_flags): Add cpuxsave.
395 * i386-dis.c (MOD_0FAE_REG_4): New.
396 (RM_0F01_REG_2): Likewise.
397 (MOD_0FAE_REG_5): Updated.
398 (RM_0F01_REG_3): Likewise.
399 (reg_table): Use MOD_0FAE_REG_4.
400 (mod_table): Use RM_0F01_REG_2. Add MOD_0FAE_REG_4. Updated
402 (rm_table): Add RM_0F01_REG_2.
404 * i386-opc.tbl: Add xsave, xrstor, xgetbv and xsetbv.
405 * i386-init.h: Regenerated.
406 * i386-tbl.h: Likewise.
408 2008-02-11 Jan Beulich <jbeulich@novell.com>
410 * i386-opc.tbl: Remove Disp32S from CpuNo64 opcodes. Remove
411 Disp16 from Cpu64 non-jump opcodes (including loop and j?cxz).
412 * i386-tbl.h: Re-generate.
414 2008-02-04 H.J. Lu <hongjiu.lu@intel.com>
417 * configure: Regenerated.
419 2008-02-04 Adam Nemet <anemet@caviumnetworks.com>
421 * mips-dis.c: Update copyright.
422 (mips_arch_choices): Add Octeon.
423 * mips-opc.c: Update copyright.
425 (mips_builtin_opcodes): Add Octeon instruction synciobdma.
427 2008-01-29 Alan Modra <amodra@bigpond.net.au>
429 * ppc-opc.c: Support optional L form mtmsr.
431 2008-01-24 H.J. Lu <hongjiu.lu@intel.com>
433 * i386-dis.c (OP_E_extended): Handle r12 like rsp.
435 2008-01-23 H.J. Lu <hongjiu.lu@intel.com>
437 * i386-gen.c (cpu_flag_init): Add CpuLM to CPU_GENERIC64_FLAGS.
438 * i386-init.h: Regenerated.
440 2008-01-23 Tristan Gingold <gingold@adacore.com>
442 * ia64-dis.c (print_insn_ia64): Display symbolic name of ar.fcr,
443 ar.eflag, ar.csd, ar.ssd, ar.cflg, ar.fsr, ar.fir and ar.fdr.
445 2008-01-22 H.J. Lu <hongjiu.lu@intel.com>
447 * i386-gen.c (cpu_flag_init): Remove CpuMMX2.
448 (cpu_flags): Likewise.
450 * i386-opc.h (CpuMMX2): Removed.
453 * i386-opc.tbl: Replace CpuMMX2 with CpuSSE|Cpu3dnowA.
454 * i386-init.h: Regenerated.
455 * i386-tbl.h: Likewise.
457 2008-01-22 H.J. Lu <hongjiu.lu@intel.com>
459 * i386-gen.c (cpu_flag_init): Add CPU_VMX_FLAGS and
461 * i386-init.h: Regenerated.
463 2008-01-15 H.J. Lu <hongjiu.lu@intel.com>
465 * i386-opc.tbl: Use Qword on movddup.
466 * i386-tbl.h: Regenerated.
468 2008-01-15 H.J. Lu <hongjiu.lu@intel.com>
470 * i386-opc.tbl: Put back 16bit movsx/movzx for AT&T syntax.
471 * i386-tbl.h: Regenerated.
473 2008-01-15 H.J. Lu <hongjiu.lu@intel.com>
475 * i386-dis.c (Mx): New.
476 (PREFIX_0FC3): Likewise.
477 (PREFIX_0FC7_REG_6): Updated.
478 (dis386_twobyte): Use PREFIX_0FC3.
479 (prefix_table): Add PREFIX_0FC3. Use Mq on movntq and movntsd.
480 Use Mx on movntps, movntpd, movntdq and movntdqa. Use Md on
483 2008-01-14 H.J. Lu <hongjiu.lu@intel.com>
485 * i386-gen.c (opcode_modifiers): Add IntelSyntax.
486 (operand_types): Add Mem.
488 * i386-opc.h (IntelSyntax): New.
489 * i386-opc.h (Mem): New.
491 (Opcode_Modifier_Max): Updated.
492 (i386_opcode_modifier): Add intelsyntax.
493 (i386_operand_type): Add mem.
495 * i386-opc.tbl: Remove Reg16 from movnti. Add sizes to more
498 * i386-reg.tbl: Add size for accumulator.
500 * i386-init.h: Regenerated.
501 * i386-tbl.h: Likewise.
503 2008-01-13 H.J. Lu <hongjiu.lu@intel.com>
505 * i386-opc.h (Byte): Fix a typo.
507 2008-01-12 H.J. Lu <hongjiu.lu@intel.com>
510 * i386-gen.c (operand_type_init): Add Dword to
511 OPERAND_TYPE_ACC32. Add Qword to OPERAND_TYPE_ACC64.
512 (opcode_modifiers): Remove CheckSize, Byte, Word, Dword,
514 (operand_types): Add Byte, Word, Dword, Fword, Qword, Tbyte,
515 Xmmword, Unspecified and Anysize.
516 (set_bitfield): Make Mmword an alias of Qword. Make Oword
519 * i386-opc.h (CheckSize): Removed.
527 (i386_opcode_modifier): Remove checksize, byte, word, dword,
531 (Unspecified): Likewise.
533 (i386_operand_type): Add byte, word, dword, fword, qword,
534 tbyte xmmword, unspecified and anysize.
536 * i386-opc.tbl: Updated to use Byte, Word, Dword, Fword, Qword,
537 Tbyte, Xmmword, Unspecified and Anysize.
539 * i386-reg.tbl: Add size for accumulator.
541 * i386-init.h: Regenerated.
542 * i386-tbl.h: Likewise.
544 2008-01-10 H.J. Lu <hongjiu.lu@intel.com>
546 * i386-dis.c (REG_0F0E): Renamed to REG_0F0D.
548 (reg_table): Updated.
549 (dis386_twobyte): Updated. Use "nopQ" on 0x19 to 0x1e.
550 (twobyte_has_modrm): Set 1 for 0x19 to 0x1e.
552 2008-01-08 H.J. Lu <hongjiu.lu@intel.com>
554 * i386-gen.c (set_bitfield): Use fail () on error.
556 2008-01-08 H.J. Lu <hongjiu.lu@intel.com>
558 * i386-gen.c (lineno): New.
559 (filename): Likewise.
560 (set_bitfield): Report filename and line numer on error.
561 (process_i386_opcodes): Set filename and update lineno.
562 (process_i386_registers): Likewise.
564 2008-01-05 H.J. Lu <hongjiu.lu@intel.com>
566 * i386-gen.c (opcode_modifiers): Rename IntelMnemonic to
569 * i386-opc.h (IntelMnemonic): Renamed to ..
571 (Opcode_Modifier_Max): Updated.
572 (i386_opcode_modifier): Remove intelmnemonic. Add attsyntax
575 * i386-opc.tbl: Remove IntelMnemonic and update with ATTSyntax
576 on fsub, fubp, fsubr, fsubrp, div, fdivp, fdivr and fdivrp.
577 * i386-tbl.h: Regenerated.
579 2008-01-04 H.J. Lu <hongjiu.lu@intel.com>
581 * i386-gen.c: Update copyright to 2008.
582 * i386-opc.h: Likewise.
583 * i386-opc.tbl: Likewise.
585 * i386-init.h: Regenerated.
586 * i386-tbl.h: Likewise.
588 2008-01-04 H.J. Lu <hongjiu.lu@intel.com>
590 * i386-opc.tbl: Add NoRex64 to extractps, movmskpd, movmskps,
591 pextrb, pextrw, pinsrb, pinsrw and pmovmskb.
592 * i386-tbl.h: Regenerated.
594 2008-01-03 H.J. Lu <hongjiu.lu@intel.com>
596 * i386-gen.c (cpu_flag_init): Remove CpuSSE4_1_Or_5 and
598 (cpu_flags): Likewise.
600 * i386-opc.h (CpuSSE4_1_Or_5): Removed.
601 (CpuSSE4_2_Or_ABM): Likewise.
603 (i386_cpu_flags): Remove cpusse4_1_or_5 and cpusse4_2_or_abm.
605 * i386-opc.tbl: Replace CpuSSE4_1_Or_5, CpuSSE4_2_Or_ABM and
606 Cpu686|CpuPadLock with CpuSSE4_1|CpuSSE5, CpuABM|CpuSSE4_2
607 and CpuPadLock, respectively.
608 * i386-init.h: Regenerated.
609 * i386-tbl.h: Likewise.
611 2008-01-03 H.J. Lu <hongjiu.lu@intel.com>
613 * i386-gen.c (opcode_modifiers): Remove No_xSuf.
615 * i386-opc.h (No_xSuf): Removed.
616 (CheckSize): Updated.
618 * i386-tbl.h: Regenerated.
620 2008-01-02 H.J. Lu <hongjiu.lu@intel.com>
622 * i386-gen.c (cpu_flag_init): Add CpuSSE4_2_Or_ABM to
623 CPU_AMDFAM10_FLAGS, CPU_SSE4_2_FLAGS, CpuABM and
625 (cpu_flags): Add CpuSSE4_2_Or_ABM.
627 * i386-opc.h (CpuSSE4_2_Or_ABM): New.
629 (i386_cpu_flags): Add cpusse4_2_or_abm.
631 * i386-opc.tbl: Use CpuSSE4_2_Or_ABM instead of
632 CpuABM|CpuSSE4_2 on popcnt.
633 * i386-init.h: Regenerated.
634 * i386-tbl.h: Likewise.
636 2008-01-02 H.J. Lu <hongjiu.lu@intel.com>
638 * i386-opc.h: Update comments.
640 2008-01-02 H.J. Lu <hongjiu.lu@intel.com>
642 * i386-gen.c (opcode_modifiers): Use Qword instead of QWord.
643 * i386-opc.h: Likewise.
644 * i386-opc.tbl: Likewise.
646 2008-01-02 H.J. Lu <hongjiu.lu@intel.com>
649 * i386-gen.c (opcode_modifiers): Add No_xSuf, CheckSize,
650 Byte, Word, Dword, QWord and Xmmword.
652 * i386-opc.h (No_xSuf): New.
653 (CheckSize): Likewise.
660 (i386_opcode_modifier): Add No_xSuf, CheckSize, Byte, Word,
661 Dword, QWord and Xmmword.
663 * i386-opc.tbl: Add CheckSize|QWord to movq if IgnoreSize is
665 * i386-tbl.h: Regenerated.
667 2008-01-02 Mark Kettenis <kettenis@gnu.org>
669 * m88k-dis.c (instructions): Fix fcvt.* instructions.
672 For older changes see ChangeLog-2007
678 version-control: never