1 2005-10-25 Alan Modra <amodra@bigpond.net.au>
3 * po/POTFILES.in: Regenerate.
4 * po/opcodes.pot: Regenerate.
6 2005-10-24 Jan Beulich <jbeulich@novell.com>
8 * ia64-asmtab.c: Regenerate.
10 2005-10-21 DJ Delorie <dj@redhat.com>
12 * m32c-asm.c: Regenerate.
13 * m32c-desc.c: Regenerate.
14 * m32c-desc.h: Regenerate.
15 * m32c-dis.c: Regenerate.
16 * m32c-ibld.c: Regenerate.
17 * m32c-opc.c: Regenerate.
18 * m32c-opc.h: Regenerate.
20 2005-10-21 Nick Clifton <nickc@redhat.com>
22 * bfin-dis.c: Tidy up code, removing redundant constructs.
24 2005-10-19 Martin Schwidefsky <schwidefsky@de.ibm.com>
26 * s390-opc.txt: Add unnormalized hfp multiply and multiply-and-add
29 2005-10-18 Nick Clifton <nickc@redhat.com>
31 * m32r-asm.c: Regenerate after updating m32r.opc.
33 2005-10-18 Jie Zhang <jie.zhang@analog.com>
35 * bfin-dis.c (print_insn_bfin): Do proper endian transform when
36 reading instruction from memory.
38 2005-10-18 Nick Clifton <nickc@redhat.com>
40 * m32r-asm.c: Regenerate after updating m32r.opc.
42 2005-10-14 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
44 * m32r-asm.c: Regenerate after updating m32r.opc.
46 2005-10-08 James Lemke <jim@wasabisystems.com>
48 * arm-dis.c (coprocessor_opcodes): Fix mask for various Maverick CDP
51 2005-10-06 Daniel Jacobowitz <dan@codesourcery.com>
53 * ppc-dis.c (struct dis_private): Remove.
54 (powerpc_dialect): Avoid aliasing warnings.
55 (print_insn_big_powerpc, print_insn_little_powerpc): Likewise.
57 2005-09-30 Nick Clifton <nickc@redhat.com>
59 * po/ga.po: New Irish translation.
60 * configure.in (ALL_LINGUAS): Add "ga".
61 * configure: Regenerate.
63 2005-09-30 H.J. Lu <hongjiu.lu@intel.com>
65 * Makefile.am: Run "make dep-am".
66 * Makefile.in: Regenerated.
67 * aclocal.m4: Likewise.
68 * configure: Likewise.
70 2005-09-30 Catherine Moore <clm@cm00re.com>
72 * Makefile.am: Bfin support.
73 * Makefile.in: Regenerated.
74 * aclocal.m4: Regenerated.
75 * bfin-dis.c: New file.
76 * configure.in: Bfin support.
77 * configure: Regenerated.
78 * disassemble.c (ARCH_bfin): Define.
79 (disassembler): Add case for bfd_arch_bfin.
81 2005-09-28 Jan Beulich <jbeulich@novell.com>
83 * i386-dis.c (stack_v_mode): Renamed from branch_v_mode.
86 (Ob64, Ov64): Rename to Ob, Ov. Delete unused original definitions.
87 (dis386): Document and use new 'V' meta character. Use it for
88 single-byte push/pop opcode forms. Use stackEv for mod-r/m push/pop
89 opcode forms. Correct typo in 'pop ss'. Replace Ob64/Ov64 by Ob/Ov.
90 (putop): 'q' suffix for 'T' and 'U' meta depends on DFLAG. Mark
91 data prefix as used whenever DFLAG was examined. Handle 'V'.
92 (intel_operand_size): Use stack_v_mode.
93 (OP_E): Use stack_v_mode, but handle only the special case of
94 64-bit mode without operand size override here; fall through to
95 v_mode case otherwise.
96 (OP_REG): Special case rAX_reg ... rDI_reg only when 64-bit mode
97 and no operand size override is present.
98 (OP_J): Use get32s for obtaining the displacement also when rex64
101 2005-09-08 Paul Brook <paul@codesourcery.com>
103 * arm-dis.c (arm_opcodes, thumb32_opcodes): Rename smi to smc.
105 2005-09-06 Chao-ying Fu <fu@mips.com>
107 * mips-opc.c (MT32): New define.
108 (mips_builtin_opcodes): Move "bc0f", "bc0fl", "bc0t", "bc0tl" to the
109 bottom to avoid opcode collision with "mftr" and "mttr".
111 * mips-dis.c (mips_arch_choices): Enable INSN_MT for mips32r2.
112 (print_insn_args): Add supports for +t, +T, !, $, *, &, g operand
115 2005-09-02 Paul Brook <paul@codesourcery.com>
117 * arm-dis.c (coprocessor_opcodes): Add null terminator.
119 2005-09-02 Paul Brook <paul@codesourcery.com>
121 * arm-dis.c (coprocessor_opcodes): New.
122 (arm_opcodes, thumb32_opcodes): Remove coprocessor insns.
123 (print_insn_coprocessor): New function.
124 (print_insn_arm): Use print_insn_coprocessor. Remove coprocessor
126 (print_insn_thumb32): Use print_insn_coprocessor.
128 2005-08-30 Paul Brook <paul@codesourcery.com>
130 * arm-dis.c (thumb_opcodes): Disassemble sub(3) as subs.
132 2005-08-26 Jan Beulich <jbeulich@novell.com>
134 * i386-dis.c (intel_operand_size): New, broken out from OP_E for
136 (OP_E): Call intel_operand_size, move call site out of mode
138 (OP_OFF): Call intel_operand_size if suffix_always. Remove
139 ATTRIBUTE_UNUSED from parameters.
140 (OP_OFF64): Likewise.
141 (OP_ESreg): Call intel_operand_size.
142 (OP_DSreg): Likewise.
143 (OP_DIR): Use colon rather than semicolon as separator of far
146 2005-08-25 Chao-ying Fu <fu@mips.com>
148 * mips-opc.c (WR_a, RD_a, MOD_a, DSP_VOLA, D32): New define.
149 (mips_builtin_opcodes): Add DSP instructions.
150 * mips-dis.c (mips_arch_choices): Enable INSN_DSP for mips32, mips32r2,
152 (print_insn_args): Add supports for 3, 4, 5, 6, 7, 8, 9, 0, :, ', @
155 2005-08-23 David Ung <davidu@mips.com>
157 * mips16-opc.c (mips16_opcodes): Add the MIPS16e jalrc/jrc
158 instructions to the table.
160 2005-08-18 Alan Modra <amodra@bigpond.net.au>
162 * a29k-dis.c: Delete.
163 * Makefile.am: Remove a29k support.
164 * configure.in: Likewise.
165 * disassemble.c: Likewise.
166 * Makefile.in: Regenerate.
167 * configure: Regenerate.
168 * po/POTFILES.in: Regenerate.
170 2005-08-15 Daniel Jacobowitz <dan@codesourcery.com>
172 * ppc-dis.c (powerpc_dialect): Handle e300.
173 (print_ppc_disassembler_options): Likewise.
174 * ppc-opc.c (PPCE300): Define.
175 (powerpc_opcodes): Mark icbt as available for the e300.
177 2005-08-13 John David Anglin <dave.anglin@nrc-cnrc.gc.ca>
179 * hppa-dis.c (print_insn_hppa): Don't print '%' before register names.
180 Use "rp" instead of "%r2" in "b,l" insns.
182 2005-08-12 Martin Schwidefsky <schwidefsky@de.ibm.com>
184 * s390-dis.c (print_insn_s390): Print unsigned operands with %u.
185 * s390-mkopc.c (s390_opcode_cpu_val): Add support for cpu type z9-109.
187 * s390-opc.c (I32_16, U32_16, M_16): Add defines 32 bit immediates
188 and 4 bit optional masks.
189 (INSTR_RIL_RI, INSTR_RIL_RU, INSTR_RRF_M0RR, INSTR_RSE_CCRD,
190 INSTR_RSY_CCRD, INSTR_SSF_RRDRD): Add new instruction formats.
191 (MASK_RIL_RI, MASK_RIL_RU, MASK_RRF_M0RR, MASK_RSE_CCRD,
192 MASK_RSY_CCRD, MASK_SSF_RRDRD): Likewise.
193 (s390_opformats): Likewise.
194 * s390-opc.txt: Add new instructions for cpu type z9-109.
196 2005-08-05 John David Anglin <dave.anglin@nrc-crnc.gc.ca>
198 * hppa-dis.c (print_insn_hppa): Prefix 21-bit values with "L%".
200 2005-07-29 Paul Brook <paul@codesourcery.com>
202 * arm-dis.c: Fix disassebly of thumb2 writeback addressing modes.
204 2005-07-29 Paul Brook <paul@codesourcery.com>
206 * arm-dis.c (thumb32_opc): Fix addressing mode for tbh.
207 (print_insn_thumb32): Fix decoding of thumb2 'I' operands.
209 2005-07-25 DJ Delorie <dj@redhat.com>
211 * m32c-asm.c Regenerate.
212 * m32c-dis.c Regenerate.
214 2005-07-20 DJ Delorie <dj@redhat.com>
216 * disassemble.c (disassemble_init_for_target): M32C ISAs are
217 enums, so convert them to bit masks, which attributes are.
219 2005-07-18 Nick Clifton <nickc@redhat.com>
221 * configure.in: Restore alpha ordering to list of arches.
222 * configure: Regenerate.
223 * disassemble.c: Restore alpha ordering to list of arches.
225 2005-07-18 Nick Clifton <nickc@redhat.com>
227 * m32c-asm.c: Regenerate.
228 * m32c-desc.c: Regenerate.
229 * m32c-desc.h: Regenerate.
230 * m32c-dis.c: Regenerate.
231 * m32c-ibld.h: Regenerate.
232 * m32c-opc.c: Regenerate.
233 * m32c-opc.h: Regenerate.
235 2005-07-18 H.J. Lu <hongjiu.lu@intel.com>
237 * i386-dis.c (PNI_Fixup): Update comment.
238 (VMX_Fixup): Properly handle the suffix check.
240 2005-07-16 John David Anglin <dave.anglin@nrc-cnrc.gc.ca>
242 * hppa-dis.c (print_insn_hppa): Add space after 'w' in wide-mode
245 2005-07-16 Alan Modra <amodra@bigpond.net.au>
247 * Makefile.am: Run "make dep-am".
248 (stamp-m32c): Fix cpu dependencies.
249 * Makefile.in: Regenerate.
250 * ip2k-dis.c: Regenerate.
252 2007-07-15 H.J. Lu <hongjiu.lu@intel.com>
254 * i386-dis.c (OP_VMX): New. Handle Intel VMX Instructions.
255 (VMX_Fixup): New. Fix up Intel VMX Instructions.
259 (dis386_twobyte): Updated entries 0x78 and 0x79.
260 (twobyte_has_modrm): Likewise.
261 (grps): Use OP_VMX in the "sgdtIQ" entry. Updated GRP9.
262 (OP_G): Handle m_mode.
264 2005-07-14 Jim Blandy <jimb@redhat.com>
266 Add support for the Renesas M32C and M16C.
267 * m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c: New.
268 * m32c-desc.h, m32c-opc.h: New.
269 * Makefile.am (HFILES): List m32c-desc.h and m32c-opc.h.
270 (CFILES): List m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c,
272 (ALL_MACHINES): List m32c-asm.lo, m32c-desc.lo, m32c-dis.lo,
273 m32c-ibld.lo, m32c-opc.lo.
274 (CLEANFILES): List stamp-m32c.
275 (M32C_DEPS): List stamp-m32c, if CGEN_MAINT.
276 (CGEN_CPUS): Add m32c.
277 (m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c)
278 (m32c-desc.h, m32c-opc.h): Depend on M32C_DEPS.
279 (m32c_opc_h): New variable.
280 (stamp-m32c, m32c-asm.lo, m32c-desc.lo, m32c-dis.lo, m32c-ibld.lo)
281 (m32c-opc.lo): New rules.
282 * Makefile.in: Regenerated.
283 * configure.in: Add case for bfd_m32c_arch.
284 * configure: Regenerated.
285 * disassemble.c (ARCH_m32c): New.
286 [ARCH_m32c]: #include "m32c-desc.h".
287 (disassembler) [ARCH_m32c]: Add case for bfd_arch_m32c.
288 (disassemble_init_for_target) [ARCH_m32c]: Same.
290 * cgen-ops.h, cgen-types.h: New files.
291 * Makefile.am (HFILES): List them.
292 * Makefile.in: Regenerated.
294 2005-07-07 Kaveh R. Ghazi <ghazi@caip.rutgers.edu>
296 * arc-dis.c, arm-dis.c, cris-dis.c, crx-dis.c, d10v-dis.c,
297 d30v-dis.c, fr30-dis.c, h8300-dis.c, h8500-dis.c, i860-dis.c,
298 ia64-dis.c, ip2k-dis.c, m10200-dis.c, m10300-dis.c,
299 m88k-dis.c, mcore-dis.c, mips-dis.c, ms1-dis.c, or32-dis.c,
300 ppc-dis.c, sh64-dis.c, sparc-dis.c, tic4x-dis.c, tic80-dis.c,
301 v850-dis.c: Fix format bugs.
302 * ia64-gen.c (fail, warn): Add format attribute.
303 * or32-opc.c (debug): Likewise.
305 2005-07-07 Khem Raj <kraj@mvista.com>
307 * arm-dis.c (opcode32 arm_opcodes): Fix ARM VFP fadds instruction
310 2005-07-06 Alan Modra <amodra@bigpond.net.au>
312 * Makefile.am (stamp-m32r): Fix path to cpu files.
313 (stamp-m32r, stamp-iq2000): Likewise.
314 * Makefile.in: Regenerate.
315 * m32r-asm.c: Regenerate.
316 * po/POTFILES.in: Remove arm-opc.h. Add ms1-asm.c, ms1-desc.c,
317 ms1-desc.h, ms1-dis.c, ms1-ibld.c, ms1-opc.c, ms1-opc.h.
319 2005-07-05 Nick Clifton <nickc@redhat.com>
321 * iq2000-asm.c: Regenerate.
322 * ms1-asm.c: Regenerate.
324 2005-07-05 Jan Beulich <jbeulich@novell.com>
326 * i386-dis.c (SVME_Fixup): New.
327 (grps): Use it for the lidt entry.
328 (PNI_Fixup): Call OP_M rather than OP_E.
329 (INVLPG_Fixup): Likewise.
331 2005-07-04 H.J. Lu <hongjiu.lu@intel.com>
333 * tic30-dis.c (cnvt_tmsfloat_ieee): Use HUGE_VALF if defined.
335 2005-07-01 Nick Clifton <nickc@redhat.com>
337 * a29k-dis.c: Update to ISO C90 style function declarations and
339 * alpha-opc.c: Likewise.
340 * arc-dis.c: Likewise.
341 * arc-opc.c: Likewise.
342 * avr-dis.c: Likewise.
343 * cgen-asm.in: Likewise.
344 * cgen-dis.in: Likewise.
345 * cgen-ibld.in: Likewise.
346 * cgen-opc.c: Likewise.
347 * cris-dis.c: Likewise.
348 * d10v-dis.c: Likewise.
349 * d30v-dis.c: Likewise.
350 * d30v-opc.c: Likewise.
351 * dis-buf.c: Likewise.
352 * dlx-dis.c: Likewise.
353 * h8300-dis.c: Likewise.
354 * h8500-dis.c: Likewise.
355 * hppa-dis.c: Likewise.
356 * i370-dis.c: Likewise.
357 * i370-opc.c: Likewise.
358 * m10200-dis.c: Likewise.
359 * m10300-dis.c: Likewise.
360 * m68k-dis.c: Likewise.
361 * m88k-dis.c: Likewise.
362 * mips-dis.c: Likewise.
363 * mmix-dis.c: Likewise.
364 * msp430-dis.c: Likewise.
365 * ns32k-dis.c: Likewise.
366 * or32-dis.c: Likewise.
367 * or32-opc.c: Likewise.
368 * pdp11-dis.c: Likewise.
369 * pj-dis.c: Likewise.
370 * s390-dis.c: Likewise.
371 * sh-dis.c: Likewise.
372 * sh64-dis.c: Likewise.
373 * sparc-dis.c: Likewise.
374 * sparc-opc.c: Likewise.
375 * sysdep.h: Likewise.
376 * tic30-dis.c: Likewise.
377 * tic4x-dis.c: Likewise.
378 * tic80-dis.c: Likewise.
379 * v850-dis.c: Likewise.
380 * v850-opc.c: Likewise.
381 * vax-dis.c: Likewise.
382 * w65-dis.c: Likewise.
383 * z8kgen.c: Likewise.
385 * fr30-*: Regenerate.
387 * ip2k-*: Regenerate.
388 * iq2000-*: Regenerate.
389 * m32r-*: Regenerate.
391 * openrisc-*: Regenerate.
392 * xstormy16-*: Regenerate.
394 2005-06-23 Ben Elliston <bje@gnu.org>
396 * m68k-dis.c: Use ISC C90.
397 * m68k-opc.c: Formatting fixes.
399 2005-06-16 David Ung <davidu@mips.com>
401 * mips16-opc.c (mips16_opcodes): Add the following MIPS16e
402 instructions to the table; seb/seh/sew/zeb/zeh/zew.
404 2005-06-15 Dave Brolley <brolley@redhat.com>
406 Contribute Morpho ms1 on behalf of Red Hat
407 * ms1-asm.c, ms1-desc.c, ms1-dis.c, ms1-ibld.c, ms1-opc.c,
408 ms1-opc.h: New files, Morpho ms1 target.
410 2004-05-14 Stan Cox <scox@redhat.com>
412 * disassemble.c (ARCH_ms1): Define.
413 (disassembler): Handle bfd_arch_ms1
415 2004-05-13 Michael Snyder <msnyder@redhat.com>
417 * Makefile.am, Makefile.in: Add ms1 target.
418 * configure.in: Ditto.
420 2005-06-08 Zack Weinberg <zack@codesourcery.com>
422 * arm-opc.h: Delete; fold contents into ...
423 * arm-dis.c: ... here. Move includes of internal COFF headers
424 next to includes of internal ELF headers.
425 (streq, WORD_ADDRESS, BDISP, BDISP23): Delete, unused.
426 (struct arm_opcode): Rename struct opcode32. Make 'assembler' const.
427 (struct thumb_opcode): Rename struct opcode16. Make 'assembler' const.
428 (arm_conditional, arm_fp_const, arm_shift, arm_regname, regnames)
429 (iwmmxt_wwnames, iwmmxt_wwssnames):
431 (regnames): Remove iWMMXt coprocessor register sets.
432 (iwmmxt_regnames, iwmmxt_cregnames): New statics.
433 (get_arm_regnames): Adjust fourth argument to match above changes.
434 (set_iwmmxt_regnames): Delete.
435 (print_insn_arm): Constify 'c'. Use ISO syntax for function
436 pointer calls. Expand sole use of BDISP. Use iwmmxt_regnames
437 and iwmmxt_cregnames, not set_iwmmxt_regnames.
438 (print_insn_thumb16, print_insn_thumb32): Constify 'c'. Use
439 ISO syntax for function pointer calls.
441 2005-06-07 Zack Weinberg <zack@codesourcery.com>
443 * arm-dis.c: Split up the comments describing the format codes, so
444 that the ARM and 16-bit Thumb opcode tables each have comments
445 preceding them that describe all the codes, and only the codes,
446 valid in those tables. (32-bit Thumb table is already like this.)
447 Reorder the lists in all three comments to match the order in
448 which the codes are implemented.
449 Remove all forward declarations of static functions. Convert all
450 function definitions to ISO C format.
451 (print_insn_arm, print_insn_thumb16, print_insn_thumb32):
453 (print_insn_thumb16): Remove unused case 'I'.
454 (print_insn): Update for changed calling convention of subroutines.
456 2005-05-25 Jan Beulich <jbeulich@novell.com>
458 * i386-dis.c (OP_E): In Intel mode, display 32-bit displacements in
459 hex (but retain it being displayed as signed). Remove redundant
460 checks. Add handling of displacements for 16-bit addressing in Intel
463 2005-05-25 Jan Beulich <jbeulich@novell.com>
465 * i386-dis.c (prefix_name): Remove pointless mode_64bit check.
466 (OP_E): Remove redundant REX_EXTZ handling. Remove pointless
467 masking of 'rm' in 16-bit memory address handling.
469 2005-05-19 Anton Blanchard <anton@samba.org>
471 * ppc-dis.c (powerpc_dialect): Handle "-Mpower5".
472 (print_ppc_disassembler_options): Document it.
473 * ppc-opc.c (SVC_LEV): Define.
474 (LEV): Allow optional operand.
476 (powerpc_opcodes): Extend "sc". Adjust "svc" and "svcl". Add
477 "hrfid", "popcntb", "fsqrtes", "fsqrtes.", "fre" and "fre.".
479 2005-05-19 Kelley Cook <kcook@gcc.gnu.org>
481 * Makefile.in: Regenerate.
483 2005-05-17 Zack Weinberg <zack@codesourcery.com>
485 * arm-dis.c (thumb_opcodes): Add disassembly for V6T2 16-bit
486 instructions. Adjust disassembly of some opcodes to match
488 (thumb32_opcodes): New table.
489 (print_insn_thumb): Rename print_insn_thumb16; don't handle
490 two-halfword branches here.
491 (print_insn_thumb32): New function.
492 (print_insn): Choose among print_insn_arm, print_insn_thumb16,
493 and print_insn_thumb32. Be consistent about order of
494 halfwords when printing 32-bit instructions.
496 2005-05-07 H.J. Lu <hongjiu.lu@intel.com>
499 * i386-dis.c (branch_v_mode): New.
500 (indirEv): Use branch_v_mode instead of v_mode.
501 (OP_E): Handle branch_v_mode.
503 2005-05-07 H.J. Lu <hongjiu.lu@intel.com>
505 * d10v-dis.c (dis_2_short): Support 64bit host.
507 2005-05-07 Nick Clifton <nickc@redhat.com>
509 * po/nl.po: Updated translation.
511 2005-05-07 Nick Clifton <nickc@redhat.com>
513 * Update the address and phone number of the FSF organization in
514 the GPL notices in the following files:
515 a29k-dis.c, aclocal.m4, alpha-dis.c, alpha-opc.c, arc-dis.c,
516 arc-dis.h, arc-ext.c, arc-ext.h, arc-opc.c, arm-dis.c, arm-opc.h,
517 avr-dis.c, cgen-asm.c, cgen-asm.in, cgen-dis.c, cgen-dis.in,
518 cgen-ibld.in, cgen-opc.c, cgen.sh, cris-dis.c, cris-opc.c,
519 crx-dis.c, crx-opc.c, d10v-dis.c, d10v-opc.c, d30v-dis.c,
520 d30v-opc.c, dis-buf.c, dis-init.c, disassemble.c, dlx-dis.c,
521 fr30-asm.c, fr30-desc.c, fr30-desc.h, fr30-dis.c, fr30-ibld.c,
522 fr30-opc.c, fr30-opc.h, frv-asm.c, frv-desc.c, frv-desc.h,
523 frv-dis.c, frv-ibld.c, frv-opc.c, frv-opc.h, h8300-dis.c,
524 h8500-dis.c, h8500-opc.h, hppa-dis.c, i370-dis.c, i370-opc.c,
525 i386-dis.c, i860-dis.c, i960-dis.c, ia64-asmtab.h, ia64-dis.c,
526 ia64-gen.c, ia64-opc-a.c, ia64-opc-b.c, ia64-opc-d.c,
527 ia64-opc-f.c, ia64-opc-i.c, ia64-opc-m.c, ia64-opc-x.c,
528 ia64-opc.c, ia64-opc.h, ip2k-asm.c, ip2k-desc.c, ip2k-desc.h,
529 ip2k-dis.c, ip2k-ibld.c, ip2k-opc.c, ip2k-opc.h, iq2000-asm.c,
530 iq2000-desc.c, iq2000-desc.h, iq2000-dis.c, iq2000-ibld.c,
531 iq2000-opc.c, iq2000-opc.h, m10200-dis.c, m10200-opc.c,
532 m10300-dis.c, m10300-opc.c, m32r-asm.c, m32r-desc.c, m32r-desc.h,
533 m32r-dis.c, m32r-ibld.c, m32r-opc.c, m32r-opc.h, m32r-opinst.c,
534 m68hc11-dis.c, m68hc11-opc.c, m68k-dis.c, m68k-opc.c, m88k-dis.c,
535 maxq-dis.c, mcore-dis.c, mcore-opc.h, mips-dis.c, mips-opc.c,
536 mips16-opc.c, mmix-dis.c, mmix-opc.c, msp430-dis.c, ns32k-dis.c,
537 openrisc-asm.c, openrisc-desc.c, openrisc-desc.h, openrisc-dis.c,
538 openrisc-ibld.c, openrisc-opc.c, openrisc-opc.h, opintl.h,
539 or32-dis.c, or32-opc.c, pdp11-dis.c, pdp11-opc.c, pj-dis.c,
540 pj-opc.c, ppc-dis.c, ppc-opc.c, s390-dis.c, s390-mkopc.c,
541 s390-opc.c, sh-dis.c, sh-opc.h, sh64-dis.c, sh64-opc.c,
542 sh64-opc.h, sparc-dis.c, sparc-opc.c, sysdep.h, tic30-dis.c,
543 tic4x-dis.c, tic54x-dis.c, tic54x-opc.c, tic80-dis.c, tic80-opc.c,
544 v850-dis.c, v850-opc.c, vax-dis.c, w65-dis.c, w65-opc.h,
545 xstormy16-asm.c, xstormy16-desc.c, xstormy16-desc.h,
546 xstormy16-dis.c, xstormy16-ibld.c, xstormy16-opc.c,
547 xstormy16-opc.h, xtensa-dis.c, z8k-dis.c, z8kgen.c
549 2005-05-05 James E Wilson <wilson@specifixinc.com>
551 * ia64-opc.c: Include sysdep.h before libiberty.h.
553 2005-05-05 Nick Clifton <nickc@redhat.com>
555 * configure.in (ALL_LINGUAS): Add vi.
556 * configure: Regenerate.
559 2005-04-26 Jerome Guitton <guitton@gnat.com>
561 * configure.in: Fix the check for basename declaration.
562 * configure: Regenerate.
564 2005-04-19 Alan Modra <amodra@bigpond.net.au>
566 * ppc-opc.c (RTO): Define.
567 (powerpc_opcodes <tlbsx, tlbsx., tlbre>): Combine PPC403 and BOOKE
568 entries to suit PPC440.
570 2005-04-18 Mark Kettenis <kettenis@gnu.org>
572 * i386-dis.c: Insert hyphens into selected VIA PadLock extensions.
575 2005-04-14 Nick Clifton <nickc@redhat.com>
577 * po/fi.po: New translation: Finnish.
578 * configure.in (ALL_LINGUAS): Add fi.
579 * configure: Regenerate.
581 2005-04-14 Alan Modra <amodra@bigpond.net.au>
583 * Makefile.am (NO_WERROR): Define.
584 * configure.in: Invoke AM_BINUTILS_WARNINGS.
585 * Makefile.in: Regenerate.
586 * aclocal.m4: Regenerate.
587 * configure: Regenerate.
589 2005-04-04 Nick Clifton <nickc@redhat.com>
591 * fr30-asm.c: Regenerate.
592 * frv-asm.c: Regenerate.
593 * iq2000-asm.c: Regenerate.
594 * m32r-asm.c: Regenerate.
595 * openrisc-asm.c: Regenerate.
597 2005-04-01 Jan Beulich <jbeulich@novell.com>
599 * i386-dis.c (PNI_Fixup): Neither mwait nor monitor have any
600 visible operands in Intel mode. The first operand of monitor is
603 2005-04-01 Jan Beulich <jbeulich@novell.com>
605 * i386-dis.c (INVLPG_Fixup): Decode rdtscp; change code to allow for
606 easier future additions.
608 2005-03-31 Jerome Guitton <guitton@gnat.com>
610 * configure.in: Check for basename.
611 * configure: Regenerate.
614 2005-03-29 H.J. Lu <hongjiu.lu@intel.com>
616 * i386-dis.c (SEG_Fixup): New.
618 (dis386): Use "Sv" for 0x8c and 0x8e.
620 2005-03-21 Jan-Benedict Glaw <jbglaw@lug-owl.de>
621 Nick Clifton <nickc@redhat.com>
623 * vax-dis.c: (entry_addr): New varible: An array of user supplied
624 function entry mask addresses.
625 (entry_addr_occupied_slots): New variable: The number of occupied
626 elements in entry_addr.
627 (entry_addr_total_slots): New variable: The total number of
628 elements in entry_addr.
629 (parse_disassembler_options): New function. Fills in the entry_addr
631 (free_entry_array): New function. Release the memory used by the
632 entry addr array. Suppressed because there is no way to call it.
633 (is_function_entry): Check if a given address is a function's
634 start address by looking at supplied entry mask addresses and
635 symbol information, if available.
636 (print_insn_vax): Use parse_disassembler_options and is_function_entry.
638 2005-03-23 H.J. Lu <hongjiu.lu@intel.com>
640 * cris-dis.c (print_with_operands): Use ~31L for long instead
643 2005-03-20 H.J. Lu <hongjiu.lu@intel.com>
645 * mmix-opc.c (O): Revert the last change.
648 2005-03-19 H.J. Lu <hongjiu.lu@intel.com>
650 * mmix-opc.c (O): Use 24UL instead of 24 for unsigned long.
653 2005-03-19 Hans-Peter Nilsson <hp@bitrange.com>
655 * mmix-opc.c (O, Z): Force expression as unsigned long.
657 2005-03-18 Nick Clifton <nickc@redhat.com>
659 * ip2k-asm.c: Regenerate.
660 * op/opcodes.pot: Regenerate.
662 2005-03-16 Nick Clifton <nickc@redhat.com>
663 Ben Elliston <bje@au.ibm.com>
665 * configure.in (werror): New switch: Add -Werror to the
666 compiler command line. Enabled by default. Disable via
668 * configure: Regenerate.
670 2005-03-16 Alan Modra <amodra@bigpond.net.au>
672 * ppc-dis.c (powerpc_dialect): Don't set PPC_OPCODE_ALTIVEC when
675 2005-03-15 Alan Modra <amodra@bigpond.net.au>
677 * po/es.po: Commit new Spanish translation.
679 * po/fr.po: Commit new French translation.
681 2005-03-14 Jan-Benedict Glaw <jbglaw@lug-owl.de>
683 * vax-dis.c: Fix spelling error
684 (print_insn_vax): Use ".word 0x0012 # Entry mask: r1 r2 >" instead
685 of just "Entry mask: < r1 ... >"
687 2005-03-12 Zack Weinberg <zack@codesourcery.com>
689 * arm-dis.c (arm_opcodes): Document %E and %V.
690 Add entries for v6T2 ARM instructions:
691 bfc bfi mls strht ldrht ldrsht ldrsbt movw movt rbit ubfx sbfx.
692 (print_insn_arm): Add support for %E and %V.
693 (thumb_opcodes): Add ARMv6K instructions nop, sev, wfe, wfi, yield.
695 2005-03-10 Jeff Baker <jbaker@qnx.com>
696 Alan Modra <amodra@bigpond.net.au>
698 * ppc-opc.c (insert_sprg, extract_sprg): New Functions.
699 (powerpc_operands <SPRG>): Call the above. Bit field is 5 bits.
701 (XSPRG_MASK): Mask off extra bits now part of sprg field.
702 (powerpc_opcodes): Asjust mfsprg and mtsprg to suit new mask. Move
703 mfsprg4..7 after msprg and consolidate.
705 2005-03-09 Jan-Benedict Glaw <jbglaw@lug-owl.de>
707 * vax-dis.c (entry_mask_bit): New array.
708 (print_insn_vax): Decode function entry mask.
710 2005-03-07 Aldy Hernandez <aldyh@redhat.com>
712 * ppc-opc.c (powerpc_opcodes): Fix encoding of efscfd.
714 2005-03-05 Alan Modra <amodra@bigpond.net.au>
716 * po/opcodes.pot: Regenerate.
718 2005-03-03 Ramana Radhakrishnan <ramana.radhakrishnan@codito.com>
720 * arc-dis.c (a4_decoding_class): New enum.
721 (dsmOneArcInst): Use the enum values for the decoding class.
722 Remove redundant case in the switch for decodingClass value 11.
724 2005-03-02 Jan Beulich <jbeulich@novell.com>
726 * i386-dis.c (print_insn): Suppress lock prefix printing for cr8...15
728 (OP_C): Consider lock prefix in non-64-bit modes.
730 2005-02-24 Alan Modra <amodra@bigpond.net.au>
732 * cris-dis.c (format_hex): Remove ineffective warning fix.
733 * crx-dis.c (make_instruction): Warning fix.
734 * frv-asm.c: Regenerate.
736 2005-02-23 Nick Clifton <nickc@redhat.com>
738 * cgen-dis.in: Use bfd_byte for buffers that are passed to
741 * ia64-opc.c (locate_opcode_ent): Initialise opval array.
743 * crx-dis.c (make_instruction): Move argument structure into inner
744 scope and ensure that all of its fields are initialised before
747 * fr30-asm.c: Regenerate.
748 * fr30-dis.c: Regenerate.
749 * frv-asm.c: Regenerate.
750 * frv-dis.c: Regenerate.
751 * ip2k-asm.c: Regenerate.
752 * ip2k-dis.c: Regenerate.
753 * iq2000-asm.c: Regenerate.
754 * iq2000-dis.c: Regenerate.
755 * m32r-asm.c: Regenerate.
756 * m32r-dis.c: Regenerate.
757 * openrisc-asm.c: Regenerate.
758 * openrisc-dis.c: Regenerate.
759 * xstormy16-asm.c: Regenerate.
760 * xstormy16-dis.c: Regenerate.
762 2005-02-22 Alan Modra <amodra@bigpond.net.au>
764 * arc-ext.c: Warning fixes.
765 * arc-ext.h: Likewise.
766 * cgen-opc.c: Likewise.
767 * ia64-gen.c: Likewise.
768 * maxq-dis.c: Likewise.
769 * ns32k-dis.c: Likewise.
770 * w65-dis.c: Likewise.
771 * ia64-asmtab.c: Regenerate.
773 2005-02-22 Alan Modra <amodra@bigpond.net.au>
775 * fr30-desc.c: Regenerate.
776 * fr30-desc.h: Regenerate.
777 * fr30-opc.c: Regenerate.
778 * fr30-opc.h: Regenerate.
779 * frv-desc.c: Regenerate.
780 * frv-desc.h: Regenerate.
781 * frv-opc.c: Regenerate.
782 * frv-opc.h: Regenerate.
783 * ip2k-desc.c: Regenerate.
784 * ip2k-desc.h: Regenerate.
785 * ip2k-opc.c: Regenerate.
786 * ip2k-opc.h: Regenerate.
787 * iq2000-desc.c: Regenerate.
788 * iq2000-desc.h: Regenerate.
789 * iq2000-opc.c: Regenerate.
790 * iq2000-opc.h: Regenerate.
791 * m32r-desc.c: Regenerate.
792 * m32r-desc.h: Regenerate.
793 * m32r-opc.c: Regenerate.
794 * m32r-opc.h: Regenerate.
795 * m32r-opinst.c: Regenerate.
796 * openrisc-desc.c: Regenerate.
797 * openrisc-desc.h: Regenerate.
798 * openrisc-opc.c: Regenerate.
799 * openrisc-opc.h: Regenerate.
800 * xstormy16-desc.c: Regenerate.
801 * xstormy16-desc.h: Regenerate.
802 * xstormy16-opc.c: Regenerate.
803 * xstormy16-opc.h: Regenerate.
805 2005-02-21 Alan Modra <amodra@bigpond.net.au>
807 * Makefile.am: Run "make dep-am"
808 * Makefile.in: Regenerate.
810 2005-02-15 Nick Clifton <nickc@redhat.com>
812 * cgen-dis.in (print_address): Add an ATTRIBUTE_UNUSED to prevent
813 compile time warnings.
814 (print_keyword): Likewise.
815 (default_print_insn): Likewise.
817 * fr30-desc.c: Regenerated.
818 * fr30-desc.h: Regenerated.
819 * fr30-dis.c: Regenerated.
820 * fr30-opc.c: Regenerated.
821 * fr30-opc.h: Regenerated.
822 * frv-desc.c: Regenerated.
823 * frv-dis.c: Regenerated.
824 * frv-opc.c: Regenerated.
825 * ip2k-asm.c: Regenerated.
826 * ip2k-desc.c: Regenerated.
827 * ip2k-desc.h: Regenerated.
828 * ip2k-dis.c: Regenerated.
829 * ip2k-opc.c: Regenerated.
830 * ip2k-opc.h: Regenerated.
831 * iq2000-desc.c: Regenerated.
832 * iq2000-dis.c: Regenerated.
833 * iq2000-opc.c: Regenerated.
834 * m32r-asm.c: Regenerated.
835 * m32r-desc.c: Regenerated.
836 * m32r-desc.h: Regenerated.
837 * m32r-dis.c: Regenerated.
838 * m32r-opc.c: Regenerated.
839 * m32r-opc.h: Regenerated.
840 * m32r-opinst.c: Regenerated.
841 * openrisc-desc.c: Regenerated.
842 * openrisc-desc.h: Regenerated.
843 * openrisc-dis.c: Regenerated.
844 * openrisc-opc.c: Regenerated.
845 * openrisc-opc.h: Regenerated.
846 * xstormy16-desc.c: Regenerated.
847 * xstormy16-desc.h: Regenerated.
848 * xstormy16-dis.c: Regenerated.
849 * xstormy16-opc.c: Regenerated.
850 * xstormy16-opc.h: Regenerated.
852 2005-02-14 H.J. Lu <hongjiu.lu@intel.com>
854 * dis-buf.c (perror_memory): Use sprintf_vma to print out
857 2005-02-11 Nick Clifton <nickc@redhat.com>
859 * iq2000-asm.c: Regenerate.
861 * frv-dis.c: Regenerate.
863 2005-02-07 Jim Blandy <jimb@redhat.com>
865 * Makefile.am (CGEN): Load guile.scm before calling the main
867 * Makefile.in: Regenerated.
868 * cgen.sh: Be prepared for the 'cgen' argument to contain spaces.
869 Simply pass the cgen-opc.scm path to ${cgen} as its first
870 argument; ${cgen} itself now contains the '-s', or whatever is
871 appropriate for the Scheme being used.
873 2005-01-31 Andrew Cagney <cagney@gnu.org>
875 * configure: Regenerate to track ../gettext.m4.
877 2005-01-31 Jan Beulich <jbeulich@novell.com>
879 * ia64-gen.c (NELEMS): Define.
880 (shrink): Generate alias with missing second predicate register when
881 opcode has two outputs and these are both predicates.
882 * ia64-opc-i.c (FULL17): Define.
883 (ia64_opcodes_i): Add mov-to-pr alias without second input. Use FULL17
884 here to generate output template.
885 (TBITCM, TNATCM): Undefine after use.
886 * ia64-opc-m.c (ia64_opcodes_i): Add alloc alias without ar.pfs as
887 first input. Add ld16 aliases without ar.csd as second output. Add
888 st16 aliases without ar.csd as second input. Add cmpxchg aliases
889 without ar.ccv as third input. Add cmp8xchg16 aliases without ar.csd/
890 ar.ccv as third/fourth inputs. Consolidate through...
891 (CMPXCHG_acq, CMPXCHG_rel, CMPXCHG_1, CMPXCHG_2, CMPXCHG_4, CMPXCHG_8,
892 CMPXCHGn, CMP8XCHG16, CMPXCHG_ALL): Define.
893 * ia64-asmtab.c: Regenerate.
895 2005-01-27 Andrew Cagney <cagney@gnu.org>
897 * configure: Regenerate to track ../gettext.m4 change.
899 2005-01-25 Alexandre Oliva <aoliva@redhat.com>
901 2004-11-10 Alexandre Oliva <aoliva@redhat.com>
902 * frv-asm.c: Rebuilt.
903 * frv-desc.c: Rebuilt.
904 * frv-desc.h: Rebuilt.
905 * frv-dis.c: Rebuilt.
906 * frv-ibld.c: Rebuilt.
907 * frv-opc.c: Rebuilt.
908 * frv-opc.h: Rebuilt.
910 2005-01-24 Andrew Cagney <cagney@gnu.org>
912 * configure: Regenerate, ../gettext.m4 was updated.
914 2005-01-21 Fred Fish <fnf@specifixinc.com>
916 * mips-opc.c: Change INSN_ALIAS to INSN2_ALIAS.
917 Change INSN_WRITE_MDMX_ACC to INSN2_WRITE_MDMX_ACC.
918 Change INSN_READ_MDMX_ACC to INSN2_READ_MDMX_ACC.
921 2005-01-20 Alan Modra <amodra@bigpond.net.au>
923 * ppc-opc.c (powerpc_opcodes): Add optional 'l' arg to tlbiel.
925 2005-01-19 Fred Fish <fnf@specifixinc.com>
927 * mips-dis.c (no_aliases): New disassembly option flag.
928 (set_default_mips_dis_options): Init no_aliases to zero.
929 (parse_mips_dis_option): Handle no-aliases option.
930 (print_insn_mips): Ignore table entries that are aliases
931 if no_aliases is set.
932 (print_insn_mips16): Ditto.
933 * mips-opc.c (mips_builtin_opcodes): Add initializer column for
934 new pinfo2 member and add INSN_ALIAS initializers as needed. Also
935 move WR_MACC and RD_MACC initializers from pinfo to pinfo2.
936 * mips16-opc.c (mips16_opcodes): Ditto.
938 2005-01-17 Andrew Stubbs <andrew.stubbs@st.com>
940 * sh-opc.h (arch_sh2a_or_sh3e,arch_sh2a_or_sh4): Correct definition.
941 (inheritance diagram): Add missing edge.
942 (arch_sh1_up): Rename arch_sh_up to match external name to make life
943 easier for the testsuite.
944 (arch_sh4_nofp_up): Likewise, rename arch_sh4_nofpu_up.
945 (arch_sh4a_nofp_up): Likewise, rename arch_sh4a_nofpu_up.
946 (arch_sh2a_nofpu_or_sh4_nommu_nofpu_up): Add missing
947 arch_sh2a_or_sh4_up child.
948 (sh_table): Do renaming as above.
949 Correct comment for ldc.l for gas testsuite to read.
950 Remove rogue mul.l from sh1 (duplicate of the one for sh2).
951 Correct comments for movy.w and movy.l for gas testsuite to read.
952 Correct comments for fmov.d and fmov.s for gas testsuite to read.
954 2005-01-12 H.J. Lu <hongjiu.lu@intel.com>
956 * i386-dis.c (OP_E): Don't ignore scale in SIB for 64 bit mode.
958 2005-01-12 H.J. Lu <hongjiu.lu@intel.com>
960 * i386-dis.c (OP_E): Ignore scale when index == 0x4 in SIB.
962 2005-01-10 Andreas Schwab <schwab@suse.de>
964 * disassemble.c (disassemble_init_for_target) <case
965 bfd_arch_ia64>: Set skip_zeroes to 16.
966 <case bfd_arch_tic4x>: Set skip_zeroes to 32.
968 2004-12-23 Tomer Levi <Tomer.Levi@nsc.com>
970 * crx-opc.c: Mark 'bcop' instruction as RELAXABLE.
972 2004-12-14 Svein E. Seldal <Svein.Seldal@solidas.com>
974 * avr-dis.c: Prettyprint. Added printing of symbol names in all
975 memory references. Convert avr_operand() to C90 formatting.
977 2004-12-05 Tomer Levi <Tomer.Levi@nsc.com>
979 * crx-dis.c (print_arg): Use 'info->print_address_func' for address printing.
981 2004-11-29 Tomer Levi <Tomer.Levi@nsc.com>
983 * crx-opc.c (crx_optab): Mark all rbase_disps* operands as signed.
984 (no_op_insn): Initialize array with instructions that have no
986 * crx-dis.c (make_instruction): Get rid of COP_BRANCH_INS operand swapping.
988 2004-11-29 Richard Earnshaw <rearnsha@arm.com>
990 * arm-dis.c: Correct top-level comment.
992 2004-11-27 Richard Earnshaw <rearnsha@arm.com>
994 * arm-opc.h (arm_opcode, thumb_opcode): Add extra field for the
995 architecuture defining the insn.
996 (arm_opcodes, thumb_opcodes): Delete. Move to ...
997 * arm-dis.c (arm_opcodes, thumb_opcodes): Here. Add architecutre
999 Also include opcode/arm.h.
1000 * Makefile.am (arm-dis.lo): Update dependency list.
1001 * Makefile.in: Regenerate.
1003 2004-11-22 Ravi Ramaseshan <ravi.ramaseshan@codito.com>
1005 * opcode/arc-opc.c (insert_base): Modify ls_operand[LS_OFFSET] to
1006 reflect the change to the short immediate syntax.
1008 2004-11-19 Alan Modra <amodra@bigpond.net.au>
1010 * or32-opc.c (debug): Warning fix.
1011 * po/POTFILES.in: Regenerate.
1013 * maxq-dis.c: Formatting.
1014 (print_insn): Warning fix.
1016 2004-11-17 Daniel Jacobowitz <dan@codesourcery.com>
1018 * arm-dis.c (WORD_ADDRESS): Define.
1019 (print_insn): Use it. Correct big-endian end-of-section handling.
1021 2004-11-08 Inderpreet Singh <inderpreetb@nioda.hcltech.com>
1022 Vineet Sharma <vineets@noida.hcltech.com>
1024 * maxq-dis.c: New file.
1025 * disassemble.c (ARCH_maxq): Define.
1026 (disassembler): Add 'print_insn_maxq_little' for handling maxq
1028 * configure.in: Add case for bfd_maxq_arch.
1029 * configure: Regenerate.
1030 * Makefile.am: Add support for maxq-dis.c
1031 * Makefile.in: Regenerate.
1032 * aclocal.m4: Regenerate.
1034 2004-11-05 Tomer Levi <Tomer.Levi@nsc.com>
1036 * crx-opc.c (crx_optab): Rename 'arg_icr' to 'arg_idxr' for Index register
1038 * crx-dis.c: Likewise.
1040 2004-11-04 Hans-Peter Nilsson <hp@axis.com>
1042 Generally, handle CRISv32.
1043 * cris-dis.c (TRACE_CASE): Define as (disdata->trace_case).
1044 (struct cris_disasm_data): New type.
1045 (format_reg, format_hex, cris_constraint, print_flags)
1046 (get_opcode_entry): Add struct cris_disasm_data * parameter. All
1048 (format_sup_reg, print_insn_crisv32_with_register_prefix)
1049 (print_insn_crisv32_without_register_prefix)
1050 (print_insn_crisv10_v32_with_register_prefix)
1051 (print_insn_crisv10_v32_without_register_prefix)
1052 (cris_parse_disassembler_options): New functions.
1053 (bytes_to_skip, cris_spec_reg): Add enum cris_disass_family
1054 parameter. All callers changed.
1055 (get_opcode_entry): Call malloc, not xmalloc. Return NULL on
1057 (cris_constraint) <case 'Y', 'U'>: New cases.
1058 (bytes_to_skip): Handle 'Y' and 'N' as 's'. Skip size is 4 bytes
1060 (print_with_operands) <case 'Y'>: New case.
1061 (print_with_operands) <case 'T', 'A', '[', ']', 'd', 'n', 'u'>
1062 <case 'N', 'Y', 'Q'>: New cases.
1063 (print_insn_cris_generic): Emit "bcc ." for zero and CRISv32.
1064 (print_insn_cris_with_register_prefix)
1065 (print_insn_cris_without_register_prefix): Call
1066 cris_parse_disassembler_options.
1067 * cris-opc.c (cris_spec_regs): Mention that this table isn't used
1068 for CRISv32 and the size of immediate operands. New v32-only
1069 entries for bz, pid, srs, wz, exs, eda, dz, ebp, erp, nrp, ccs and
1070 spc. Add v32-only 4-byte entries for p2, p3, p5 and p6. Change
1071 ccr, ibr, irp to be v0..v10. Change bar, dccr to be v8..v10.
1072 Change brp to be v3..v10.
1073 (cris_support_regs): New vector.
1074 (cris_opcodes): Update head comment. New format characters '[',
1075 ']', space, 'A', 'd', 'N', 'n', 'Q', 'T', 'u', 'U', 'Y'.
1076 Add new opcodes for v32 and adjust existing opcodes to accommodate
1077 differences to earlier variants.
1078 (cris_cond15s): New vector.
1080 2004-11-04 Jan Beulich <jbeulich@novell.com>
1082 * i386-dis.c (Eq, Edqw, indirEp, Gdq, I1): Define.
1084 (Mp): Use f_mode rather than none at all.
1085 (t_mode, dq_mode, dqw_mode, f_mode, const_1_mode): Define. t_mode
1086 replaces what previously was x_mode; x_mode now means 128-bit SSE
1088 (dis386): Make far jumps and calls have an 'l' prefix only in AT&T
1089 mode. movmskpX's, pextrw's, and pmovmskb's first operands are Gdq.
1090 pinsrw's second operand is Edqw.
1091 (grps): 1-bit shifts' and rotates' second operands are I1. cmpxchg8b's
1092 operand is Eq. movntq's and movntdq's first operands are EM. s[gi]dt,
1093 fldenv, frstor, fsave, fstenv all should also have suffixes in Intel
1094 mode when an operand size override is present or always suffixing.
1095 More instructions will need to be added to this group.
1096 (putop): Handle new macro chars 'C' (short/long suffix selector),
1097 'I' (Intel mode override for following macro char), and 'J' (for
1098 adding the 'l' prefix to far branches in AT&T mode). When an
1099 alternative was specified in the template, honor macro character when
1100 specified for Intel mode.
1101 (OP_E): Handle new *_mode values. Correct pointer specifications for
1102 memory operands. Consolidate output of index register.
1103 (OP_G): Handle new *_mode values.
1104 (OP_I): Handle const_1_mode.
1105 (OP_ESreg, OP_DSreg): Generate pointer specifications. Indicate
1106 respective opcode prefix bits have been consumed.
1107 (OP_EM, OP_EX): Provide some default handling for generating pointer
1110 2004-10-28 Tomer Levi <Tomer.Levi@nsc.com>
1112 * crx-opc.c (REV_COP_INST): New macro, reverse operand order of
1115 2004-10-27 Tomer Levi <Tomer.Levi@nsc.com>
1117 * crx-dis.c (enum REG_ARG_TYPE): New, replacing COP_ARG_TYPE.
1118 (getregliststring): Support HI/LO and user registers.
1119 * crx-opc.c (crx_instruction): Update data structure according to the
1120 rearrangement done in CRX opcode header file.
1121 (crx_regtab): Likewise.
1122 (crx_optab): Likewise.
1123 (crx_instruction): Reorder load/stor instructions, remove unsupported
1125 support new Co-Processor instruction 'cpi'.
1127 2004-10-27 Nick Clifton <nickc@redhat.com>
1129 * opcodes/iq2000-asm.c: Regenerate.
1130 * opcodes/iq2000-desc.c: Regenerate.
1131 * opcodes/iq2000-desc.h: Regenerate.
1132 * opcodes/iq2000-dis.c: Regenerate.
1133 * opcodes/iq2000-ibld.c: Regenerate.
1134 * opcodes/iq2000-opc.c: Regenerate.
1135 * opcodes/iq2000-opc.h: Regenerate.
1137 2004-10-21 Tomer Levi <Tomer.Levi@nsc.com>
1139 * crx-opc.c (crx_instruction): Replace i3, i4, i5 with us3,
1140 us4, us5 (respectively).
1141 Remove unsupported 'popa' instruction.
1142 Reverse operands order in store co-processor instructions.
1144 2004-10-15 Alan Modra <amodra@bigpond.net.au>
1146 * Makefile.am: Run "make dep-am"
1147 * Makefile.in: Regenerate.
1149 2004-10-12 Bob Wilson <bob.wilson@acm.org>
1151 * xtensa-dis.c: Use ISO C90 formatting.
1153 2004-10-09 Alan Modra <amodra@bigpond.net.au>
1155 * ppc-opc.c: Revert 2004-09-09 change.
1157 2004-10-07 Bob Wilson <bob.wilson@acm.org>
1159 * xtensa-dis.c (state_names): Delete.
1160 (fetch_data): Use xtensa_isa_maxlength.
1161 (print_xtensa_operand): Replace operand parameter with opcode/operand
1162 pair. Remove print_sr_name parameter. Use new xtensa-isa.h functions.
1163 (print_insn_xtensa): Use new xtensa-isa.h functions. Handle multislot
1164 instruction bundles. Use xmalloc instead of malloc.
1166 2004-10-07 David Gibson <david@gibson.dropbear.id.au>
1168 * ppc-opc.c: Replace literal "0"s with NULLs in pointer
1171 2004-10-07 Tomer Levi <Tomer.Levi@nsc.com>
1173 * crx-opc.c (crx_instruction): Support Co-processor insns.
1174 * crx-dis.c (COP_ARG_TYPE): New enum for CO-Processor arguments.
1175 (getregliststring): Change function to use the above enum.
1176 (print_arg): Handle CO-Processor insns.
1177 (crx_cinvs): Add 'b' option to invalidate the branch-target
1180 2004-10-06 Aldy Hernandez <aldyh@redhat.com>
1182 * ppc-opc.c (powerpc_opcodes): Add efscfd, efdabs, efdnabs,
1183 efdneg, efdadd, efdsub, efdmul, efddiv, efdcmpgt, efdcmplt,
1184 efdcmpeq, efdtstgt, efdtstlt, efdtsteq, efdcfsi, efdcfsid,
1185 efdcfui, efdcfuid, efdcfsf, efdcfuf, efdctsi, efdctsidz, efdctsiz,
1186 efdctui, efdctuidz, efdctuiz, efdctsf, efdctuf, efdctuf, efdcfs.
1188 2004-10-01 Bill Farmer <Bill@the-farmers.freeserve.co.uk>
1190 * pdp11-dis.c (print_insn_pdp11): Subtract the SOB's displacement
1193 2004-09-30 Paul Brook <paul@codesourcery.com>
1195 * arm-dis.c (print_insn_arm): Handle 'e' for SMI instruction.
1196 * arm-opc.h: Document %e. Add ARMv6ZK instructions.
1198 2004-09-17 H.J. Lu <hongjiu.lu@intel.com>
1200 * Makefile.am (AUTOMAKE_OPTIONS): Require 1.9.
1201 (CONFIG_STATUS_DEPENDENCIES): New.
1202 (Makefile): Removed.
1203 (config.status): Likewise.
1204 * Makefile.in: Regenerated.
1206 2004-09-17 Alan Modra <amodra@bigpond.net.au>
1208 * Makefile.am: Run "make dep-am".
1209 * Makefile.in: Regenerate.
1210 * aclocal.m4: Regenerate.
1211 * configure: Regenerate.
1212 * po/POTFILES.in: Regenerate.
1213 * po/opcodes.pot: Regenerate.
1215 2004-09-11 Andreas Schwab <schwab@suse.de>
1217 * configure: Rebuild.
1219 2004-09-09 Segher Boessenkool <segher@kernel.crashing.org>
1221 * ppc-opc.c (L): Make this field not optional.
1223 2004-09-03 Tomer Levi <Tomer.Levi@nsc.com>
1225 * opc-crx.c: Rename 'popma' to 'popa', remove 'pushma'.
1226 Fix parameter to 'm[t|f]csr' insns.
1228 2004-08-30 Nathanael Nerode <neroden@gcc.gnu.org>
1230 * configure.in: Autoupdate to autoconf 2.59.
1231 * aclocal.m4: Rebuild with aclocal 1.4p6.
1232 * configure: Rebuild with autoconf 2.59.
1233 * Makefile.in: Rebuild with automake 1.4p6 (picking up
1234 bfd changes for autoconf 2.59 on the way).
1235 * config.in: Rebuild with autoheader 2.59.
1237 2004-08-27 Richard Sandiford <rsandifo@redhat.com>
1239 * frv-desc.[ch], frv-opc.[ch]: Regenerated.
1241 2004-07-30 Michal Ludvig <mludvig@suse.cz>
1243 * i386-dis.c (GRPPADLCK): Renamed to GRPPADLCK1
1244 (GRPPADLCK2): New define.
1245 (twobyte_has_modrm): True for 0xA6.
1246 (grps): GRPPADLCK2 for opcode 0xA6.
1248 2004-07-29 Alexandre Oliva <aoliva@redhat.com>
1250 Introduce SH2a support.
1251 * sh-opc.h (arch_sh2a_base): Renumber.
1252 (arch_sh2a_nofpu_base): Remove.
1253 (arch_sh_base_mask): Adjust.
1254 (arch_opann_mask): New.
1255 (arch_sh2a, arch_sh2a_nofpu): Adjust.
1256 (arch_sh2a_up, arch_sh2a_nofpu_up): Likewise.
1257 (sh_table): Adjust whitespace.
1258 2004-02-24 Corinna Vinschen <vinschen@redhat.com>
1259 * sh-opc.h (arch_sh2a_nofpu_up): New. Use instead of arch_sh2a_up in
1260 instruction list throughout.
1261 (arch_sh2a_up): Redefine to include fpu instruction set. Use instead
1262 of arch_sh2a in instruction list throughout.
1263 (arch_sh2e_up): Accomodate above changes.
1264 (arch_sh2_up): Ditto.
1265 2004-02-20 Corinna Vinschen <vinschen@redhat.com>
1266 * sh-opc.h: Add arch_sh2a_nofpu to arch_sh2_up.
1267 2004-02-18 Corinna Vinschen <vinschen@redhat.com>
1268 * sh-dis.c (print_insn_sh): Add bfd_mach_sh2a_nofpu handling.
1269 * sh-opc.h (arch_sh2a_nofpu): New.
1270 (arch_sh2a_up): New, defines sh2a and sh2a_nofpu.
1271 (sh_table): Change all arch_sh2a to arch_sh2a_up unless FPU
1273 2004-01-20 DJ Delorie <dj@redhat.com>
1274 * sh-dis.c (print_insn_sh): SH2A does not have 'X' fp regs.
1275 2003-12-29 DJ Delorie <dj@redhat.com>
1276 * sh-opc.c (sh_nibble_type, sh_arg_type, arch_2a, arch_2e_up,
1277 sh_opcode_info, sh_table): Add sh2a support.
1278 (arch_op32): New, to tag 32-bit opcodes.
1279 * sh-dis.c (print_insn_sh): Support sh2a opcodes.
1280 2003-12-02 Michael Snyder <msnyder@redhat.com>
1281 * sh-opc.h (arch_sh2a): Add.
1282 * sh-dis.c (arch_sh2a): Handle.
1283 * sh-opc.h (arch_sh2_up): Fix up to include arch_sh2a.
1285 2004-07-27 Tomer Levi <Tomer.Levi@nsc.com>
1287 * crx-opc.c: Add popx,pushx insns. Indent code, fix comments.
1289 2004-07-22 Nick Clifton <nickc@redhat.com>
1292 * h8300-dis.c (bfd_h8_disassemble): Do not dump raw bytes for the
1293 insns - this is done by objdump itself.
1294 * h8500-dis.c (print_insn_h8500): Likewise.
1296 2004-07-21 Jan Beulich <jbeulich@novell.com>
1298 * i386-dis.c (OP_E): Show rip-relative addressing in 64-bit mode
1299 regardless of address size prefix in effect.
1300 (ptr_reg): Size or address registers does not depend on rex64, but
1301 on the presence of an address size override.
1302 (OP_MMX): Use rex.x only for xmm registers.
1303 (OP_EM): Use rex.z only for xmm registers.
1305 2004-07-20 Maciej W. Rozycki <macro@linux-mips.org>
1307 * mips-opc.c (mips_builtin_opcodes): Move coprocessor 2
1308 move/branch operations to the bottom so that VR5400 multimedia
1309 instructions take precedence in disassembly.
1311 2004-07-20 Maciej W. Rozycki <macro@linux-mips.org>
1313 * mips-opc.c (mips_builtin_opcodes): Remove the MIPS32
1314 ISA-specific "break" encoding.
1316 2004-07-13 Elvis Chiang <elvisfb@gmail.com>
1318 * arm-opc.h: Fix typo in comment.
1320 2004-07-11 Andreas Schwab <schwab@suse.de>
1322 * m68k-dis.c (m68k_valid_ea): Fix typos in last change.
1324 2004-07-09 Andreas Schwab <schwab@suse.de>
1326 * m68k-dis.c (m68k_valid_ea): Check validity of all codes.
1328 2004-07-07 Tomer Levi <Tomer.Levi@nsc.com>
1330 * Makefile.am (CFILES): Add crx-dis.c, crx-opc.c.
1331 (ALL_MACHINES): Add crx-dis.lo, crx-opc.lo.
1332 (crx-dis.lo): New target.
1333 (crx-opc.lo): Likewise.
1334 * Makefile.in: Regenerate.
1335 * configure.in: Handle bfd_crx_arch.
1336 * configure: Regenerate.
1337 * crx-dis.c: New file.
1338 * crx-opc.c: New file.
1339 * disassemble.c (ARCH_crx): Define.
1340 (disassembler): Handle ARCH_crx.
1342 2004-06-29 James E Wilson <wilson@specifixinc.com>
1344 * ia64-opc-a.c (ia64_opcodes_a): Delete mov immediate pseudo for adds.
1345 * ia64-asmtab.c: Regnerate.
1347 2004-06-28 Alan Modra <amodra@bigpond.net.au>
1349 * ppc-opc.c (insert_fxm): Handle mfocrf and mtocrf.
1350 (extract_fxm): Don't test dialect.
1351 (XFXFXM_MASK): Include the power4 bit.
1352 (XFXM): Add p4 param.
1353 (powerpc_opcodes): Add mfocrf and mtocrf. Adjust mtcr.
1355 2004-06-27 Alexandre Oliva <aoliva@redhat.com>
1357 2003-07-21 Richard Sandiford <rsandifo@redhat.com>
1358 * disassemble.c (disassembler): Handle bfd_mach_h8300sxn.
1360 2004-06-26 Alan Modra <amodra@bigpond.net.au>
1362 * ppc-opc.c (BH, XLBH_MASK): Define.
1363 (powerpc_opcodes): Allow BH field on bclr, bclrl, bcctr, bcctrl.
1365 2004-06-24 Alan Modra <amodra@bigpond.net.au>
1367 * i386-dis.c (x_mode): Comment.
1368 (two_source_ops): File scope.
1369 (float_mem): Correct fisttpll and fistpll.
1370 (float_mem_mode): New table.
1372 (OP_E): Correct intel mode PTR output.
1373 (ptr_reg): Use open_char and close_char.
1374 (PNI_Fixup): Handle possible suffix on sidt. Use op1out etc. for
1375 operands. Set two_source_ops.
1377 2004-06-15 Alan Modra <amodra@bigpond.net.au>
1379 * arc-ext.c (build_ARC_extmap): Use bfd_get_section_size
1380 instead of _raw_size.
1382 2004-06-08 Jakub Jelinek <jakub@redhat.com>
1384 * ia64-gen.c (in_iclass): Handle more postinc st
1386 * ia64-asmtab.c: Rebuilt.
1388 2004-06-01 Martin Schwidefsky <schwidefsky@de.ibm.com>
1390 * s390-opc.txt: Correct architecture mask for some opcodes.
1391 lrv, lrvh, strv, ml, dl, alc, slb rll and mvclu are available
1392 in the esa mode as well.
1394 2004-05-28 Andrew Stubbs <andrew.stubbs@superh.com>
1396 * sh-dis.c (target_arch): Make unsigned.
1397 (print_insn_sh): Replace (most of) switch with a call to
1398 sh_get_arch_from_bfd_mach(). Also use new architecture flags system.
1399 * sh-opc.h: Redefine architecture flags values.
1400 Add sh3-nommu architecture.
1401 Reorganise <arch>_up macros so they make more visual sense.
1402 (SH_MERGE_ARCH_SET): Define new macro.
1403 (SH_VALID_BASE_ARCH_SET): Likewise.
1404 (SH_VALID_MMU_ARCH_SET): Likewise.
1405 (SH_VALID_CO_ARCH_SET): Likewise.
1406 (SH_VALID_ARCH_SET): Likewise.
1407 (SH_MERGE_ARCH_SET_VALID): Likewise.
1408 (SH_ARCH_SET_HAS_FPU): Likewise.
1409 (SH_ARCH_SET_HAS_DSP): Likewise.
1410 (SH_ARCH_UNKNOWN_ARCH): Likewise.
1411 (sh_get_arch_from_bfd_mach): Add prototype.
1412 (sh_get_arch_up_from_bfd_mach): Likewise.
1413 (sh_get_bfd_mach_from_arch_set): Likewise.
1414 (sh_merge_bfd_arc): Likewise.
1416 2004-05-24 Peter Barada <peter@the-baradas.com>
1418 * m68k-dis.c(print_insn_m68k): Strip body of diassembly out
1419 into new match_insn_m68k function. Loop over canidate
1420 matches and select first that completely matches.
1421 * m68k-dis.c(print_insn_arg): Fix 'g' case to only extract 1 bit.
1422 * m68k-dis.c(print_insn_arg): Call new function m68k_valid_ea
1423 to verify addressing for MAC/EMAC.
1424 * m68k-dis.c(print_insn_arg): Use reg_half_names for MAC/EMAC
1425 reigster halves since 'fpu' and 'spl' look misleading.
1426 * m68k-dis.c(fetch_arg): Fix 'G', 'H', 'I', 'f', 'M', 'N' cases.
1427 * m68k-opc.c: Rearragne mac/emac cases to use longest for
1428 first, tighten up match masks.
1429 * m68k-opc.c: Add 'size' field to struct m68k_opcode. Produce
1430 'size' from special case code in print_insn_m68k to
1431 determine decode size of insns.
1433 2004-05-19 Alan Modra <amodra@bigpond.net.au>
1435 * ppc-opc.c (insert_fxm): Enable two operand mfcr when -many as
1436 well as when -mpower4.
1438 2004-05-13 Nick Clifton <nickc@redhat.com>
1440 * po/fr.po: Updated French translation.
1442 2004-05-05 Peter Barada <peter@the-baradas.com>
1444 * m68k-dis.c(print_insn_m68k): Add new chips, use core
1445 variants in arch_mask. Only set m68881/68851 for 68k chips.
1446 * m68k-op.c: Switch from ColdFire chips to core variants.
1448 2004-05-05 Alan Modra <amodra@bigpond.net.au>
1451 * ppc-opc.c (PPCVEC): Remove PPC_OPCODE_PPC.
1453 2004-04-29 Ben Elliston <bje@au.ibm.com>
1455 * ppc-opc.c (XCMPL): Renmame to XOPL. Update users.
1456 (powerpc_opcodes): Add "dbczl" instruction for PPC970.
1458 2004-04-22 Kaz Kojima <kkojima@rr.iij4u.or.jp>
1460 * sh-dis.c (print_insn_sh): Print the value in constant pool
1461 as a symbol if it looks like a symbol.
1463 2004-04-22 Peter Barada <peter@the-baradas.com>
1465 * m68k-dis.c(print_insn_m68k): Set mfcmac/mcfemac on
1466 appropriate ColdFire architectures.
1467 (print_insn_m68k): Handle EMAC, MAC/EMAC scalefactor, and MAC/EMAC
1469 Add EMAC instructions, fix MAC instructions. Remove
1470 macmw/macml/msacmw/msacml instructions since mask addressing now
1473 2004-04-20 Jakub Jelinek <jakub@redhat.com>
1475 * sparc-opc.c (fmoviccx, fmovfccx, fmovccx): Define.
1476 (fmovicc, fmovfcc, fmovcc): Remove fpsize argument, change opcode to
1477 suffix. Use fmov*x macros, create all 3 fpsize variants in one
1478 macro. Adjust all users.
1480 2004-04-15 Anil Paranjpe <anilp1@kpitcummins.com>
1482 * h8300-dis.c (bfd_h8_disassemble) : Treat "adds" & "subs"
1485 2004-03-30 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
1487 * m32r-asm.c: Regenerate.
1489 2004-03-29 Stan Shebs <shebs@apple.com>
1491 * mpw-config.in, mpw-make.sed: Remove MPW support files, no longer
1494 2004-03-19 Alan Modra <amodra@bigpond.net.au>
1496 * aclocal.m4: Regenerate.
1497 * config.in: Regenerate.
1498 * configure: Regenerate.
1499 * po/POTFILES.in: Regenerate.
1500 * po/opcodes.pot: Regenerate.
1502 2004-03-16 Alan Modra <amodra@bigpond.net.au>
1504 * ppc-dis.c (print_insn_powerpc): Don't print tabs. Handle
1506 * ppc-opc.c (RA0): Define.
1507 (RAQ, RAL, RAM, RAS, RSQ, RTQ, RSO): Use PPC_OPERAND_GPR_0.
1508 (RAOPT): Rename from RAO. Update all uses.
1509 (powerpc_opcodes): Use RA0 as appropriate.
1511 2004-03-15 Aldy Hernandez <aldyh@redhat.com>
1513 * ppc-opc.c (powerpc_opcodes): Add BOOKE versions of mfsprg.
1515 2004-03-15 Alan Modra <amodra@bigpond.net.au>
1517 * sparc-dis.c (print_insn_sparc): Update getword prototype.
1519 2004-03-12 Michal Ludvig <mludvig@suse.cz>
1521 * i386-dis.c (GRPPLOCK): Delete.
1522 (grps): Delete GRPPLOCK entry.
1524 2004-03-12 Alan Modra <amodra@bigpond.net.au>
1526 * i386-dis.c (OP_M, OP_0f0e, OP_0fae, NOP_Fixup): New functions.
1528 (None, PADLOCK_SPECIAL, PADLOCK_0): Delete.
1529 (GRPPADLCK): Define.
1530 (dis386): Use NOP_Fixup on "nop".
1531 (dis386_twobyte): Use GRPPADLCK on opcode 0xa7.
1532 (twobyte_has_modrm): Set for 0xa7.
1533 (padlock_table): Delete. Move to..
1534 (grps): ..here, using OP_0f07. Use OP_Ofae on lfence, mfence
1536 (print_insn): Revert PADLOCK_SPECIAL code.
1537 (OP_E): Delete sfence, lfence, mfence checks.
1539 2004-03-12 Jakub Jelinek <jakub@redhat.com>
1541 * i386-dis.c (grps): Use INVLPG_Fixup instead of OP_E for invlpg.
1542 (INVLPG_Fixup): New function.
1543 (PNI_Fixup): Remove ATTRIBUTE_UNUSED from sizeflag.
1545 2004-03-12 Michal Ludvig <mludvig@suse.cz>
1547 * i386-dis.c (PADLOCK_SPECIAL, PADLOCK_0): New defines.
1548 (dis386_twobyte): Opcode 0xa7 is PADLOCK_0.
1549 (padlock_table): New struct with PadLock instructions.
1550 (print_insn): Handle PADLOCK_SPECIAL.
1552 2004-03-12 Alan Modra <amodra@bigpond.net.au>
1554 * i386-dis.c (grps): Use clflush by default for 0x0fae/7.
1555 (OP_E): Twiddle clflush to sfence here.
1557 2004-03-08 Nick Clifton <nickc@redhat.com>
1559 * po/de.po: Updated German translation.
1561 2003-03-03 Andrew Stubbs <andrew.stubbs@superh.com>
1563 * sh-dis.c (print_insn_sh): Don't disassemble fp instructions in
1564 nofpu mode. Add BFD type bfd_mach_sh4_nommu_nofpu.
1565 * sh-opc.h: Add sh4_nommu_nofpu architecture and adjust instructions
1568 2004-03-01 Richard Sandiford <rsandifo@redhat.com>
1570 * frv-asm.c: Regenerate.
1571 * frv-desc.c: Regenerate.
1572 * frv-desc.h: Regenerate.
1573 * frv-dis.c: Regenerate.
1574 * frv-ibld.c: Regenerate.
1575 * frv-opc.c: Regenerate.
1576 * frv-opc.h: Regenerate.
1578 2004-03-01 Richard Sandiford <rsandifo@redhat.com>
1580 * frv-desc.c, frv-opc.c: Regenerate.
1582 2004-03-01 Richard Sandiford <rsandifo@redhat.com>
1584 * frv-desc.c, frv-opc.c, frv-opc.h: Regenerate.
1586 2004-02-26 Andrew Stubbs <andrew.stubbs@superh.com>
1588 * sh-opc.h: Move fsca and fsrra instructions from sh4a to sh4.
1589 Also correct mistake in the comment.
1591 2004-02-26 Andrew Stubbs <andrew.stubbs@superh.com>
1593 * sh-dis.c (print_insn_sh): Add REG_N_D nibble type to
1594 ensure that double registers have even numbers.
1595 Add REG_N_B01 for nn01 (binary 01) nibble to ensure
1596 that reserved instruction 0xfffd does not decode the same
1598 * sh-opc.h: Add REG_N_D nibble type and use it whereever
1599 REG_N refers to a double register.
1600 Add REG_N_B01 nibble type and use it instead of REG_NM
1602 Adjust the bit patterns in a few comments.
1604 2004-02-25 Aldy Hernandez <aldyh@redhat.com>
1606 * ppc-opc.c (powerpc_opcodes): Change mask for dcbt and dcbtst.
1608 2004-02-20 Aldy Hernandez <aldyh@redhat.com>
1610 * ppc-opc.c (powerpc_opcodes): Move mfmcsrr0 before mfdc_dat.
1612 2004-02-20 Aldy Hernandez <aldyh@redhat.com>
1614 * ppc-opc.c (powerpc_opcodes): Add m*ivor35.
1616 2004-02-20 Aldy Hernandez <aldyh@redhat.com>
1618 * ppc-opc.c (powerpc_opcodes): Add mfivor32, mfivor33, mfivor34,
1619 mtivor32, mtivor33, mtivor34.
1621 2004-02-19 Aldy Hernandez <aldyh@redhat.com>
1623 * ppc-opc.c (powerpc_opcodes): Add mfmcar.
1625 2004-02-10 Petko Manolov <petkan@nucleusys.com>
1627 * arm-opc.h Maverick accumulator register opcode fixes.
1629 2004-02-13 Ben Elliston <bje@wasabisystems.com>
1631 * m32r-dis.c: Regenerate.
1633 2004-01-27 Michael Snyder <msnyder@redhat.com>
1635 * sh-opc.h (sh_table): "fsrra", not "fssra".
1637 2004-01-23 Andrew Over <andrew.over@cs.anu.edu.au>
1639 * sparc-opc.c (fdtox, fstox, fqtox, fxtod, fxtos, fxtoq): Tighten
1642 2004-01-19 Andrew Over <andrew.over@cs.anu.edu.au>
1644 * sparc-opc.c (sparc_opcodes) <f[dsq]tox, fxto[dsq]>: Fix args.
1646 2004-01-19 Alan Modra <amodra@bigpond.net.au>
1648 * i386-dis.c (OP_E): Print scale factor on intel mode sib when not
1649 1. Don't print scale factor on AT&T mode when index missing.
1651 2004-01-16 Alexandre Oliva <aoliva@redhat.com>
1653 * m10300-opc.c (mov): 8- and 24-bit immediates are zero-extended
1654 when loaded into XR registers.
1656 2004-01-14 Richard Sandiford <rsandifo@redhat.com>
1658 * frv-desc.h: Regenerate.
1659 * frv-desc.c: Regenerate.
1660 * frv-opc.c: Regenerate.
1662 2004-01-13 Michael Snyder <msnyder@redhat.com>
1664 * sh-dis.c (print_insn_sh): Allocate 4 bytes for insn.
1666 2004-01-09 Paul Brook <paul@codesourcery.com>
1668 * arm-opc.h (arm_opcodes): Move generic mcrr after known
1671 2004-01-07 Daniel Jacobowitz <drow@mvista.com>
1673 * Makefile.am (libopcodes_la_DEPENDENCIES)
1674 (libopcodes_la_LIBADD): Revert 2003-05-17 change. Add explanatory
1675 comment about the problem.
1676 * Makefile.in: Regenerate.
1678 2004-01-06 Alexandre Oliva <aoliva@redhat.com>
1680 2003-12-19 Alexandre Oliva <aoliva@redhat.com>
1681 * frv-asm.c (parse_ulo16, parse_uhi16, parse_d12): Fix some
1682 cut&paste errors in shifting/truncating numerical operands.
1683 2003-08-04 Alexandre Oliva <aoliva@redhat.com>
1684 * frv-asm.c (parse_ulo16): Parse gotofflo and gotofffuncdesclo.
1685 (parse_uslo16): Likewise.
1686 (parse_uhi16): Parse gotoffhi and gotofffuncdeschi.
1687 (parse_d12): Parse gotoff12 and gotofffuncdesc12.
1688 (parse_s12): Likewise.
1689 2003-08-04 Alexandre Oliva <aoliva@redhat.com>
1690 * frv-asm.c (parse_ulo16): Parse gotlo and gotfuncdesclo.
1691 (parse_uslo16): Likewise.
1692 (parse_uhi16): Parse gothi and gotfuncdeschi.
1693 (parse_d12): Parse got12 and gotfuncdesc12.
1694 (parse_s12): Likewise.
1696 2004-01-02 Albert Bartoszko <albar@nt.kegel.com.pl>
1698 * msp430-dis.c (msp430_doubleoperand): Check for an 'add'
1699 instruction which looks similar to an 'rla' instruction.
1701 For older changes see ChangeLog-0203
1707 version-control: never