opcodes/ChangeLog

   1 2005-08-26  Jan Beulich  <jbeulich@novell.com>
   2
   3         * i386-dis.c (intel_operand_size): New, broken out from OP_E for
   4         re-use.
   5         (OP_E): Call intel_operand_size, move call site out of mode
   6         dependent code.
   7         (OP_OFF): Call intel_operand_size if suffix_always. Remove
   8         ATTRIBUTE_UNUSED from parameters.
   9         (OP_OFF64): Likewise.
  10         (OP_ESreg): Call intel_operand_size.
  11         (OP_DSreg): Likewise.
  12         (OP_DIR): Use colon rather than semicolon as separator of far
  13         jump/call operands.
  14
  15 2005-08-25  Chao-ying Fu  <fu@mips.com>
  16
  17         * mips-opc.c (WR_a, RD_a, MOD_a, DSP_VOLA, D32): New define.
  18         (mips_builtin_opcodes): Add DSP instructions.
  19         * mips-dis.c (mips_arch_choices): Enable INSN_DSP for mips32, mips32r2,
  20         mips64, mips64r2.
  21         (print_insn_args): Add supports for 3, 4, 5, 6, 7, 8, 9, 0, :, ', @
  22         operand formats.
  23
  24 2005-08-23  David Ung  <davidu@mips.com>
  25
  26         * mips16-opc.c (mips16_opcodes): Add the MIPS16e jalrc/jrc
  27         instructions to the table.
  28
  29 2005-08-18  Alan Modra  <amodra@bigpond.net.au>
  30
  31         * a29k-dis.c: Delete.
  32         * Makefile.am: Remove a29k support.
  33         * configure.in: Likewise.
  34         * disassemble.c: Likewise.
  35         * Makefile.in: Regenerate.
  36         * configure: Regenerate.
  37         * po/POTFILES.in: Regenerate.
  38
  39 2005-08-15  Daniel Jacobowitz  <dan@codesourcery.com>
  40
  41         * ppc-dis.c (powerpc_dialect): Handle e300.
  42         (print_ppc_disassembler_options): Likewise.
  43         * ppc-opc.c (PPCE300): Define.
  44         (powerpc_opcodes): Mark icbt as available for the e300.
  45
  46 2005-08-13  John David Anglin  <dave.anglin@nrc-cnrc.gc.ca>
  47
  48         * hppa-dis.c (print_insn_hppa): Don't print '%' before register names.
  49         Use "rp" instead of "%r2" in "b,l" insns.
  50
  51 2005-08-12 Martin Schwidefsky  <schwidefsky@de.ibm.com>
  52
  53         * s390-dis.c (print_insn_s390): Print unsigned operands with %u.
  54         * s390-mkopc.c (s390_opcode_cpu_val): Add support for cpu type z9-109.
  55         (main): Likewise.
  56         * s390-opc.c (I32_16, U32_16, M_16): Add defines 32 bit immediates
  57         and 4 bit optional masks.
  58         (INSTR_RIL_RI, INSTR_RIL_RU, INSTR_RRF_M0RR, INSTR_RSE_CCRD,
  59         INSTR_RSY_CCRD, INSTR_SSF_RRDRD): Add new instruction formats.
  60         (MASK_RIL_RI, MASK_RIL_RU, MASK_RRF_M0RR, MASK_RSE_CCRD,
  61         MASK_RSY_CCRD, MASK_SSF_RRDRD): Likewise.
  62         (s390_opformats): Likewise.
  63         * s390-opc.txt: Add new instructions for cpu type z9-109.
  64
  65 2005-08-05  John David Anglin  <dave.anglin@nrc-crnc.gc.ca>
  66
  67         * hppa-dis.c (print_insn_hppa): Prefix 21-bit values with "L%".
  68
  69 2005-07-29  Paul Brook  <paul@codesourcery.com>
  70
  71         * arm-dis.c: Fix disassebly of thumb2 writeback addressing modes.
  72
  73 2005-07-29  Paul Brook  <paul@codesourcery.com>
  74
  75         * arm-dis.c (thumb32_opc): Fix addressing mode for tbh.
  76         (print_insn_thumb32): Fix decoding of thumb2 'I' operands.
  77
  78 2005-07-25  DJ Delorie  <dj@redhat.com>
  79
  80         * m32c-asm.c Regenerate.
  81         * m32c-dis.c Regenerate.
  82
  83 2005-07-20  DJ Delorie  <dj@redhat.com>
  84
  85         * disassemble.c (disassemble_init_for_target): M32C ISAs are
  86         enums, so convert them to bit masks, which attributes are.
  87
  88 2005-07-18  Nick Clifton  <nickc@redhat.com>
  89
  90         * configure.in: Restore alpha ordering to list of arches.
  91         * configure: Regenerate.
  92         * disassemble.c: Restore alpha ordering to list of arches.
  93
  94 2005-07-18  Nick Clifton  <nickc@redhat.com>
  95
  96         * m32c-asm.c: Regenerate.
  97         * m32c-desc.c: Regenerate.
  98         * m32c-desc.h: Regenerate.
  99         * m32c-dis.c: Regenerate.
 100         * m32c-ibld.h: Regenerate.
 101         * m32c-opc.c: Regenerate.
 102         * m32c-opc.h: Regenerate.
 103
 104 2005-07-18  H.J. Lu  <hongjiu.lu@intel.com>
 105
 106         * i386-dis.c (PNI_Fixup): Update comment.
 107         (VMX_Fixup): Properly handle the suffix check.
 108
 109 2005-07-16  John David Anglin  <dave.anglin@nrc-cnrc.gc.ca>
 110
 111         * hppa-dis.c (print_insn_hppa): Add space after 'w' in wide-mode
 112         mfctl disassembly.
 113
 114 2005-07-16  Alan Modra  <amodra@bigpond.net.au>
 115
 116         * Makefile.am: Run "make dep-am".
 117         (stamp-m32c): Fix cpu dependencies.
 118         * Makefile.in: Regenerate.
 119         * ip2k-dis.c: Regenerate.
 120
 121 2007-07-15  H.J. Lu <hongjiu.lu@intel.com>
 122
 123         * i386-dis.c (OP_VMX): New. Handle Intel VMX Instructions.
 124         (VMX_Fixup): New. Fix up Intel VMX Instructions.
 125         (Em): New.
 126         (Gm): New.
 127         (VM): New.
 128         (dis386_twobyte): Updated entries 0x78 and 0x79.
 129         (twobyte_has_modrm): Likewise.
 130         (grps): Use OP_VMX in the "sgdtIQ" entry. Updated GRP9.
 131         (OP_G): Handle m_mode.
 132
 133 2005-07-14  Jim Blandy  <jimb@redhat.com>
 134
 135         Add support for the Renesas M32C and M16C.
 136         * m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c: New.
 137         * m32c-desc.h, m32c-opc.h: New.
 138         * Makefile.am (HFILES): List m32c-desc.h and m32c-opc.h.
 139         (CFILES): List m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c,
 140         m32c-opc.c.
 141         (ALL_MACHINES): List m32c-asm.lo, m32c-desc.lo, m32c-dis.lo,
 142         m32c-ibld.lo, m32c-opc.lo.
 143         (CLEANFILES): List stamp-m32c.
 144         (M32C_DEPS): List stamp-m32c, if CGEN_MAINT.
 145         (CGEN_CPUS): Add m32c.
 146         (m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c)
 147         (m32c-desc.h, m32c-opc.h): Depend on M32C_DEPS.
 148         (m32c_opc_h): New variable.
 149         (stamp-m32c, m32c-asm.lo, m32c-desc.lo, m32c-dis.lo, m32c-ibld.lo)
 150         (m32c-opc.lo): New rules.
 151         * Makefile.in: Regenerated.
 152         * configure.in: Add case for bfd_m32c_arch.
 153         * configure: Regenerated.
 154         * disassemble.c (ARCH_m32c): New.
 155         [ARCH_m32c]: #include "m32c-desc.h".
 156         (disassembler) [ARCH_m32c]: Add case for bfd_arch_m32c.
 157         (disassemble_init_for_target) [ARCH_m32c]: Same.
 158
 159         * cgen-ops.h, cgen-types.h: New files.
 160         * Makefile.am (HFILES): List them.
 161         * Makefile.in: Regenerated.
 162
 163 2005-07-07  Kaveh R. Ghazi  <ghazi@caip.rutgers.edu>
 164
 165         * arc-dis.c, arm-dis.c, cris-dis.c, crx-dis.c, d10v-dis.c,
 166         d30v-dis.c, fr30-dis.c, h8300-dis.c, h8500-dis.c, i860-dis.c,
 167         ia64-dis.c, ip2k-dis.c, m10200-dis.c, m10300-dis.c,
 168         m88k-dis.c, mcore-dis.c, mips-dis.c, ms1-dis.c, or32-dis.c,
 169         ppc-dis.c, sh64-dis.c, sparc-dis.c, tic4x-dis.c, tic80-dis.c,
 170         v850-dis.c: Fix format bugs.
 171         * ia64-gen.c (fail, warn): Add format attribute.
 172         * or32-opc.c (debug): Likewise.
 173
 174 2005-07-07  Khem Raj  <kraj@mvista.com>
 175
 176         * arm-dis.c (opcode32 arm_opcodes): Fix ARM VFP fadds instruction
 177         disassembly pattern.
 178
 179 2005-07-06  Alan Modra  <amodra@bigpond.net.au>
 180
 181         * Makefile.am (stamp-m32r): Fix path to cpu files.
 182         (stamp-m32r, stamp-iq2000): Likewise.
 183         * Makefile.in: Regenerate.
 184         * m32r-asm.c: Regenerate.
 185         * po/POTFILES.in: Remove arm-opc.h.  Add ms1-asm.c, ms1-desc.c,
 186         ms1-desc.h, ms1-dis.c, ms1-ibld.c, ms1-opc.c, ms1-opc.h.
 187
 188 2005-07-05  Nick Clifton  <nickc@redhat.com>
 189
 190         * iq2000-asm.c: Regenerate.
 191         * ms1-asm.c: Regenerate.
 192
 193 2005-07-05  Jan Beulich  <jbeulich@novell.com>
 194
 195         * i386-dis.c (SVME_Fixup): New.
 196         (grps): Use it for the lidt entry.
 197         (PNI_Fixup): Call OP_M rather than OP_E.
 198         (INVLPG_Fixup): Likewise.
 199
 200 2005-07-04  H.J. Lu  <hongjiu.lu@intel.com>
 201
 202         * tic30-dis.c (cnvt_tmsfloat_ieee): Use HUGE_VALF if defined.
 203
 204 2005-07-01  Nick Clifton  <nickc@redhat.com>
 205
 206         * a29k-dis.c: Update to ISO C90 style function declarations and
 207         fix formatting.
 208         * alpha-opc.c: Likewise.
 209         * arc-dis.c: Likewise.
 210         * arc-opc.c: Likewise.
 211         * avr-dis.c: Likewise.
 212         * cgen-asm.in: Likewise.
 213         * cgen-dis.in: Likewise.
 214         * cgen-ibld.in: Likewise.
 215         * cgen-opc.c: Likewise.
 216         * cris-dis.c: Likewise.
 217         * d10v-dis.c: Likewise.
 218         * d30v-dis.c: Likewise.
 219         * d30v-opc.c: Likewise.
 220         * dis-buf.c: Likewise.
 221         * dlx-dis.c: Likewise.
 222         * h8300-dis.c: Likewise.
 223         * h8500-dis.c: Likewise.
 224         * hppa-dis.c: Likewise.
 225         * i370-dis.c: Likewise.
 226         * i370-opc.c: Likewise.
 227         * m10200-dis.c: Likewise.
 228         * m10300-dis.c: Likewise.
 229         * m68k-dis.c: Likewise.
 230         * m88k-dis.c: Likewise.
 231         * mips-dis.c: Likewise.
 232         * mmix-dis.c: Likewise.
 233         * msp430-dis.c: Likewise.
 234         * ns32k-dis.c: Likewise.
 235         * or32-dis.c: Likewise.
 236         * or32-opc.c: Likewise.
 237         * pdp11-dis.c: Likewise.
 238         * pj-dis.c: Likewise.
 239         * s390-dis.c: Likewise.
 240         * sh-dis.c: Likewise.
 241         * sh64-dis.c: Likewise.
 242         * sparc-dis.c: Likewise.
 243         * sparc-opc.c: Likewise.
 244         * sysdep.h: Likewise.
 245         * tic30-dis.c: Likewise.
 246         * tic4x-dis.c: Likewise.
 247         * tic80-dis.c: Likewise.
 248         * v850-dis.c: Likewise.
 249         * v850-opc.c: Likewise.
 250         * vax-dis.c: Likewise.
 251         * w65-dis.c: Likewise.
 252         * z8kgen.c: Likewise.
 253
 254         * fr30-*: Regenerate.
 255         * frv-*: Regenerate.
 256         * ip2k-*: Regenerate.
 257         * iq2000-*: Regenerate.
 258         * m32r-*: Regenerate.
 259         * ms1-*: Regenerate.
 260         * openrisc-*: Regenerate.
 261         * xstormy16-*: Regenerate.
 262
 263 2005-06-23  Ben Elliston  <bje@gnu.org>
 264
 265         * m68k-dis.c: Use ISC C90.
 266         * m68k-opc.c: Formatting fixes.
 267
 268 2005-06-16  David Ung  <davidu@mips.com>
 269
 270         * mips16-opc.c (mips16_opcodes): Add the following MIPS16e
 271         instructions to the table; seb/seh/sew/zeb/zeh/zew.
 272
 273 2005-06-15  Dave Brolley  <brolley@redhat.com>
 274
 275         Contribute Morpho ms1 on behalf of Red Hat
 276         * ms1-asm.c, ms1-desc.c, ms1-dis.c, ms1-ibld.c, ms1-opc.c,
 277         ms1-opc.h: New files, Morpho ms1 target.
 278
 279         2004-05-14  Stan Cox  <scox@redhat.com>
 280
 281         * disassemble.c (ARCH_ms1): Define.
 282         (disassembler): Handle bfd_arch_ms1
 283
 284         2004-05-13  Michael Snyder  <msnyder@redhat.com>
 285
 286         * Makefile.am, Makefile.in: Add ms1 target.
 287         * configure.in: Ditto.
 288
 289 2005-06-08  Zack Weinberg  <zack@codesourcery.com>
 290
 291         * arm-opc.h: Delete; fold contents into ...
 292         * arm-dis.c: ... here.  Move includes of internal COFF headers
 293         next to includes of internal ELF headers.
 294         (streq, WORD_ADDRESS, BDISP, BDISP23): Delete, unused.
 295         (struct arm_opcode): Rename struct opcode32.  Make 'assembler' const.
 296         (struct thumb_opcode): Rename struct opcode16.  Make 'assembler' const.
 297         (arm_conditional, arm_fp_const, arm_shift, arm_regname, regnames)
 298         (iwmmxt_wwnames, iwmmxt_wwssnames):
 299         Make const.
 300         (regnames): Remove iWMMXt coprocessor register sets.
 301         (iwmmxt_regnames, iwmmxt_cregnames): New statics.
 302         (get_arm_regnames): Adjust fourth argument to match above changes.
 303         (set_iwmmxt_regnames): Delete.
 304         (print_insn_arm): Constify 'c'.  Use ISO syntax for function
 305         pointer calls.  Expand sole use of BDISP.  Use iwmmxt_regnames
 306         and iwmmxt_cregnames, not set_iwmmxt_regnames.
 307         (print_insn_thumb16, print_insn_thumb32): Constify 'c'.  Use
 308         ISO syntax for function pointer calls.
 309
 310 2005-06-07  Zack Weinberg  <zack@codesourcery.com>
 311
 312         * arm-dis.c: Split up the comments describing the format codes, so
 313         that the ARM and 16-bit Thumb opcode tables each have comments
 314         preceding them that describe all the codes, and only the codes,
 315         valid in those tables.  (32-bit Thumb table is already like this.)
 316         Reorder the lists in all three comments to match the order in
 317         which the codes are implemented.
 318         Remove all forward declarations of static functions.  Convert all
 319         function definitions to ISO C format.
 320         (print_insn_arm, print_insn_thumb16, print_insn_thumb32):
 321         Return nothing.
 322         (print_insn_thumb16): Remove unused case 'I'.
 323         (print_insn): Update for changed calling convention of subroutines.
 324
 325 2005-05-25  Jan Beulich  <jbeulich@novell.com>
 326
 327         * i386-dis.c (OP_E): In Intel mode, display 32-bit displacements in
 328         hex (but retain it being displayed as signed). Remove redundant
 329         checks. Add handling of displacements for 16-bit addressing in Intel
 330         mode.
 331
 332 2005-05-25  Jan Beulich  <jbeulich@novell.com>
 333
 334         * i386-dis.c (prefix_name): Remove pointless mode_64bit check.
 335         (OP_E): Remove redundant REX_EXTZ handling. Remove pointless
 336         masking of 'rm' in 16-bit memory address handling.
 337
 338 2005-05-19  Anton Blanchard  <anton@samba.org>
 339
 340         * ppc-dis.c (powerpc_dialect): Handle "-Mpower5".
 341         (print_ppc_disassembler_options): Document it.
 342         * ppc-opc.c (SVC_LEV): Define.
 343         (LEV): Allow optional operand.
 344         (POWER5): Define.
 345         (powerpc_opcodes): Extend "sc".  Adjust "svc" and "svcl".  Add
 346         "hrfid", "popcntb", "fsqrtes", "fsqrtes.", "fre" and "fre.".
 347
 348 2005-05-19  Kelley Cook  <kcook@gcc.gnu.org>
 349
 350         * Makefile.in:  Regenerate.
 351
 352 2005-05-17  Zack Weinberg  <zack@codesourcery.com>
 353
 354         * arm-dis.c (thumb_opcodes): Add disassembly for V6T2 16-bit
 355         instructions.  Adjust disassembly of some opcodes to match
 356         unified syntax.
 357         (thumb32_opcodes): New table.
 358         (print_insn_thumb): Rename print_insn_thumb16; don't handle
 359         two-halfword branches here.
 360         (print_insn_thumb32): New function.
 361         (print_insn): Choose among print_insn_arm, print_insn_thumb16,
 362         and print_insn_thumb32.  Be consistent about order of
 363         halfwords when printing 32-bit instructions.
 364
 365 2005-05-07  H.J. Lu  <hongjiu.lu@intel.com>
 366
 367         PR 843
 368         * i386-dis.c (branch_v_mode): New.
 369         (indirEv): Use branch_v_mode instead of v_mode.
 370         (OP_E): Handle branch_v_mode.
 371
 372 2005-05-07  H.J. Lu  <hongjiu.lu@intel.com>
 373
 374         * d10v-dis.c (dis_2_short): Support 64bit host.
 375
 376 2005-05-07  Nick Clifton  <nickc@redhat.com>
 377
 378         * po/nl.po: Updated translation.
 379
 380 2005-05-07  Nick Clifton  <nickc@redhat.com>
 381
 382         * Update the address and phone number of the FSF organization in
 383         the GPL notices in the following files:
 384         a29k-dis.c, aclocal.m4, alpha-dis.c, alpha-opc.c, arc-dis.c,
 385         arc-dis.h, arc-ext.c, arc-ext.h, arc-opc.c, arm-dis.c, arm-opc.h,
 386         avr-dis.c, cgen-asm.c, cgen-asm.in, cgen-dis.c, cgen-dis.in,
 387         cgen-ibld.in, cgen-opc.c, cgen.sh, cris-dis.c, cris-opc.c,
 388         crx-dis.c, crx-opc.c, d10v-dis.c, d10v-opc.c, d30v-dis.c,
 389         d30v-opc.c, dis-buf.c, dis-init.c, disassemble.c, dlx-dis.c,
 390         fr30-asm.c, fr30-desc.c, fr30-desc.h, fr30-dis.c, fr30-ibld.c,
 391         fr30-opc.c, fr30-opc.h, frv-asm.c, frv-desc.c, frv-desc.h,
 392         frv-dis.c, frv-ibld.c, frv-opc.c, frv-opc.h, h8300-dis.c,
 393         h8500-dis.c, h8500-opc.h, hppa-dis.c, i370-dis.c, i370-opc.c,
 394         i386-dis.c, i860-dis.c, i960-dis.c, ia64-asmtab.h, ia64-dis.c,
 395         ia64-gen.c, ia64-opc-a.c, ia64-opc-b.c, ia64-opc-d.c,
 396         ia64-opc-f.c, ia64-opc-i.c, ia64-opc-m.c, ia64-opc-x.c,
 397         ia64-opc.c, ia64-opc.h, ip2k-asm.c, ip2k-desc.c, ip2k-desc.h,
 398         ip2k-dis.c, ip2k-ibld.c, ip2k-opc.c, ip2k-opc.h, iq2000-asm.c,
 399         iq2000-desc.c, iq2000-desc.h, iq2000-dis.c, iq2000-ibld.c,
 400         iq2000-opc.c, iq2000-opc.h, m10200-dis.c, m10200-opc.c,
 401         m10300-dis.c, m10300-opc.c, m32r-asm.c, m32r-desc.c, m32r-desc.h,
 402         m32r-dis.c, m32r-ibld.c, m32r-opc.c, m32r-opc.h, m32r-opinst.c,
 403         m68hc11-dis.c, m68hc11-opc.c, m68k-dis.c, m68k-opc.c, m88k-dis.c,
 404         maxq-dis.c, mcore-dis.c, mcore-opc.h, mips-dis.c, mips-opc.c,
 405         mips16-opc.c, mmix-dis.c, mmix-opc.c, msp430-dis.c, ns32k-dis.c,
 406         openrisc-asm.c, openrisc-desc.c, openrisc-desc.h, openrisc-dis.c,
 407         openrisc-ibld.c, openrisc-opc.c, openrisc-opc.h, opintl.h,
 408         or32-dis.c, or32-opc.c, pdp11-dis.c, pdp11-opc.c, pj-dis.c,
 409         pj-opc.c, ppc-dis.c, ppc-opc.c, s390-dis.c, s390-mkopc.c,
 410         s390-opc.c, sh-dis.c, sh-opc.h, sh64-dis.c, sh64-opc.c,
 411         sh64-opc.h, sparc-dis.c, sparc-opc.c, sysdep.h, tic30-dis.c,
 412         tic4x-dis.c, tic54x-dis.c, tic54x-opc.c, tic80-dis.c, tic80-opc.c,
 413         v850-dis.c, v850-opc.c, vax-dis.c, w65-dis.c, w65-opc.h,
 414         xstormy16-asm.c, xstormy16-desc.c, xstormy16-desc.h,
 415         xstormy16-dis.c, xstormy16-ibld.c, xstormy16-opc.c,
 416         xstormy16-opc.h, xtensa-dis.c, z8k-dis.c, z8kgen.c
 417
 418 2005-05-05  James E Wilson  <wilson@specifixinc.com>
 419
 420         * ia64-opc.c: Include sysdep.h before libiberty.h.
 421
 422 2005-05-05  Nick Clifton  <nickc@redhat.com>
 423
 424         * configure.in (ALL_LINGUAS): Add vi.
 425         * configure: Regenerate.
 426         * po/vi.po: New.
 427
 428 2005-04-26  Jerome Guitton  <guitton@gnat.com>
 429
 430         * configure.in: Fix the check for basename declaration.
 431         * configure: Regenerate.
 432
 433 2005-04-19  Alan Modra  <amodra@bigpond.net.au>
 434
 435         * ppc-opc.c (RTO): Define.
 436         (powerpc_opcodes <tlbsx, tlbsx., tlbre>): Combine PPC403 and BOOKE
 437         entries to suit PPC440.
 438
 439 2005-04-18  Mark Kettenis  <kettenis@gnu.org>
 440
 441         * i386-dis.c: Insert hyphens into selected VIA PadLock extensions.
 442         Add xcrypt-ctr.
 443
 444 2005-04-14  Nick Clifton  <nickc@redhat.com>
 445
 446         * po/fi.po: New translation: Finnish.
 447         * configure.in (ALL_LINGUAS): Add fi.
 448         * configure: Regenerate.
 449
 450 2005-04-14  Alan Modra  <amodra@bigpond.net.au>
 451
 452         * Makefile.am (NO_WERROR): Define.
 453         * configure.in: Invoke AM_BINUTILS_WARNINGS.
 454         * Makefile.in: Regenerate.
 455         * aclocal.m4: Regenerate.
 456         * configure: Regenerate.
 457
 458 2005-04-04  Nick Clifton  <nickc@redhat.com>
 459
 460         * fr30-asm.c: Regenerate.
 461         * frv-asm.c: Regenerate.
 462         * iq2000-asm.c: Regenerate.
 463         * m32r-asm.c: Regenerate.
 464         * openrisc-asm.c: Regenerate.
 465
 466 2005-04-01  Jan Beulich  <jbeulich@novell.com>
 467
 468         * i386-dis.c (PNI_Fixup): Neither mwait nor monitor have any
 469         visible operands in Intel mode. The first operand of monitor is
 470         %rax in 64-bit mode.
 471
 472 2005-04-01  Jan Beulich  <jbeulich@novell.com>
 473
 474         * i386-dis.c (INVLPG_Fixup): Decode rdtscp; change code to allow for
 475         easier future additions.
 476
 477 2005-03-31  Jerome Guitton  <guitton@gnat.com>
 478
 479         * configure.in: Check for basename.
 480         * configure: Regenerate.
 481         * config.in: Ditto.
 482
 483 2005-03-29  H.J. Lu  <hongjiu.lu@intel.com>
 484
 485         * i386-dis.c (SEG_Fixup): New.
 486         (Sv): New.
 487         (dis386): Use "Sv" for 0x8c and 0x8e.
 488
 489 2005-03-21  Jan-Benedict Glaw  <jbglaw@lug-owl.de>
 490             Nick Clifton  <nickc@redhat.com>
 491
 492         * vax-dis.c: (entry_addr): New varible:  An array of user supplied
 493         function entry mask addresses.
 494         (entry_addr_occupied_slots): New variable: The number of occupied
 495         elements in entry_addr.
 496         (entry_addr_total_slots): New variable: The total number of
 497         elements in entry_addr.
 498         (parse_disassembler_options): New function.  Fills in the entry_addr
 499         array.
 500         (free_entry_array): New function.  Release the memory used by the
 501         entry addr array.  Suppressed because there is no way to call it.
 502         (is_function_entry): Check if a given address is a function's
 503         start address by looking at supplied entry mask addresses and
 504         symbol information, if available.
 505         (print_insn_vax): Use parse_disassembler_options and is_function_entry.
 506
 507 2005-03-23  H.J. Lu  <hongjiu.lu@intel.com>
 508
 509         * cris-dis.c (print_with_operands): Use ~31L for long instead
 510         of ~31.
 511
 512 2005-03-20  H.J. Lu  <hongjiu.lu@intel.com>
 513
 514         * mmix-opc.c (O): Revert the last change.
 515         (Z): Likewise.
 516
 517 2005-03-19  H.J. Lu  <hongjiu.lu@intel.com>
 518
 519         * mmix-opc.c (O): Use 24UL instead of 24 for unsigned long.
 520         (Z): Likewise.
 521
 522 2005-03-19  Hans-Peter Nilsson  <hp@bitrange.com>
 523
 524         * mmix-opc.c (O, Z): Force expression as unsigned long.
 525
 526 2005-03-18  Nick Clifton  <nickc@redhat.com>
 527
 528         * ip2k-asm.c: Regenerate.
 529         * op/opcodes.pot: Regenerate.
 530
 531 2005-03-16  Nick Clifton  <nickc@redhat.com>
 532             Ben Elliston  <bje@au.ibm.com>
 533
 534         * configure.in (werror): New switch: Add -Werror to the
 535         compiler command line.  Enabled by default.  Disable via
 536         --disable-werror.
 537         * configure: Regenerate.
 538
 539 2005-03-16  Alan Modra  <amodra@bigpond.net.au>
 540
 541         * ppc-dis.c (powerpc_dialect): Don't set PPC_OPCODE_ALTIVEC when
 542         BOOKE.
 543
 544 2005-03-15  Alan Modra  <amodra@bigpond.net.au>
 545
 546         * po/es.po: Commit new Spanish translation.
 547
 548         * po/fr.po: Commit new French translation.
 549
 550 2005-03-14  Jan-Benedict Glaw  <jbglaw@lug-owl.de>
 551
 552         * vax-dis.c: Fix spelling error
 553         (print_insn_vax): Use ".word 0x0012 # Entry mask: r1 r2 >" instead
 554         of just "Entry mask: < r1 ... >"
 555
 556 2005-03-12  Zack Weinberg  <zack@codesourcery.com>
 557
 558         * arm-dis.c (arm_opcodes): Document %E and %V.
 559         Add entries for v6T2 ARM instructions:
 560         bfc bfi mls strht ldrht ldrsht ldrsbt movw movt rbit ubfx sbfx.
 561         (print_insn_arm): Add support for %E and %V.
 562         (thumb_opcodes): Add ARMv6K instructions nop, sev, wfe, wfi, yield.
 563
 564 2005-03-10  Jeff Baker  <jbaker@qnx.com>
 565             Alan Modra  <amodra@bigpond.net.au>
 566
 567         * ppc-opc.c (insert_sprg, extract_sprg): New Functions.
 568         (powerpc_operands <SPRG>): Call the above.  Bit field is 5 bits.
 569         (SPRG_MASK): Delete.
 570         (XSPRG_MASK): Mask off extra bits now part of sprg field.
 571         (powerpc_opcodes): Asjust mfsprg and mtsprg to suit new mask.  Move
 572         mfsprg4..7 after msprg and consolidate.
 573
 574 2005-03-09  Jan-Benedict Glaw  <jbglaw@lug-owl.de>
 575
 576         * vax-dis.c (entry_mask_bit): New array.
 577         (print_insn_vax): Decode function entry mask.
 578
 579 2005-03-07  Aldy Hernandez  <aldyh@redhat.com>
 580
 581         * ppc-opc.c (powerpc_opcodes): Fix encoding of efscfd.
 582
 583 2005-03-05  Alan Modra  <amodra@bigpond.net.au>
 584
 585         * po/opcodes.pot: Regenerate.
 586
 587 2005-03-03  Ramana Radhakrishnan  <ramana.radhakrishnan@codito.com>
 588
 589         * arc-dis.c (a4_decoding_class): New enum.
 590         (dsmOneArcInst): Use the enum values for the decoding class.
 591         Remove redundant case in the switch for decodingClass value 11.
 592
 593 2005-03-02  Jan Beulich  <jbeulich@novell.com>
 594
 595         * i386-dis.c (print_insn): Suppress lock prefix printing for cr8...15
 596         accesses.
 597         (OP_C): Consider lock prefix in non-64-bit modes.
 598
 599 2005-02-24  Alan Modra  <amodra@bigpond.net.au>
 600
 601         * cris-dis.c (format_hex): Remove ineffective warning fix.
 602         * crx-dis.c (make_instruction): Warning fix.
 603         * frv-asm.c: Regenerate.
 604
 605 2005-02-23  Nick Clifton  <nickc@redhat.com>
 606
 607         * cgen-dis.in: Use bfd_byte for buffers that are passed to
 608         read_memory.
 609
 610         * ia64-opc.c (locate_opcode_ent): Initialise opval array.
 611
 612         * crx-dis.c (make_instruction): Move argument structure into inner
 613         scope and ensure that all of its fields are initialised before
 614         they are used.
 615
 616         * fr30-asm.c: Regenerate.
 617         * fr30-dis.c: Regenerate.
 618         * frv-asm.c: Regenerate.
 619         * frv-dis.c: Regenerate.
 620         * ip2k-asm.c: Regenerate.
 621         * ip2k-dis.c: Regenerate.
 622         * iq2000-asm.c: Regenerate.
 623         * iq2000-dis.c: Regenerate.
 624         * m32r-asm.c: Regenerate.
 625         * m32r-dis.c: Regenerate.
 626         * openrisc-asm.c: Regenerate.
 627         * openrisc-dis.c: Regenerate.
 628         * xstormy16-asm.c: Regenerate.
 629         * xstormy16-dis.c: Regenerate.
 630
 631 2005-02-22  Alan Modra  <amodra@bigpond.net.au>
 632
 633         * arc-ext.c: Warning fixes.
 634         * arc-ext.h: Likewise.
 635         * cgen-opc.c: Likewise.
 636         * ia64-gen.c: Likewise.
 637         * maxq-dis.c: Likewise.
 638         * ns32k-dis.c: Likewise.
 639         * w65-dis.c: Likewise.
 640         * ia64-asmtab.c: Regenerate.
 641
 642 2005-02-22  Alan Modra  <amodra@bigpond.net.au>
 643
 644         * fr30-desc.c: Regenerate.
 645         * fr30-desc.h: Regenerate.
 646         * fr30-opc.c: Regenerate.
 647         * fr30-opc.h: Regenerate.
 648         * frv-desc.c: Regenerate.
 649         * frv-desc.h: Regenerate.
 650         * frv-opc.c: Regenerate.
 651         * frv-opc.h: Regenerate.
 652         * ip2k-desc.c: Regenerate.
 653         * ip2k-desc.h: Regenerate.
 654         * ip2k-opc.c: Regenerate.
 655         * ip2k-opc.h: Regenerate.
 656         * iq2000-desc.c: Regenerate.
 657         * iq2000-desc.h: Regenerate.
 658         * iq2000-opc.c: Regenerate.
 659         * iq2000-opc.h: Regenerate.
 660         * m32r-desc.c: Regenerate.
 661         * m32r-desc.h: Regenerate.
 662         * m32r-opc.c: Regenerate.
 663         * m32r-opc.h: Regenerate.
 664         * m32r-opinst.c: Regenerate.
 665         * openrisc-desc.c: Regenerate.
 666         * openrisc-desc.h: Regenerate.
 667         * openrisc-opc.c: Regenerate.
 668         * openrisc-opc.h: Regenerate.
 669         * xstormy16-desc.c: Regenerate.
 670         * xstormy16-desc.h: Regenerate.
 671         * xstormy16-opc.c: Regenerate.
 672         * xstormy16-opc.h: Regenerate.
 673
 674 2005-02-21  Alan Modra  <amodra@bigpond.net.au>
 675
 676         * Makefile.am: Run "make dep-am"
 677         * Makefile.in: Regenerate.
 678
 679 2005-02-15  Nick Clifton  <nickc@redhat.com>
 680
 681         * cgen-dis.in (print_address): Add an ATTRIBUTE_UNUSED to prevent
 682         compile time warnings.
 683         (print_keyword): Likewise.
 684         (default_print_insn): Likewise.
 685
 686         * fr30-desc.c: Regenerated.
 687         * fr30-desc.h: Regenerated.
 688         * fr30-dis.c: Regenerated.
 689         * fr30-opc.c: Regenerated.
 690         * fr30-opc.h: Regenerated.
 691         * frv-desc.c: Regenerated.
 692         * frv-dis.c: Regenerated.
 693         * frv-opc.c: Regenerated.
 694         * ip2k-asm.c: Regenerated.
 695         * ip2k-desc.c: Regenerated.
 696         * ip2k-desc.h: Regenerated.
 697         * ip2k-dis.c: Regenerated.
 698         * ip2k-opc.c: Regenerated.
 699         * ip2k-opc.h: Regenerated.
 700         * iq2000-desc.c: Regenerated.
 701         * iq2000-dis.c: Regenerated.
 702         * iq2000-opc.c: Regenerated.
 703         * m32r-asm.c: Regenerated.
 704         * m32r-desc.c: Regenerated.
 705         * m32r-desc.h: Regenerated.
 706         * m32r-dis.c: Regenerated.
 707         * m32r-opc.c: Regenerated.
 708         * m32r-opc.h: Regenerated.
 709         * m32r-opinst.c: Regenerated.
 710         * openrisc-desc.c: Regenerated.
 711         * openrisc-desc.h: Regenerated.
 712         * openrisc-dis.c: Regenerated.
 713         * openrisc-opc.c: Regenerated.
 714         * openrisc-opc.h: Regenerated.
 715         * xstormy16-desc.c: Regenerated.
 716         * xstormy16-desc.h: Regenerated.
 717         * xstormy16-dis.c: Regenerated.
 718         * xstormy16-opc.c: Regenerated.
 719         * xstormy16-opc.h: Regenerated.
 720
 721 2005-02-14  H.J. Lu  <hongjiu.lu@intel.com>
 722
 723         * dis-buf.c (perror_memory): Use sprintf_vma to print out
 724         address.
 725
 726 2005-02-11  Nick Clifton  <nickc@redhat.com>
 727
 728         * iq2000-asm.c: Regenerate.
 729
 730         * frv-dis.c: Regenerate.
 731
 732 2005-02-07  Jim Blandy  <jimb@redhat.com>
 733
 734         * Makefile.am (CGEN): Load guile.scm before calling the main
 735         application script.
 736         * Makefile.in: Regenerated.
 737         * cgen.sh: Be prepared for the 'cgen' argument to contain spaces.
 738         Simply pass the cgen-opc.scm path to ${cgen} as its first
 739         argument; ${cgen} itself now contains the '-s', or whatever is
 740         appropriate for the Scheme being used.
 741
 742 2005-01-31  Andrew Cagney  <cagney@gnu.org>
 743
 744         * configure: Regenerate to track ../gettext.m4.
 745
 746 2005-01-31  Jan Beulich  <jbeulich@novell.com>
 747
 748         * ia64-gen.c (NELEMS): Define.
 749         (shrink): Generate alias with missing second predicate register when
 750         opcode has two outputs and these are both predicates.
 751         * ia64-opc-i.c (FULL17): Define.
 752         (ia64_opcodes_i): Add mov-to-pr alias without second input. Use FULL17
 753         here to generate output template.
 754         (TBITCM, TNATCM): Undefine after use.
 755         * ia64-opc-m.c (ia64_opcodes_i): Add alloc alias without ar.pfs as
 756         first input. Add ld16 aliases without ar.csd as second output. Add
 757         st16 aliases without ar.csd as second input. Add cmpxchg aliases
 758         without ar.ccv as third input. Add cmp8xchg16 aliases without ar.csd/
 759         ar.ccv as third/fourth inputs. Consolidate through...
 760         (CMPXCHG_acq, CMPXCHG_rel, CMPXCHG_1, CMPXCHG_2, CMPXCHG_4, CMPXCHG_8,
 761         CMPXCHGn, CMP8XCHG16, CMPXCHG_ALL): Define.
 762         * ia64-asmtab.c: Regenerate.
 763
 764 2005-01-27  Andrew Cagney  <cagney@gnu.org>
 765
 766         * configure: Regenerate to track ../gettext.m4 change.
 767
 768 2005-01-25  Alexandre Oliva  <aoliva@redhat.com>
 769
 770         2004-11-10  Alexandre Oliva  <aoliva@redhat.com>
 771         * frv-asm.c: Rebuilt.
 772         * frv-desc.c: Rebuilt.
 773         * frv-desc.h: Rebuilt.
 774         * frv-dis.c: Rebuilt.
 775         * frv-ibld.c: Rebuilt.
 776         * frv-opc.c: Rebuilt.
 777         * frv-opc.h: Rebuilt.
 778
 779 2005-01-24  Andrew Cagney  <cagney@gnu.org>
 780
 781         * configure: Regenerate, ../gettext.m4 was updated.
 782
 783 2005-01-21  Fred Fish  <fnf@specifixinc.com>
 784
 785         * mips-opc.c:  Change INSN_ALIAS to INSN2_ALIAS.
 786         Change INSN_WRITE_MDMX_ACC to INSN2_WRITE_MDMX_ACC.
 787         Change INSN_READ_MDMX_ACC to INSN2_READ_MDMX_ACC.
 788         * mips-dis.c: Ditto.
 789
 790 2005-01-20  Alan Modra  <amodra@bigpond.net.au>
 791
 792         * ppc-opc.c (powerpc_opcodes): Add optional 'l' arg to tlbiel.
 793
 794 2005-01-19  Fred Fish  <fnf@specifixinc.com>
 795
 796         * mips-dis.c (no_aliases): New disassembly option flag.
 797         (set_default_mips_dis_options): Init no_aliases to zero.
 798         (parse_mips_dis_option): Handle no-aliases option.
 799         (print_insn_mips): Ignore table entries that are aliases
 800         if no_aliases is set.
 801         (print_insn_mips16): Ditto.
 802         * mips-opc.c (mips_builtin_opcodes): Add initializer column for
 803         new pinfo2 member and add INSN_ALIAS initializers as needed.  Also
 804         move WR_MACC and RD_MACC initializers from pinfo to pinfo2.
 805         * mips16-opc.c (mips16_opcodes): Ditto.
 806
 807 2005-01-17  Andrew Stubbs  <andrew.stubbs@st.com>
 808
 809         * sh-opc.h (arch_sh2a_or_sh3e,arch_sh2a_or_sh4): Correct definition.
 810         (inheritance diagram): Add missing edge.
 811         (arch_sh1_up): Rename arch_sh_up to match external name to make life
 812         easier for the testsuite.
 813         (arch_sh4_nofp_up): Likewise, rename arch_sh4_nofpu_up.
 814         (arch_sh4a_nofp_up): Likewise, rename arch_sh4a_nofpu_up.
 815         (arch_sh2a_nofpu_or_sh4_nommu_nofpu_up): Add missing
 816         arch_sh2a_or_sh4_up child.
 817         (sh_table): Do renaming as above.
 818         Correct comment for ldc.l for gas testsuite to read.
 819         Remove rogue mul.l from sh1 (duplicate of the one for sh2).
 820         Correct comments for movy.w and movy.l for gas testsuite to read.
 821         Correct comments for fmov.d and fmov.s for gas testsuite to read.
 822
 823 2005-01-12  H.J. Lu  <hongjiu.lu@intel.com>
 824
 825         * i386-dis.c (OP_E): Don't ignore scale in SIB for 64 bit mode.
 826
 827 2005-01-12  H.J. Lu  <hongjiu.lu@intel.com>
 828
 829         * i386-dis.c (OP_E): Ignore scale when index == 0x4 in SIB.
 830
 831 2005-01-10  Andreas Schwab  <schwab@suse.de>
 832
 833         * disassemble.c (disassemble_init_for_target) <case
 834         bfd_arch_ia64>: Set skip_zeroes to 16.
 835         <case bfd_arch_tic4x>: Set skip_zeroes to 32.
 836
 837 2004-12-23  Tomer Levi  <Tomer.Levi@nsc.com>
 838
 839         * crx-opc.c: Mark 'bcop' instruction as RELAXABLE.
 840
 841 2004-12-14  Svein E. Seldal  <Svein.Seldal@solidas.com>
 842
 843         * avr-dis.c: Prettyprint. Added printing of symbol names in all
 844         memory references. Convert avr_operand() to C90 formatting.
 845
 846 2004-12-05  Tomer Levi  <Tomer.Levi@nsc.com>
 847
 848         * crx-dis.c (print_arg): Use 'info->print_address_func' for address printing.
 849
 850 2004-11-29  Tomer Levi  <Tomer.Levi@nsc.com>
 851
 852         * crx-opc.c (crx_optab): Mark all rbase_disps* operands as signed.
 853         (no_op_insn): Initialize array with instructions that have no
 854         operands.
 855         * crx-dis.c (make_instruction): Get rid of COP_BRANCH_INS operand swapping.
 856
 857 2004-11-29  Richard Earnshaw  <rearnsha@arm.com>
 858
 859         * arm-dis.c: Correct top-level comment.
 860
 861 2004-11-27  Richard Earnshaw  <rearnsha@arm.com>
 862
 863         * arm-opc.h (arm_opcode, thumb_opcode): Add extra field for the
 864         architecuture defining the insn.
 865         (arm_opcodes, thumb_opcodes): Delete.  Move to ...
 866         * arm-dis.c (arm_opcodes, thumb_opcodes): Here.  Add architecutre
 867         field.
 868         Also include opcode/arm.h.
 869         * Makefile.am (arm-dis.lo): Update dependency list.
 870         * Makefile.in: Regenerate.
 871
 872 2004-11-22  Ravi Ramaseshan  <ravi.ramaseshan@codito.com>
 873
 874         * opcode/arc-opc.c (insert_base): Modify ls_operand[LS_OFFSET] to
 875         reflect the change to the short immediate syntax.
 876
 877 2004-11-19  Alan Modra  <amodra@bigpond.net.au>
 878
 879         * or32-opc.c (debug): Warning fix.
 880         * po/POTFILES.in: Regenerate.
 881
 882         * maxq-dis.c: Formatting.
 883         (print_insn): Warning fix.
 884
 885 2004-11-17  Daniel Jacobowitz  <dan@codesourcery.com>
 886
 887         * arm-dis.c (WORD_ADDRESS): Define.
 888         (print_insn): Use it.  Correct big-endian end-of-section handling.
 889
 890 2004-11-08  Inderpreet Singh   <inderpreetb@nioda.hcltech.com>
 891             Vineet Sharma      <vineets@noida.hcltech.com>
 892
 893         * maxq-dis.c: New file.
 894         * disassemble.c (ARCH_maxq): Define.
 895         (disassembler): Add 'print_insn_maxq_little' for handling maxq
 896         instructions..
 897         * configure.in: Add case for bfd_maxq_arch.
 898         * configure: Regenerate.
 899         * Makefile.am: Add support for maxq-dis.c
 900         * Makefile.in: Regenerate.
 901         * aclocal.m4: Regenerate.
 902
 903 2004-11-05  Tomer Levi  <Tomer.Levi@nsc.com>
 904
 905         * crx-opc.c (crx_optab): Rename 'arg_icr' to 'arg_idxr' for Index register
 906         mode.
 907         * crx-dis.c: Likewise.
 908
 909 2004-11-04  Hans-Peter Nilsson  <hp@axis.com>
 910
 911         Generally, handle CRISv32.
 912         * cris-dis.c (TRACE_CASE): Define as (disdata->trace_case).
 913         (struct cris_disasm_data): New type.
 914         (format_reg, format_hex, cris_constraint, print_flags)
 915         (get_opcode_entry): Add struct cris_disasm_data * parameter.  All
 916         callers changed.
 917         (format_sup_reg, print_insn_crisv32_with_register_prefix)
 918         (print_insn_crisv32_without_register_prefix)
 919         (print_insn_crisv10_v32_with_register_prefix)
 920         (print_insn_crisv10_v32_without_register_prefix)
 921         (cris_parse_disassembler_options): New functions.
 922         (bytes_to_skip, cris_spec_reg): Add enum cris_disass_family
 923         parameter.  All callers changed.
 924         (get_opcode_entry): Call malloc, not xmalloc.  Return NULL on
 925         failure.
 926         (cris_constraint) <case 'Y', 'U'>: New cases.
 927         (bytes_to_skip): Handle 'Y' and 'N' as 's'.  Skip size is 4 bytes
 928         for constraint 'n'.
 929         (print_with_operands) <case 'Y'>: New case.
 930         (print_with_operands) <case 'T', 'A', '[', ']', 'd', 'n', 'u'>
 931         <case 'N', 'Y', 'Q'>: New cases.
 932         (print_insn_cris_generic): Emit "bcc ." for zero and CRISv32.
 933         (print_insn_cris_with_register_prefix)
 934         (print_insn_cris_without_register_prefix): Call
 935         cris_parse_disassembler_options.
 936         * cris-opc.c (cris_spec_regs): Mention that this table isn't used
 937         for CRISv32 and the size of immediate operands.  New v32-only
 938         entries for bz, pid, srs, wz, exs, eda, dz, ebp, erp, nrp, ccs and
 939         spc.  Add v32-only 4-byte entries for p2, p3, p5 and p6.  Change
 940         ccr, ibr, irp to be v0..v10.  Change bar, dccr to be v8..v10.
 941         Change brp to be v3..v10.
 942         (cris_support_regs): New vector.
 943         (cris_opcodes): Update head comment.  New format characters '[',
 944         ']', space, 'A', 'd', 'N', 'n', 'Q', 'T', 'u', 'U', 'Y'.
 945         Add new opcodes for v32 and adjust existing opcodes to accommodate
 946         differences to earlier variants.
 947         (cris_cond15s): New vector.
 948
 949 2004-11-04 Jan Beulich <jbeulich@novell.com>
 950
 951         * i386-dis.c (Eq, Edqw, indirEp, Gdq, I1): Define.
 952         (indirEb): Remove.
 953         (Mp): Use f_mode rather than none at all.
 954         (t_mode, dq_mode, dqw_mode, f_mode, const_1_mode): Define. t_mode
 955         replaces what previously was x_mode; x_mode now means 128-bit SSE
 956         operands.
 957         (dis386): Make far jumps and calls have an 'l' prefix only in AT&T
 958         mode. movmskpX's, pextrw's, and pmovmskb's first operands are Gdq.
 959         pinsrw's second operand is Edqw.
 960         (grps): 1-bit shifts' and rotates' second operands are I1. cmpxchg8b's
 961         operand is Eq. movntq's and movntdq's first operands are EM. s[gi]dt,
 962         fldenv, frstor, fsave, fstenv all should also have suffixes in Intel
 963         mode when an operand size override is present or always suffixing.
 964         More instructions will need to be added to this group.
 965         (putop): Handle new macro chars 'C' (short/long suffix selector),
 966         'I' (Intel mode override for following macro char), and 'J' (for
 967         adding the 'l' prefix to far branches in AT&T mode). When an
 968         alternative was specified in the template, honor macro character when
 969         specified for Intel mode.
 970         (OP_E): Handle new *_mode values. Correct pointer specifications for
 971         memory operands. Consolidate output of index register.
 972         (OP_G): Handle new *_mode values.
 973         (OP_I): Handle const_1_mode.
 974         (OP_ESreg, OP_DSreg): Generate pointer specifications. Indicate
 975         respective opcode prefix bits have been consumed.
 976         (OP_EM, OP_EX): Provide some default handling for generating pointer
 977         specifications.
 978
 979 2004-10-28  Tomer Levi  <Tomer.Levi@nsc.com>
 980
 981         * crx-opc.c (REV_COP_INST): New macro, reverse operand order of
 982         COP_INST macro.
 983
 984 2004-10-27  Tomer Levi  <Tomer.Levi@nsc.com>
 985
 986         * crx-dis.c (enum REG_ARG_TYPE): New, replacing COP_ARG_TYPE.
 987         (getregliststring): Support HI/LO and user registers.
 988         * crx-opc.c (crx_instruction): Update data structure according to the
 989         rearrangement done in CRX opcode header file.
 990         (crx_regtab):  Likewise.
 991         (crx_optab):  Likewise.
 992         (crx_instruction): Reorder load/stor instructions, remove unsupported
 993         formats.
 994         support new Co-Processor instruction 'cpi'.
 995
 996 2004-10-27  Nick Clifton  <nickc@redhat.com>
 997
 998         * opcodes/iq2000-asm.c: Regenerate.
 999         * opcodes/iq2000-desc.c: Regenerate.
1000         * opcodes/iq2000-desc.h: Regenerate.
1001         * opcodes/iq2000-dis.c: Regenerate.
1002         * opcodes/iq2000-ibld.c: Regenerate.
1003         * opcodes/iq2000-opc.c: Regenerate.
1004         * opcodes/iq2000-opc.h: Regenerate.
1005
1006 2004-10-21  Tomer Levi  <Tomer.Levi@nsc.com>
1007
1008         * crx-opc.c (crx_instruction): Replace i3, i4, i5 with us3,
1009         us4, us5 (respectively).
1010         Remove unsupported 'popa' instruction.
1011         Reverse operands order in store co-processor instructions.
1012
1013 2004-10-15  Alan Modra  <amodra@bigpond.net.au>
1014
1015         * Makefile.am: Run "make dep-am"
1016         * Makefile.in: Regenerate.
1017
1018 2004-10-12  Bob Wilson  <bob.wilson@acm.org>
1019
1020         * xtensa-dis.c: Use ISO C90 formatting.
1021
1022 2004-10-09  Alan Modra  <amodra@bigpond.net.au>
1023
1024         * ppc-opc.c: Revert 2004-09-09 change.
1025
1026 2004-10-07  Bob Wilson  <bob.wilson@acm.org>
1027
1028         * xtensa-dis.c (state_names): Delete.
1029         (fetch_data): Use xtensa_isa_maxlength.
1030         (print_xtensa_operand): Replace operand parameter with opcode/operand
1031         pair.  Remove print_sr_name parameter.  Use new xtensa-isa.h functions.
1032         (print_insn_xtensa): Use new xtensa-isa.h functions.  Handle multislot
1033         instruction bundles.  Use xmalloc instead of malloc.
1034
1035 2004-10-07  David Gibson  <david@gibson.dropbear.id.au>
1036
1037         * ppc-opc.c: Replace literal "0"s with NULLs in pointer
1038         initializers.
1039
1040 2004-10-07  Tomer Levi  <Tomer.Levi@nsc.com>
1041
1042         * crx-opc.c (crx_instruction): Support Co-processor insns.
1043         * crx-dis.c (COP_ARG_TYPE): New enum for CO-Processor arguments.
1044         (getregliststring): Change function to use the above enum.
1045         (print_arg): Handle CO-Processor insns.
1046         (crx_cinvs): Add 'b' option to invalidate the branch-target
1047         cache.
1048
1049 2004-10-06  Aldy Hernandez  <aldyh@redhat.com>
1050
1051         * ppc-opc.c (powerpc_opcodes): Add efscfd, efdabs, efdnabs,
1052         efdneg, efdadd, efdsub, efdmul, efddiv, efdcmpgt, efdcmplt,
1053         efdcmpeq, efdtstgt, efdtstlt, efdtsteq, efdcfsi, efdcfsid,
1054         efdcfui, efdcfuid, efdcfsf, efdcfuf, efdctsi, efdctsidz, efdctsiz,
1055         efdctui, efdctuidz, efdctuiz, efdctsf, efdctuf, efdctuf, efdcfs.
1056
1057 2004-10-01  Bill Farmer  <Bill@the-farmers.freeserve.co.uk>
1058
1059         * pdp11-dis.c (print_insn_pdp11): Subtract the SOB's displacement
1060         rather than add it.
1061
1062 2004-09-30  Paul Brook  <paul@codesourcery.com>
1063
1064         * arm-dis.c (print_insn_arm): Handle 'e' for SMI instruction.
1065         * arm-opc.h: Document %e.  Add ARMv6ZK instructions.
1066
1067 2004-09-17  H.J. Lu  <hongjiu.lu@intel.com>
1068
1069         * Makefile.am (AUTOMAKE_OPTIONS): Require 1.9.
1070         (CONFIG_STATUS_DEPENDENCIES): New.
1071         (Makefile): Removed.
1072         (config.status): Likewise.
1073         * Makefile.in: Regenerated.
1074
1075 2004-09-17  Alan Modra  <amodra@bigpond.net.au>
1076
1077         * Makefile.am: Run "make dep-am".
1078         * Makefile.in: Regenerate.
1079         * aclocal.m4: Regenerate.
1080         * configure: Regenerate.
1081         * po/POTFILES.in: Regenerate.
1082         * po/opcodes.pot: Regenerate.
1083
1084 2004-09-11  Andreas Schwab  <schwab@suse.de>
1085
1086         * configure: Rebuild.
1087
1088 2004-09-09  Segher Boessenkool  <segher@kernel.crashing.org>
1089
1090         * ppc-opc.c (L): Make this field not optional.
1091
1092 2004-09-03  Tomer Levi  <Tomer.Levi@nsc.com>
1093
1094         * opc-crx.c: Rename 'popma' to 'popa', remove 'pushma'.
1095         Fix parameter to 'm[t|f]csr' insns.
1096
1097 2004-08-30  Nathanael Nerode  <neroden@gcc.gnu.org>
1098
1099         * configure.in: Autoupdate to autoconf 2.59.
1100         * aclocal.m4: Rebuild with aclocal 1.4p6.
1101         * configure: Rebuild with autoconf 2.59.
1102         * Makefile.in: Rebuild with automake 1.4p6 (picking up
1103         bfd changes for autoconf 2.59 on the way).
1104         * config.in: Rebuild with autoheader 2.59.
1105
1106 2004-08-27  Richard Sandiford  <rsandifo@redhat.com>
1107
1108         * frv-desc.[ch], frv-opc.[ch]: Regenerated.
1109
1110 2004-07-30  Michal Ludvig  <mludvig@suse.cz>
1111
1112         * i386-dis.c (GRPPADLCK): Renamed to GRPPADLCK1
1113         (GRPPADLCK2): New define.
1114         (twobyte_has_modrm): True for 0xA6.
1115         (grps): GRPPADLCK2 for opcode 0xA6.
1116
1117 2004-07-29  Alexandre Oliva  <aoliva@redhat.com>
1118
1119         Introduce SH2a support.
1120         * sh-opc.h (arch_sh2a_base): Renumber.
1121         (arch_sh2a_nofpu_base): Remove.
1122         (arch_sh_base_mask): Adjust.
1123         (arch_opann_mask): New.
1124         (arch_sh2a, arch_sh2a_nofpu): Adjust.
1125         (arch_sh2a_up, arch_sh2a_nofpu_up): Likewise.
1126         (sh_table): Adjust whitespace.
1127         2004-02-24  Corinna Vinschen  <vinschen@redhat.com>
1128         * sh-opc.h (arch_sh2a_nofpu_up): New.  Use instead of arch_sh2a_up in
1129         instruction list throughout.
1130         (arch_sh2a_up): Redefine to include fpu instruction set.  Use instead
1131         of arch_sh2a in instruction list throughout.
1132         (arch_sh2e_up): Accomodate above changes.
1133         (arch_sh2_up): Ditto.
1134         2004-02-20  Corinna Vinschen  <vinschen@redhat.com>
1135         * sh-opc.h: Add arch_sh2a_nofpu to arch_sh2_up.
1136         2004-02-18  Corinna Vinschen  <vinschen@redhat.com>
1137         * sh-dis.c (print_insn_sh): Add bfd_mach_sh2a_nofpu handling.
1138         * sh-opc.h (arch_sh2a_nofpu): New.
1139         (arch_sh2a_up): New, defines sh2a and sh2a_nofpu.
1140         (sh_table): Change all arch_sh2a to arch_sh2a_up unless FPU
1141         instruction.
1142         2004-01-20  DJ Delorie  <dj@redhat.com>
1143         * sh-dis.c (print_insn_sh): SH2A does not have 'X' fp regs.
1144         2003-12-29  DJ Delorie  <dj@redhat.com>
1145         * sh-opc.c (sh_nibble_type, sh_arg_type, arch_2a, arch_2e_up,
1146         sh_opcode_info, sh_table): Add sh2a support.
1147         (arch_op32): New, to tag 32-bit opcodes.
1148         * sh-dis.c (print_insn_sh): Support sh2a opcodes.
1149         2003-12-02  Michael Snyder  <msnyder@redhat.com>
1150         * sh-opc.h (arch_sh2a): Add.
1151         * sh-dis.c (arch_sh2a): Handle.
1152         * sh-opc.h (arch_sh2_up): Fix up to include arch_sh2a.
1153
1154 2004-07-27  Tomer Levi  <Tomer.Levi@nsc.com>
1155
1156         * crx-opc.c: Add popx,pushx insns. Indent code, fix comments.
1157
1158 2004-07-22  Nick Clifton  <nickc@redhat.com>
1159
1160         PR/280
1161         * h8300-dis.c (bfd_h8_disassemble): Do not dump raw bytes for the
1162         insns - this is done by objdump itself.
1163         * h8500-dis.c (print_insn_h8500): Likewise.
1164
1165 2004-07-21  Jan Beulich <jbeulich@novell.com>
1166
1167         * i386-dis.c (OP_E): Show rip-relative addressing in 64-bit mode
1168         regardless of address size prefix in effect.
1169         (ptr_reg): Size or address registers does not depend on rex64, but
1170         on the presence of an address size override.
1171         (OP_MMX): Use rex.x only for xmm registers.
1172         (OP_EM): Use rex.z only for xmm registers.
1173
1174 2004-07-20  Maciej W. Rozycki  <macro@linux-mips.org>
1175
1176         * mips-opc.c (mips_builtin_opcodes): Move coprocessor 2
1177         move/branch operations to the bottom so that VR5400 multimedia
1178         instructions take precedence in disassembly.
1179
1180 2004-07-20  Maciej W. Rozycki  <macro@linux-mips.org>
1181
1182         * mips-opc.c (mips_builtin_opcodes): Remove the MIPS32
1183         ISA-specific "break" encoding.
1184
1185 2004-07-13  Elvis Chiang  <elvisfb@gmail.com>
1186
1187         * arm-opc.h: Fix typo in comment.
1188
1189 2004-07-11  Andreas Schwab  <schwab@suse.de>
1190
1191         * m68k-dis.c (m68k_valid_ea): Fix typos in last change.
1192
1193 2004-07-09  Andreas Schwab  <schwab@suse.de>
1194
1195         * m68k-dis.c (m68k_valid_ea): Check validity of all codes.
1196
1197 2004-07-07  Tomer Levi  <Tomer.Levi@nsc.com>
1198
1199         * Makefile.am (CFILES): Add crx-dis.c, crx-opc.c.
1200         (ALL_MACHINES): Add crx-dis.lo, crx-opc.lo.
1201         (crx-dis.lo): New target.
1202         (crx-opc.lo): Likewise.
1203         * Makefile.in: Regenerate.
1204         * configure.in: Handle bfd_crx_arch.
1205         * configure: Regenerate.
1206         * crx-dis.c: New file.
1207         * crx-opc.c: New file.
1208         * disassemble.c (ARCH_crx): Define.
1209         (disassembler): Handle ARCH_crx.
1210
1211 2004-06-29  James E Wilson  <wilson@specifixinc.com>
1212
1213         * ia64-opc-a.c (ia64_opcodes_a): Delete mov immediate pseudo for adds.
1214         * ia64-asmtab.c: Regnerate.
1215
1216 2004-06-28  Alan Modra  <amodra@bigpond.net.au>
1217
1218         * ppc-opc.c (insert_fxm): Handle mfocrf and mtocrf.
1219         (extract_fxm): Don't test dialect.
1220         (XFXFXM_MASK): Include the power4 bit.
1221         (XFXM): Add p4 param.
1222         (powerpc_opcodes): Add mfocrf and mtocrf.  Adjust mtcr.
1223
1224 2004-06-27  Alexandre Oliva  <aoliva@redhat.com>
1225
1226         2003-07-21  Richard Sandiford  <rsandifo@redhat.com>
1227         * disassemble.c (disassembler): Handle bfd_mach_h8300sxn.
1228
1229 2004-06-26  Alan Modra  <amodra@bigpond.net.au>
1230
1231         * ppc-opc.c (BH, XLBH_MASK): Define.
1232         (powerpc_opcodes): Allow BH field on bclr, bclrl, bcctr, bcctrl.
1233
1234 2004-06-24  Alan Modra  <amodra@bigpond.net.au>
1235
1236         * i386-dis.c (x_mode): Comment.
1237         (two_source_ops): File scope.
1238         (float_mem): Correct fisttpll and fistpll.
1239         (float_mem_mode): New table.
1240         (dofloat): Use it.
1241         (OP_E): Correct intel mode PTR output.
1242         (ptr_reg): Use open_char and close_char.
1243         (PNI_Fixup): Handle possible suffix on sidt.  Use op1out etc. for
1244         operands.  Set two_source_ops.
1245
1246 2004-06-15  Alan Modra  <amodra@bigpond.net.au>
1247
1248         * arc-ext.c (build_ARC_extmap): Use bfd_get_section_size
1249         instead of _raw_size.
1250
1251 2004-06-08  Jakub Jelinek  <jakub@redhat.com>
1252
1253         * ia64-gen.c (in_iclass): Handle more postinc st
1254         and ld variants.
1255         * ia64-asmtab.c: Rebuilt.
1256
1257 2004-06-01  Martin Schwidefsky  <schwidefsky@de.ibm.com>
1258
1259         * s390-opc.txt: Correct architecture mask for some opcodes.
1260         lrv, lrvh, strv, ml, dl, alc, slb rll and mvclu are available
1261         in the esa mode as well.
1262
1263 2004-05-28  Andrew Stubbs <andrew.stubbs@superh.com>
1264
1265         * sh-dis.c (target_arch): Make unsigned.
1266         (print_insn_sh): Replace (most of) switch with a call to
1267         sh_get_arch_from_bfd_mach(). Also use new architecture flags system.
1268         * sh-opc.h: Redefine architecture flags values.
1269         Add sh3-nommu architecture.
1270         Reorganise <arch>_up macros so they make more visual sense.
1271         (SH_MERGE_ARCH_SET): Define new macro.
1272         (SH_VALID_BASE_ARCH_SET): Likewise.
1273         (SH_VALID_MMU_ARCH_SET): Likewise.
1274         (SH_VALID_CO_ARCH_SET): Likewise.
1275         (SH_VALID_ARCH_SET): Likewise.
1276         (SH_MERGE_ARCH_SET_VALID): Likewise.
1277         (SH_ARCH_SET_HAS_FPU): Likewise.
1278         (SH_ARCH_SET_HAS_DSP): Likewise.
1279         (SH_ARCH_UNKNOWN_ARCH): Likewise.
1280         (sh_get_arch_from_bfd_mach): Add prototype.
1281         (sh_get_arch_up_from_bfd_mach): Likewise.
1282         (sh_get_bfd_mach_from_arch_set): Likewise.
1283         (sh_merge_bfd_arc): Likewise.
1284
1285 2004-05-24  Peter Barada  <peter@the-baradas.com>
1286
1287         * m68k-dis.c(print_insn_m68k): Strip body of diassembly out
1288         into new match_insn_m68k function.  Loop over canidate
1289         matches and select first that completely matches.
1290         * m68k-dis.c(print_insn_arg): Fix 'g' case to only extract 1 bit.
1291         * m68k-dis.c(print_insn_arg): Call new function m68k_valid_ea
1292         to verify addressing for MAC/EMAC.
1293         * m68k-dis.c(print_insn_arg): Use reg_half_names for MAC/EMAC
1294         reigster halves since 'fpu' and 'spl' look misleading.
1295         * m68k-dis.c(fetch_arg): Fix 'G', 'H', 'I', 'f', 'M', 'N' cases.
1296         * m68k-opc.c: Rearragne mac/emac cases to use longest for
1297         first, tighten up match masks.
1298         * m68k-opc.c: Add 'size' field to struct m68k_opcode.  Produce
1299         'size' from special case code in print_insn_m68k to
1300         determine decode size of insns.
1301
1302 2004-05-19  Alan Modra  <amodra@bigpond.net.au>
1303
1304         * ppc-opc.c (insert_fxm): Enable two operand mfcr when -many as
1305         well as when -mpower4.
1306
1307 2004-05-13  Nick Clifton  <nickc@redhat.com>
1308
1309         * po/fr.po: Updated French translation.
1310
1311 2004-05-05  Peter Barada  <peter@the-baradas.com>
1312
1313         * m68k-dis.c(print_insn_m68k): Add new chips, use core
1314         variants in arch_mask.  Only set m68881/68851 for 68k chips.
1315         * m68k-op.c: Switch from ColdFire chips to core variants.
1316
1317 2004-05-05  Alan Modra  <amodra@bigpond.net.au>
1318
1319         PR 147.
1320         * ppc-opc.c (PPCVEC): Remove PPC_OPCODE_PPC.
1321
1322 2004-04-29  Ben Elliston  <bje@au.ibm.com>
1323
1324         * ppc-opc.c (XCMPL): Renmame to XOPL. Update users.
1325         (powerpc_opcodes): Add "dbczl" instruction for PPC970.
1326
1327 2004-04-22  Kaz Kojima  <kkojima@rr.iij4u.or.jp>
1328
1329         * sh-dis.c (print_insn_sh): Print the value in constant pool
1330         as a symbol if it looks like a symbol.
1331
1332 2004-04-22  Peter Barada <peter@the-baradas.com>
1333
1334         * m68k-dis.c(print_insn_m68k): Set mfcmac/mcfemac on
1335         appropriate ColdFire architectures.
1336         (print_insn_m68k): Handle EMAC, MAC/EMAC scalefactor, and MAC/EMAC
1337         mask addressing.
1338         Add EMAC instructions, fix MAC instructions. Remove
1339         macmw/macml/msacmw/msacml instructions since mask addressing now
1340         supported.
1341
1342 2004-04-20  Jakub Jelinek  <jakub@redhat.com>
1343
1344         * sparc-opc.c (fmoviccx, fmovfccx, fmovccx): Define.
1345         (fmovicc, fmovfcc, fmovcc): Remove fpsize argument, change opcode to
1346         suffix.  Use fmov*x macros, create all 3 fpsize variants in one
1347         macro.  Adjust all users.
1348
1349 2004-04-15  Anil Paranjpe  <anilp1@kpitcummins.com>
1350
1351         * h8300-dis.c (bfd_h8_disassemble) : Treat "adds" & "subs"
1352         separately.
1353
1354 2004-03-30  Kazuhiro Inaoka  <inaoka.kazuhiro@renesas.com>
1355
1356         * m32r-asm.c: Regenerate.
1357
1358 2004-03-29  Stan Shebs  <shebs@apple.com>
1359
1360         * mpw-config.in, mpw-make.sed: Remove MPW support files, no longer
1361         used.
1362
1363 2004-03-19  Alan Modra  <amodra@bigpond.net.au>
1364
1365         * aclocal.m4: Regenerate.
1366         * config.in: Regenerate.
1367         * configure: Regenerate.
1368         * po/POTFILES.in: Regenerate.
1369         * po/opcodes.pot: Regenerate.
1370
1371 2004-03-16  Alan Modra  <amodra@bigpond.net.au>
1372
1373         * ppc-dis.c (print_insn_powerpc): Don't print tabs.  Handle
1374         PPC_OPERANDS_GPR_0.
1375         * ppc-opc.c (RA0): Define.
1376         (RAQ, RAL, RAM, RAS, RSQ, RTQ, RSO): Use PPC_OPERAND_GPR_0.
1377         (RAOPT): Rename from RAO.  Update all uses.
1378         (powerpc_opcodes): Use RA0 as appropriate.
1379
1380 2004-03-15  Aldy Hernandez  <aldyh@redhat.com>
1381
1382         * ppc-opc.c (powerpc_opcodes): Add BOOKE versions of mfsprg.
1383
1384 2004-03-15  Alan Modra  <amodra@bigpond.net.au>
1385
1386         * sparc-dis.c (print_insn_sparc): Update getword prototype.
1387
1388 2004-03-12  Michal Ludvig  <mludvig@suse.cz>
1389
1390         * i386-dis.c (GRPPLOCK): Delete.
1391         (grps): Delete GRPPLOCK entry.
1392
1393 2004-03-12  Alan Modra  <amodra@bigpond.net.au>
1394
1395         * i386-dis.c (OP_M, OP_0f0e, OP_0fae, NOP_Fixup): New functions.
1396         (M, Mp): Use OP_M.
1397         (None, PADLOCK_SPECIAL, PADLOCK_0): Delete.
1398         (GRPPADLCK): Define.
1399         (dis386): Use NOP_Fixup on "nop".
1400         (dis386_twobyte): Use GRPPADLCK on opcode 0xa7.
1401         (twobyte_has_modrm): Set for 0xa7.
1402         (padlock_table): Delete.  Move to..
1403         (grps): ..here, using OP_0f07.  Use OP_Ofae on lfence, mfence
1404         and clflush.
1405         (print_insn): Revert PADLOCK_SPECIAL code.
1406         (OP_E): Delete sfence, lfence, mfence checks.
1407
1408 2004-03-12  Jakub Jelinek  <jakub@redhat.com>
1409
1410         * i386-dis.c (grps): Use INVLPG_Fixup instead of OP_E for invlpg.
1411         (INVLPG_Fixup): New function.
1412         (PNI_Fixup): Remove ATTRIBUTE_UNUSED from sizeflag.
1413
1414 2004-03-12  Michal Ludvig  <mludvig@suse.cz>
1415
1416         * i386-dis.c (PADLOCK_SPECIAL, PADLOCK_0): New defines.
1417         (dis386_twobyte): Opcode 0xa7 is PADLOCK_0.
1418         (padlock_table): New struct with PadLock instructions.
1419         (print_insn): Handle PADLOCK_SPECIAL.
1420
1421 2004-03-12  Alan Modra  <amodra@bigpond.net.au>
1422
1423         * i386-dis.c (grps): Use clflush by default for 0x0fae/7.
1424         (OP_E): Twiddle clflush to sfence here.
1425
1426 2004-03-08  Nick Clifton  <nickc@redhat.com>
1427
1428         * po/de.po: Updated German translation.
1429
1430 2003-03-03  Andrew Stubbs  <andrew.stubbs@superh.com>
1431
1432         * sh-dis.c (print_insn_sh): Don't disassemble fp instructions in
1433         nofpu mode.  Add BFD type bfd_mach_sh4_nommu_nofpu.
1434         * sh-opc.h: Add sh4_nommu_nofpu architecture and adjust instructions
1435         accordingly.
1436
1437 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
1438
1439         * frv-asm.c: Regenerate.
1440         * frv-desc.c: Regenerate.
1441         * frv-desc.h: Regenerate.
1442         * frv-dis.c: Regenerate.
1443         * frv-ibld.c: Regenerate.
1444         * frv-opc.c: Regenerate.
1445         * frv-opc.h: Regenerate.
1446
1447 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
1448
1449         * frv-desc.c, frv-opc.c: Regenerate.
1450
1451 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
1452
1453         * frv-desc.c, frv-opc.c, frv-opc.h: Regenerate.
1454
1455 2004-02-26  Andrew Stubbs  <andrew.stubbs@superh.com>
1456
1457         * sh-opc.h: Move fsca and fsrra instructions from sh4a to sh4.
1458         Also correct mistake in the comment.
1459
1460 2004-02-26  Andrew Stubbs <andrew.stubbs@superh.com>
1461
1462         * sh-dis.c (print_insn_sh): Add REG_N_D nibble type to
1463         ensure that double registers have even numbers.
1464         Add REG_N_B01 for nn01 (binary 01) nibble to ensure
1465         that reserved instruction 0xfffd does not decode the same
1466         as 0xfdfd (ftrv).
1467         * sh-opc.h: Add REG_N_D nibble type and use it whereever
1468         REG_N refers to a double register.
1469         Add REG_N_B01 nibble type and use it instead of REG_NM
1470         in ftrv.
1471         Adjust the bit patterns in a few comments.
1472
1473 2004-02-25  Aldy Hernandez  <aldyh@redhat.com>
1474
1475         * ppc-opc.c (powerpc_opcodes): Change mask for dcbt and dcbtst.
1476
1477 2004-02-20  Aldy Hernandez  <aldyh@redhat.com>
1478
1479         * ppc-opc.c (powerpc_opcodes): Move mfmcsrr0 before mfdc_dat.
1480
1481 2004-02-20  Aldy Hernandez  <aldyh@redhat.com>
1482
1483         * ppc-opc.c (powerpc_opcodes): Add m*ivor35.
1484
1485 2004-02-20  Aldy Hernandez  <aldyh@redhat.com>
1486
1487         * ppc-opc.c (powerpc_opcodes): Add mfivor32, mfivor33, mfivor34,
1488         mtivor32, mtivor33, mtivor34.
1489
1490 2004-02-19  Aldy Hernandez  <aldyh@redhat.com>
1491
1492         * ppc-opc.c (powerpc_opcodes): Add mfmcar.
1493
1494 2004-02-10  Petko Manolov  <petkan@nucleusys.com>
1495
1496         * arm-opc.h Maverick accumulator register opcode fixes.
1497
1498 2004-02-13  Ben Elliston  <bje@wasabisystems.com>
1499
1500         * m32r-dis.c: Regenerate.
1501
1502 2004-01-27  Michael Snyder  <msnyder@redhat.com>
1503
1504         * sh-opc.h (sh_table): "fsrra", not "fssra".
1505
1506 2004-01-23  Andrew Over <andrew.over@cs.anu.edu.au>
1507
1508         * sparc-opc.c (fdtox, fstox, fqtox, fxtod, fxtos, fxtoq): Tighten
1509         contraints.
1510
1511 2004-01-19  Andrew Over  <andrew.over@cs.anu.edu.au>
1512
1513         * sparc-opc.c (sparc_opcodes) <f[dsq]tox, fxto[dsq]>: Fix args.
1514
1515 2004-01-19  Alan Modra  <amodra@bigpond.net.au>
1516
1517         * i386-dis.c (OP_E): Print scale factor on intel mode sib when not
1518         1.  Don't print scale factor on AT&T mode when index missing.
1519
1520 2004-01-16  Alexandre Oliva  <aoliva@redhat.com>
1521
1522         * m10300-opc.c (mov): 8- and 24-bit immediates are zero-extended
1523         when loaded into XR registers.
1524
1525 2004-01-14  Richard Sandiford  <rsandifo@redhat.com>
1526
1527         * frv-desc.h: Regenerate.
1528         * frv-desc.c: Regenerate.
1529         * frv-opc.c: Regenerate.
1530
1531 2004-01-13  Michael Snyder  <msnyder@redhat.com>
1532
1533         * sh-dis.c (print_insn_sh): Allocate 4 bytes for insn.
1534
1535 2004-01-09  Paul Brook  <paul@codesourcery.com>
1536
1537         * arm-opc.h (arm_opcodes): Move generic mcrr after known
1538         specific opcodes.
1539
1540 2004-01-07  Daniel Jacobowitz  <drow@mvista.com>
1541
1542         * Makefile.am (libopcodes_la_DEPENDENCIES)
1543         (libopcodes_la_LIBADD): Revert 2003-05-17 change.  Add explanatory
1544         comment about the problem.
1545         * Makefile.in: Regenerate.
1546
1547 2004-01-06  Alexandre Oliva  <aoliva@redhat.com>
1548
1549         2003-12-19  Alexandre Oliva  <aoliva@redhat.com>
1550         * frv-asm.c (parse_ulo16, parse_uhi16, parse_d12): Fix some
1551         cut&paste errors in shifting/truncating numerical operands.
1552         2003-08-04  Alexandre Oliva  <aoliva@redhat.com>
1553         * frv-asm.c (parse_ulo16): Parse gotofflo and gotofffuncdesclo.
1554         (parse_uslo16): Likewise.
1555         (parse_uhi16): Parse gotoffhi and gotofffuncdeschi.
1556         (parse_d12): Parse gotoff12 and gotofffuncdesc12.
1557         (parse_s12): Likewise.
1558         2003-08-04  Alexandre Oliva  <aoliva@redhat.com>
1559         * frv-asm.c (parse_ulo16): Parse gotlo and gotfuncdesclo.
1560         (parse_uslo16): Likewise.
1561         (parse_uhi16): Parse gothi and gotfuncdeschi.
1562         (parse_d12): Parse got12 and gotfuncdesc12.
1563         (parse_s12): Likewise.
1564
1565 2004-01-02  Albert Bartoszko  <albar@nt.kegel.com.pl>
1566
1567         * msp430-dis.c (msp430_doubleoperand): Check for an 'add'
1568         instruction which looks similar to an 'rla' instruction.
1569
1570 For older changes see ChangeLog-0203
1571 \f
1572 Local Variables:
1573 mode: change-log
1574 left-margin: 8
1575 fill-column: 74
1576 version-control: never
1577 End: