1 2019-05-06 Andrew Bennett <andrew.bennett@imgtec.com>
2 Faraz Shahbazker <fshahbazker@wavecomp.com>
4 * mips-dis.c (mips_calculate_combination_ases): Add ISA
5 argument and set ASE_EVA_R6 appropriately.
6 (set_default_mips_dis_options): Pass ISA to above.
7 (parse_mips_dis_option): Likewise.
8 * mips-opc.c (EVAR6): New macro.
9 (mips_builtin_opcodes): Add llwpe, scwpe.
11 2019-05-01 Sudakshina Das <sudi.das@arm.com>
13 * aarch64-asm-2.c: Regenerated.
14 * aarch64-dis-2.c: Regenerated.
15 * aarch64-opc-2.c: Regenerated.
16 * aarch64-opc.c (operand_general_constraint_met_p): Add case for
17 AARCH64_OPND_TME_UIMM16.
18 (aarch64_print_operand): Likewise.
19 * aarch64-tbl.h (QL_IMM_NIL): New.
22 (struct aarch64_opcode): Add tstart, tcommit, ttest and tcancel.
24 2019-04-29 John Darrington <john@darrington.wattle.id.au>
26 * s12z-opc.c (shift_discrim): Return OP_INVALID when reading fails.
28 2019-04-26 Andrew Bennett <andrew.bennett@imgtec.com>
29 Faraz Shahbazker <fshahbazker@wavecomp.com>
31 * mips-opc.c (mips_builtin_opcodes): Add llwp, lldp, scwp, scdp.
33 2019-04-24 John Darrington <john@darrington.wattle.id.au>
35 * s12z-opc.h: Add extern "C" bracketing to help
36 users who wish to use this interface in c++ code.
38 2019-04-24 John Darrington <john@darrington.wattle.id.au>
40 * s12z-opc.c (bm_decode): Handle bit map operations with the
43 2019-04-15 Thomas Preud'homme <thomas.preudhomme@arm.com>
45 * arm-dis.c (coprocessor_opcodes): Document new %J and %K format
46 specifier. Add entries for VLDR and VSTR of system registers.
47 (print_insn_coprocessor): Forbid coprocessor numbers 8, 14 and 15 in
48 coprocessor instructions on Armv8.1-M Mainline targets. Add handling
49 of %J and %K format specifier.
51 2019-04-15 Thomas Preud'homme <thomas.preudhomme@arm.com>
53 * arm-dis.c (coprocessor_opcodes): Document new %C format control code.
54 Add new entries for VSCCLRM instruction.
55 (print_insn_coprocessor): Handle new %C format control code.
57 2019-04-15 Thomas Preud'homme <thomas.preudhomme@arm.com>
59 * arm-dis.c (enum isa): New enum.
60 (struct sopcode32): New structure.
61 (coprocessor_opcodes): change type of entries to struct sopcode32 and
62 set isa field of all current entries to ANY.
63 (print_insn_coprocessor): Change type of insn to struct sopcode32.
64 Only match an entry if its isa field allows the current mode.
66 2019-04-15 Thomas Preud'homme <thomas.preudhomme@arm.com>
68 * arm-dis.c (thumb_opcodes): Document %n control code. Add entry for
70 (print_insn_thumb32): Add logic to print %n CLRM register list.
72 2019-04-15 Sudakshina Das <sudi.das@arm.com>
74 * arm-dis.c (print_insn_thumb32): Updated to accept new %P
77 2019-04-15 Sudakshina Das <sudi.das@arm.com>
79 * arm-dis.c (thumb32_opcodes): New instruction bfcsel.
80 (print_insn_thumb32): Edit the switch case for %Z.
82 2019-04-15 Sudakshina Das <sudi.das@arm.com>
84 * arm-dis.c (print_insn_thumb32): Updated to accept new %Z pattern.
86 2019-04-15 Sudakshina Das <sudi.das@arm.com>
88 * arm-dis.c (thumb32_opcodes): New instruction bfl.
90 2019-04-15 Sudakshina Das <sudi.das@arm.com>
92 * arm-dis.c (print_insn_thumb32): Updated to accept new %Y pattern.
94 2019-04-15 Sudakshina Das <sudi.das@arm.com>
96 * arm-dis.c (print_insn_thumb32): Add '%<bitfield>S' to print an
97 Arm register with r13 and r15 unpredictable.
98 (thumb32_opcodes): New instructions for bfx and bflx.
100 2019-04-15 Sudakshina Das <sudi.das@arm.com>
102 * arm-dis.c (thumb32_opcodes): New instructions for bf.
104 2019-04-15 Sudakshina Das <sudi.das@arm.com>
106 * arm-dis.c (print_insn_thumb32): Updated to accept new %W pattern.
108 2019-04-15 Sudakshina Das <sudi.das@arm.com>
110 * arm-dis.c (print_insn_thumb32): Updated to accept new %G pattern.
112 2019-04-15 Thomas Preud'homme <thomas.preudhomme@arm.com>
114 * arm-dis.c (select_arm_features): Add logic for Armv8.1-M Mainline.
116 2019-04-12 John Darrington <john@darrington.wattle.id.au>
118 s12z-dis.c, s12z-opc.c, s12z-opc.h: Replace "operator" with
119 "optr". ("operator" is a reserved word in c++).
121 2019-04-11 Sudakshina Das <sudi.das@arm.com>
123 * aarch64-opc.c (aarch64_print_operand): Add case for
125 (verify_constraints): Likewise.
126 * aarch64-tbl.h (QL_LDST_AT): Update to add SP qualifier.
127 (struct aarch64_opcode): Update stg, stzg, st2g, stz2g instructions
128 to accept Rt|SP as first operand.
129 (AARCH64_OPERANDS): Add new Rt_SP.
130 * aarch64-asm-2.c: Regenerated.
131 * aarch64-dis-2.c: Regenerated.
132 * aarch64-opc-2.c: Regenerated.
134 2019-04-11 Sudakshina Das <sudi.das@arm.com>
136 * aarch64-asm-2.c: Regenerated.
137 * aarch64-dis-2.c: Likewise.
138 * aarch64-opc-2.c: Likewise.
139 * aarch64-tbl.h (aarch64_opcode): Add new ldgm and stgm.
141 2019-04-09 Robert Suchanek <robert.suchanek@mips.com>
143 * mips-opc.c (mips_builtin_opcodes): Add RDHWR rt rd sel.
145 2019-04-08 H.J. Lu <hongjiu.lu@intel.com>
147 * i386-opc.tbl: Consolidate AVX512 BF16 entries.
148 * i386-init.h: Regenerated.
150 2019-04-07 Alan Modra <amodra@gmail.com>
152 * ppc-dis.c (print_insn_powerpc): Use a tiny state machine
153 op_separator to control printing of spaces, comma and parens
154 rather than need_comma, need_paren and spaces vars.
156 2019-04-07 Alan Modra <amodra@gmail.com>
159 * arm-dis.c (print_insn_coprocessor): Correct bracket placement.
160 (print_insn_neon, print_insn_arm): Likewise.
162 2019-04-05 Xuepeng Guo <xuepeng.guo@intel.com>
164 * i386-dis-evex.h (evex_table): Updated to support BF16
166 * i386-dis.c (enum): Add EVEX_W_0F3852_P_1, EVEX_W_0F3872_P_1
167 and EVEX_W_0F3872_P_3.
168 * i386-gen.c (cpu_flag_init): Add CPU_AVX512_BF16_FLAGS.
169 (cpu_flags): Add bitfield for CpuAVX512_BF16.
170 * i386-opc.h (enum): Add CpuAVX512_BF16.
171 (i386_cpu_flags): Add bitfield for cpuavx512_bf16.
172 * i386-opc.tbl: Add AVX512 BF16 instructions.
173 * i386-init.h: Regenerated.
174 * i386-tbl.h: Likewise.
176 2019-04-05 Alan Modra <amodra@gmail.com>
178 * ppc-opc.c (XLBH_MASK): Subtract off BH field from BB_MASK.
179 (powerpc_opcodes): Reorder bcctr and bclr extended mnemonics
180 to favour printing of "-" branch hint when using the "y" bit.
181 Allow BH field on bc{ctr,lr,tar}{,l}{-,+}.
183 2019-04-05 Alan Modra <amodra@gmail.com>
185 * ppc-dis.c (print_insn_powerpc): Delay printing spaces after
186 opcode until first operand is output.
188 2019-04-04 Peter Bergner <bergner@linux.ibm.com>
191 * ppc-opc.c (valid_bo_pre_v2): Add comments.
192 (valid_bo_post_v2): Add support for 'at' branch hints.
193 (insert_bo): Only error on branch on ctr.
194 (get_bo_hint_mask): New function.
195 (insert_boe): Add new 'branch_taken' formal argument. Add support
196 for inserting 'at' branch hints.
197 (extract_boe): Add new 'branch_taken' formal argument. Add support
198 for extracting 'at' branch hints.
199 (insert_bom, extract_bom, insert_bop, extract_bop): New functions.
200 (BOE): Delete operand.
201 (BOM, BOP): New operands.
203 (XLYLK, XLYLK_MASK, XLYBB_MASK): Delete.
204 (powerpc_opcodes) <bc-, bcl-, bca-, bcla-, bclr-, bclrl-, bcctr-,
205 bcctrl-, bctar-, bctarl->: Replace BOE with BOM.
206 (powerpc_opcodes) <bc+, bcl+, bca+, bcla+, bclr+, bclrl+, bcctr+,
207 bcctrl+, bctar+, bctarl+>: Replace BOE with BOP.
208 <bdnztar, bdnztarl, bdztar, bdztarl, btar, btarl, bdnztar-, bdnztarl-,
209 bdnztar+, bdnztarl+, bdztar-, bdztarl-, bdztar+, bdztarl+, bgetar,
210 bnltar, bgetarl, bnltarl, bletar, bngtar, bletarl, bngtarl, bnetar,
211 bnetarl, bnstar, bnutar, bnstarl, bnutarl, bgetar-, bnltar-, bgetarl-,
212 bnltarl-, bletar-, bngtar-, bletarl-, bngtarl-, bnetar-, bnetarl-,
213 bnstar-, bnutar-, bnstarl-, bnutarl-, bgetar+, bnltar+, bgetarl+,
214 bnltarl+, bletar+, bngtar+, bletarl+, bngtarl+, bnetar+, bnetarl+,
215 bnstar+, bnutar+, bnstarl+, bnutarl+, blttar, blttarl, bgttar, bgttarl,
216 beqtar, beqtarl, bsotar, buntar, bsotarl, buntarl, blttar-, blttarl-,
217 bgttar-, bgttarl-, beqtar-, beqtarl-, bsotar-, buntar-, bsotarl-,
218 buntarl-, blttar+, blttarl+, bgttar+, bgttarl+, beqtar+, beqtarl+,
219 bsotar+, buntar+, bsotarl+, buntarl+, bdnzftar, bdnzftarl, bdzftar,
220 bdzftarl, bftar, bftarl, bftar-, bftarl-, bftar+, bftarl+, bdnzttar,
221 bdnzttarl, bdzttar, bdzttarl, bttar, bttarl, bttar-, bttarl-, bttar+,
222 bttarl+>: New extended mnemonics.
224 2019-03-28 Alan Modra <amodra@gmail.com>
227 * ppc-opc.c (BTF): Define.
228 (powerpc_opcodes): Use for mtfsb*.
229 * ppc-dis.c (print_insn_powerpc): Print fields with both
230 PPC_OPERAND_CR_REG and PPC_OPERAND_CR_BIT as a plain number.
232 2019-03-25 Tamar Christina <tamar.christina@arm.com>
234 * arm-dis.c (struct arm_private_data): Remove has_mapping_symbols.
235 (mapping_symbol_for_insn): Implement new algorithm.
236 (print_insn): Remove duplicate code.
238 2019-03-25 Tamar Christina <tamar.christina@arm.com>
240 * aarch64-dis.c (print_insn_aarch64):
243 2019-03-25 Tamar Christina <tamar.christina@arm.com>
245 * aarch64-dis.c (print_insn_aarch64): Update the mapping symbol search
248 2019-03-25 Tamar Christina <tamar.christina@arm.com>
250 * aarch64-dis.c (last_stop_offset): New.
251 (print_insn_aarch64): Use stop_offset.
253 2019-03-19 H.J. Lu <hongjiu.lu@intel.com>
256 * i386-gen.c (cpu_flag_init): Add CPU_ANY_AVX512F_FLAGS to
258 * i386-init.h: Regenerated.
260 2019-03-18 H.J. Lu <hongjiu.lu@intel.com>
263 * i386-opc.tbl: Add Optimize to vmovdqa32, vmovdqa64, vmovdqu8,
264 vmovdqu16, vmovdqu32 and vmovdqu64.
265 * i386-tbl.h: Regenerated.
267 2019-03-12 Andreas Krebbel <krebbel@linux.ibm.com>
269 * s390-opc.txt: Rename selhhhr to selfhr. Remove optional operand
270 from vstrszb, vstrszh, and vstrszf.
272 2019-03-12 Andreas Krebbel <krebbel@linux.ibm.com>
274 * s390-opc.txt: Add instruction descriptions.
276 2019-02-08 Jim Wilson <jimw@sifive.com>
278 * riscv-opc.c (riscv_opcodes) <beq>: Use Cz to compress 3 operand form.
281 2019-02-07 Tamar Christina <tamar.christina@arm.com>
283 * arm-dis.c (arm_opcodes): Redefine hlt to armv1.
285 2019-02-07 Tamar Christina <tamar.christina@arm.com>
288 * aarch64-opc.h (enum aarch64_field_kind): Add FLD_sz.
289 * aarch64-opc.c (verify_elem_sd): New.
290 (fields): Add FLD_sz entr.
291 * aarch64-tbl.h (_SIMD_INSN): New.
292 (aarch64_opcode_table): Add elem_sd verifier to fmla, fmls, fmul and
293 fmulx scalar and vector by element isns.
295 2019-02-07 Nick Clifton <nickc@redhat.com>
297 * po/sv.po: Updated Swedish translation.
299 2019-01-31 Andreas Krebbel <krebbel@linux.ibm.com>
301 * s390-mkopc.c (main): Accept arch13 as cpu string.
302 * s390-opc.c: Add new instruction formats and instruction opcode
304 * s390-opc.txt: Add new arch13 instructions.
306 2019-01-25 Sudakshina Das <sudi.das@arm.com>
308 * aarch64-tbl.h (QL_LDST_AT): Update macro.
309 (aarch64_opcode): Change encoding for stg, stzg
311 * aarch64-asm-2.c: Regenerated.
312 * aarch64-dis-2.c: Regenerated.
313 * aarch64-opc-2.c: Regenerated.
315 2019-01-25 Sudakshina Das <sudi.das@arm.com>
317 * aarch64-asm-2.c: Regenerated.
318 * aarch64-dis-2.c: Likewise.
319 * aarch64-opc-2.c: Likewise.
320 * aarch64-tbl.h (aarch64_opcode): Add new stzgm.
322 2019-01-25 Sudakshina Das <sudi.das@arm.com>
323 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
325 * aarch64-asm.c (aarch64_ins_addr_simple_2): Remove.
326 * aarch64-asm.h (ins_addr_simple_2): Likeiwse.
327 * aarch64-dis.c (aarch64_ext_addr_simple_2): Likewise.
328 * aarch64-dis.h (ext_addr_simple_2): Likewise.
329 * aarch64-opc.c (operand_general_constraint_met_p): Remove
330 case for ldstgv_indexed.
331 (aarch64_print_operand): Remove case for AARCH64_OPND_ADDR_SIMPLE_2.
332 * aarch64-tbl.h (struct aarch64_opcode): Remove ldgv and stgv.
333 (AARCH64_OPERANDS): Remove ADDR_SIMPLE_2.
334 * aarch64-asm-2.c: Regenerated.
335 * aarch64-dis-2.c: Regenerated.
336 * aarch64-opc-2.c: Regenerated.
338 2019-01-23 Nick Clifton <nickc@redhat.com>
340 * po/pt_BR.po: Updated Brazilian Portuguese translation.
342 2019-01-21 Nick Clifton <nickc@redhat.com>
344 * po/de.po: Updated German translation.
345 * po/uk.po: Updated Ukranian translation.
347 2019-01-20 Chenghua Xu <paul.hua.gm@gmail.com>
348 * mips-dis.c (mips_arch_choices): Fix typo in
349 gs464, gs464e and gs264e descriptors.
351 2019-01-19 Nick Clifton <nickc@redhat.com>
353 * configure: Regenerate.
354 * po/opcodes.pot: Regenerate.
356 2018-06-24 Nick Clifton <nickc@redhat.com>
360 2019-01-09 John Darrington <john@darrington.wattle.id.au>
362 * s12z-dis.c (print_insn_s12z): Do not dereference an operand
364 -dis.c (opr_emit_disassembly): Do not omit an index if it is
367 2019-01-09 Andrew Paprocki <andrew@ishiboo.com>
369 * configure: Regenerate.
371 2019-01-07 Alan Modra <amodra@gmail.com>
373 * configure: Regenerate.
374 * po/POTFILES.in: Regenerate.
376 2019-01-03 John Darrington <john@darrington.wattle.id.au>
378 * s12z-opc.c: New file.
379 * s12z-opc.h: New file.
380 * s12z-dis.c: Removed all code not directly related to display
381 of instructions. Used the interface provided by the new files
383 * Makefile.am (TARGET_LIBOPCODES_CFILES) Add s12z-opc.c.
384 * Makefile.in: Regenerate.
385 * configure.ac (bfd_s12z_arch): Correct the dependencies.
386 * configure: Regenerate.
388 2019-01-01 Alan Modra <amodra@gmail.com>
390 Update year range in copyright notice of all files.
392 For older changes see ChangeLog-2018
394 Copyright (C) 2019 Free Software Foundation, Inc.
396 Copying and distribution of this file, with or without modification,
397 are permitted in any medium without royalty provided the copyright
398 notice and this notice are preserved.
404 version-control: never